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-- tristate.vhd
-- Eurobot 2004 : APB Team
-- Auteur : Pierre-Andr� Galmes
-- Registre dont la valeur est accessible en lecture.

-- Principe :
-- Bloc trois �tats (three-state) qui met les sorties en hautes imp�dance si
-- elle ne sont pas "enabled".

library ieee;
use	ieee.std_logic_1164.all;
use     ieee.std_logic_arith.all;
use     ieee.std_logic_unsigned.all;

use	work.isa_const.all;
use	work.nono_const.all;


entity tristate is
    port (
	rst : std_logic;
	clk : std_logic;
	enable  : in std_logic;
	data_in : in T_DATA;
	data_out : out T_DATA 
    );
end entity;

architecture RTL of tristate is
begin
	process (rst, clk)
	begin
	 if (rst = '1') then
		 data_out <= (others => 'Z');
	elsif (clk'event and clk = '1') then
		 if (enable = '1') then
		 	data_out <= data_in;
		 else
		 	data_out <= (others => 'Z');
		 end if;
	end if;
	end process;

	 -- partie combinatoire.
    --data_out <= data_in when (enable = '1') else (others => 'Z');
end RTL;