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-------------------------------------------------------------------------------
--fsmpwm3.vhd 
--Eurobot 2004 : APB Team
--Auteur : Fid�le GAFAN
--S�quenceur du module g�n�rateur des signaux de commande du servo-moteur
--
--REMARQUE(S):NADA
-------------------------------------------------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
library work;
library synopsys;
use synopsys.bv_arithmetic.all;
--ENTITY

entity fsmpwm3 is
port(  	RST		:in std_logic;
      	CLK		:in std_logic;
	CLK1USFSM	:in std_logic;
	tcfsm		:in integer range 0 to 20161;--synch des 20 ms
      	enloadfsm	:out std_logic
	);
end fsmpwm3;


--ARCHITECTURE
architecture BEHAV of fsmpwm3 is

type machine is (STATE1,STATE2, STATE3);
	signal state_c,state_f : machine;
begin

    -- PROCESS COMBI
    process(CLK1USFSM,tcfsm,state_c)
constant tcmax		:integer range 0 to 20161:= 20161;
      begin
	enloadfsm	<='0';
	state_f 	<= state_c; 
       case state_c is
         when STATE1 => enloadfsm<='0';  --demarrage avec prem valeur de data
                                         --sans necessite de load a 1:regdata
                                         --sort 0
                        state_f<=STATE3;  --passe a st3 d�s front de clk1us
                                          --pour calculs
        
         when STATE2 => enloadfsm<='1';  --chargement  pendant 1 cycle de
                                         --clk1us et tc est max
         		state_f<=STATE3;                     
         when STATE3 => enloadfsm<='0';  --calculs

		      if (tcfsm=0) then --test de fin de comptage des 20ms
         			state_f<=STATE2;
         		elsif ((tcfsm<=tcmax) and (tcfsm/=0)) then --continuer � compter jusqu'� 20ms
                        	state_f<=STATE3;
                        elsif ((tcfsm>tcmax)) then 
                        	state_f<=STATE2;
                        end if;
          when others => null;
         
       end case;       
    end process;

        -- PROCESS SEQ
  process (RST,CLK)
    begin
      if (RST='1') then
      	 state_c<=STATE1;
      	 --enloadfsm<='0';--si mis, ind�termin�e !!!
      elsif (CLK'event and CLK='1') then
        if (CLK1USFSM='1') then
        state_c <= state_f;
        end if;end if;
    end process;

  end BEHAV;