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path: root/2004/n/fpga/src/gpio/ISE_bch/gpio_direction_tbw.tbw
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info x 27 510 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VHDL
col x 257 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
radix x 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
entity name 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 gpio_direction
term mark 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
vlib save 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library work;
use work.isa_const.all;
use work.nono_const.all;

var add 1 7 0 36 21 0 257 100 0 0 0 0 0 50 50 0 direction_maskInstd_logic_vectorRISING_EDGENone
var add 2 7 0 36 22 0 257 100 0 0 0 0 0 50 50 0 data_inInstd_logic_vectorRISING_EDGENone
var add 3 7 0 36 23 0 257 100 0 0 0 0 0 50 50 0 data_outOutstd_logic_vectorRISING_EDGENone
vdone xxx 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
npos xxx 160 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
cell fill 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00000100
cell fill 1 12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00000111
cell fill 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00000001
cell fill 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00000010
cell fill 2 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00000111
time info 50 50 10 10 50 50 0 1 0 0 0 0 0 0 0 0 ns
font save -14 0 400 49 0 0 0 0 0 0 0 0 0 0 0 0 Times New Roman
src mod 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 f:\cours\i2\electronique\vhdl\projet\carte_fpga\src\gpio\gpio_direction.vhd
utd false 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
cellenab on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
grid on 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
com add 1 1 0 514 5 0 -79 0 0 0 0 0 0 0 0 0 Waveform created by
HDL Bencher 6.1i
Source = f:\cours\i2\electronique\vhdl\projet\carte_fpga\src\gpio\gpio_direction.vhd
Wed Mar 17 10:48:32 2004
type info 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 clkBITDOWNTO
opt vhdl87 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
NumClocks x 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
Zoom_level x 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1.00000000000000