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+-- bch_tristate.vhd
+-- Eurobot 2004 : APB Team
+-- Auteur : Pierre-André Galmes
+-- Test de tristate.
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+use ieee.std_logic_unsigned.all;
+
+use work.isa_const.all;
+use work.nono_const.all;
+
+
+entity bch_tristate is
+end bch_tristate;
+
+architecture sim1 of bch_tristate is
+
+ component tristate
+ port (
+ enable : in std_logic;
+ data_in : in T_DATA;
+ data_out : out T_DATA
+ );
+ end component;
+
+ -- définiton des signaux
+ signal enable : std_logic;
+ signal data_in : T_DATA;
+ signal data_out : T_DATA;
+
+begin
+ U1 : tristate port map (
+ enable => enable,
+ data_in => data_in,
+ data_out => data_out
+ );
+
+ enable <= '0',
+ '1' after 2*CK_PERIOD,
+ '0' after 3*CK_PERIOD,
+ '1' after 5*CK_PERIOD,
+ '0' after 6*CK_PERIOD;
+ data_in <= x"01",
+ x"02" after 3*CK_PERIOD,
+ x"06" after 5*CK_PERIOD;
+ --x"03" after 5*CK_PERIOD;
+end sim1;
+
+configuration cf1_bch_tristate of bch_tristate is
+ for sim1
+ for all : tristate use entity work.tristate(RTL); end for;
+ end for;
+end cf1_bch_tristate;
+