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Diffstat (limited to '2004/n/fpga/src/decodisa/bch_decodeur4.vhd')
-rw-r--r--2004/n/fpga/src/decodisa/bch_decodeur4.vhd7
1 files changed, 4 insertions, 3 deletions
diff --git a/2004/n/fpga/src/decodisa/bch_decodeur4.vhd b/2004/n/fpga/src/decodisa/bch_decodeur4.vhd
index 2f7ca18..be1d071 100644
--- a/2004/n/fpga/src/decodisa/bch_decodeur4.vhd
+++ b/2004/n/fpga/src/decodisa/bch_decodeur4.vhd
@@ -17,8 +17,8 @@ end bch_decodeur4;
architecture sim1 of bch_decodeur4 is
component decodeur4
- generic (
- -- adresses des différents registres du module.
+ generic (
+ -- adresses des différents registres du module.
A_REG0 : T_ADDRESS;
A_REG1 : T_ADDRESS;
A_REG2 : T_ADDRESS;
@@ -33,7 +33,7 @@ architecture sim1 of bch_decodeur4 is
enable1 : out std_logic;
enable2 : out std_logic;
enable3 : out std_logic
- );
+ );
end component;
-- définiton des signaux
@@ -68,6 +68,7 @@ begin
A_IO1_REG_DATA after 7*CK_PERIOD;
end sim1;
+
configuration cf1_bch_decodeur4 of bch_decodeur4 is
for sim1
for all : decodeur4 use entity work.decodeur4(RTL); end for;