summaryrefslogtreecommitdiff
path: root/2004/n/fpga/src/decodisa
diff options
context:
space:
mode:
authorgalmes2004-02-29 16:16:56 +0000
committergalmes2004-02-29 16:16:56 +0000
commita5650896d8e038c2938175c9ea92d7a9554f7f02 (patch)
tree1993529b09fe217b8b9ca8e81368905922b8213f /2004/n/fpga/src/decodisa
parent74113ba7738606383d83e44d8ab75d85d8fe1166 (diff)
Déplacement de fichiers.
Diffstat (limited to '2004/n/fpga/src/decodisa')
-rw-r--r--2004/n/fpga/src/decodisa/bch_decodeur4.vhd76
-rw-r--r--2004/n/fpga/src/decodisa/decodeur4.vhd51
2 files changed, 127 insertions, 0 deletions
diff --git a/2004/n/fpga/src/decodisa/bch_decodeur4.vhd b/2004/n/fpga/src/decodisa/bch_decodeur4.vhd
new file mode 100644
index 0000000..2f7ca18
--- /dev/null
+++ b/2004/n/fpga/src/decodisa/bch_decodeur4.vhd
@@ -0,0 +1,76 @@
+-- bch_decodeur4.vhd
+-- Eurobot 2004 : APB Team
+-- Auteur : Pierre-André Galmes
+-- Test du decodeur4.
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+use ieee.std_logic_unsigned.all;
+
+use work.nono_const.all;
+
+
+entity bch_decodeur4 is
+end bch_decodeur4;
+
+architecture sim1 of bch_decodeur4 is
+
+ component decodeur4
+ generic (
+ -- adresses des différents registres du module.
+ A_REG0 : T_ADDRESS;
+ A_REG1 : T_ADDRESS;
+ A_REG2 : T_ADDRESS;
+ A_REG3 : T_ADDRESS
+ -- si autre choses à déclarer...
+ );
+ port (
+ -- TODO : utile la clock ?
+ --clk : in std_logic;
+ bus_address : in T_ADDRESS;
+ enable0 : out std_logic;
+ enable1 : out std_logic;
+ enable2 : out std_logic;
+ enable3 : out std_logic
+ );
+ end component;
+
+ -- définiton des signaux
+ --signal clk : std_logic := '0';
+ signal bus_address : T_ADDRESS;
+ signal enable0 : std_logic;
+ signal enable1 : std_logic;
+ signal enable2 : std_logic;
+ signal enable3 : std_logic;
+
+begin
+ U1 : decodeur4
+ generic map (
+ -- Définition des addresses.
+ A_REG0 => A_IO1_REG_DATA,
+ A_REG1 => A_IO1_REG_DIRECTION,
+ A_REG2 => A_IO1_REG_INTERRUPT_MASK,
+ A_REG3 => A_IO1_READ_OUTPUT
+ )
+ port map (
+ bus_address => bus_address,
+ enable0 => enable0,
+ enable1 => enable1,
+ enable2 => enable2,
+ enable3 => enable3
+ );
+
+ --clk <= not clk after (CK_PERIOD/2);
+ bus_address <= A_IO1_REG_DIRECTION,
+ A_IO1_READ_OUTPUT after 3*CK_PERIOD,
+ A_IO1_REG_INTERRUPT_MASK after 5*CK_PERIOD,
+ A_IO1_REG_DATA after 7*CK_PERIOD;
+end sim1;
+
+configuration cf1_bch_decodeur4 of bch_decodeur4 is
+ for sim1
+ for all : decodeur4 use entity work.decodeur4(RTL); end for;
+ end for;
+end cf1_bch_decodeur4;
+
diff --git a/2004/n/fpga/src/decodisa/decodeur4.vhd b/2004/n/fpga/src/decodisa/decodeur4.vhd
new file mode 100644
index 0000000..6ecb12e
--- /dev/null
+++ b/2004/n/fpga/src/decodisa/decodeur4.vhd
@@ -0,0 +1,51 @@
+-- decodeur4.vhd
+-- Eurobot 2004 : APB Team
+-- Auteur : Pierre-André Galmes
+-- Décodeur de bus d'addresse pour 4 registres.
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+-- TODO : si on décommente les lignes du dessous, on a des Warning !! Est-ce
+-- normal ? Cela vient-il d'un problème de programmation caché ? Est-ce des
+-- conflits entre les librairies ?
+--use ieee.std_logic_arith.all;
+--use ieee.std_logic_unsigned.all;
+
+use work.nono_const.all;
+
+entity decodeur is
+ generic (
+ -- adresses des différents registres du module.
+ A_REG0 : T_ADDRESS;
+ A_REG1 : T_ADDRESS;
+ A_REG2 : T_ADDRESS;
+ A_REG3 : T_ADDRESS
+ -- si autre choses à déclarer...
+ );
+ port (
+ -- TODO : utile la clock ?
+ --clk : in std_logic;
+ bus_address : in T_ADDRESS;
+ enable0 : out std_logic;
+ enable1 : out std_logic;
+ enable2 : out std_logic;
+ enable3 : out std_logic
+ );
+end entity;
+
+architecture RTL of decodeur is
+begin
+
+-- process (clk)
+-- begin
+-- if (clk'event and clk = '1') then
+-- end if;
+-- end process;
+
+ -- process combinatoire.
+ enable0 <= '1' when (bus_address = A_REG0) else '0';
+ enable1 <= '1' when (bus_address = A_REG1) else '0';
+ enable2 <= '1' when (bus_address = A_REG2) else '0';
+ enable3 <= '1' when (bus_address = A_REG3) else '0';
+end RTL;