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-rw-r--r--lib/stm32/usart.c187
1 files changed, 187 insertions, 0 deletions
diff --git a/lib/stm32/usart.c b/lib/stm32/usart.c
index 1d0ea9b..2958d7c 100644
--- a/lib/stm32/usart.c
+++ b/lib/stm32/usart.c
@@ -1,3 +1,22 @@
+/** @defgroup STM32F1xx_usart_file USART
+
+@ingroup STM32F_files
+
+@brief <b>libopencm3 STM32F USART</b>
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+
+@date 30 August 2012
+
+This library supports the USART/UART in the STM32F series
+of ARM Cortex Microcontrollers by ST Microelectronics.
+
+Devices can have up to 3 USARTs and 2 UARTs.
+
+LGPL License Terms @ref lgpl_license
+ */
/*
* This file is part of the libopencm3 project.
*
@@ -17,6 +36,8 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
+/**@{*/
+
#include <libopencm3/stm32/usart.h>
#if defined(STM32F1)
@@ -29,6 +50,20 @@
# error "stm32 family not defined."
#endif
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Set Baudrate.
+
+The baud rate is computed from the APB high-speed prescaler clock (for USART1)
+or the APB low-speed prescaler clock (for other USARTs). These values must
+be correctly set before calling this function (refer to the rcc_clock_setup-*
+functions in RCC).
+
+@todo Add support for USART6 and oversampling in F2/F4
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] baud unsigned 32 bit. Baud rate specified in Hz.
+*/
+
void usart_set_baudrate(u32 usart, u32 baud)
{
u32 clock = rcc_ppre1_frequency;
@@ -59,6 +94,16 @@ void usart_set_baudrate(u32 usart, u32 baud)
USART_BRR(usart) = ((2 * clock) + baud) / (2 * baud);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Set Word Length.
+
+The word length is set to 8 or 9 bits. Note that the last bit will be a parity bit
+if parity is enabled, in which case the data length will be 7 or 8 bits respectively.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] bits unsigned 32 bit. Word length in bits 8 or 9.
+*/
+
void usart_set_databits(u32 usart, u32 bits)
{
if (bits == 8)
@@ -67,6 +112,15 @@ void usart_set_databits(u32 usart, u32 bits)
USART_CR1(usart) |= USART_CR1_M; /* 9 data bits */
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Set Stop Bit(s).
+
+The stop bits are specified as 0.5, 1, 1.5 or 2.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] stopbits unsigned 32 bit. Stop bits @ref usart_cr2_stopbits.
+*/
+
void usart_set_stopbits(u32 usart, u32 stopbits)
{
u32 reg32;
@@ -76,6 +130,15 @@ void usart_set_stopbits(u32 usart, u32 stopbits)
USART_CR2(usart) = reg32;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Set Parity.
+
+The parity bit can be selected as none, even or odd.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] parity unsigned 32 bit. Parity @ref usart_cr1_parity.
+*/
+
void usart_set_parity(u32 usart, u32 parity)
{
u32 reg32;
@@ -85,6 +148,15 @@ void usart_set_parity(u32 usart, u32 parity)
USART_CR1(usart) = reg32;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Set Rx/Tx Mode.
+
+The mode can be selected as Rx only, Tx only or Rx+Tx.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] mode unsigned 32 bit. Mode @ref usart_cr1_mode.
+*/
+
void usart_set_mode(u32 usart, u32 mode)
{
u32 reg32;
@@ -94,6 +166,15 @@ void usart_set_mode(u32 usart, u32 mode)
USART_CR1(usart) = reg32;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Set Hardware Flow Control.
+
+The flow control bit can be selected as none, RTS, CTS or RTS+CTS.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] flowcontrol unsigned 32 bit. Flowcontrol @ref usart_cr3_flowcontrol.
+*/
+
void usart_set_flow_control(u32 usart, u32 flowcontrol)
{
u32 reg32;
@@ -103,46 +184,112 @@ void usart_set_flow_control(u32 usart, u32 flowcontrol)
USART_CR3(usart) = reg32;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Enable.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_enable(u32 usart)
{
USART_CR1(usart) |= USART_CR1_UE;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Disable.
+
+At the end of the current frame, the USART is disabled to reduce power.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_disable(u32 usart)
{
USART_CR1(usart) &= ~USART_CR1_UE;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Send a Data Word.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] data unsigned 16 bit.
+*/
+
void usart_send(u32 usart, u16 data)
{
/* Send data. */
USART_DR(usart) = (data & USART_DR_MASK);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Read a Received Data Word.
+
+If parity is enabled the MSB (bit 7 or 8 depending on the word length) is the parity bit.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@returns unsigned 16 bit data word.
+*/
+
u16 usart_recv(u32 usart)
{
/* Receive data. */
return USART_DR(usart) & USART_DR_MASK;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Wait for Transmit Data Buffer Empty
+
+Blocks until the transmit data buffer becomes empty and is ready to accept the
+next data word.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_wait_send_ready(u32 usart)
{
/* Wait until the data has been transferred into the shift register. */
while ((USART_SR(usart) & USART_SR_TXE) == 0);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Wait for Received Data Available
+
+Blocks until the receive data buffer holds a valid received data word.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_wait_recv_ready(u32 usart)
{
/* Wait until the data is ready to be received. */
while ((USART_SR(usart) & USART_SR_RXNE) == 0);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Send Data Word with Blocking
+
+Blocks until the transmit data buffer becomes empty then writes the next data word
+for transmission.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@param[in] data unsigned 16 bit.
+*/
+
void usart_send_blocking(u32 usart, u16 data)
{
usart_wait_send_ready(usart);
usart_send(usart, data);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Read a Received Data Word with Blocking.
+
+Wait until a data word has been received then return the word.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+@returns unsigned 16 bit data word.
+*/
+
u16 usart_recv_blocking(u32 usart)
{
usart_wait_recv_ready(usart);
@@ -150,22 +297,62 @@ u16 usart_recv_blocking(u32 usart)
return usart_recv(usart);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Receiver DMA Enable.
+
+DMA is available on:
+@li USART1 Rx DMA1 channel 5.
+@li USART2 Rx DMA1 channel 6.
+@li USART3 Rx DMA1 channel 3.
+@li UART4 Rx DMA2 channel 3.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_enable_rx_dma(u32 usart)
{
USART_CR3(usart) |= USART_CR3_DMAR;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Receiver DMA Disable.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_disable_rx_dma(u32 usart)
{
USART_CR3(usart) &= ~USART_CR3_DMAR;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Transmitter DMA Enable.
+
+DMA is available on:
+@li USART1 Tx DMA1 channel 4.
+@li USART2 Tx DMA1 channel 7.
+@li USART3 Tx DMA1 channel 2.
+@li UART4 Tx DMA2 channel 5.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_enable_tx_dma(u32 usart)
{
USART_CR3(usart) |= USART_CR3_DMAT;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief USART Transmitter DMA Disable.
+
+@param[in] usart unsigned 32 bit. USART block register address base @ref usart_reg_base
+*/
+
void usart_disable_tx_dma(u32 usart)
{
USART_CR3(usart) &= ~USART_CR3_DMAT;
}
+
+
+/**@}*/
+