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-rw-r--r--include/libopencm3/lm4f/doc-lm3s.h32
-rw-r--r--include/libopencm3/lm4f/gpio.h79
-rw-r--r--include/libopencm3/lm4f/memorymap.h47
-rw-r--r--include/libopencm3/lm4f/nvic.h34
-rw-r--r--include/libopencm3/lm4f/systemcontrol.h61
5 files changed, 253 insertions, 0 deletions
diff --git a/include/libopencm3/lm4f/doc-lm3s.h b/include/libopencm3/lm4f/doc-lm3s.h
new file mode 100644
index 0000000..2503a7b
--- /dev/null
+++ b/include/libopencm3/lm4f/doc-lm3s.h
@@ -0,0 +1,32 @@
+/** @mainpage libopencm3 LM3S
+
+@version 1.0.0
+
+@date 14 September 2012
+
+API documentation for TI Stellaris LM3S Cortex M3 series.
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup LM3S LM3S
+Libraries for TI Stellaris LM3S series.
+
+@version 1.0.0
+
+@date 7 September 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup LM3S_defines LM3S Defines
+
+@brief Defined Constants and Types for the LM3S series
+
+@version 1.0.0
+
+@date 14 September 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
diff --git a/include/libopencm3/lm4f/gpio.h b/include/libopencm3/lm4f/gpio.h
new file mode 100644
index 0000000..5296b74
--- /dev/null
+++ b/include/libopencm3/lm4f/gpio.h
@@ -0,0 +1,79 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LM3S_GPIO_H
+#define LM3S_GPIO_H
+
+#include <libopencm3/cm3/common.h>
+#include <libopencm3/lm3s/memorymap.h>
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* GPIO port base addresses (for convenience) */
+#define GPIOA GPIOA_APB_BASE
+#define GPIOB GPIOB_APB_BASE
+#define GPIOC GPIOC_APB_BASE
+#define GPIOD GPIOD_APB_BASE
+#define GPIOE GPIOE_APB_BASE
+#define GPIOF GPIOF_APB_BASE
+#define GPIOG GPIOG_APB_BASE
+#define GPIOH GPIOH_APB_BASE
+
+/* GPIO number definitions (for convenience) */
+#define GPIO0 (1 << 0)
+#define GPIO1 (1 << 1)
+#define GPIO2 (1 << 2)
+#define GPIO3 (1 << 3)
+#define GPIO4 (1 << 4)
+#define GPIO5 (1 << 5)
+#define GPIO6 (1 << 6)
+#define GPIO7 (1 << 7)
+
+/* --- GPIO registers ------------------------------------------------------ */
+
+#define GPIO_DATA(port) ((volatile u32 *)(port + 0x000))
+#define GPIO_DIR(port) MMIO32(port + 0x400)
+#define GPIO_IS(port) MMIO32(port + 0x404)
+#define GPIO_IBE(port) MMIO32(port + 0x408)
+#define GPIO_IEV(port) MMIO32(port + 0x40c)
+#define GPIO_IM(port) MMIO32(port + 0x410)
+#define GPIO_RIS(port) MMIO32(port + 0x414)
+#define GPIO_MIS(port) MMIO32(port + 0x418)
+#define GPIO_ICR(port) MMIO32(port + 0x41c)
+#define GPIO_AFSEL(port) MMIO32(port + 0x420)
+#define GPIO_DR2R(port) MMIO32(port + 0x500)
+#define GPIO_DR4R(port) MMIO32(port + 0x504)
+#define GPIO_DR8R(port) MMIO32(port + 0x508)
+#define GPIO_ODR(port) MMIO32(port + 0x50c)
+#define GPIO_PUR(port) MMIO32(port + 0x510)
+#define GPIO_PDR(port) MMIO32(port + 0x514)
+#define GPIO_SLR(port) MMIO32(port + 0x518)
+#define GPIO_DEN(port) MMIO32(port + 0x51c)
+#define GPIO_LOCK(port) MMIO32(port + 0x520)
+#define GPIO_CR(port) MMIO32(port + 0x524)
+#define GPIO_AMSEL(port) MMIO32(port + 0x528)
+
+BEGIN_DECLS
+
+void gpio_set(u32 gpioport, u8 gpios);
+void gpio_clear(u32 gpioport, u8 gpios);
+
+END_DECLS
+
+#endif
diff --git a/include/libopencm3/lm4f/memorymap.h b/include/libopencm3/lm4f/memorymap.h
new file mode 100644
index 0000000..55347bf
--- /dev/null
+++ b/include/libopencm3/lm4f/memorymap.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LM3S_MEMORYMAP_H
+#define LM3S_MEMORYMAP_H
+
+#include <libopencm3/cm3/common.h>
+
+/* --- LM3S specific peripheral definitions ----------------------------- */
+
+#define GPIOA_APB_BASE (0x40004000)
+#define GPIOB_APB_BASE (0x40005000)
+#define GPIOC_APB_BASE (0x40006000)
+#define GPIOD_APB_BASE (0x40007000)
+#define GPIOE_APB_BASE (0x40024000)
+#define GPIOF_APB_BASE (0x40025000)
+#define GPIOG_APB_BASE (0x40026000)
+#define GPIOH_APB_BASE (0x40027000)
+
+#define GPIOA_BASE (0x40058000)
+#define GPIOB_BASE (0x40059000)
+#define GPIOC_BASE (0x4005A000)
+#define GPIOD_BASE (0x4005B000)
+#define GPIOE_BASE (0x4005C000)
+#define GPIOF_BASE (0x4005D000)
+#define GPIOG_BASE (0x4005E000)
+#define GPIOH_BASE (0x4005F000)
+
+#define SYSTEMCONTROL_BASE (0x400FE000)
+
+#endif
diff --git a/include/libopencm3/lm4f/nvic.h b/include/libopencm3/lm4f/nvic.h
new file mode 100644
index 0000000..d29ea9c
--- /dev/null
+++ b/include/libopencm3/lm4f/nvic.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_LM3S_NVIC_H
+#define LIBOPENCM3_LM3S_NVIC_H
+
+#include <libopencm3/cm3/nvic.h>
+
+/*
+ * The LM3S interrupt table applies to the LM4F as well.
+ * Some interrupt vectores marked as reserved in LM3S are used in LM4F, and some
+ * vectors in LM3S are marked reserved for LM4F. However, the common vectors are
+ * identical, and we can safely use the same interrupt table. Reserved vectors
+ * will never be triggered, so having them is perfectly safe.
+ */
+#include <libopencm3/lm3s/nvic.h>
+
+#endif /* LIBOPENCM3_LM3S_NVIC_H */
diff --git a/include/libopencm3/lm4f/systemcontrol.h b/include/libopencm3/lm4f/systemcontrol.h
new file mode 100644
index 0000000..32b0ba5
--- /dev/null
+++ b/include/libopencm3/lm4f/systemcontrol.h
@@ -0,0 +1,61 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LM3S_SYSTEMCONTROL_H
+#define LM3S_SYSTEMCONTROL_H
+
+#include <libopencm3/cm3/common.h>
+
+#define SYSTEMCONTROL_DID0 MMIO32(SYSTEMCONTROL_BASE + 0x000)
+#define SYSTEMCONTROL_DID1 MMIO32(SYSTEMCONTROL_BASE + 0x004)
+#define SYSTEMCONTROL_DC0 MMIO32(SYSTEMCONTROL_BASE + 0x008)
+#define SYSTEMCONTROL_DC1 MMIO32(SYSTEMCONTROL_BASE + 0x010)
+#define SYSTEMCONTROL_DC2 MMIO32(SYSTEMCONTROL_BASE + 0x014)
+#define SYSTEMCONTROL_DC3 MMIO32(SYSTEMCONTROL_BASE + 0x018)
+#define SYSTEMCONTROL_DC4 MMIO32(SYSTEMCONTROL_BASE + 0x01C)
+#define SYSTEMCONTROL_DC5 MMIO32(SYSTEMCONTROL_BASE + 0x020)
+#define SYSTEMCONTROL_DC6 MMIO32(SYSTEMCONTROL_BASE + 0x024)
+#define SYSTEMCONTROL_DC7 MMIO32(SYSTEMCONTROL_BASE + 0x028)
+#define SYSTEMCONTROL_PBORCTL MMIO32(SYSTEMCONTROL_BASE + 0x030)
+#define SYSTEMCONTROL_LDORCTL MMIO32(SYSTEMCONTROL_BASE + 0x034)
+#define SYSTEMCONTROL_SRCR0 MMIO32(SYSTEMCONTROL_BASE + 0x040)
+#define SYSTEMCONTROL_SRCR1 MMIO32(SYSTEMCONTROL_BASE + 0x044)
+#define SYSTEMCONTROL_SRCR2 MMIO32(SYSTEMCONTROL_BASE + 0x048)
+#define SYSTEMCONTROL_RIS MMIO32(SYSTEMCONTROL_BASE + 0x050)
+#define SYSTEMCONTROL_IMC MMIO32(SYSTEMCONTROL_BASE + 0x054)
+#define SYSTEMCONTROL_MISC MMIO32(SYSTEMCONTROL_BASE + 0x058)
+#define SYSTEMCONTROL_RESC MMIO32(SYSTEMCONTROL_BASE + 0x05C)
+#define SYSTEMCONTROL_RCC MMIO32(SYSTEMCONTROL_BASE + 0x060)
+#define SYSTEMCONTROL_PLLCFG MMIO32(SYSTEMCONTROL_BASE + 0x064)
+#define SYSTEMCONTROL_GPIOHBCTL MMIO32(SYSTEMCONTROL_BASE + 0x06C)
+#define SYSTEMCONTROL_RCC2 MMIO32(SYSTEMCONTROL_BASE + 0x070)
+#define SYSTEMCONTROL_MOSCCTL MMIO32(SYSTEMCONTROL_BASE + 0x07C)
+#define SYSTEMCONTROL_RCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x100)
+#define SYSTEMCONTROL_RCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x104)
+#define SYSTEMCONTROL_RCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x108)
+#define SYSTEMCONTROL_SCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x110)
+#define SYSTEMCONTROL_SCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x114)
+#define SYSTEMCONTROL_SCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x118)
+#define SYSTEMCONTROL_DCGC0 MMIO32(SYSTEMCONTROL_BASE + 0x120)
+#define SYSTEMCONTROL_DCGC1 MMIO32(SYSTEMCONTROL_BASE + 0x124)
+#define SYSTEMCONTROL_DCGC2 MMIO32(SYSTEMCONTROL_BASE + 0x128)
+#define SYSTEMCONTROL_DSLPCLKCFG MMIO32(SYSTEMCONTROL_BASE + 0x144)
+
+#endif
+