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Diffstat (limited to 'examples/stm32/f2/jobygps/spi_test/spi_test.c')
-rw-r--r--examples/stm32/f2/jobygps/spi_test/spi_test.c113
1 files changed, 113 insertions, 0 deletions
diff --git a/examples/stm32/f2/jobygps/spi_test/spi_test.c b/examples/stm32/f2/jobygps/spi_test/spi_test.c
new file mode 100644
index 0000000..f1ce719
--- /dev/null
+++ b/examples/stm32/f2/jobygps/spi_test/spi_test.c
@@ -0,0 +1,113 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ * Copyright (C) 2011 Henry Hallam <henry@pericynthion.org>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/spi.h>
+#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/nvic.h>
+#include <libopencm3/stm32/f2/gpio.h>
+#include <libopencm3/stm32/f2/rcc.h>
+
+#include <stdio.h>
+#include <errno.h>
+
+void clock_setup(void)
+{
+ RCC_APB1ENR |= RCC_APB1ENR_SPI2EN;
+ RCC_APB2ENR |= RCC_APB2ENR_USART1EN;
+ RCC_AHB1ENR |= RCC_AHB1ENR_IOPCEN | RCC_AHB1ENR_IOPAEN | RCC_AHB1ENR_IOPBEN;
+
+}
+
+void spi_setup(void)
+{
+ gpio_mode_setup(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO13 | GPIO14 | GPIO15);
+ gpio_set_af(GPIOB, GPIO_AF5, GPIO13 | GPIO14 | GPIO15);
+
+ /* Setup SPI parameters. */
+ spi_init_master(SPI2, SPI_CR1_BAUDRATE_FPCLK_DIV_256, SPI_CR1_CPOL, \
+ SPI_CR1_CPHA, SPI_CR1_DFF_8BIT, SPI_CR1_MSBFIRST);
+ spi_enable_ss_output(SPI2); /* Required, see 25.3.1 section about NSS */
+
+ /* Finally enable the SPI. */
+ spi_enable(SPI2);
+}
+
+void usart_setup(void)
+{
+ gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
+ gpio_set_af(GPIOA, GPIO_AF7, GPIO9|GPIO10);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART1, 9600, 16000000);
+ usart_set_databits(USART1, 8);
+ usart_set_stopbits(USART1, USART_STOPBITS_1);
+ usart_set_parity(USART1, USART_PARITY_NONE);
+ usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE);
+ usart_set_mode(USART1, USART_MODE_TX);
+
+ /* Finally enable the USART. */
+ usart_enable(USART1);
+}
+
+void gpio_setup(void)
+{
+ gpio_set(GPIOC, GPIO3);
+
+ /* Setup GPIO3 (in GPIO port C) for led use. */
+ gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT,
+ GPIO_MODE_OUTPUT, GPIO3);
+}
+
+int _write (int file, char *ptr, int len)
+{
+ int i;
+
+ if (file == 1) {
+ for (i = 0; i < len; i++){
+ usart_send_blocking(USART1, ptr[i]);
+ }
+ return i;
+ }
+ errno = EIO;
+ return -1;
+}
+
+int main(void)
+{
+ int counter = 0;
+ volatile u16 dummy;
+
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+ spi_setup();
+
+ while (1)
+ {
+ counter++;
+ printf("Hello, world! %i\r\n", counter);
+ dummy = spi_read(SPI2); /* Stops RX buff overflow, but probably not needed */
+ spi_send(SPI2,(u8)counter);
+ gpio_toggle(GPIOC, GPIO3);
+ }
+
+ while(1);
+ return 0;
+}