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authorUwe Hermann2009-12-30 23:09:14 +0100
committerUwe Hermann2009-12-30 23:09:14 +0100
commita7a3770d5198d26c963127094a18175696f04827 (patch)
tree3900ce3cbf1d790142c4c3b13cae4580b6655678 /lib
parent821873acacd77139bc77a48f1f31631a474e3026 (diff)
Add initial SPI code.
For now, add the following basic SPI functions: - spi_init_master() - spi_write() - spi_read() This is incomplete and untested, yet. Also, add some more SPI bit definition macros and comments.
Diffstat (limited to 'lib')
-rw-r--r--lib/Makefile2
-rw-r--r--lib/spi.c64
2 files changed, 65 insertions, 1 deletions
diff --git a/lib/Makefile b/lib/Makefile
index 8dd2a08..855aa9b 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -27,7 +27,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../include -fno-common \
-mcpu=cortex-m3 -mthumb -Wstrict-prototypes
# ARFLAGS = rcsv
ARFLAGS = rcs
-OBJS = rcc.o gpio.o usart.o adc.o
+OBJS = rcc.o gpio.o usart.o adc.o spi.o
# Be silent per default, but 'make V=1' will show all compiler calls.
ifneq ($(V),1)
diff --git a/lib/spi.c b/lib/spi.c
new file mode 100644
index 0000000..02936ee
--- /dev/null
+++ b/lib/spi.c
@@ -0,0 +1,64 @@
+/*
+ * This file is part of the libopenstm32 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopenstm32.h>
+
+/*
+ * SPI and I2S code.
+ *
+ * Examples:
+ * spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
+ * SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
+ * SPI_CR1_LSBFIRST);
+ * spi_write(SPI1, 0x55); // 8-bit write
+ * spi_write(SPI1, 0xaa88); // 16-bit write
+ * reg8 = spi_read(SPI1); // 8-bit read
+ * reg16 = spi_read(SPI1); // 16-bit read
+ */
+
+int spi_init_master(u32 spi, u32 br, u32 cpol, u32 cpha, u32 dff, u32 lsbfirst)
+{
+ u32 reg32 = 0;
+
+ reg32 |= br; /* Set BAUD rate bits. */
+ reg32 |= cpol; /* Set CPOL value. */
+ reg32 |= cpha; /* Set CPHA value. */
+ reg32 |= dff; /* Set data format (8 or 16 bits). */
+ reg32 |= lsbfirst; /* Set frame format (LSB-first or MSB-first). */
+
+ /* TODO: NSS pin handling. */
+
+ /* TODO: Set MSTR and SPE bits. */
+
+ SPI_CR1(spi) = reg32;
+
+ return 0; /* TODO */
+}
+
+void spi_write(u32 spi, u16 data)
+{
+ /* Write data (8 or 16 bits, depending on DFF) into DR. */
+ SPI_DR(spi) = data;
+}
+
+u16 spi_read(u32 spi)
+{
+ /* Read the data (8 or 16 bits, depending on DFF bit) from DR. */
+ return SPI_DR(spi);
+}