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authorUwe Hermann2009-07-25 03:09:36 +0200
committerUwe Hermann2009-07-25 03:09:36 +0200
commit712261bb5218bcf60a21216fc0105521aec260a4 (patch)
tree1c8a64ace9183996d781db913aec52a5ae0a208e /include/libopenstm32
parentc26541c4c5e2766f4f20a70867cb46d043b9273c (diff)
Add some more USART related bit definitions.
Diffstat (limited to 'include/libopenstm32')
-rw-r--r--include/libopenstm32/gpio.h5
-rw-r--r--include/libopenstm32/usart.h20
2 files changed, 21 insertions, 4 deletions
diff --git a/include/libopenstm32/gpio.h b/include/libopenstm32/gpio.h
index 23d633d..6a9b22f 100644
--- a/include/libopenstm32/gpio.h
+++ b/include/libopenstm32/gpio.h
@@ -52,6 +52,11 @@
#define GPIO15 (1 << 15)
#define GPIO_ALL 0xffff
+/* GPIO pins with alternate functions */
+#define GPIO_USART_TX GPIO10
+#define GPIO_USART_RX GPIO11
+/* TODO */
+
/* --- GPIO registers ------------------------------------------------------ */
/* Port configuration register low (GPIOx_CRL) */
diff --git a/include/libopenstm32/usart.h b/include/libopenstm32/usart.h
index 31ea1ad..237a58f 100644
--- a/include/libopenstm32/usart.h
+++ b/include/libopenstm32/usart.h
@@ -127,6 +127,11 @@
#define CR1_RWU (1 << 1)
#define CR1_SBK (1 << 0)
+/* CR1_PCE / CR1_PS combined values */
+#define PARITY_NONE 0x00
+#define PARITY_ODD 0x02
+#define PARITY_EVEN 0x03
+
/* --- USART_CR2 values ---------------------------------------------------- */
#define CR2_LINEN (1 << 14) /* LIN mode enable */
@@ -139,10 +144,11 @@
#define CR2_LBDL (1 << 5) /* LIN break det. length */
/* USART_CR2[3:0]: ADD */
-#define CR2_STOPBITS_1 0x00 /* 1 stop bit */
-#define CR2_STOPBITS_0_5 0x01 /* 0.5 stop bits */
-#define CR2_STOPBITS_2 0x02 /* 2 stop bits */
-#define CR2_STOPBITS_1_5 0x03 /* 1.5 stop bits */
+/* STOP values */
+#define STOPBITS_1 0x00 /* 1 stop bit */
+#define STOPBITS_0_5 0x01 /* 0.5 stop bits */
+#define STOPBITS_2 0x02 /* 2 stop bits */
+#define STOPBITS_1_5 0x03 /* 1.5 stop bits */
/* --- USART_CR3 values ---------------------------------------------------- */
@@ -158,6 +164,12 @@
#define CR3_IREN (1 << 1) /* IrDA mode enable */
#define CR3_EIE (1 << 0) /* Error interrupt enable */
+/* CR3_CTSE/CR3_RTSE combined values */
+#define FLOWCONTROL_NONE 0x00
+#define FLOWCONTROL_RTS 0x01
+#define FLOWCONTROL_CTS 0x02
+#define FLOWCONTROL_RTS_CTS 0x03
+
/* --- USART_GTPR values --------------------------------------------------- */
/* USART_GTPR[15:8]: GT[7:0]: Guard time value */ /* N/A on UART4/5 */