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authorUwe Hermann2010-12-29 18:29:47 +0100
committerUwe Hermann2010-12-29 18:29:47 +0100
commitd9f6f200c189922ff71ec13e1343303bfdae3593 (patch)
tree2acb13fc2b0b9678f96b2bba9a87def47ccd9bf4 /include/libopenstm32/usb.h
parentb5727a6c737ae255f8b318e7714b00a802809ec5 (diff)
Some more whitespace + cosmetics.
Diffstat (limited to 'include/libopenstm32/usb.h')
-rw-r--r--include/libopenstm32/usb.h282
1 files changed, 114 insertions, 168 deletions
diff --git a/include/libopenstm32/usb.h b/include/libopenstm32/usb.h
index 608ee58..b982746 100644
--- a/include/libopenstm32/usb.h
+++ b/include/libopenstm32/usb.h
@@ -24,16 +24,11 @@
#include <libopenstm32/common.h>
#include <libopenstm32/tools.h>
-/******************************************************************************
- * USB base addresses
- ******************************************************************************/
+/* --- USB base addresses -------------------------------------------------- */
-#define USB_PMA_BASE (0x40006000L) /* USB packet buffer memory base
- address */
+#define USB_PMA_BASE 0x40006000L /* USB packet buffer memory base addr. */
-/******************************************************************************
- * USB general registers
- ******************************************************************************/
+/* --- USB general registers ----------------------------------------------- */
/* USB Control register */
#define USB_CNTR_REG ((volatile u32 *)(USB_DEV_FS_BASE + 0x40))
@@ -48,31 +43,26 @@
/* USB EP register */
#define USB_EP_REG(EP) ((volatile u32 *)(USB_DEV_FS_BASE) + (EP))
-/******************************************************************************
- * USB control register masks / bits
- ******************************************************************************/
+/* --- USB control register masks / bits ----------------------------------- */
/* Interrupt mask bits, set to 1 to enable interrupt generation */
-#define USB_CNTR_CTRM (0x8000)
-#define USB_CNTR_PMAOVRM (0x4000)
-#define USB_CNTR_ERRM (0x2000)
-#define USB_CNTR_WKUPM (0x1000)
-#define USB_CNTR_SUSPM (0x0800)
-#define USB_CNTR_RESETM (0x0400)
-#define USB_CNTR_SOFM (0x0200)
-#define USB_CNTR_ESOFM (0x0100)
+#define USB_CNTR_CTRM 0x8000
+#define USB_CNTR_PMAOVRM 0x4000
+#define USB_CNTR_ERRM 0x2000
+#define USB_CNTR_WKUPM 0x1000
+#define USB_CNTR_SUSPM 0x0800
+#define USB_CNTR_RESETM 0x0400
+#define USB_CNTR_SOFM 0x0200
+#define USB_CNTR_ESOFM 0x0100
/* Request/Force bits */
+#define USB_CNTR_RESUME 0x0010 /* Resume request */
+#define USB_CNTR_FSUSP 0x0008 /* Force suspend */
+#define USB_CNTR_LP_MODE 0x0004 /* Low-power mode */
+#define USB_CNTR_PWDN 0x0002 /* Power down */
+#define USB_CNTR_FRES 0x0001 /* Force reset */
-#define USB_CNTR_RESUME (0x0010) /* Resume request */
-#define USB_CNTR_FSUSP (0x0008) /* Force suspend */
-#define USB_CNTR_LP_MODE (0x0004) /* Low-power mode */
-#define USB_CNTR_PWDN (0x0002) /* Power down */
-#define USB_CNTR_FRES (0x0001) /* Force reset */
-
-/******************************************************************************
- * USB interrupt status register masks / bits
- ******************************************************************************/
+/* --- USB interrupt status register masks / bits -------------------------- */
#define USB_ISTR_CTR 0x8000 /* Correct Transfer */
#define USB_ISTR_PMAOVR 0x4000 /* Packet Memory Area Over / Underrun */
@@ -85,11 +75,9 @@
#define USB_ISTR_DIR 0x0010 /* Direction of transaction */
#define USB_ISTR_EP_ID 0x000F /* Endpoint Identifier */
-/******************************************************************************
- * USB interrupt status register manipulators
- ******************************************************************************/
+/* --- USB interrupt status register manipulators -------------------------- */
-//#define USB_CLR_ISTR_CTR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_CTR) /* CTR is read only! */
+/* Note: CTR is read only! */
#define USB_CLR_ISTR_PMAOVR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_PMAOVR)
#define USB_CLR_ISTR_ERR() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ERR)
#define USB_CLR_ISTR_WKUP() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_WKUP)
@@ -98,58 +86,50 @@
#define USB_CLR_ISTR_SOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_SOF)
#define USB_CLR_ISTR_ESOF() CLR_REG_BIT(USB_ISTR_REG, USB_ISTR_ESOF)
-/******************************************************************************
- * USB device addres register masks / bits
- ******************************************************************************/
+/* --- USB device addres register masks / bits ----------------------------- */
#define USB_DADDR_ENABLE 0x0080
#define USB_DADDR_ADDR 0x007F
-/******************************************************************************
- * USB device addres register manipulators
- ******************************************************************************/
-
-/******************************************************************************
- * USB endpoint register offsets
- ******************************************************************************/
-
-#define USB_EP0 ((u8)0)
-#define USB_EP1 ((u8)1)
-#define USB_EP2 ((u8)2)
-#define USB_EP3 ((u8)3)
-#define USB_EP4 ((u8)4)
-#define USB_EP5 ((u8)5)
-#define USB_EP6 ((u8)6)
-#define USB_EP7 ((u8)7)
-
-/******************************************************************************
- * USB endpoint register masks / bits
- ******************************************************************************/
-
-/* masks and toggle bits */
-#define USB_EP_RX_CTR (0x8000) /* Correct transfer RX */
-#define USB_EP_RX_DTOG (0x4000) /* Data toggle RX */
-#define USB_EP_RX_STAT (0x3000) /* Endpoint status for RX */
-
-#define USB_EP_SETUP (0x0800) /* Setup transaction completed */
-#define USB_EP_TYPE (0x0600) /* Endpoint type */
-#define USB_EP_KIND (0x0100) /* Endpoint kind.
- * When set and type=bulk -> double buffer
- * When set and type=control -> status out
- */
-
-#define USB_EP_TX_CTR (0x0080) /* Correct transfer TX */
-#define USB_EP_TX_DTOG (0x0040) /* Data toggle TX */
-#define USB_EP_TX_STAT (0x0030) /* Endpoint status for TX */
-
-#define USB_EP_ADDR (0x000F) /* Endpoint Address */
+/* --- USB device addres register manipulators ----------------------------- */
+
+/* --- USB endpoint register offsets --------------------------------------- */
+
+#define USB_EP0 0
+#define USB_EP1 1
+#define USB_EP2 2
+#define USB_EP3 3
+#define USB_EP4 4
+#define USB_EP5 5
+#define USB_EP6 6
+#define USB_EP7 7
+
+/* --- USB endpoint register masks / bits ---------------------------------- */
+
+/* Masks and toggle bits */
+#define USB_EP_RX_CTR 0x8000 /* Correct transfer RX */
+#define USB_EP_RX_DTOG 0x4000 /* Data toggle RX */
+#define USB_EP_RX_STAT 0x3000 /* Endpoint status for RX */
+
+#define USB_EP_SETUP 0x0800 /* Setup transaction completed */
+#define USB_EP_TYPE 0x0600 /* Endpoint type */
+#define USB_EP_KIND 0x0100 /* Endpoint kind.
+ * When set and type=bulk -> double buffer
+ * When set and type=control -> status out
+ */
+
+#define USB_EP_TX_CTR 0x0080 /* Correct transfer TX */
+#define USB_EP_TX_DTOG 0x0040 /* Data toggle TX */
+#define USB_EP_TX_STAT 0x0030 /* Endpoint status for TX */
+
+#define USB_EP_ADDR 0x000F /* Endpoint Address */
/* Masking all toggle bits */
-#define USB_EP_NTOGGLE_MSK (USB_EP_RX_CTR | \
- USB_EP_SETUP | \
- USB_EP_TYPE | \
- USB_EP_KIND | \
- USB_EP_TX_CTR | \
+#define USB_EP_NTOGGLE_MSK (USB_EP_RX_CTR | \
+ USB_EP_SETUP | \
+ USB_EP_TYPE | \
+ USB_EP_KIND | \
+ USB_EP_TX_CTR | \
USB_EP_ADDR)
/* All non toggle bits plus EP_RX toggle bits */
@@ -158,61 +138,52 @@
#define USB_EP_TX_STAT_TOG_MSK (USB_EP_TX_STAT | USB_EP_NTOGGLE_MSK)
/* Endpoint status bits for USB_EP_RX_STAT bit field */
-#define USB_EP_RX_STAT_DISABLED (0x0000)
-#define USB_EP_RX_STAT_STALL (0x1000)
-#define USB_EP_RX_STAT_NAK (0x2000)
-#define USB_EP_RX_STAT_VALID (0x3000)
+#define USB_EP_RX_STAT_DISABLED 0x0000
+#define USB_EP_RX_STAT_STALL 0x1000
+#define USB_EP_RX_STAT_NAK 0x2000
+#define USB_EP_RX_STAT_VALID 0x3000
/* Endpoint status bits for USB_EP_TX_STAT bit field */
-#define USB_EP_TX_STAT_DISABLED (0x0000)
-#define USB_EP_TX_STAT_STALL (0x0010)
-#define USB_EP_TX_STAT_NAK (0x0020)
-#define USB_EP_TX_STAT_VALID (0x0030)
+#define USB_EP_TX_STAT_DISABLED 0x0000
+#define USB_EP_TX_STAT_STALL 0x0010
+#define USB_EP_TX_STAT_NAK 0x0020
+#define USB_EP_TX_STAT_VALID 0x0030
/* Endpoint type bits for USB_EP_TYPE bit field */
-#define USB_EP_TYPE_BULK (0x0000)
-#define USB_EP_TYPE_CONTROL (0x0200)
-#define USB_EP_TYPE_ISO (0x0400)
-#define USB_EP_TYPE_INTERRUPT (0x0600)
+#define USB_EP_TYPE_BULK 0x0000
+#define USB_EP_TYPE_CONTROL 0x0200
+#define USB_EP_TYPE_ISO 0x0400
+#define USB_EP_TYPE_INTERRUPT 0x0600
-/******************************************************************************
- * USB endpoint register manipulators
- ******************************************************************************/
+/* --- USB endpoint register manipulators ---------------------------------- */
-/* Set USB endpoint tx/rx status.
+/*
+ * Set USB endpoint tx/rx status.
*
* USB status field is changed using an awkward toggle mechanism, that
* is why we use some helper macros for that.
*/
-#define USB_SET_EP_RX_STAT(EP, STAT) \
- TOG_SET_REG_BIT_MSK(USB_EP_REG(EP), \
- USB_EP_RX_STAT_TOG_MSK, \
- STAT)
+#define USB_SET_EP_RX_STAT(EP, STAT) \
+ TOG_SET_REG_BIT_MSK(USB_EP_REG(EP), USB_EP_RX_STAT_TOG_MSK, STAT)
-#define USB_SET_EP_TX_STAT(EP, STAT) \
- TOG_SET_REG_BIT_MSK(USB_EP_REG(EP), \
- USB_EP_TX_STAT_TOG_MSK, \
- STAT)
+#define USB_SET_EP_TX_STAT(EP, STAT) \
+ TOG_SET_REG_BIT_MSK(USB_EP_REG(EP), USB_EP_TX_STAT_TOG_MSK, STAT)
-/* Macros for clearing and setting USB endpoint register bits that do
+/*
+ * Macros for clearing and setting USB endpoint register bits that do
* not use the toggle mechanism.
*
* Because the register contains some bits that use the toggle
- * mechanism we need a helper macro here. Otherwise the code gets
- * really messy.
+ * mechanism we need a helper macro here. Otherwise the code gets really messy.
*/
-#define USB_CLR_EP_NTOGGLE_BIT(EP, BIT) \
- CLR_REG_BIT_MSK(USB_EP_REG(EP), \
- USB_EP_NTOGGLE_MSK, \
- BIT)
+#define USB_CLR_EP_NTOGGLE_BIT(EP, BIT) \
+ CLR_REG_BIT_MSK(USB_EP_REG(EP), USB_EP_NTOGGLE_MSK, BIT)
-#define USB_CLR_EP_RX_CTR(EP) \
- USB_CLR_EP_NTOGGLE_BIT(EP, \
- USB_EP_RX_CTR)
+#define USB_CLR_EP_RX_CTR(EP) \
+ USB_CLR_EP_NTOGGLE_BIT(EP, USB_EP_RX_CTR)
-#define USB_CLR_EP_TX_CTR(EP) \
- USB_CLR_EP_NTOGGLE_BIT(EP, \
- USB_EP_TX_CTR)
+#define USB_CLR_EP_TX_CTR(EP) \
+ USB_CLR_EP_NTOGGLE_BIT(EP, USB_EP_TX_CTR)
#define USB_SET_EP_TYPE(EP, TYPE) \
SET_REG(USB_EP_REG(EP), \
@@ -226,17 +197,13 @@
(USB_EP_NTOGGLE_MSK & \
(~USB_EP_KIND))) | USB_EP_KIND)
-#define USB_CLR_EP_KIND(EP) \
- SET_REG(USB_EP_REG(EP), \
- (GET_REG(USB_EP_REG(EP)) & \
- (USB_EP_NTOGGLE_MSK & \
- (~USB_EP_KIND))))
-
-#define USB_SET_EP_STAT_OUT(EP) \
- USB_SET_EP_KIND(EP)
+#define USB_CLR_EP_KIND(EP) \
+ SET_REG(USB_EP_REG(EP), \
+ (GET_REG(USB_EP_REG(EP)) & \
+ (USB_EP_NTOGGLE_MSK & (~USB_EP_KIND))))
-#define USB_CLR_EP_STAT_OUT(EP) \
- USB_CLR_EP_KIND(EP)
+#define USB_SET_EP_STAT_OUT(EP) USB_SET_EP_KIND(EP)
+#define USB_CLR_EP_STAT_OUT(EP) USB_CLR_EP_KIND(EP)
#define USB_SET_EP_ADDR(EP, ADDR) \
SET_REG(USB_EP_REG(EP), \
@@ -255,58 +222,37 @@
GET_REG(USB_EP_REG(EP)) & \
(USB_EP_NTOGGLE_MSK | USB_EP_RX_DTOG))
+/* --- USB BTABLE registers ------------------------------------------------ */
-/******************************************************************************
- * USB BTABLE registers
- ******************************************************************************/
#define USB_GET_BTABLE GET_REG(USB_BTABLE_REG)
-#define USB_EP_TX_ADDR(EP) ((u32 *)(USB_PMA_BASE + \
- (USB_GET_BTABLE+EP*8 ) * 2))
-
-#define USB_EP_TX_COUNT(EP) ((u32 *)(USB_PMA_BASE + \
- (USB_GET_BTABLE+EP*8+2) * 2))
-
-#define USB_EP_RX_ADDR(EP) ((u32 *)(USB_PMA_BASE + \
- (USB_GET_BTABLE+EP*8+4) * 2))
-
-#define USB_EP_RX_COUNT(EP) ((u32 *)(USB_PMA_BASE + \
- (USB_GET_BTABLE+EP*8+6) * 2))
-
-/******************************************************************************
- * USB BTABLE manipulators
- ******************************************************************************/
-
-#define USB_GET_EP_TX_ADDR(EP) \
- GET_REG(USB_EP_TX_ADDR(EP))
-
-#define USB_GET_EP_TX_COUNT(EP) \
- GET_REG(USB_EP_TX_COUNT(EP))
-
-#define USB_GET_EP_RX_ADDR(EP) \
- GET_REG(USB_EP_RX_ADDR(EP))
+#define USB_EP_TX_ADDR(EP) \
+ ((u32 *)(USB_PMA_BASE + (USB_GET_BTABLE + EP * 8 + 0) * 2))
-#define USB_GET_EP_RX_COUNT(EP) \
- GET_REG(USB_EP_RX_COUNT(EP))
+#define USB_EP_TX_COUNT(EP) \
+ ((u32 *)(USB_PMA_BASE + (USB_GET_BTABLE + EP * 8 + 2) * 2))
-#define USB_SET_EP_TX_ADDR(EP, ADDR) \
- SET_REG(USB_EP_TX_ADDR(EP), ADDR)
+#define USB_EP_RX_ADDR(EP) \
+ ((u32 *)(USB_PMA_BASE + (USB_GET_BTABLE + EP * 8 + 4) * 2))
-#define USB_SET_EP_TX_COUNT(EP, COUNT) \
- SET_REG(USB_EP_TX_COUNT(EP), COUNT)
+#define USB_EP_RX_COUNT(EP) \
+ ((u32 *)(USB_PMA_BASE + (USB_GET_BTABLE + EP * 8 + 6) * 2))
-#define USB_SET_EP_RX_ADDR(EP, ADDR) \
- SET_REG(USB_EP_RX_ADDR(EP), ADDR)
+/* --- USB BTABLE manipulators --------------------------------------------- */
-#define USB_SET_EP_RX_COUNT(EP, COUNT) \
- SET_REG(USB_EP_RX_COUNT(EP), COUNT)
+#define USB_GET_EP_TX_ADDR(EP) GET_REG(USB_EP_TX_ADDR(EP))
+#define USB_GET_EP_TX_COUNT(EP) GET_REG(USB_EP_TX_COUNT(EP))
+#define USB_GET_EP_RX_ADDR(EP) GET_REG(USB_EP_RX_ADDR(EP))
+#define USB_GET_EP_RX_COUNT(EP) GET_REG(USB_EP_RX_COUNT(EP))
+#define USB_SET_EP_TX_ADDR(EP, ADDR) SET_REG(USB_EP_TX_ADDR(EP), ADDR)
+#define USB_SET_EP_TX_COUNT(EP, COUNT) SET_REG(USB_EP_TX_COUNT(EP), COUNT)
+#define USB_SET_EP_RX_ADDR(EP, ADDR) SET_REG(USB_EP_RX_ADDR(EP), ADDR)
+#define USB_SET_EP_RX_COUNT(EP, COUNT) SET_REG(USB_EP_RX_COUNT(EP), COUNT)
-#define USB_GET_EP_TX_BUFF(EP) \
- (USB_PMA_BASE + \
- (u8 *)(USB_GET_EP_TX_ADDR(EP) * 2))
+#define USB_GET_EP_TX_BUFF(EP) \
+ (USB_PMA_BASE + (u8 *)(USB_GET_EP_TX_ADDR(EP) * 2))
-#define USB_GET_EP_RX_BUFF(EP) \
- (USB_PMA_BASE + \
- (u8 *)(USB_GET_EP_RX_ADDR(EP) * 2))
+#define USB_GET_EP_RX_BUFF(EP) \
+ (USB_PMA_BASE + (u8 *)(USB_GET_EP_RX_ADDR(EP) * 2))
#endif