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authorchrysn2012-10-02 11:51:11 +0200
committerchrysn2012-10-02 11:55:05 +0200
commit36f95447a801cf2948993a3f1f77c278c876bf0a (patch)
tree8600252ab644a450db236af425d21673fb20d23a /include/libopencm3
parent4a6f4c0f7d62858a4a9afba18f11289cb0bb8358 (diff)
add back minimal support libraries
some of the libraries removed in [1] were essential to building anything on efm32 (especially, irq.h). [1] 4a6f4c0f7d62858a4a9afba18f11289cb0bb8358
Diffstat (limited to 'include/libopencm3')
-rw-r--r--include/libopencm3/efm32/tinygecko/irq.h55
1 files changed, 55 insertions, 0 deletions
diff --git a/include/libopencm3/efm32/tinygecko/irq.h b/include/libopencm3/efm32/tinygecko/irq.h
new file mode 100644
index 0000000..1b0a484
--- /dev/null
+++ b/include/libopencm3/efm32/tinygecko/irq.h
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/** @file
+ *
+ * Definitions of interrupt names on EFM32 Tiny Gecko systems
+ *
+ * The names and numbers are taken from d0034_efm32tg_reference_manual.pdf table 4.1.
+ */
+
+#ifndef LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
+#define LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
+
+#define IRQ_DMA 0
+#define IRQ_GPIO_EVEN 1
+#define IRQ_TIMER0 2
+#define IRQ_USART0_RX 3
+#define IRQ_USART0_TX 4
+#define IRQ_ACMP01 5
+#define IRQ_ADC0 6
+#define IRQ_DAC0 7
+#define IRQ_I2C0 8
+#define IRQ_GPIO_ODD 9
+#define IRQ_TIMER1 10
+#define IRQ_USART1_RX 11
+#define IRQ_USART1_TX 12
+#define IRQ_LESENSE 13
+#define IRQ_LEUART0 14
+#define IRQ_LETIMER0 15
+#define IRQ_PCNT0 16
+#define IRQ_RTC 17
+#define IRQ_CMU 18
+#define IRQ_VCMP 19
+#define IRQ_LCD 20
+#define IRQ_MSC 21
+#define IRQ_AES 22
+#define IRQ_COUNT 23 /**< See also d0002_efm32_cortex-m3_reference_manual.pdf's table 1.1's "number of interrupts" line, which shows that there are really no more interrupts and it is sufficient to allocate only 23 slots. */
+
+#endif