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authorFergus Noble2011-10-26 13:29:14 -0700
committerFergus Noble2011-10-26 13:29:14 -0700
commit20c33d1ae3f6dd4b30483ccec5209e1f5ba74059 (patch)
treef22665b857156f2996e0066242b87c7d8e568eb7 /include/libopencm3/stm32/f2
parent6dd3190bb969f7622a6ba628ba745c306c20ac8d (diff)
Add header for F2 syscfg peripheral.
Diffstat (limited to 'include/libopencm3/stm32/f2')
-rw-r--r--include/libopencm3/stm32/f2/syscfg.h46
1 files changed, 46 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/f2/syscfg.h b/include/libopencm3/stm32/f2/syscfg.h
new file mode 100644
index 0000000..b0d93f9
--- /dev/null
+++ b/include/libopencm3/stm32/f2/syscfg.h
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_SYSCFG_H
+#define LIBOPENCM3_SYSCFG_H
+
+#include <libopencm3/stm32/memorymap.h>
+
+/* --- SYSCFG registers ------------------------------------------------------ */
+
+#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00)
+
+#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04)
+
+/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */
+#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08)
+
+/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */
+#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c)
+
+/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */
+#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10)
+
+/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */
+#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14)
+
+#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20)
+
+#endif
+