aboutsummaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorMike Smith2011-12-26 02:47:38 -0800
committerMike Smith2011-12-26 02:47:38 -0800
commit00651032ad089711926c175bb252f0c76567c82b (patch)
treeee0de43a2e0e1740fe81ac9d431bdbce933cb140 /src
parentbc4c87e45b5b9cc72c46993b1b416017fe4b39a6 (diff)
parent4e0cd081b09d9bd3d444062ca1081fa59c31fc0b (diff)
Merge commit '4e0cd081b09d9bd3d444062ca1081fa59c31fc0b'
* commit '4e0cd081b09d9bd3d444062ca1081fa59c31fc0b': Improved magic number garbage in cortexm3.c Cleaned up debug output on linux build. Removed #if LIGHT for unfinished hardware. Implement gdb 'qCRC' packet to support 'compare-sections' command.
Diffstat (limited to 'src')
-rw-r--r--src/Makefile1
-rw-r--r--src/cortexm3.c33
-rw-r--r--src/crc32.c110
-rw-r--r--src/gdb_main.c13
-rw-r--r--src/gdb_packet.c26
-rw-r--r--src/include/crc32.h29
-rw-r--r--src/stm32/platform.c11
-rw-r--r--src/stm32/platform.h49
8 files changed, 209 insertions, 63 deletions
diff --git a/src/Makefile b/src/Makefile
index db5535f..fcaa42f 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -30,6 +30,7 @@ SRC = gdb_if.c \
lmi.c \
arm7tdmi.c \
stm32f4.c \
+ crc32.c \
include $(PROBE_HOST)/Makefile.inc
diff --git a/src/cortexm3.c b/src/cortexm3.c
index 0c6e151..1028acf 100644
--- a/src/cortexm3.c
+++ b/src/cortexm3.c
@@ -354,19 +354,19 @@ cm3_regs_read(struct target_s *target, void *data)
unsigned i;
/* FIXME: Describe what's really going on here */
- adiv5_ap_write(t->ap, 0x00, 0xA2000052);
+ adiv5_ap_write(t->ap, ADIV5_AP_CSW, 0xA2000052);
/* Map the banked data registers (0x10-0x1c) to the
* debug registers DHCSR, DCRSR, DCRDR and DEMCR respectively */
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x04, CM3_DHCSR);
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_TAR, CM3_DHCSR);
/* Walk the regnum_cortex_m array, reading the registers it
* calls out. */
- adiv5_ap_write(t->ap, 0x14, regnum_cortex_m[0]); /* Required to switch banks */
- *regs++ = adiv5_dp_read_ap(t->ap->dp, 0x18);
+ adiv5_ap_write(t->ap, ADIV5_AP_DB(1), regnum_cortex_m[0]); /* Required to switch banks */
+ *regs++ = adiv5_dp_read_ap(t->ap->dp, ADIV5_AP_DB(2));
for(i = 1; i < sizeof(regnum_cortex_m) / 4; i++) {
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x14, regnum_cortex_m[i]);
- *regs++ = adiv5_dp_read_ap(t->ap->dp, 0x18);
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_DB(1), regnum_cortex_m[i]);
+ *regs++ = adiv5_dp_read_ap(t->ap->dp, ADIV5_AP_DB(2));
}
return 0;
@@ -380,19 +380,20 @@ cm3_regs_write(struct target_s *target, const void *data)
unsigned i;
/* FIXME: Describe what's really going on here */
- adiv5_ap_write(t->ap, 0x00, 0xA2000052);
+ adiv5_ap_write(t->ap, ADIV5_AP_CSW, 0xA2000052);
/* Map the banked data registers (0x10-0x1c) to the
* debug registers DHCSR, DCRSR, DCRDR and DEMCR respectively */
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x04, CM3_DHCSR);
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_TAR, CM3_DHCSR);
/* Walk the regnum_cortex_m array, writing the registers it
* calls out. */
- adiv5_ap_write(t->ap, 0x18, *regs++); /* Required to switch banks */
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x14, 0x10000 | regnum_cortex_m[0]);
+ adiv5_ap_write(t->ap, ADIV5_AP_DB(2), *regs++); /* Required to switch banks */
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_DB(1), 0x10000 | regnum_cortex_m[0]);
for(i = 1; i < sizeof(regnum_cortex_m) / 4; i++) {
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x18, *regs++);
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x14, 0x10000 | regnum_cortex_m[i]);
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_DB(2), *regs++);
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_DB(1),
+ 0x10000 | regnum_cortex_m[i]);
}
return 0;
@@ -403,11 +404,11 @@ cm3_pc_write(struct target_s *target, const uint32_t val)
{
struct target_ap_s *t = (void *)target;
- adiv5_ap_write(t->ap, 0x00, 0xA2000052);
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x04, 0xE000EDF0);
+ adiv5_ap_write(t->ap, ADIV5_AP_CSW, 0xA2000052);
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_TAR, CM3_DHCSR);
- adiv5_ap_write(t->ap, 0x18, val); /* Required to switch banks */
- adiv5_dp_low_access(t->ap->dp, 1, 0, 0x14, 0x1000F);
+ adiv5_ap_write(t->ap, ADIV5_AP_DB(2), val); /* Required to switch banks */
+ adiv5_dp_low_access(t->ap->dp, 1, 0, ADIV5_AP_DB(1), 0x1000F);
return 0;
}
diff --git a/src/crc32.c b/src/crc32.c
new file mode 100644
index 0000000..25cd53b
--- /dev/null
+++ b/src/crc32.c
@@ -0,0 +1,110 @@
+/*
+ * This file is part of the Black Magic Debug project.
+ *
+ * Copyright (C) 2011 Black Sphere Technologies Ltd.
+ * Written by Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "platform.h"
+#include "target.h"
+
+static const uint32_t crc32_table[] = {
+ 0x00000000, 0x04C11DB7, 0x09823B6E, 0x0D4326D9,
+ 0x130476DC, 0x17C56B6B, 0x1A864DB2, 0x1E475005,
+ 0x2608EDB8, 0x22C9F00F, 0x2F8AD6D6, 0x2B4BCB61,
+ 0x350C9B64, 0x31CD86D3, 0x3C8EA00A, 0x384FBDBD,
+ 0x4C11DB70, 0x48D0C6C7, 0x4593E01E, 0x4152FDA9,
+ 0x5F15ADAC, 0x5BD4B01B, 0x569796C2, 0x52568B75,
+ 0x6A1936C8, 0x6ED82B7F, 0x639B0DA6, 0x675A1011,
+ 0x791D4014, 0x7DDC5DA3, 0x709F7B7A, 0x745E66CD,
+ 0x9823B6E0, 0x9CE2AB57, 0x91A18D8E, 0x95609039,
+ 0x8B27C03C, 0x8FE6DD8B, 0x82A5FB52, 0x8664E6E5,
+ 0xBE2B5B58, 0xBAEA46EF, 0xB7A96036, 0xB3687D81,
+ 0xAD2F2D84, 0xA9EE3033, 0xA4AD16EA, 0xA06C0B5D,
+ 0xD4326D90, 0xD0F37027, 0xDDB056FE, 0xD9714B49,
+ 0xC7361B4C, 0xC3F706FB, 0xCEB42022, 0xCA753D95,
+ 0xF23A8028, 0xF6FB9D9F, 0xFBB8BB46, 0xFF79A6F1,
+ 0xE13EF6F4, 0xE5FFEB43, 0xE8BCCD9A, 0xEC7DD02D,
+ 0x34867077, 0x30476DC0, 0x3D044B19, 0x39C556AE,
+ 0x278206AB, 0x23431B1C, 0x2E003DC5, 0x2AC12072,
+ 0x128E9DCF, 0x164F8078, 0x1B0CA6A1, 0x1FCDBB16,
+ 0x018AEB13, 0x054BF6A4, 0x0808D07D, 0x0CC9CDCA,
+ 0x7897AB07, 0x7C56B6B0, 0x71159069, 0x75D48DDE,
+ 0x6B93DDDB, 0x6F52C06C, 0x6211E6B5, 0x66D0FB02,
+ 0x5E9F46BF, 0x5A5E5B08, 0x571D7DD1, 0x53DC6066,
+ 0x4D9B3063, 0x495A2DD4, 0x44190B0D, 0x40D816BA,
+ 0xACA5C697, 0xA864DB20, 0xA527FDF9, 0xA1E6E04E,
+ 0xBFA1B04B, 0xBB60ADFC, 0xB6238B25, 0xB2E29692,
+ 0x8AAD2B2F, 0x8E6C3698, 0x832F1041, 0x87EE0DF6,
+ 0x99A95DF3, 0x9D684044, 0x902B669D, 0x94EA7B2A,
+ 0xE0B41DE7, 0xE4750050, 0xE9362689, 0xEDF73B3E,
+ 0xF3B06B3B, 0xF771768C, 0xFA325055, 0xFEF34DE2,
+ 0xC6BCF05F, 0xC27DEDE8, 0xCF3ECB31, 0xCBFFD686,
+ 0xD5B88683, 0xD1799B34, 0xDC3ABDED, 0xD8FBA05A,
+ 0x690CE0EE, 0x6DCDFD59, 0x608EDB80, 0x644FC637,
+ 0x7A089632, 0x7EC98B85, 0x738AAD5C, 0x774BB0EB,
+ 0x4F040D56, 0x4BC510E1, 0x46863638, 0x42472B8F,
+ 0x5C007B8A, 0x58C1663D, 0x558240E4, 0x51435D53,
+ 0x251D3B9E, 0x21DC2629, 0x2C9F00F0, 0x285E1D47,
+ 0x36194D42, 0x32D850F5, 0x3F9B762C, 0x3B5A6B9B,
+ 0x0315D626, 0x07D4CB91, 0x0A97ED48, 0x0E56F0FF,
+ 0x1011A0FA, 0x14D0BD4D, 0x19939B94, 0x1D528623,
+ 0xF12F560E, 0xF5EE4BB9, 0xF8AD6D60, 0xFC6C70D7,
+ 0xE22B20D2, 0xE6EA3D65, 0xEBA91BBC, 0xEF68060B,
+ 0xD727BBB6, 0xD3E6A601, 0xDEA580D8, 0xDA649D6F,
+ 0xC423CD6A, 0xC0E2D0DD, 0xCDA1F604, 0xC960EBB3,
+ 0xBD3E8D7E, 0xB9FF90C9, 0xB4BCB610, 0xB07DABA7,
+ 0xAE3AFBA2, 0xAAFBE615, 0xA7B8C0CC, 0xA379DD7B,
+ 0x9B3660C6, 0x9FF77D71, 0x92B45BA8, 0x9675461F,
+ 0x8832161A, 0x8CF30BAD, 0x81B02D74, 0x857130C3,
+ 0x5D8A9099, 0x594B8D2E, 0x5408ABF7, 0x50C9B640,
+ 0x4E8EE645, 0x4A4FFBF2, 0x470CDD2B, 0x43CDC09C,
+ 0x7B827D21, 0x7F436096, 0x7200464F, 0x76C15BF8,
+ 0x68860BFD, 0x6C47164A, 0x61043093, 0x65C52D24,
+ 0x119B4BE9, 0x155A565E, 0x18197087, 0x1CD86D30,
+ 0x029F3D35, 0x065E2082, 0x0B1D065B, 0x0FDC1BEC,
+ 0x3793A651, 0x3352BBE6, 0x3E119D3F, 0x3AD08088,
+ 0x2497D08D, 0x2056CD3A, 0x2D15EBE3, 0x29D4F654,
+ 0xC5A92679, 0xC1683BCE, 0xCC2B1D17, 0xC8EA00A0,
+ 0xD6AD50A5, 0xD26C4D12, 0xDF2F6BCB, 0xDBEE767C,
+ 0xE3A1CBC1, 0xE760D676, 0xEA23F0AF, 0xEEE2ED18,
+ 0xF0A5BD1D, 0xF464A0AA, 0xF9278673, 0xFDE69BC4,
+ 0x89B8FD09, 0x8D79E0BE, 0x803AC667, 0x84FBDBD0,
+ 0x9ABC8BD5, 0x9E7D9662, 0x933EB0BB, 0x97FFAD0C,
+ 0xAFB010B1, 0xAB710D06, 0xA6322BDF, 0xA2F33668,
+ 0xBCB4666D, 0xB8757BDA, 0xB5365D03, 0xB1F740B4,
+};
+
+uint32_t crc32_calc(uint32_t crc, uint8_t data)
+{
+ return (crc << 8) ^ crc32_table[((crc >> 24) ^ data) & 255];
+}
+
+uint32_t generic_crc32(struct target_s *target, uint32_t base, int len)
+{
+ uint32_t crc = -1;
+ uint8_t byte;
+
+ while (len--) {
+ if (target_mem_read_bytes(target, &byte, base, 1) != 0)
+ return -1;
+
+ crc = crc32_calc(crc, byte);
+ base++;
+ }
+ return crc;
+}
+
diff --git a/src/gdb_main.c b/src/gdb_main.c
index 9225017..42d7691 100644
--- a/src/gdb_main.c
+++ b/src/gdb_main.c
@@ -45,6 +45,7 @@
#include "target.h"
#include "command.h"
+#include "crc32.h"
#define BUF_SIZE 1024
@@ -68,7 +69,6 @@ gdb_main(void)
SET_IDLE_STATE(1);
size = gdb_getpacket(pbuf, BUF_SIZE);
SET_IDLE_STATE(0);
- DEBUG("%s\n", pbuf);
switch(pbuf[0]) {
/* Implementation of these is mandatory! */
case 'g': { /* 'g': Read general registers */
@@ -286,7 +286,7 @@ gdb_main(void)
}
default: /* Packet not implemented */
- DEBUG("Unsupported packet: %s\n", pbuf);
+ DEBUG("*** Unsupported packet: %s\n", pbuf);
gdb_putpacket("", 0);
}
}
@@ -317,7 +317,8 @@ handle_q_string_reply(const char *str, const char *param)
static void
handle_q_packet(char *packet, int len)
{
- /* These 'monitor' commands only available on the real deal */
+ uint32_t addr, alen;
+
if(!strncmp(packet, "qRcmd,", 6)) {
unsigned char *data;
int datalen;
@@ -362,6 +363,12 @@ handle_q_packet(char *packet, int len)
return;
}
handle_q_string_reply(cur_target->tdesc, packet + 31);
+ } else if (sscanf(packet, "qCRC:%08lX,%08lX", &addr, &alen) == 2) {
+ if(!cur_target) {
+ gdb_putpacketz("E01");
+ return;
+ }
+ gdb_putpacket_f("C%lx", generic_crc32(cur_target, addr, alen));
} else gdb_putpacket("", 0);
}
diff --git a/src/gdb_packet.c b/src/gdb_packet.c
index 1baf559..958572c 100644
--- a/src/gdb_packet.c
+++ b/src/gdb_packet.c
@@ -79,6 +79,18 @@ gdb_getpacket(unsigned char *packet, int size)
}
gdb_if_putchar('+', 1); /* send ack */
packet[i] = 0;
+
+#ifdef DEBUG_GDBPACKET
+ DEBUG("%s : ", __func__);
+ for(int j = 0; j < i; j++) {
+ c = packet[j];
+ if ((c >= 32) && (c < 127))
+ DEBUG("%c", c);
+ else
+ DEBUG("\\x%02X", c);
+ }
+ DEBUG("\n");
+#endif
return i;
}
@@ -91,10 +103,19 @@ void gdb_putpacket(unsigned char *packet, int size)
int tries = 0;
do {
+#ifdef DEBUG_GDBPACKET
+ DEBUG("%s : ", __func__);
+#endif
csum = 0;
gdb_if_putchar('$', 0);
for(i = 0; i < size; i++) {
c = packet[i];
+#ifdef DEBUG_GDBPACKET
+ if ((c >= 32) && (c < 127))
+ DEBUG("%c", c);
+ else
+ DEBUG("\\x%02X", c);
+#endif
if((c == '$') || (c == '#') || (c == '}')) {
gdb_if_putchar('}', 0);
gdb_if_putchar(c ^ 0x20, 0);
@@ -108,9 +129,10 @@ void gdb_putpacket(unsigned char *packet, int size)
sprintf(xmit_csum, "%02X", csum);
gdb_if_putchar(xmit_csum[0], 0);
gdb_if_putchar(xmit_csum[1], 1);
-
+#ifdef DEBUG_GDBPACKET
+ DEBUG("\n");
+#endif
} while((gdb_if_getchar_to(2000) != '+') && (tries++ < 3));
-
}
void gdb_putpacket_f(const unsigned char *fmt, ...)
diff --git a/src/include/crc32.h b/src/include/crc32.h
new file mode 100644
index 0000000..6cc00ea
--- /dev/null
+++ b/src/include/crc32.h
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the Black Magic Debug project.
+ *
+ * Copyright (C) 2011 Black Sphere Technologies Ltd.
+ * Written by Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __CRC32_H
+#define __CRC32_H
+
+#include "platform.h"
+
+uint32_t crc32_calc(uint32_t crc, uint8_t data);
+uint32_t generic_crc32(struct target_s *target, uint32_t base, int len);
+
+#endif
diff --git a/src/stm32/platform.c b/src/stm32/platform.c
index 84528aa..4dd6137 100644
--- a/src/stm32/platform.c
+++ b/src/stm32/platform.c
@@ -49,11 +49,7 @@ static void uart_init(void);
int platform_init(void)
{
-#ifndef LIGHT
rcc_clock_setup_in_hse_8mhz_out_72mhz();
-#else
- rcc_clock_setup_in_hsi_out_48mhz();
-#endif
/* Enable peripherals */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USBEN);
@@ -63,10 +59,6 @@ int platform_init(void)
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPDEN);
/* Setup GPIO ports */
-#ifdef LIGHT
- rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
- AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON;
-#endif
gpio_clear(USB_PU_PORT, USB_PU_PIN);
gpio_set_mode(USB_PU_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT,
USB_PU_PIN);
@@ -93,9 +85,8 @@ int platform_init(void)
#ifdef INCLUDE_UART_INTERFACE
uart_init();
#endif
-#ifndef LIGHT
SCB_VTOR = 0x2000; // Relocate interrupt vector table here
-#endif
+
cdcacm_init();
jtag_scan();
diff --git a/src/stm32/platform.h b/src/stm32/platform.h
index d23d42b..69dc3b4 100644
--- a/src/stm32/platform.h
+++ b/src/stm32/platform.h
@@ -53,38 +53,23 @@
*/
/* Hardware definitions... */
-#ifndef LIGHT
-# define JTAG_PORT GPIOA
-# define TDI_PIN GPIO3
-# define TMS_PIN GPIO4
-# define TCK_PIN GPIO5
-# define TDO_PIN GPIO6
-
-# define SWDP_PORT JTAG_PORT
-# define SWDIO_PIN TMS_PIN
-# define SWCLK_PIN TCK_PIN
-
-# define USB_PU_PORT GPIOA
-# define USB_PU_PIN GPIO8
-
-# define LED_PORT GPIOB
-# define LED_RUN GPIO2
-# define LED_IDLE GPIO10
-# define LED_ERROR GPIO11
-#else
-# define JTAG_PORT GPIOA
-# define TDI_PIN GPIO3
-# define TMS_PIN GPIO2
-# define TCK_PIN GPIO7
-# define TDO_PIN GPIO6
-
-# define SWDP_PORT JTAG_PORT
-# define SWDIO_PIN TMS_PIN
-# define SWCLK_PIN TCK_PIN
-
-# define USB_PU_PORT GPIOA
-# define USB_PU_PIN GPIO15
-#endif
+#define JTAG_PORT GPIOA
+#define TDI_PIN GPIO3
+#define TMS_PIN GPIO4
+#define TCK_PIN GPIO5
+#define TDO_PIN GPIO6
+
+#define SWDP_PORT JTAG_PORT
+#define SWDIO_PIN TMS_PIN
+#define SWCLK_PIN TCK_PIN
+
+#define USB_PU_PORT GPIOA
+#define USB_PU_PIN GPIO8
+
+#define LED_PORT GPIOB
+#define LED_RUN GPIO2
+#define LED_IDLE GPIO10
+#define LED_ERROR GPIO11
#define DEBUG(...)