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authorNicolas Schodet2015-05-04 11:57:31 +0200
committerNicolas Schodet2019-10-07 00:44:50 +0200
commitc5171a64652771c5c835754ef65f9cef7d78aa76 (patch)
tree7b114961d3dcd95cc23dd76c9aec4385f745d93d /ucoo/utils
parent9fe68a0e7b216f8142d6b0423d5cf8fc08ec7091 (diff)
Add STM32F1 support
Diffstat (limited to 'ucoo/utils')
-rw-r--r--ucoo/utils/delay.arm.cc14
1 files changed, 6 insertions, 8 deletions
diff --git a/ucoo/utils/delay.arm.cc b/ucoo/utils/delay.arm.cc
index 3c66d0d..244d521 100644
--- a/ucoo/utils/delay.arm.cc
+++ b/ucoo/utils/delay.arm.cc
@@ -33,10 +33,9 @@ namespace ucoo {
void
delay_us (int us)
{
- // Horrible hack: there is no record of the current systick speed, make
- // guesses based on APB2 clock. Also, suppose that frequency is a multiple
- // of 1 MHz (to avoid 64 bit division).
- int systick_mhz = rcc_apb2_frequency / (4 * 1000000);
+ // Suppose that frequency is a multiple of 8 MHz (to avoid 64 bit
+ // division).
+ int systick_mhz = rcc_ahb_frequency / (8 * 1000000);
int cycles = systick_mhz * us;
STK_CSR = 0;
// Loop several times if cycles is too big for the systick timer. Some
@@ -58,10 +57,9 @@ delay_us (int us)
void
delay_ns (int ns)
{
- // Horrible hack: there is no record of the current hclock speed, make
- // guesses based on APB2 clock. Also, suppose that frequency is a multiple
- // of 1 MHz (to avoid 64 bit division).
- int hclock_mhz = rcc_apb2_frequency / (1000000 / 2);
+ // Suppose that frequency is a multiple of 1 MHz (to avoid 64 bit
+ // division).
+ int hclock_mhz = rcc_ahb_frequency / 1000000;
int cycles = (hclock_mhz * ns + 999) / 1000;
STK_CSR = 0;
// Loop once, ns is supposed to be small.