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+--rtlBench du registre de sauvegarde des donnees entrantes:qst de stabilite
+--simul sur 41 ms
+--*******tests
+--on verifie si 099 est bien en sortie au depart alors que load vaut 0
+--si chq load dure 1 clk1us
+--si a chq nv haut de load, l'entree est sur la sortie.
+--***********
+
+library IEEE;
+ use IEEE.std_logic_1164.all;
+ use IEEE.std_logic_arith.all;
+ use IEEE.std_logic_unsigned.all;
+library work;
+library synopsys;
+use synopsys.bv_arithmetic.all;
+--ENTITY
+entity tb_regdata3 is
+end tb_regdata3;
+--ARCHITECTURE
+architecture sim1 of tb_regdata3 is
+ component regdata3
+ port(RST : in std_logic;
+ CLK : in std_logic;
+ clk1usreg : in std_logic;
+ enloadreg: in std_logic;
+ datain: in std_logic_vector (7 downto 0);
+ datareg: out integer--signaux de sortie du registre
+ );
+ end component;
+
+-- declaration des signaux
+signal rst: std_logic;
+signal clk: std_logic:='0';
+signal clk1usreg: std_logic:='0';
+signal enloadreg: std_logic:='0';
+
+signal datain: std_logic_vector (7 downto 0):="00000000";
+
+signal datareg: integer:=0;--signaux de sortie du registre
+
+--CONSTANT
+constant CLK1US_PERIOD :time:=992 ns;
+constant tcmax :integer:= 20161; --pour le clk1us
+constant CLK_PERIOD :time := 32 ns ;
+
+--MAP
+ begin
+ U1regdata3 : regdata3 port map (
+ rst=>rst,clk=>clk,clk1usreg=>clk1usreg,enloadreg=>enloadreg,datain=>datain,datareg=>datareg
+ );
+-- STIMULI
+ clk<= not clk after (CLK_PERIOD/2);
+ rst<='1','0' after (CLK_PERIOD/3);
+ clk1usreg<= not clk1usreg after (CLK1US_PERIOD/2);
+
+
+ enloadreg<= '0','1' after (tcmax*CLK1US_PERIOD), '0' after ((tcmax*CLK1US_PERIOD)+(CLK1US_PERIOD)),
+ '1' after(2*(tcmax*CLK1US_PERIOD)), '0' after ((2*(tcmax*CLK1US_PERIOD))+(CLK1US_PERIOD));
+
+
+ datain<="10100000","00000101" after (CLK1US_PERIOD/4),
+ "00011001" after((tcmax*CLK1US_PERIOD)-(CLK1US_PERIOD/6)),
+ "00000000" after((2*(tcmax*CLK1US_PERIOD))-(CLK1US_PERIOD/6));
+
+
+end sim1;
+--CONFIGURATION
+configuration cfg_tb_regdata3 of tb_regdata3 is
+ for sim1
+ for U1regdata3 : regdata3 use entity work.regdata3(BEHAV);
+end for;
+end for;
+end cfg_tb_regdata3;