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Diffstat (limited to 'include/libopencm3/stm32/f1')
-rw-r--r--include/libopencm3/stm32/f1/adc.h5
-rw-r--r--include/libopencm3/stm32/f1/desig.h4
-rw-r--r--include/libopencm3/stm32/f1/dma.h4
-rw-r--r--include/libopencm3/stm32/f1/flash.h4
-rw-r--r--include/libopencm3/stm32/f1/gpio.h4
-rw-r--r--include/libopencm3/stm32/f1/rcc.h4
-rw-r--r--include/libopencm3/stm32/f1/rtc.h4
-rw-r--r--include/libopencm3/stm32/f1/scb.h5
8 files changed, 34 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/f1/adc.h b/include/libopencm3/stm32/f1/adc.h
index 5a3fd20..b1396a5 100644
--- a/include/libopencm3/stm32/f1/adc.h
+++ b/include/libopencm3/stm32/f1/adc.h
@@ -677,6 +677,9 @@ LGPL License Terms @ref lgpl_license
/* --- Function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
+/* TODO */
void adc_enable_analog_watchdog_regular(u32 adc);
void adc_disable_analog_watchdog_regular(u32 adc);
void adc_enable_analog_watchdog_injected(u32 adc);
@@ -722,6 +725,8 @@ void adc_set_watchdog_low_threshold(u32 adc, u16 threshold);
void adc_set_regular_sequence(u32 adc, u8 length, u8 channel[]);
void adc_set_injected_sequence(u32 adc, u8 length, u8 channel[]);
+END_DECLS
+
#endif
/**@}*/
diff --git a/include/libopencm3/stm32/f1/desig.h b/include/libopencm3/stm32/f1/desig.h
index 743e946..74cfb35 100644
--- a/include/libopencm3/stm32/f1/desig.h
+++ b/include/libopencm3/stm32/f1/desig.h
@@ -36,6 +36,8 @@
#define DESIG_UID_63_32 MMIO32(DESIG_UNIQUE_ID_BASE + 0x04)
#define DESIG_UID_95_64 MMIO32(DESIG_UNIQUE_ID_BASE + 0x08)
+BEGIN_DECLS
+
/**
* Read the onboard flash size
* @return flash size in KB
@@ -49,4 +51,6 @@ u16 desig_get_flash_size(void);
*/
void desig_get_unique_id(u32 result[]);
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f1/dma.h b/include/libopencm3/stm32/f1/dma.h
index 64eafe0..b08803f 100644
--- a/include/libopencm3/stm32/f1/dma.h
+++ b/include/libopencm3/stm32/f1/dma.h
@@ -346,6 +346,8 @@ LGPL License Terms @ref lgpl_license
/* --- function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
void dma_channel_reset(u32 dma, u8 channel);
void dma_enable_mem2mem_mode(u32 dma, u8 channel);
void dma_set_priority(u32 dma, u8 channel, u32 prio);
@@ -368,6 +370,8 @@ void dma_set_peripheral_address(u32 dma, u8 channel, u32 address);
void dma_set_memory_address(u32 dma, u8 channel, u32 address);
void dma_set_number_of_data(u32 dma, u8 channel, u16 number);
+END_DECLS
+
#endif
/**@}*/
diff --git a/include/libopencm3/stm32/f1/flash.h b/include/libopencm3/stm32/f1/flash.h
index 2c026d6..919b4d4 100644
--- a/include/libopencm3/stm32/f1/flash.h
+++ b/include/libopencm3/stm32/f1/flash.h
@@ -89,6 +89,8 @@
/* --- Function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
void flash_prefetch_buffer_enable(void);
void flash_prefetch_buffer_disable(void);
void flash_halfcycle_enable(void);
@@ -110,4 +112,6 @@ void flash_wait_for_last_operation(void);
void flash_erase_option_bytes(void);
void flash_program_option_bytes(u32 address, u16 data);
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f1/gpio.h b/include/libopencm3/stm32/f1/gpio.h
index 2f4292a..a1e74cc 100644
--- a/include/libopencm3/stm32/f1/gpio.h
+++ b/include/libopencm3/stm32/f1/gpio.h
@@ -950,6 +950,8 @@ Line Devices only
/* --- Function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
void gpio_set_mode(u32 gpioport, u8 mode, u8 cnf, u16 gpios);
void gpio_set(u32 gpioport, u16 gpios);
void gpio_clear(u32 gpioport, u16 gpios);
@@ -962,6 +964,8 @@ void gpio_set_eventout(u8 evoutport, u8 evoutpin);
void gpio_primary_remap(u8 swjenable, u32 maps);
void gpio_secondary_remap(u32 maps);
+END_DECLS
+
#endif
/**@}*/
diff --git a/include/libopencm3/stm32/f1/rcc.h b/include/libopencm3/stm32/f1/rcc.h
index 63f6770..855e43b 100644
--- a/include/libopencm3/stm32/f1/rcc.h
+++ b/include/libopencm3/stm32/f1/rcc.h
@@ -476,6 +476,8 @@ typedef enum {
PLL, HSE, HSI, LSE, LSI
} osc_t;
+BEGIN_DECLS
+
void rcc_osc_ready_int_clear(osc_t osc);
void rcc_osc_ready_int_enable(osc_t osc);
void rcc_osc_ready_int_disable(osc_t osc);
@@ -512,6 +514,8 @@ void rcc_clock_setup_in_hse_12mhz_out_72mhz(void);
void rcc_clock_setup_in_hse_16mhz_out_72mhz(void);
void rcc_backupdomain_reset(void);
+END_DECLS
+
#endif
/**@}*/
diff --git a/include/libopencm3/stm32/f1/rtc.h b/include/libopencm3/stm32/f1/rtc.h
index 5e203ab..04aea01 100644
--- a/include/libopencm3/stm32/f1/rtc.h
+++ b/include/libopencm3/stm32/f1/rtc.h
@@ -126,6 +126,8 @@ typedef enum {
RTC_SEC, RTC_ALR, RTC_OW,
} rtcflag_t;
+BEGIN_DECLS
+
void rtc_awake_from_off(osc_t clock_source);
void rtc_enter_config_mode(void);
void rtc_exit_config_mode(void);
@@ -144,4 +146,6 @@ u32 rtc_check_flag(rtcflag_t flag_val);
void rtc_awake_from_standby(void);
void rtc_auto_awake(osc_t clock_source, u32 prescale_val);
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f1/scb.h b/include/libopencm3/stm32/f1/scb.h
index 12a74a2..181aa7a 100644
--- a/include/libopencm3/stm32/f1/scb.h
+++ b/include/libopencm3/stm32/f1/scb.h
@@ -293,10 +293,15 @@
/* BFAR [31:0]: Bus fault address */
/* --- SCB functions ------------------------------------------------------- */
+
+BEGIN_DECLS
+
void scb_reset_core(void);
void scb_reset_system(void);
void scb_set_priority_grouping(u32 prigroup);
/* TODO: */
+END_DECLS
+
#endif