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authorStephen Caudle2011-10-28 15:44:29 -0400
committerStephen Caudle2011-10-30 17:42:49 -0400
commitb3a710b0bcc8e765b32cc255dc5047323933d22e (patch)
treeb77acc4dfa1a0b7170121124f0563faac906a0ee /lib/stm32/usart.c
parent3900d16740b790ea2603b8fa7f627da7ff5a9753 (diff)
Rename stm32 lib folders to be consistent with include
Diffstat (limited to 'lib/stm32/usart.c')
-rw-r--r--lib/stm32/usart.c128
1 files changed, 128 insertions, 0 deletions
diff --git a/lib/stm32/usart.c b/lib/stm32/usart.c
new file mode 100644
index 0000000..116b159
--- /dev/null
+++ b/lib/stm32/usart.c
@@ -0,0 +1,128 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/usart.h>
+
+void usart_set_baudrate(u32 usart, u32 baud, u32 clock)
+{
+ //u32 clock = rcc_ppre1_frequency;
+
+ //if (usart == USART1) {
+ // clock = rcc_ppre2_frequency;
+ //}
+
+ /* yes it is as simple as that. The reference manual is
+ * talking about factional calculation but it seems to be only
+ * marketting bable to sound awesome. It is nothing else but a
+ * simple divider to generate the correct baudrate. >_< If I
+ * am wrong feel free to correct me on that. :) (esden)
+ */
+ USART_BRR(usart) = clock/baud;
+}
+
+void usart_set_databits(u32 usart, u32 bits)
+{
+ if (bits == 8)
+ USART_CR1(usart) &= ~USART_CR1_M; /* 8 data bits */
+ else
+ USART_CR1(usart) |= USART_CR1_M; /* 9 data bits */
+}
+
+void usart_set_stopbits(u32 usart, u32 stopbits)
+{
+ u32 reg32;
+
+ reg32 = USART_CR2(usart);
+ reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits;
+ USART_CR2(usart) = reg32;
+}
+
+void usart_set_parity(u32 usart, u32 parity)
+{
+ u32 reg32;
+
+ reg32 = USART_CR1(usart);
+ reg32 = (reg32 & ~USART_PARITY_MASK) | parity;
+ USART_CR1(usart) = reg32;
+}
+
+void usart_set_mode(u32 usart, u32 mode)
+{
+ u32 reg32;
+
+ reg32 = USART_CR1(usart);
+ reg32 = (reg32 & ~USART_MODE_MASK) | mode;
+ USART_CR1(usart) = reg32;
+}
+
+void usart_set_flow_control(u32 usart, u32 flowcontrol)
+{
+ u32 reg32;
+
+ reg32 = USART_CR3(usart);
+ reg32 = (reg32 & ~USART_FLOWCONTROL_MASK) | flowcontrol;
+ USART_CR3(usart) = reg32;
+}
+
+void usart_enable(u32 usart)
+{
+ USART_CR1(usart) |= USART_CR1_UE;
+}
+
+void usart_disable(u32 usart)
+{
+ USART_CR1(usart) &= ~USART_CR1_UE;
+}
+
+void usart_send(u32 usart, u16 data)
+{
+ /* Send data. */
+ USART_DR(usart) = (data & USART_DR_MASK);
+}
+
+u16 usart_recv(u32 usart)
+{
+ /* Receive data. */
+ return USART_DR(usart) & USART_DR_MASK;
+}
+
+void usart_wait_send_ready(u32 usart)
+{
+ /* Wait until the data has been transferred into the shift register. */
+ while ((USART_SR(usart) & USART_SR_TXE) == 0);
+}
+
+void usart_wait_recv_ready(u32 usart)
+{
+ /* Wait until the data is ready to be received. */
+ while ((USART_SR(usart) & USART_SR_RXNE) == 0);
+}
+
+void usart_send_blocking(u32 usart, u16 data)
+{
+ usart_wait_send_ready(usart);
+ usart_send(usart, data);
+}
+
+u16 usart_recv_blocking(u32 usart)
+{
+ usart_wait_recv_ready(usart);
+
+ return usart_recv(usart);
+}