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authorPiotr Esden-Tempski2012-02-28 11:28:29 -0800
committerPiotr Esden-Tempski2012-02-28 11:28:29 -0800
commitc49f505df4205e166a184de8063eb1702813cf46 (patch)
treeb3c7e106f63610006e756eeef5ca80e5ae405153 /lib/stm32/spi.c
parent2b3f07ee08c722f28cbf480dbcc5276707f78ec4 (diff)
Added spi reset convenience function.
Diffstat (limited to 'lib/stm32/spi.c')
-rw-r--r--lib/stm32/spi.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/stm32/spi.c b/lib/stm32/spi.c
index 87392c0..c97837c 100644
--- a/lib/stm32/spi.c
+++ b/lib/stm32/spi.c
@@ -32,6 +32,24 @@
* reg16 = spi_read(SPI1); // 16-bit read
*/
+void spi_reset(u32 spi_peripheral)
+{
+ switch (spi_peripheral) {
+ case SPI1:
+ rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_SPI1RST);
+ rcc_peripheral_clear_reset(&RCC_APB2RSTR, RCC_APB2RSTR_SPI1RST);
+ break;
+ case SPI2:
+ rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI2RST);
+ rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI2RST);
+ break;
+ case SPI3:
+ rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI3RST);
+ rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI3RST);
+ break;
+ }
+}
+
int spi_init_master(u32 spi, u32 br, u32 cpol, u32 cpha, u32 dff, u32 lsbfirst)
{
u32 reg32 = 0;