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authorKen Sarkies2012-07-09 16:54:01 +0930
committerKen Sarkies2012-07-09 16:54:01 +0930
commitcba9561e89c833b8151bf0439400ed5a9fd14ff8 (patch)
tree554bf16a8c12ed22b1a1bb0f6b16a26c48dcda29 /include
parent83d62e9bfc79e03737c2f1977004bef6e6e20562 (diff)
NVIC_Set_Interrupt_Priority: change to use 4-bit fields.
(viz STM32F10xxx Cortex-M3 programming manual PM0056 and Cortex-M3-Generic-User-Guide.pdf) Doxygen commentary added
Diffstat (limited to 'include')
-rw-r--r--include/libopencm3/stm32/f1/nvic_f1.h5
-rw-r--r--include/libopencm3/stm32/nvic.h33
2 files changed, 36 insertions, 2 deletions
diff --git a/include/libopencm3/stm32/f1/nvic_f1.h b/include/libopencm3/stm32/f1/nvic_f1.h
index 884f728..ce9a99e 100644
--- a/include/libopencm3/stm32/f1/nvic_f1.h
+++ b/include/libopencm3/stm32/f1/nvic_f1.h
@@ -27,6 +27,10 @@
*/
/* User Interrupts */
+/** @defgroup nvic_stn32f1_userint STM32F1xx User Interrupts
+@ingroup STM32F_nvic_defines
+
+@{*/
#define NVIC_WWDG_IRQ 0
#define NVIC_PVD_IRQ 1
#define NVIC_TAMPER_IRQ 2
@@ -95,5 +99,6 @@
#define NVIC_CAN2_RX1_IRQ 65
#define NVIC_CAN2_SCE_IRQ 66
#define NVIC_OTG_FS_IRQ 67
+/*@}*/
#endif
diff --git a/include/libopencm3/stm32/nvic.h b/include/libopencm3/stm32/nvic.h
index 36a8fe5..f974483 100644
--- a/include/libopencm3/stm32/nvic.h
+++ b/include/libopencm3/stm32/nvic.h
@@ -1,3 +1,26 @@
+/** @file
+
+@ingroup STM32F
+
+@brief <b>libopencm3 STM32F Nested Vectored Interrupt Controller</b>
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2010 Piotr Esden-Tempski <piotr@esden.net>
+
+@date 8 July 2012
+
+LGPL License Terms @ref lgpl_license
+ */
+/** @defgroup STM32F_nvic_defines
+
+@brief Defined Constants and Types for the STM32F Nested Vectored Interrupt Controller
+
+@ingroup STM32F_defines
+
+LGPL License Terms @ref lgpl_license
+
+ */
/*
* This file is part of the libopencm3 project.
*
@@ -65,6 +88,11 @@
/* --- IRQ channel numbers-------------------------------------------------- */
/* Cortex M3 System Interrupts */
+/** @defgroup nvic_sysint Cortex M3 System Interrupts
+@ingroup STM32F_nvic_defines
+
+IRQ numbers -3 and -6 to -9 are reserved
+@{*/
#define NVIC_NMI_IRQ -14
#define NVIC_HARD_FAULT_IRQ -13
#define NVIC_MEM_MANAGE_IRQ -12
@@ -76,9 +104,10 @@
/* irq number -3 reserved */
#define NVIC_PENDSV_IRQ -2
#define NVIC_SYSTICK_IRQ -1
+/*@}*/
-/* Note: User interrupts are family specific and are defined in a familiy
+/* Note: User interrupts are family specific and are defined in a family
* specific header file in the corresponding subfolder.
*/
@@ -103,6 +132,6 @@ void nvic_clear_pending_irq(u8 irqn);
u8 nvic_get_active_irq(u8 irqn);
u8 nvic_get_irq_enabled(u8 irqn);
void nvic_set_priority(u8 irqn, u8 priority);
-void nvic_generate_software_interrupt(u8 irqn);
+void nvic_generate_software_interrupt(u16 irqn);
#endif