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authorchrysn2012-10-03 18:15:20 +0200
committerchrysn2012-10-05 00:55:24 +0200
commita69d83d312396ee604426dce5341a54316c7c9b5 (patch)
tree3e8d89cb6ae917418a6d2007263810e93a66b733
parentecb0cbbf786d56d7bdb2150446861242c1a57401 (diff)
unified vector table initialization
the cortex generic interrupts get moved to lib/cm3/vector.c, the platorms' individual irq names, initialization and handler prototypes go to platoform specific irq.h files. as the vector.c file heavily depends on platoform specific headers, it can't be built once-and-for-all in lib/cm3/, so there are inclusion stubs in the various architecture dirs; this might be better solved with Makefile / include path handling. one particular file is lib/lpc43xx/vector.c; that platform's initialization code contains an additional section to copy everything from flash to ram (which probably performs better there). that code still resides in the inclusion stub, and gets mashed in using defines. would need a cleaner implementation together with the Makefile solution. this commit contains some files of the upcoming efm32 branch, from which it was cherry-picked. the .bin files produced from before and after this commit only differ in lpc43xx, where the startup sequence was subtly modified.
-rw-r--r--include/libopencm3/cm3/vector.h65
-rw-r--r--include/libopencm3/efm32/tinygecko/irq.h130
-rw-r--r--include/libopencm3/lm3s/irq.h33
-rw-r--r--include/libopencm3/lpc17xx/irq.h33
-rw-r--r--include/libopencm3/lpc43xx/irq.h234
-rw-r--r--include/libopencm3/stm32/f1/irq.h306
-rw-r--r--include/libopencm3/stm32/f2/irq.h359
-rw-r--r--include/libopencm3/stm32/f4/irq.h359
-rw-r--r--lib/cm3/vector.c95
-rw-r--r--lib/efm32/tinygecko/vector.c2
-rw-r--r--lib/lm3s/vector.c98
-rw-r--r--lib/lpc17xx/vector.c97
-rw-r--r--lib/lpc43xx/vector.c224
-rw-r--r--lib/stm32/f1/vector.c298
-rw-r--r--lib/stm32/f2/vector.c338
-rw-r--r--lib/stm32/f4/vector.c338
16 files changed, 1633 insertions, 1376 deletions
diff --git a/include/libopencm3/cm3/vector.h b/include/libopencm3/cm3/vector.h
new file mode 100644
index 0000000..198992b
--- /dev/null
+++ b/include/libopencm3/cm3/vector.h
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/** @file
+ *
+ * Definitions for handling vector tables.
+ *
+ * This implements d0002_efm32_cortex-m3_reference_manual.pdf's figure 2.2
+ * (from the EFM32 documentation at
+ * http://www.energymicro.com/downloads/datasheets), and was seen analogously
+ * in other ARM implementations' libopencm3 files.
+ *
+ * The structure of the vector table is implemented independently of the system
+ * vector table starting at memory position 0x0, as it can be relocated to
+ * other memory locations too.
+ *
+ * The exact size of a vector interrupt table depends on the number of
+ * interrupts IRQ_COUNT, which is defined per family.
+ */
+
+#ifndef LIBOPENCM3_VECTOR_H
+#define LIBOPENCM3_VECTOR_H
+
+#include <libopencm3/cm3/common.h>
+
+// #include "irq.h" /* we'll nede some definitions */
+
+/** Type of an interrupt function. Only used to avoid hard-to-read function
+ * pointers in the efm32_vector_table_t struct. */
+typedef void (*vector_table_entry_t)(void);
+
+typedef struct {
+ unsigned int *initial_sp_value; /**< The value the stack pointer is set to initially */
+ vector_table_entry_t reset;
+ vector_table_entry_t nmi;
+ vector_table_entry_t hard_fault;
+ vector_table_entry_t memory_manage_fault;
+ vector_table_entry_t bus_fault;
+ vector_table_entry_t usage_fault;
+ vector_table_entry_t reserved_x001c[4];
+ vector_table_entry_t sv_call;
+ vector_table_entry_t debug_monitor;
+ vector_table_entry_t reserved_x0034;
+ vector_table_entry_t pend_sv;
+ vector_table_entry_t systick;
+ vector_table_entry_t irq[IRQ_COUNT];
+} vector_table_t;
+
+#endif
diff --git a/include/libopencm3/efm32/tinygecko/irq.h b/include/libopencm3/efm32/tinygecko/irq.h
new file mode 100644
index 0000000..f5263ae
--- /dev/null
+++ b/include/libopencm3/efm32/tinygecko/irq.h
@@ -0,0 +1,130 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/** @file
+ *
+ * Definitions of interrupt names on EFM32 Tiny Gecko systems
+ *
+ * The names and numbers are taken from d0034_efm32tg_reference_manual.pdf table 4.1.
+ */
+
+#ifndef LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
+#define LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
+
+#define IRQ_DMA 0
+#define IRQ_GPIO_EVEN 1
+#define IRQ_TIMER0 2
+#define IRQ_USART0_RX 3
+#define IRQ_USART0_TX 4
+#define IRQ_ACMP01 5
+#define IRQ_ADC0 6
+#define IRQ_DAC0 7
+#define IRQ_I2C0 8
+#define IRQ_GPIO_ODD 9
+#define IRQ_TIMER1 10
+#define IRQ_USART1_RX 11
+#define IRQ_USART1_TX 12
+#define IRQ_LESENSE 13
+#define IRQ_LEUART0 14
+#define IRQ_LETIMER0 15
+#define IRQ_PCNT0 16
+#define IRQ_RTC 17
+#define IRQ_CMU 18
+#define IRQ_VCMP 19
+#define IRQ_LCD 20
+#define IRQ_MSC 21
+#define IRQ_AES 22
+#define IRQ_COUNT 23 /**< See also d0002_efm32_cortex-m3_reference_manual.pdf's table 1.1's "number of interrupts" line, which shows that there are really no more interrupts and it is sufficient to allocate only 23 slots. */
+
+#define WEAK __attribute__ ((weak))
+
+void WEAK dma_isr(void);
+void WEAK gpio_even_isr(void);
+void WEAK timer0_isr(void);
+void WEAK usart0_rx_isr(void);
+void WEAK usart0_tx_isr(void);
+void WEAK acmp01_isr(void);
+void WEAK adc0_isr(void);
+void WEAK dac0_isr(void);
+void WEAK i2c0_isr(void);
+void WEAK gpio_odd_isr(void);
+void WEAK timer1_isr(void);
+void WEAK usart1_rx_isr(void);
+void WEAK usart1_tx_isr(void);
+void WEAK lesense_isr(void);
+void WEAK leuart0_isr(void);
+void WEAK letimer0_isr(void);
+void WEAK pcnt0_isr(void);
+void WEAK rtc_isr(void);
+void WEAK cmu_isr(void);
+void WEAK vcmp_isr(void);
+void WEAK lcd_isr(void);
+void WEAK msc_isr(void);
+void WEAK aes_isr(void);
+
+#pragma weak dma_isr = blocking_handler
+#pragma weak gpio_even_isr = blocking_handler
+#pragma weak timer0_isr = blocking_handler
+#pragma weak usart0_rx_isr = blocking_handler
+#pragma weak usart0_tx_isr = blocking_handler
+#pragma weak acmp01_isr = blocking_handler
+#pragma weak adc0_isr = blocking_handler
+#pragma weak dac0_isr = blocking_handler
+#pragma weak i2c0_isr = blocking_handler
+#pragma weak gpio_odd_isr = blocking_handler
+#pragma weak timer1_isr = blocking_handler
+#pragma weak usart1_rx_isr = blocking_handler
+#pragma weak usart1_tx_isr = blocking_handler
+#pragma weak lesense_isr = blocking_handler
+#pragma weak leuart0_isr = blocking_handler
+#pragma weak letimer0_isr = blocking_handler
+#pragma weak pcnt0_isr = blocking_handler
+#pragma weak rtc_isr = blocking_handler
+#pragma weak cmu_isr = blocking_handler
+#pragma weak vcmp_isr = blocking_handler
+#pragma weak lcd_isr = blocking_handler
+#pragma weak msc_isr = blocking_handler
+#pragma weak aes_isr = blocking_handler
+
+#define IRQ_HANDLERS \
+ [IRQ_DMA] = dma_isr, \
+ [IRQ_GPIO_EVEN] = gpio_even_isr, \
+ [IRQ_TIMER0] = timer0_isr, \
+ [IRQ_USART0_RX] = usart0_rx_isr, \
+ [IRQ_USART0_TX] = usart0_tx_isr, \
+ [IRQ_ACMP01] = acmp01_isr, \
+ [IRQ_ADC0] = adc0_isr, \
+ [IRQ_DAC0] = dac0_isr, \
+ [IRQ_I2C0] = i2c0_isr, \
+ [IRQ_GPIO_ODD] = gpio_odd_isr, \
+ [IRQ_TIMER1] = timer1_isr, \
+ [IRQ_USART1_RX] = usart1_rx_isr, \
+ [IRQ_USART1_TX] = usart1_tx_isr, \
+ [IRQ_LESENSE] = lesense_isr, \
+ [IRQ_LEUART0] = leuart0_isr, \
+ [IRQ_LETIMER0] = letimer0_isr, \
+ [IRQ_PCNT0] = pcnt0_isr, \
+ [IRQ_RTC] = rtc_isr, \
+ [IRQ_CMU] = cmu_isr, \
+ [IRQ_VCMP] = vcmp_isr, \
+ [IRQ_LCD] = lcd_isr, \
+ [IRQ_MSC] = msc_isr, \
+ [IRQ_AES] = aes_isr,
+
+#endif
diff --git a/include/libopencm3/lm3s/irq.h b/include/libopencm3/lm3s/irq.h
new file mode 100644
index 0000000..948c563
--- /dev/null
+++ b/include/libopencm3/lm3s/irq.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_LM3S_IRQ_H
+#define LIBOPENCM3_LM3S_IRQ_H
+
+/* TODO: Interrupt definitions */
+#define IRQ_COUNT 0
+
+/* TODO: Interrupt handler prototypes */
+
+/* TODO: Interrupt handler weak aliases */
+
+#define IRQ_HANDLERS
+
+#endif
diff --git a/include/libopencm3/lpc17xx/irq.h b/include/libopencm3/lpc17xx/irq.h
new file mode 100644
index 0000000..9c31267
--- /dev/null
+++ b/include/libopencm3/lpc17xx/irq.h
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_LPC17xx_IRQ_H
+#define LIBOPENCM3_LPC17xx_IRQ_H
+
+/* TODO: Interrupt definitions */
+#define IRQ_COUNT 0
+
+/* TODO: Interrupt handler prototypes */
+
+/* TODO: Interrupt handler weak aliases */
+
+#define IRQ_HANDLERS
+
+#endif
diff --git a/include/libopencm3/lpc43xx/irq.h b/include/libopencm3/lpc43xx/irq.h
new file mode 100644
index 0000000..a83a8d7
--- /dev/null
+++ b/include/libopencm3/lpc43xx/irq.h
@@ -0,0 +1,234 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2012 Michael Ossmann <mike@ossmann.com>
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_LPC43XX_IRQ_H
+#define LIBOPENCM3_LPC43XX_IRQ_H
+
+#define IRQ_DAC 0
+#define IRQ_M0CORE 1
+#define IRQ_DMA 2
+/* reserved: 3 */
+/* reserved: 4 */
+#define IRQ_ETHERNET 5
+#define IRQ_SDIO 6
+#define IRQ_LCD 7
+#define IRQ_USB0 8
+#define IRQ_USB1 9
+#define IRQ_SCT 10
+#define IRQ_RITIMER 11
+#define IRQ_TIMER0 12
+#define IRQ_TIMER1 13
+#define IRQ_TIMER2 14
+#define IRQ_TIMER3 15
+#define IRQ_MCPWM 16
+#define IRQ_ADC0 17
+#define IRQ_I2C0 18
+#define IRQ_I2C1 19
+#define IRQ_SPI 20
+#define IRQ_ADC1 21
+#define IRQ_SSP0 22
+#define IRQ_SSP1 23
+#define IRQ_USART0 24
+#define IRQ_UART1 25
+#define IRQ_USART2 26
+#define IRQ_USART3 27
+#define IRQ_I2S0 28
+#define IRQ_I2S1 29
+#define IRQ_SPIFI 30
+#define IRQ_SGPIO 31
+#define IRQ_PIN_INT0 32
+#define IRQ_PIN_INT1 33
+#define IRQ_PIN_INT2 34
+#define IRQ_PIN_INT3 35
+#define IRQ_PIN_INT4 36
+#define IRQ_PIN_INT5 37
+#define IRQ_PIN_INT6 38
+#define IRQ_PIN_INT7 39
+#define IRQ_GINT0 40
+#define IRQ_GINT1 41
+#define IRQ_EVENTROUTER 42
+#define IRQ_C_CAN1 43
+/* reserved: 44 */
+/* reserved: 45 */
+#define IRQ_ATIMER 46
+#define IRQ_RTC 47
+/* reserved: 48 */
+#define IRQ_WWDT 49
+/* reserved: 50 */
+#define IRQ_C_CAN0 51
+#define IRQ_QEI 52
+
+#define IRQ_COUNT 53
+
+#define WEAK __attribute__ ((weak))
+
+void WEAK dac_irqhandler(void);
+void WEAK m0core_irqhandler(void);
+void WEAK dma_irqhandler(void);
+void WEAK ethernet_irqhandler(void);
+void WEAK sdio_irqhandler(void);
+void WEAK lcd_irqhandler(void);
+void WEAK usb0_irqhandler(void);
+void WEAK usb1_irqhandler(void);
+void WEAK sct_irqhandler(void);
+void WEAK ritimer_irqhandler(void);
+void WEAK timer0_irqhandler(void);
+void WEAK timer1_irqhandler(void);
+void WEAK timer2_irqhandler(void);
+void WEAK timer3_irqhandler(void);
+void WEAK mcpwm_irqhandler(void);
+void WEAK adc0_irqhandler(void);
+void WEAK i2c0_irqhandler(void);
+void WEAK i2c1_irqhandler(void);
+void WEAK spi_irqhandler(void);
+void WEAK adc1_irqhandler(void);
+void WEAK ssp0_irqhandler(void);
+void WEAK ssp1_irqhandler(void);
+void WEAK usart0_irqhandler(void);
+void WEAK uart1_irqhandler(void);
+void WEAK usart2_irqhandler(void);
+void WEAK usart3_irqhandler(void);
+void WEAK i2s0_irqhandler(void);
+void WEAK i2s1_irqhandler(void);
+void WEAK spifi_irqhandler(void);
+void WEAK sgpio_irqhandler(void);
+void WEAK pin_int0_irqhandler(void);
+void WEAK pin_int1_irqhandler(void);
+void WEAK pin_int2_irqhandler(void);
+void WEAK pin_int3_irqhandler(void);
+void WEAK pin_int4_irqhandler(void);
+void WEAK pin_int5_irqhandler(void);
+void WEAK pin_int6_irqhandler(void);
+void WEAK pin_int7_irqhandler(void);
+void WEAK gint0_irqhandler(void);
+void WEAK gint1_irqhandler(void);
+void WEAK eventrouter_irqhandler(void);
+void WEAK c_can1_irqhandler(void);
+void WEAK atimer_irqhandler(void);
+void WEAK rtc_irqhandler(void);
+void WEAK wwdt_irqhandler(void);
+void WEAK c_can0_irqhandler(void);
+void WEAK qei_irqhandler(void);
+
+#pragma weak dac_irqhandler = null_handler
+#pragma weak m0core_irqhandler = null_handler
+#pragma weak dma_irqhandler = null_handler
+#pragma weak ethernet_irqhandler = null_handler
+#pragma weak sdio_irqhandler = null_handler
+#pragma weak lcd_irqhandler = null_handler
+#pragma weak usb0_irqhandler = null_handler
+#pragma weak usb1_irqhandler = null_handler
+#pragma weak sct_irqhandler = null_handler
+#pragma weak ritimer_irqhandler = null_handler
+#pragma weak timer0_irqhandler = null_handler
+#pragma weak timer1_irqhandler = null_handler
+#pragma weak timer2_irqhandler = null_handler
+#pragma weak timer3_irqhandler = null_handler
+#pragma weak mcpwm_irqhandler = null_handler
+#pragma weak adc0_irqhandler = null_handler
+#pragma weak i2c0_irqhandler = null_handler
+#pragma weak i2c1_irqhandler = null_handler
+#pragma weak spi_irqhandler = null_handler
+#pragma weak adc1_irqhandler = null_handler
+#pragma weak ssp0_irqhandler = null_handler
+#pragma weak ssp1_irqhandler = null_handler
+#pragma weak usart0_irqhandler = null_handler
+#pragma weak uart1_irqhandler = null_handler
+#pragma weak usart2_irqhandler = null_handler
+#pragma weak usart3_irqhandler = null_handler
+#pragma weak i2s0_irqhandler = null_handler
+#pragma weak i2s1_irqhandler = null_handler
+#pragma weak spifi_irqhandler = null_handler
+#pragma weak sgpio_irqhandler = null_handler
+#pragma weak pin_int0_irqhandler = null_handler
+#pragma weak pin_int1_irqhandler = null_handler
+#pragma weak pin_int2_irqhandler = null_handler
+#pragma weak pin_int3_irqhandler = null_handler
+#pragma weak pin_int4_irqhandler = null_handler
+#pragma weak pin_int5_irqhandler = null_handler
+#pragma weak pin_int6_irqhandler = null_handler
+#pragma weak pin_int7_irqhandler = null_handler
+#pragma weak gint0_irqhandler = null_handler
+#pragma weak gint1_irqhandler = null_handler
+#pragma weak eventrouter_irqhandler = null_handler
+#pragma weak c_can1_irqhandler = null_handler
+#pragma weak atimer_irqhandler = null_handler
+#pragma weak rtc_irqhandler = null_handler
+#pragma weak wwdt_irqhandler = null_handler
+#pragma weak c_can0_irqhandler = null_handler
+#pragma weak qei_irqhandler = null_handler
+
+#define IRQ_HANDLERS \
+ dac_irqhandler, \
+ m0core_irqhandler, \
+ dma_irqhandler, \
+ 0, /* reserved */ \
+ 0, /* reserved */ \
+ ethernet_irqhandler, \
+ sdio_irqhandler, \
+ lcd_irqhandler, \
+ usb0_irqhandler, \
+ usb1_irqhandler, \
+ sct_irqhandler, \
+ ritimer_irqhandler, \
+ timer0_irqhandler, \
+ timer1_irqhandler, \
+ timer2_irqhandler, \
+ timer3_irqhandler, \
+ mcpwm_irqhandler, \
+ adc0_irqhandler, \
+ i2c0_irqhandler, \
+ i2c1_irqhandler, \
+ spi_irqhandler, \
+ adc1_irqhandler, \
+ ssp0_irqhandler, \
+ ssp1_irqhandler, \
+ usart0_irqhandler, \
+ uart1_irqhandler, \
+ usart2_irqhandler, \
+ usart3_irqhandler, \
+ i2s0_irqhandler, \
+ i2s1_irqhandler, \
+ spifi_irqhandler, \
+ sgpio_irqhandler, \
+ pin_int0_irqhandler, \
+ pin_int1_irqhandler, \
+ pin_int2_irqhandler, \
+ pin_int3_irqhandler, \
+ pin_int4_irqhandler, \
+ pin_int5_irqhandler, \
+ pin_int6_irqhandler, \
+ pin_int7_irqhandler, \
+ gint0_irqhandler, \
+ gint1_irqhandler, \
+ eventrouter_irqhandler, \
+ c_can1_irqhandler, \
+ 0, /* reserved */ \
+ 0, /* reserved */ \
+ atimer_irqhandler, \
+ rtc_irqhandler, \
+ 0, /* reserved */ \
+ wwdt_irqhandler, \
+ 0, /* reserved */ \
+ c_can0_irqhandler, \
+ qei_irqhandler,
+
+#endif
diff --git a/include/libopencm3/stm32/f1/irq.h b/include/libopencm3/stm32/f1/irq.h
new file mode 100644
index 0000000..cfa07f1
--- /dev/null
+++ b/include/libopencm3/stm32/f1/irq.h
@@ -0,0 +1,306 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_STM32_F1_IRQ_H
+#define LIBOPENCM3_STM32_F1_IRQ_H
+
+#define IRQ_WWDG 0
+#define IRQ_PVD 1
+#define IRQ_TAMPER 2
+#define IRQ_RTC 3
+#define IRQ_FLASH 4
+#define IRQ_RCC 5
+#define IRQ_EXTI0 6
+#define IRQ_EXTI1 7
+#define IRQ_EXTI2 8
+#define IRQ_EXTI3 9
+#define IRQ_EXTI4 10
+#define IRQ_DMA1_CHANNEL1 11
+#define IRQ_DMA1_CHANNEL2 12
+#define IRQ_DMA1_CHANNEL3 13
+#define IRQ_DMA1_CHANNEL4 14
+#define IRQ_DMA1_CHANNEL5 15
+#define IRQ_DMA1_CHANNEL6 16
+#define IRQ_DMA1_CHANNEL7 17
+#define IRQ_ADC1_2 18
+#define IRQ_USB_HP_CAN_TX 19
+#define IRQ_USB_LP_CAN_RX0 20
+#define IRQ_CAN_RX1 21
+#define IRQ_CAN_SCE 22
+#define IRQ_EXTI9_5 23
+#define IRQ_TIM1_BRK 24
+#define IRQ_TIM1_UP 25
+#define IRQ_TIM1_TRG_COM 26
+#define IRQ_TIM1_CC 27
+#define IRQ_TIM2 28
+#define IRQ_TIM3 29
+#define IRQ_TIM4 30
+#define IRQ_I2C1_EV 31
+#define IRQ_I2C1_ER 32
+#define IRQ_I2C2_EV 33
+#define IRQ_I2C2_ER 34
+#define IRQ_SPI1 35
+#define IRQ_SPI2 36
+#define IRQ_USART1 37
+#define IRQ_USART2 38
+#define IRQ_USART3 39
+#define IRQ_EXTI15_10 40
+#define IRQ_RTC_ALARM 41
+#define IRQ_USB_WAKEUP 42
+#define IRQ_TIM8_BRK 43
+#define IRQ_TIM8_UP 44
+#define IRQ_TIM8_TRG_COM 45
+#define IRQ_TIM8_CC 46
+#define IRQ_ADC3 47
+#define IRQ_FSMC 48
+#define IRQ_SDIO 49
+#define IRQ_TIM5 50
+#define IRQ_SPI3 51
+#define IRQ_UART4 52
+#define IRQ_UART5 53
+#define IRQ_TIM6 54
+#define IRQ_TIM7 55
+#define IRQ_DMA2_CHANNEL1 56
+#define IRQ_DMA2_CHANNEL2 57
+#define IRQ_DMA2_CHANNEL3 58
+#define IRQ_DMA2_CHANNEL4_5 59
+#define IRQ_DMA2_CHANNEL5 60
+#define IRQ_ETH 61
+#define IRQ_ETH_WKUP 62
+#define IRQ_CAN2_TX 63
+#define IRQ_CAN2_RX0 64
+#define IRQ_CAN2_RX1 65
+#define IRQ_CAN2_SCE 66
+#define IRQ_OTG_FS 67
+
+/* FIXME: number from list in lib/stm32/f1/vector.c, might miss irqs */
+#define IRQ_COUNT 68
+
+#define WEAK __attribute__ ((weak))
+
+void WEAK wwdg_isr(void);
+void WEAK pvd_isr(void);
+void WEAK tamper_isr(void);
+void WEAK rtc_isr(void);
+void WEAK flash_isr(void);
+void WEAK rcc_isr(void);
+void WEAK exti0_isr(void);
+void WEAK exti1_isr(void);
+void WEAK exti2_isr(void);
+void WEAK exti3_isr(void);
+void WEAK exti4_isr(void);
+void WEAK dma1_channel1_isr(void);
+void WEAK dma1_channel2_isr(void);
+void WEAK dma1_channel3_isr(void);
+void WEAK dma1_channel4_isr(void);
+void WEAK dma1_channel5_isr(void);
+void WEAK dma1_channel6_isr(void);
+void WEAK dma1_channel7_isr(void);
+void WEAK adc1_2_isr(void);
+void WEAK usb_hp_can_tx_isr(void);
+void WEAK usb_lp_can_rx0_isr(void);
+void WEAK can_rx1_isr(void);
+void WEAK can_sce_isr(void);
+void WEAK exti9_5_isr(void);
+void WEAK tim1_brk_isr(void);
+void WEAK tim1_up_isr(void);
+void WEAK tim1_trg_com_isr(void);
+void WEAK tim1_cc_isr(void);
+void WEAK tim2_isr(void);
+void WEAK tim3_isr(void);
+void WEAK tim4_isr(void);
+void WEAK i2c1_ev_isr(void);
+void WEAK i2c1_er_isr(void);
+void WEAK i2c2_ev_isr(void);
+void WEAK i2c2_er_isr(void);
+void WEAK spi1_isr(void);
+void WEAK spi2_isr(void);
+void WEAK usart1_isr(void);
+void WEAK usart2_isr(void);
+void WEAK usart3_isr(void);
+void WEAK exti15_10_isr(void);
+void WEAK rtc_alarm_isr(void);
+void WEAK usb_wakeup_isr(void);
+void WEAK tim8_brk_isr(void);
+void WEAK tim8_up_isr(void);
+void WEAK tim8_trg_com_isr(void);
+void WEAK tim8_cc_isr(void);
+void WEAK adc3_isr(void);
+void WEAK fsmc_isr(void);
+void WEAK sdio_isr(void);
+void WEAK tim5_isr(void);
+void WEAK spi3_isr(void);
+void WEAK uart4_isr(void);
+void WEAK uart5_isr(void);
+void WEAK tim6_isr(void);
+void WEAK tim7_isr(void);
+void WEAK dma2_channel1_isr(void);
+void WEAK dma2_channel2_isr(void);
+void WEAK dma2_channel3_isr(void);
+void WEAK dma2_channel4_5_isr(void);
+void WEAK dma2_channel5_isr(void);
+void WEAK eth_isr(void);
+void WEAK eth_wkup_isr(void);
+void WEAK can2_tx_isr(void);
+void WEAK can2_rx0_isr(void);
+void WEAK can2_rx1_isr(void);
+void WEAK can2_sce_isr(void);
+void WEAK otg_fs_isr(void);
+
+#pragma weak wwdg_isr = null_handler
+#pragma weak pvd_isr = null_handler
+#pragma weak tamper_isr = null_handler
+#pragma weak rtc_isr = null_handler
+#pragma weak flash_isr = null_handler
+#pragma weak rcc_isr = null_handler
+#pragma weak exti0_isr = null_handler
+#pragma weak exti1_isr = null_handler
+#pragma weak exti2_isr = null_handler
+#pragma weak exti3_isr = null_handler
+#pragma weak exti4_isr = null_handler
+#pragma weak dma1_channel1_isr = null_handler
+#pragma weak dma1_channel2_isr = null_handler
+#pragma weak dma1_channel3_isr = null_handler
+#pragma weak dma1_channel4_isr = null_handler
+#pragma weak dma1_channel5_isr = null_handler
+#pragma weak dma1_channel6_isr = null_handler
+#pragma weak dma1_channel7_isr = null_handler
+#pragma weak adc1_2_isr = null_handler
+#pragma weak usb_hp_can_tx_isr = null_handler
+#pragma weak usb_lp_can_rx0_isr = null_handler
+#pragma weak can_rx1_isr = null_handler
+#pragma weak can_sce_isr = null_handler
+#pragma weak exti9_5_isr = null_handler
+#pragma weak tim1_brk_isr = null_handler
+#pragma weak tim1_up_isr = null_handler
+#pragma weak tim1_trg_com_isr = null_handler
+#pragma weak tim1_cc_isr = null_handler
+#pragma weak tim2_isr = null_handler
+#pragma weak tim3_isr = null_handler
+#pragma weak tim4_isr = null_handler
+#pragma weak i2c1_ev_isr = null_handler
+#pragma weak i2c1_er_isr = null_handler
+#pragma weak i2c2_ev_isr = null_handler
+#pragma weak i2c2_er_isr = null_handler
+#pragma weak spi1_isr = null_handler
+#pragma weak spi2_isr = null_handler
+#pragma weak usart1_isr = null_handler
+#pragma weak usart2_isr = null_handler
+#pragma weak usart3_isr = null_handler
+#pragma weak exti15_10_isr = null_handler
+#pragma weak rtc_alarm_isr = null_handler
+#pragma weak usb_wakeup_isr = null_handler
+#pragma weak tim8_brk_isr = null_handler
+#pragma weak tim8_up_isr = null_handler
+#pragma weak tim8_trg_com_isr = null_handler
+#pragma weak tim8_cc_isr = null_handler
+#pragma weak adc3_isr = null_handler
+#pragma weak fsmc_isr = null_handler
+#pragma weak sdio_isr = null_handler
+#pragma weak tim5_isr = null_handler
+#pragma weak spi3_isr = null_handler
+#pragma weak uart4_isr = null_handler
+#pragma weak uart5_isr = null_handler
+#pragma weak tim6_isr = null_handler
+#pragma weak tim7_isr = null_handler
+#pragma weak dma2_channel1_isr = null_handler
+#pragma weak dma2_channel2_isr = null_handler
+#pragma weak dma2_channel3_isr = null_handler
+#pragma weak dma2_channel4_5_isr = null_handler
+#pragma weak dma2_channel5_isr
+#pragma weak eth_isr = null_handler
+#pragma weak eth_wkup_isr = null_handler
+#pragma weak can2_tx_isr = null_handler
+#pragma weak can2_rx0_isr = null_handler
+#pragma weak can2_rx1_isr = null_handler
+#pragma weak can2_sce_isr = null_handler
+#pragma weak otg_fs_isr = null_handler
+
+#define IRQ_HANDLERS \
+ wwdg_isr, \
+ pvd_isr, \
+ tamper_isr, \
+ rtc_isr, \
+ flash_isr, \
+ rcc_isr, \
+ exti0_isr, \
+ exti1_isr, \
+ exti2_isr, \
+ exti3_isr, \
+ exti4_isr, \
+ dma1_channel1_isr, \
+ dma1_channel2_isr, \
+ dma1_channel3_isr, \
+ dma1_channel4_isr, \
+ dma1_channel5_isr, \
+ dma1_channel6_isr, \
+ dma1_channel7_isr, \
+ adc1_2_isr, \
+ usb_hp_can_tx_isr, \
+ usb_lp_can_rx0_isr, \
+ can_rx1_isr, \
+ can_sce_isr, \
+ exti9_5_isr, \
+ tim1_brk_isr, \
+ tim1_up_isr, \
+ tim1_trg_com_isr, \
+ tim1_cc_isr, \
+ tim2_isr, \
+ tim3_isr, \
+ tim4_isr, \
+ i2c1_ev_isr, \
+ i2c1_er_isr, \
+ i2c2_ev_isr, \
+ i2c2_er_isr, \
+ spi1_isr, \
+ spi2_isr, \
+ usart1_isr, \
+ usart2_isr, \
+ usart3_isr, \
+ exti15_10_isr, \
+ rtc_alarm_isr, \
+ usb_wakeup_isr, \
+ tim8_brk_isr, \
+ tim8_up_isr, \
+ tim8_trg_com_isr, \
+ tim8_cc_isr, \
+ adc3_isr, \
+ fsmc_isr, \
+ sdio_isr, \
+ tim5_isr, \
+ spi3_isr, \
+ uart4_isr, \
+ uart5_isr, \
+ tim6_isr, \
+ tim7_isr, \
+ dma2_channel1_isr, \
+ dma2_channel2_isr, \
+ dma2_channel3_isr, \
+ dma2_channel4_5_isr, \
+ dma2_channel5_isr, \
+ eth_isr, \
+ eth_wkup_isr, \
+ can2_tx_isr, \
+ can2_rx0_isr, \
+ can2_rx1_isr, \
+ can2_sce_isr, \
+ otg_fs_isr, \
+
+#endif
diff --git a/include/libopencm3/stm32/f2/irq.h b/include/libopencm3/stm32/f2/irq.h
new file mode 100644
index 0000000..7aec142
--- /dev/null
+++ b/include/libopencm3/stm32/f2/irq.h
@@ -0,0 +1,359 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_STM32_F2_IRQ_H
+#define LIBOPENCM3_STM32_F2_IRQ_H
+
+#define IRQ_WWDG 0
+#define IRQ_PVD 1
+#define IRQ_TAMP_STAMP 2
+#define IRQ_RTC_WKUP 3
+#define IRQ_FLASH 4
+#define IRQ_RCC 5
+#define IRQ_EXTI0 6
+#define IRQ_EXTI1 7
+#define IRQ_EXTI2 8
+#define IRQ_EXTI3 9
+#define IRQ_EXTI4 10
+#define IRQ_DMA1_STREAM0 11
+#define IRQ_DMA1_STREAM1 12
+#define IRQ_DMA1_STREAM2 13
+#define IRQ_DMA1_STREAM3 14
+#define IRQ_DMA1_STREAM4 15
+#define IRQ_DMA1_STREAM5 16
+#define IRQ_DMA1_STREAM6 17
+#define IRQ_ADC 18
+#define IRQ_CAN1_TX 19
+#define IRQ_CAN1_RX0 20
+#define IRQ_CAN1_RX1 21
+#define IRQ_CAN1_SCE 22
+#define IRQ_EXTI9_5 23
+#define IRQ_TIM1_BRK_TIM9 24
+#define IRQ_TIM1_UP_TIM10 25
+#define IRQ_TIM1_TRG_COM_TIM11 26
+#define IRQ_TIM1_CC 27
+#define IRQ_TIM2 28
+#define IRQ_TIM3 29
+#define IRQ_TIM4 30
+#define IRQ_I2C1_EV 31
+#define IRQ_I2C1_ER 32
+#define IRQ_I2C2_EV 33
+#define IRQ_I2C2_ER 34
+#define IRQ_SPI1 35
+#define IRQ_SPI2 36
+#define IRQ_USART1 37
+#define IRQ_USART2 38
+#define IRQ_USART3 39
+#define IRQ_EXTI15_10 40
+#define IRQ_RTC_ALARM 41
+#define IRQ_USB_FS_WKUP 42
+#define IRQ_TIM8_BRK_TIM12 43
+#define IRQ_TIM8_UP_TIM13 44
+#define IRQ_TIM8_TRG_COM_TIM14 45
+#define IRQ_TIM8_CC 46
+#define IRQ_DMA1_STREAM7 47
+#define IRQ_FSMC 48
+#define IRQ_SDIO 49
+#define IRQ_TIM5 50
+#define IRQ_SPI3 51
+#define IRQ_UART4 52
+#define IRQ_UART5 53
+#define IRQ_TIM6_DAC 54
+#define IRQ_TIM7 55
+#define IRQ_DMA2_STREAM0 56
+#define IRQ_DMA2_STREAM1 57
+#define IRQ_DMA2_STREAM2 58
+#define IRQ_DMA2_STREAM3 59
+#define IRQ_DMA2_STREAM4 60
+#define IRQ_ETH 61
+#define IRQ_ETH_WKUP 62
+#define IRQ_CAN2_TX 63
+#define IRQ_CAN2_RX0 64
+#define IRQ_CAN2_RX1 65
+#define IRQ_CAN2_SCE 66
+#define IRQ_OTG_FS 67
+#define IRQ_DMA2_STREAM5 68
+#define IRQ_DMA2_STREAM6 69
+#define IRQ_DMA2_STREAM7 70
+#define IRQ_USART6 71
+#define IRQ_I2C3_EV 72
+#define IRQ_I2C3_ER 73
+#define IRQ_OTG_HS_EP1_OUT 74
+#define IRQ_OTG_HS_EP1_IN 75
+#define IRQ_OTG_HS_WKUP 76
+#define IRQ_OTG_HS 77
+#define IRQ_DCMI 78
+#define IRQ_CRYP 79
+#define IRQ_HASH_RNG 80
+
+/* FIXME: number from list in lib/stm32/f2/vector.c, might miss irqs */
+#define IRQ_COUNT 81
+
+#define WEAK __attribute__ ((weak))
+
+void WEAK wwdg_isr(void);
+void WEAK pvd_isr(void);
+void WEAK tamp_stamp_isr(void);
+void WEAK rtc_wkup_isr(void);
+void WEAK flash_isr(void);
+void WEAK rcc_isr(void);
+void WEAK exti0_isr(void);
+void WEAK exti1_isr(void);
+void WEAK exti2_isr(void);
+void WEAK exti3_isr(void);
+void WEAK exti4_isr(void);
+void WEAK dma1_stream0_isr(void);
+void WEAK dma1_stream1_isr(void);
+void WEAK dma1_stream2_isr(void);
+void WEAK dma1_stream3_isr(void);
+void WEAK dma1_stream4_isr(void);
+void WEAK dma1_stream5_isr(void);
+void WEAK dma1_stream6_isr(void);
+void WEAK adc_isr(void);
+void WEAK can1_tx_isr(void);
+void WEAK can1_rx0_isr(void);
+void WEAK can1_rx1_isr(void);
+void WEAK can1_sce_isr(void);
+void WEAK exti9_5_isr(void);
+void WEAK tim1_brk_tim9_isr(void);
+void WEAK tim1_up_tim10_isr(void);
+void WEAK tim1_trg_com_tim11_isr(void);
+void WEAK tim1_cc_isr(void);
+void WEAK tim2_isr(void);
+void WEAK tim3_isr(void);
+void WEAK tim4_isr(void);
+void WEAK i2c1_ev_isr(void);
+void WEAK i2c1_er_isr(void);
+void WEAK i2c2_ev_isr(void);
+void WEAK i2c2_er_isr(void);
+void WEAK spi1_isr(void);
+void WEAK spi2_isr(void);
+void WEAK usart1_isr(void);
+void WEAK usart2_isr(void);
+void WEAK usart3_isr(void);
+void WEAK exti15_10_isr(void);
+void WEAK rtc_alarm_isr(void);
+void WEAK usb_fs_wkup_isr(void);
+void WEAK tim8_brk_tim12_isr(void);
+void WEAK tim8_up_tim13_isr(void);
+void WEAK tim8_trg_com_tim14_isr(void);
+void WEAK tim8_cc_isr(void);
+void WEAK dma1_stream7_isr(void);
+void WEAK fsmc_isr(void);
+void WEAK sdio_isr(void);
+void WEAK tim5_isr(void);
+void WEAK spi3_isr(void);
+void WEAK uart4_isr(void);
+void WEAK uart5_isr(void);
+void WEAK tim6_dac_isr(void);
+void WEAK tim7_isr(void);
+void WEAK dma2_stream0_isr(void);
+void WEAK dma2_stream1_isr(void);
+void WEAK dma2_stream2_isr(void);
+void WEAK dma2_stream3_isr(void);
+void WEAK dma2_stream4_isr(void);
+void WEAK eth_isr(void);
+void WEAK eth_wkup_isr(void);
+void WEAK can2_tx_isr(void);
+void WEAK can2_rx0_isr(void);
+void WEAK can2_rx1_isr(void);
+void WEAK can2_sce_isr(void);
+void WEAK otg_fs_isr(void);
+void WEAK dma2_stream5_isr(void);
+void WEAK dma2_stream6_isr(void);
+void WEAK dma2_stream7_isr(void);
+void WEAK usart6_isr(void);
+void WEAK i2c3_ev_isr(void);
+void WEAK i2c3_er_isr(void);
+void WEAK otg_hs_ep1_out_isr(void);
+void WEAK otg_hs_ep1_in_isr(void);
+void WEAK otg_hs_wkup_isr(void);
+void WEAK otg_hs_isr(void);
+void WEAK dcmi_isr(void);
+void WEAK cryp_isr(void);
+void WEAK hash_rng_isr(void);
+
+#pragma weak wwdg_isr = null_handler
+#pragma weak pvd_isr = null_handler
+#pragma weak tamp_stamp_isr = null_handler
+#pragma weak rtc_wkup_isr = null_handler
+#pragma weak flash_isr = null_handler
+#pragma weak rcc_isr = null_handler
+#pragma weak exti0_isr = null_handler
+#pragma weak exti1_isr = null_handler
+#pragma weak exti2_isr = null_handler
+#pragma weak exti3_isr = null_handler
+#pragma weak exti4_isr = null_handler
+#pragma weak dma1_stream0_isr = null_handler
+#pragma weak dma1_stream1_isr = null_handler
+#pragma weak dma1_stream2_isr = null_handler
+#pragma weak dma1_stream3_isr = null_handler
+#pragma weak dma1_stream4_isr = null_handler
+#pragma weak dma1_stream5_isr = null_handler
+#pragma weak dma1_stream6_isr = null_handler
+#pragma weak adc_isr = null_handler
+#pragma weak can1_tx_isr = null_handler
+#pragma weak can1_rx0_isr = null_handler
+#pragma weak can1_rx1_isr = null_handler
+#pragma weak can1_sce_isr = null_handler
+#pragma weak exti9_5_isr = null_handler
+#pragma weak tim1_brk_tim9_isr = null_handler
+#pragma weak tim1_up_tim10_isr = null_handler
+#pragma weak tim1_trg_com_tim11_isr = null_handler
+#pragma weak tim1_cc_isr = null_handler
+#pragma weak tim2_isr = null_handler
+#pragma weak tim3_isr = null_handler
+#pragma weak tim4_isr = null_handler
+#pragma weak i2c1_ev_isr = null_handler
+#pragma weak i2c1_er_isr = null_handler
+#pragma weak i2c2_ev_isr = null_handler
+#pragma weak i2c2_er_isr = null_handler
+#pragma weak spi1_isr = null_handler
+#pragma weak spi2_isr = null_handler
+#pragma weak usart1_isr = null_handler
+#pragma weak usart2_isr = null_handler
+#pragma weak usart3_isr = null_handler
+#pragma weak exti15_10_isr = null_handler
+#pragma weak rtc_alarm_isr = null_handler
+#pragma weak usb_fs_wkup_isr = null_handler
+#pragma weak tim8_brk_tim12_isr = null_handler
+#pragma weak tim8_up_tim13_isr = null_handler
+#pragma weak tim8_trg_com_tim14_isr = null_handler
+#pragma weak tim8_cc_isr = null_handler
+#pragma weak dma1_stream7_isr = null_handler
+#pragma weak fsmc_isr = null_handler
+#pragma weak sdio_isr = null_handler
+#pragma weak tim5_isr = null_handler
+#pragma weak spi3_isr = null_handler
+#pragma weak uart4_isr = null_handler
+#pragma weak uart5_isr = null_handler
+#pragma weak tim6_dac_isr = null_handler
+#pragma weak tim7_isr = null_handler
+#pragma weak dma2_stream0_isr = null_handler
+#pragma weak dma2_stream1_isr = null_handler
+#pragma weak dma2_stream2_isr = null_handler
+#pragma weak dma2_stream3_isr = null_handler
+#pragma weak dma2_stream4_isr = null_handler
+#pragma weak eth_isr = null_handler
+#pragma weak eth_wkup_isr = null_handler
+#pragma weak can2_tx_isr = null_handler
+#pragma weak can2_rx0_isr = null_handler
+#pragma weak can2_rx1_isr = null_handler
+#pragma weak can2_sce_isr = null_handler
+#pragma weak otg_fs_isr = null_handler
+#pragma weak dma2_stream5_isr = null_handler
+#pragma weak dma2_stream6_isr = null_handler
+#pragma weak dma2_stream7_isr = null_handler
+#pragma weak usart6_isr = null_handler
+#pragma weak i2c3_ev_isr = null_handler
+#pragma weak i2c3_er_isr = null_handler
+#pragma weak otg_hs_ep1_out_isr = null_handler
+#pragma weak otg_hs_ep1_in_isr = null_handler
+#pragma weak otg_hs_wkup_isr = null_handler
+#pragma weak otg_hs_isr = null_handler
+#pragma weak dcmi_isr = null_handler
+#pragma weak cryp_isr = null_handler
+#pragma weak hash_rng_isr = null_handler
+
+#define IRQ_HANDLERS \
+ wwdg_isr, \
+ pvd_isr, \
+ tamp_stamp_isr, \
+ rtc_wkup_isr, \
+ flash_isr, \
+ rcc_isr, \
+ exti0_isr, \
+ exti1_isr, \
+ exti2_isr, \
+ exti3_isr, \
+ exti4_isr, \
+ dma1_stream0_isr, \
+ dma1_stream1_isr, \
+ dma1_stream2_isr, \
+ dma1_stream3_isr, \
+ dma1_stream4_isr, \
+ dma1_stream5_isr, \
+ dma1_stream6_isr, \
+ adc_isr, \
+ can1_tx_isr, \
+ can1_rx0_isr, \
+ can1_rx1_isr, \
+ can1_sce_isr, \
+ exti9_5_isr, \
+ tim1_brk_tim9_isr, \
+ tim1_up_tim10_isr, \
+ tim1_trg_com_tim11_isr, \
+ tim1_cc_isr, \
+ tim2_isr, \
+ tim3_isr, \
+ tim4_isr, \
+ i2c1_ev_isr, \
+ i2c1_er_isr, \
+ i2c2_ev_isr, \
+ i2c2_er_isr, \
+ spi1_isr, \
+ spi2_isr, \
+ usart1_isr, \
+ usart2_isr, \
+ usart3_isr, \
+ exti15_10_isr, \
+ rtc_alarm_isr, \
+ usb_fs_wkup_isr, \
+ tim8_brk_tim12_isr, \
+ tim8_up_tim13_isr, \
+ tim8_trg_com_tim14_isr, \
+ tim8_cc_isr, \
+ dma1_stream7_isr, \
+ fsmc_isr, \
+ sdio_isr, \
+ tim5_isr, \
+ spi3_isr, \
+ uart4_isr, \
+ uart5_isr, \
+ tim6_dac_isr, \
+ tim7_isr, \
+ dma2_stream0_isr, \
+ dma2_stream1_isr, \
+ dma2_stream2_isr, \
+ dma2_stream3_isr, \
+ dma2_stream4_isr, \
+ eth_isr, \
+ eth_wkup_isr, \
+ can2_tx_isr, \
+ can2_rx0_isr, \
+ can2_rx1_isr, \
+ can2_sce_isr, \
+ otg_fs_isr, \
+ dma2_stream5_isr, \
+ dma2_stream6_isr, \
+ dma2_stream7_isr, \
+ usart6_isr, \
+ i2c3_ev_isr, \
+ i2c3_er_isr, \
+ otg_hs_ep1_out_isr, \
+ otg_hs_ep1_in_isr, \
+ otg_hs_wkup_isr, \
+ otg_hs_isr, \
+ dcmi_isr, \
+ cryp_isr, \
+ hash_rng_isr,
+
+#endif
diff --git a/include/libopencm3/stm32/f4/irq.h b/include/libopencm3/stm32/f4/irq.h
new file mode 100644
index 0000000..4f4f5e5
--- /dev/null
+++ b/include/libopencm3/stm32/f4/irq.h
@@ -0,0 +1,359 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_STM32_F4_IRQ_H
+#define LIBOPENCM3_STM32_F4_IRQ_H
+
+#define IRQ_WWDG 0
+#define IRQ_PVD 1
+#define IRQ_TAMP_STAMP 2
+#define IRQ_RTC_WKUP 3
+#define IRQ_FLASH 4
+#define IRQ_RCC 5
+#define IRQ_EXTI0 6
+#define IRQ_EXTI1 7
+#define IRQ_EXTI2 8
+#define IRQ_EXTI3 9
+#define IRQ_EXTI4 10
+#define IRQ_DMA1_STREAM0 11
+#define IRQ_DMA1_STREAM1 12
+#define IRQ_DMA1_STREAM2 13
+#define IRQ_DMA1_STREAM3 14
+#define IRQ_DMA1_STREAM4 15
+#define IRQ_DMA1_STREAM5 16
+#define IRQ_DMA1_STREAM6 17
+#define IRQ_ADC 18
+#define IRQ_CAN1_TX 19
+#define IRQ_CAN1_RX0 20
+#define IRQ_CAN1_RX1 21
+#define IRQ_CAN1_SCE 22
+#define IRQ_EXTI9_5 23
+#define IRQ_TIM1_BRK_TIM9 24
+#define IRQ_TIM1_UP_TIM10 25
+#define IRQ_TIM1_TRG_COM_TIM11 26
+#define IRQ_TIM1_CC 27
+#define IRQ_TIM2 28
+#define IRQ_TIM3 29
+#define IRQ_TIM4 30
+#define IRQ_I2C1_EV 31
+#define IRQ_I2C1_ER 32
+#define IRQ_I2C2_EV 33
+#define IRQ_I2C2_ER 34
+#define IRQ_SPI1 35
+#define IRQ_SPI2 36
+#define IRQ_USART1 37
+#define IRQ_USART2 38
+#define IRQ_USART3 39
+#define IRQ_EXTI15_10 40
+#define IRQ_RTC_ALARM 41
+#define IRQ_USB_FS_WKUP 42
+#define IRQ_TIM8_BRK_TIM12 43
+#define IRQ_TIM8_UP_TIM13 44
+#define IRQ_TIM8_TRG_COM_TIM14 45
+#define IRQ_TIM8_CC 46
+#define IRQ_DMA1_STREAM7 47
+#define IRQ_FSMC 48
+#define IRQ_SDIO 49
+#define IRQ_TIM5 50
+#define IRQ_SPI3 51
+#define IRQ_UART4 52
+#define IRQ_UART5 53
+#define IRQ_TIM6_DAC 54
+#define IRQ_TIM7 55
+#define IRQ_DMA2_STREAM0 56
+#define IRQ_DMA2_STREAM1 57
+#define IRQ_DMA2_STREAM2 58
+#define IRQ_DMA2_STREAM3 59
+#define IRQ_DMA2_STREAM4 60
+#define IRQ_ETH 61
+#define IRQ_ETH_WKUP 62
+#define IRQ_CAN2_TX 63
+#define IRQ_CAN2_RX0 64
+#define IRQ_CAN2_RX1 65
+#define IRQ_CAN2_SCE 66
+#define IRQ_OTG_FS 67
+#define IRQ_DMA2_STREAM5 68
+#define IRQ_DMA2_STREAM6 69
+#define IRQ_DMA2_STREAM7 70
+#define IRQ_USART6 71
+#define IRQ_I2C3_EV 72
+#define IRQ_I2C3_ER 73
+#define IRQ_OTG_HS_EP1_OUT 74
+#define IRQ_OTG_HS_EP1_IN 75
+#define IRQ_OTG_HS_WKUP 76
+#define IRQ_OTG_HS 77
+#define IRQ_DCMI 78
+#define IRQ_CRYP 79
+#define IRQ_HASH_RNG 80
+
+/* FIXME: number from list in lib/stm32/f4/vector.c, might miss irqs */
+#define IRQ_COUNT 81
+
+#define WEAK __attribute__ ((weak))
+
+void WEAK wwdg_isr(void);
+void WEAK pvd_isr(void);
+void WEAK tamp_stamp_isr(void);
+void WEAK rtc_wkup_isr(void);
+void WEAK flash_isr(void);
+void WEAK rcc_isr(void);
+void WEAK exti0_isr(void);
+void WEAK exti1_isr(void);
+void WEAK exti2_isr(void);
+void WEAK exti3_isr(void);
+void WEAK exti4_isr(void);
+void WEAK dma1_stream0_isr(void);
+void WEAK dma1_stream1_isr(void);
+void WEAK dma1_stream2_isr(void);
+void WEAK dma1_stream3_isr(void);
+void WEAK dma1_stream4_isr(void);
+void WEAK dma1_stream5_isr(void);
+void WEAK dma1_stream6_isr(void);
+void WEAK adc_isr(void);
+void WEAK can1_tx_isr(void);
+void WEAK can1_rx0_isr(void);
+void WEAK can1_rx1_isr(void);
+void WEAK can1_sce_isr(void);
+void WEAK exti9_5_isr(void);
+void WEAK tim1_brk_tim9_isr(void);
+void WEAK tim1_up_tim10_isr(void);
+void WEAK tim1_trg_com_tim11_isr(void);
+void WEAK tim1_cc_isr(void);
+void WEAK tim2_isr(void);
+void WEAK tim3_isr(void);
+void WEAK tim4_isr(void);
+void WEAK i2c1_ev_isr(void);
+void WEAK i2c1_er_isr(void);
+void WEAK i2c2_ev_isr(void);
+void WEAK i2c2_er_isr(void);
+void WEAK spi1_isr(void);
+void WEAK spi2_isr(void);
+void WEAK usart1_isr(void);
+void WEAK usart2_isr(void);
+void WEAK usart3_isr(void);
+void WEAK exti15_10_isr(void);
+void WEAK rtc_alarm_isr(void);
+void WEAK usb_fs_wkup_isr(void);
+void WEAK tim8_brk_tim12_isr(void);
+void WEAK tim8_up_tim13_isr(void);
+void WEAK tim8_trg_com_tim14_isr(void);
+void WEAK tim8_cc_isr(void);
+void WEAK dma1_stream7_isr(void);
+void WEAK fsmc_isr(void);
+void WEAK sdio_isr(void);
+void WEAK tim5_isr(void);
+void WEAK spi3_isr(void);
+void WEAK uart4_isr(void);
+void WEAK uart5_isr(void);
+void WEAK tim6_dac_isr(void);
+void WEAK tim7_isr(void);
+void WEAK dma2_stream0_isr(void);
+void WEAK dma2_stream1_isr(void);
+void WEAK dma2_stream2_isr(void);
+void WEAK dma2_stream3_isr(void);
+void WEAK dma2_stream4_isr(void);
+void WEAK eth_isr(void);
+void WEAK eth_wkup_isr(void);
+void WEAK can2_tx_isr(void);
+void WEAK can2_rx0_isr(void);
+void WEAK can2_rx1_isr(void);
+void WEAK can2_sce_isr(void);
+void WEAK otg_fs_isr(void);
+void WEAK dma2_stream5_isr(void);
+void WEAK dma2_stream6_isr(void);
+void WEAK dma2_stream7_isr(void);
+void WEAK usart6_isr(void);
+void WEAK i2c3_ev_isr(void);
+void WEAK i2c3_er_isr(void);
+void WEAK otg_hs_ep1_out_isr(void);
+void WEAK otg_hs_ep1_in_isr(void);
+void WEAK otg_hs_wkup_isr(void);
+void WEAK otg_hs_isr(void);
+void WEAK dcmi_isr(void);
+void WEAK cryp_isr(void);
+void WEAK hash_rng_isr(void);
+
+#pragma weak wwdg_isr = null_handler
+#pragma weak pvd_isr = null_handler
+#pragma weak tamp_stamp_isr = null_handler
+#pragma weak rtc_wkup_isr = null_handler
+#pragma weak flash_isr = null_handler
+#pragma weak rcc_isr = null_handler
+#pragma weak exti0_isr = null_handler
+#pragma weak exti1_isr = null_handler
+#pragma weak exti2_isr = null_handler
+#pragma weak exti3_isr = null_handler
+#pragma weak exti4_isr = null_handler
+#pragma weak dma1_stream0_isr = null_handler
+#pragma weak dma1_stream1_isr = null_handler
+#pragma weak dma1_stream2_isr = null_handler
+#pragma weak dma1_stream3_isr = null_handler
+#pragma weak dma1_stream4_isr = null_handler
+#pragma weak dma1_stream5_isr = null_handler
+#pragma weak dma1_stream6_isr = null_handler
+#pragma weak adc_isr = null_handler
+#pragma weak can1_tx_isr = null_handler
+#pragma weak can1_rx0_isr = null_handler
+#pragma weak can1_rx1_isr = null_handler
+#pragma weak can1_sce_isr = null_handler
+#pragma weak exti9_5_isr = null_handler
+#pragma weak tim1_brk_tim9_isr = null_handler
+#pragma weak tim1_up_tim10_isr = null_handler
+#pragma weak tim1_trg_com_tim11_isr = null_handler
+#pragma weak tim1_cc_isr = null_handler
+#pragma weak tim2_isr = null_handler
+#pragma weak tim3_isr = null_handler
+#pragma weak tim4_isr = null_handler
+#pragma weak i2c1_ev_isr = null_handler
+#pragma weak i2c1_er_isr = null_handler
+#pragma weak i2c2_ev_isr = null_handler
+#pragma weak i2c2_er_isr = null_handler
+#pragma weak spi1_isr = null_handler
+#pragma weak spi2_isr = null_handler
+#pragma weak usart1_isr = null_handler
+#pragma weak usart2_isr = null_handler
+#pragma weak usart3_isr = null_handler
+#pragma weak exti15_10_isr = null_handler
+#pragma weak rtc_alarm_isr = null_handler
+#pragma weak usb_fs_wkup_isr = null_handler
+#pragma weak tim8_brk_tim12_isr = null_handler
+#pragma weak tim8_up_tim13_isr = null_handler
+#pragma weak tim8_trg_com_tim14_isr = null_handler
+#pragma weak tim8_cc_isr = null_handler
+#pragma weak dma1_stream7_isr = null_handler
+#pragma weak fsmc_isr = null_handler
+#pragma weak sdio_isr = null_handler
+#pragma weak tim5_isr = null_handler
+#pragma weak spi3_isr = null_handler
+#pragma weak uart4_isr = null_handler
+#pragma weak uart5_isr = null_handler
+#pragma weak tim6_dac_isr = null_handler
+#pragma weak tim7_isr = null_handler
+#pragma weak dma2_stream0_isr = null_handler
+#pragma weak dma2_stream1_isr = null_handler
+#pragma weak dma2_stream2_isr = null_handler
+#pragma weak dma2_stream3_isr = null_handler
+#pragma weak dma2_stream4_isr = null_handler
+#pragma weak eth_isr = null_handler
+#pragma weak eth_wkup_isr = null_handler
+#pragma weak can2_tx_isr = null_handler
+#pragma weak can2_rx0_isr = null_handler
+#pragma weak can2_rx1_isr = null_handler
+#pragma weak can2_sce_isr = null_handler
+#pragma weak otg_fs_isr = null_handler
+#pragma weak dma2_stream5_isr = null_handler
+#pragma weak dma2_stream6_isr = null_handler
+#pragma weak dma2_stream7_isr = null_handler
+#pragma weak usart6_isr = null_handler
+#pragma weak i2c3_ev_isr = null_handler
+#pragma weak i2c3_er_isr = null_handler
+#pragma weak otg_hs_ep1_out_isr = null_handler
+#pragma weak otg_hs_ep1_in_isr = null_handler
+#pragma weak otg_hs_wkup_isr = null_handler
+#pragma weak otg_hs_isr = null_handler
+#pragma weak dcmi_isr = null_handler
+#pragma weak cryp_isr = null_handler
+#pragma weak hash_rng_isr = null_handler
+
+#define IRQ_HANDLERS \
+ wwdg_isr, \
+ pvd_isr, \
+ tamp_stamp_isr, \
+ rtc_wkup_isr, \
+ flash_isr, \
+ rcc_isr, \
+ exti0_isr, \
+ exti1_isr, \
+ exti2_isr, \
+ exti3_isr, \
+ exti4_isr, \
+ dma1_stream0_isr, \
+ dma1_stream1_isr, \
+ dma1_stream2_isr, \
+ dma1_stream3_isr, \
+ dma1_stream4_isr, \
+ dma1_stream5_isr, \
+ dma1_stream6_isr, \
+ adc_isr, \
+ can1_tx_isr, \
+ can1_rx0_isr, \
+ can1_rx1_isr, \
+ can1_sce_isr, \
+ exti9_5_isr, \
+ tim1_brk_tim9_isr, \
+ tim1_up_tim10_isr, \
+ tim1_trg_com_tim11_isr, \
+ tim1_cc_isr, \
+ tim2_isr, \
+ tim3_isr, \
+ tim4_isr, \
+ i2c1_ev_isr, \
+ i2c1_er_isr, \
+ i2c2_ev_isr, \
+ i2c2_er_isr, \
+ spi1_isr, \
+ spi2_isr, \
+ usart1_isr, \
+ usart2_isr, \
+ usart3_isr, \
+ exti15_10_isr, \
+ rtc_alarm_isr, \
+ usb_fs_wkup_isr, \
+ tim8_brk_tim12_isr, \
+ tim8_up_tim13_isr, \
+ tim8_trg_com_tim14_isr, \
+ tim8_cc_isr, \
+ dma1_stream7_isr, \
+ fsmc_isr, \
+ sdio_isr, \
+ tim5_isr, \
+ spi3_isr, \
+ uart4_isr, \
+ uart5_isr, \
+ tim6_dac_isr, \
+ tim7_isr, \
+ dma2_stream0_isr, \
+ dma2_stream1_isr, \
+ dma2_stream2_isr, \
+ dma2_stream3_isr, \
+ dma2_stream4_isr, \
+ eth_isr, \
+ eth_wkup_isr, \
+ can2_tx_isr, \
+ can2_rx0_isr, \
+ can2_rx1_isr, \
+ can2_sce_isr, \
+ otg_fs_isr, \
+ dma2_stream5_isr, \
+ dma2_stream6_isr, \
+ dma2_stream7_isr, \
+ usart6_isr, \
+ i2c3_ev_isr, \
+ i2c3_er_isr, \
+ otg_hs_ep1_out_isr, \
+ otg_hs_ep1_in_isr, \
+ otg_hs_wkup_isr, \
+ otg_hs_isr, \
+ dcmi_isr, \
+ cryp_isr, \
+ hash_rng_isr,
+
+#endif
diff --git a/lib/cm3/vector.c b/lib/cm3/vector.c
new file mode 100644
index 0000000..200e8e5
--- /dev/null
+++ b/lib/cm3/vector.c
@@ -0,0 +1,95 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>,
+ * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/cm3/vector.h>
+
+#define WEAK __attribute__ ((weak))
+
+/* Symbols exported by the linker script(s): */
+extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
+
+void main(void);
+void blocking_handler(void);
+void null_handler(void);
+
+void WEAK reset_handler(void);
+void WEAK nmi_handler(void);
+void WEAK hard_fault_handler(void);
+void WEAK mem_manage_handler(void);
+void WEAK bus_fault_handler(void);
+void WEAK usage_fault_handler(void);
+void WEAK sv_call_handler(void);
+void WEAK debug_monitor_handler(void);
+void WEAK pend_sv_handler(void);
+void WEAK sys_tick_handler(void);
+
+__attribute__ ((section(".vectors")))
+vector_table_t vector_table = {
+ .initial_sp_value = &_stack,
+ .reset = reset_handler,
+ .nmi = nmi_handler,
+ .hard_fault = hard_fault_handler,
+ .memory_manage_fault = mem_manage_handler,
+ .bus_fault = bus_fault_handler,
+ .usage_fault = usage_fault_handler,
+ .debug_monitor = debug_monitor_handler,
+ .sv_call = sv_call_handler,
+ .pend_sv = pend_sv_handler,
+ .systick = sys_tick_handler,
+ .irq = {
+ IRQ_HANDLERS
+ }
+};
+
+void WEAK reset_handler(void)
+{
+ volatile unsigned *src, *dest;
+
+ __asm__("MSR msp, %0" : : "r"(&_stack));
+
+ for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
+ *dest = *src;
+
+ while (dest < &_ebss)
+ *dest++ = 0;
+
+ /* Call the application's entry point. */
+ main();
+}
+
+void blocking_handler(void)
+{
+ while (1) ;
+}
+
+void null_handler(void)
+{
+ /* Do nothing. */
+}
+
+#pragma weak nmi_handler = null_handler
+#pragma weak hard_fault_handler = blocking_handler
+#pragma weak mem_manage_handler = blocking_handler
+#pragma weak bus_fault_handler = blocking_handler
+#pragma weak usage_fault_handler = blocking_handler
+#pragma weak sv_call_handler = null_handler
+#pragma weak debug_monitor_handler = null_handler
+#pragma weak pend_sv_handler = null_handler
+#pragma weak sys_tick_handler = null_handler
diff --git a/lib/efm32/tinygecko/vector.c b/lib/efm32/tinygecko/vector.c
new file mode 100644
index 0000000..d6da5a2
--- /dev/null
+++ b/lib/efm32/tinygecko/vector.c
@@ -0,0 +1,2 @@
+#include <libopencm3/efm32/tinygecko/irq.h>
+#include "../../cm3/vector.c"
diff --git a/lib/lm3s/vector.c b/lib/lm3s/vector.c
index 3a1c4d1..e9e7e06 100644
--- a/lib/lm3s/vector.c
+++ b/lib/lm3s/vector.c
@@ -1,96 +1,2 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define WEAK __attribute__ ((weak))
-
-/* Symbols exported by the linker script(s): */
-extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
-
-void main(void);
-void reset_handler(void);
-void blocking_handler(void);
-void null_handler(void);
-
-void WEAK nmi_handler(void);
-void WEAK hard_fault_handler(void);
-void WEAK mem_manage_handler(void);
-void WEAK bus_fault_handler(void);
-void WEAK usage_fault_handler(void);
-void WEAK sv_call_handler(void);
-void WEAK debug_monitor_handler(void);
-void WEAK pend_sv_handler(void);
-void WEAK sys_tick_handler(void);
-
-/* TODO: Interrupt handler prototypes */
-
-__attribute__ ((section(".vectors")))
-void (*const vector_table[]) (void) = {
- (void *)&_stack,
- reset_handler,
- nmi_handler,
- hard_fault_handler,
- mem_manage_handler,
- bus_fault_handler,
- usage_fault_handler,
- 0, 0, 0, 0, /* Reserved */
- sv_call_handler,
- debug_monitor_handler,
- 0, /* Reserved */
- pend_sv_handler,
- sys_tick_handler,
-
- /* TODO: Interrupt handlers */
-};
-
-void reset_handler(void)
-{
- volatile unsigned *src, *dest;
-
- __asm__("MSR msp, %0" : : "r"(&_stack));
-
- for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
- *dest = *src;
-
- while (dest < &_ebss)
- *dest++ = 0;
-
- /* Call the application's entry point. */
- main();
-}
-
-void blocking_handler(void)
-{
- while (1) ;
-}
-
-void null_handler(void)
-{
- /* Do nothing. */
-}
-
-#pragma weak nmi_handler = null_handler
-#pragma weak hard_fault_handler = blocking_handler
-#pragma weak mem_manage_handler = blocking_handler
-#pragma weak bus_fault_handler = blocking_handler
-#pragma weak usage_fault_handler = blocking_handler
-#pragma weak sv_call_handler = null_handler
-#pragma weak debug_monitor_handler = null_handler
-#pragma weak pend_sv_handler = null_handler
-#pragma weak sys_tick_handler = null_handler
-/* TODO: Interrupt handler weak aliases */
+#include <libopencm3/lm3s/irq.h>
+#include "../cm3/vector.c"
diff --git a/lib/lpc17xx/vector.c b/lib/lpc17xx/vector.c
index 518f562..61342f4 100644
--- a/lib/lpc17xx/vector.c
+++ b/lib/lpc17xx/vector.c
@@ -1,95 +1,2 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define WEAK __attribute__ ((weak))
-
-/* Symbols exported by the linker script(s): */
-extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
-
-void main(void);
-void reset_handler(void);
-void blocking_handler(void);
-void null_handler(void);
-
-void WEAK nmi_handler(void);
-void WEAK hard_fault_handler(void);
-void WEAK mem_manage_handler(void);
-void WEAK bus_fault_handler(void);
-void WEAK usage_fault_handler(void);
-void WEAK sv_call_handler(void);
-void WEAK debug_monitor_handler(void);
-void WEAK pend_sv_handler(void);
-void WEAK sys_tick_handler(void);
-
-/* TODO: Interrupt handler prototypes */
-
-__attribute__ ((section(".vectors")))
-void (*const vector_table[]) (void) = {
- (void*)&_stack, /* Addr: 0x0000_0000 */
- reset_handler, /* Addr: 0x0000_0004 */
- nmi_handler, /* Addr: 0x0000_0008 */
- hard_fault_handler, /* Addr: 0x0000_000C */
- mem_manage_handler, /* Addr: 0x0000_0010 */
- bus_fault_handler, /* Addr: 0x0000_0014 */
- usage_fault_handler, /* Addr: 0x0000_0018 */
- 0, 0, 0, 0, /* Reserved Addr: 0x0000_001C - 0x0000_002B */
- sv_call_handler, /* Addr: 0x0000_002C */
- debug_monitor_handler, /* Addr: 0x0000_0030 */
- 0, /* Reserved Addr: 0x0000_00034 */
- pend_sv_handler, /* Addr: 0x0000_0038 */
- sys_tick_handler, /* Addr: 0x0000_003C */
-};
-
-
-void reset_handler(void)
-{
- volatile unsigned *src, *dest;
-
- __asm__("MSR msp, %0" : : "r"(&_stack));
-
- for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
- *dest = *src;
-
- while (dest < &_ebss)
- *dest++ = 0;
-
- /* Call the application's entry point. */
- main();
-}
-
-void blocking_handler(void)
-{
- while (1) ;
-}
-
-void null_handler(void)
-{
- /* Do nothing. */
-}
-
-#pragma weak nmi_handler = null_handler
-#pragma weak hard_fault_handler = blocking_handler
-#pragma weak mem_manage_handler = blocking_handler
-#pragma weak bus_fault_handler = blocking_handler
-#pragma weak usage_fault_handler = blocking_handler
-#pragma weak sv_call_handler = null_handler
-#pragma weak debug_monitor_handler = null_handler
-#pragma weak pend_sv_handler = null_handler
-#pragma weak sys_tick_handler = null_handler
-/* TODO: Interrupt handler weak aliases */
+#include <libopencm3/lpc17xx/irq.h>
+#include "../cm3/vector.c"
diff --git a/lib/lpc43xx/vector.c b/lib/lpc43xx/vector.c
index 23008bc..66e9b63 100644
--- a/lib/lpc43xx/vector.c
+++ b/lib/lpc43xx/vector.c
@@ -18,156 +18,20 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#define WEAK __attribute__ ((weak))
+#include <libopencm3/lpc43xx/irq.h>
+#define reset_handler original_reset_handler
+#include "../cm3/vector.c"
+#undef reset_handler
+#include <libopencm3/cm3/common.h>
-/* Symbols exported by the linker script(s): */
-extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
extern unsigned _etext_ram, _text_ram, _etext_rom;
-void main(void);
-void reset_handler(void);
-void blocking_handler(void);
-void null_handler(void);
-
-void WEAK nmi_handler(void);
-void WEAK hard_fault_handler(void);
-void WEAK mem_manage_handler(void);
-void WEAK bus_fault_handler(void);
-void WEAK usage_fault_handler(void);
-void WEAK sv_call_handler(void);
-void WEAK debug_monitor_handler(void);
-void WEAK pend_sv_handler(void);
-void WEAK sys_tick_handler(void);
-void WEAK dac_irqhandler(void);
-void WEAK m0core_irqhandler(void);
-void WEAK dma_irqhandler(void);
-void WEAK ethernet_irqhandler(void);
-void WEAK sdio_irqhandler(void);
-void WEAK lcd_irqhandler(void);
-void WEAK usb0_irqhandler(void);
-void WEAK usb1_irqhandler(void);
-void WEAK sct_irqhandler(void);
-void WEAK ritimer_irqhandler(void);
-void WEAK timer0_irqhandler(void);
-void WEAK timer1_irqhandler(void);
-void WEAK timer2_irqhandler(void);
-void WEAK timer3_irqhandler(void);
-void WEAK mcpwm_irqhandler(void);
-void WEAK adc0_irqhandler(void);
-void WEAK i2c0_irqhandler(void);
-void WEAK i2c1_irqhandler(void);
-void WEAK spi_irqhandler(void);
-void WEAK adc1_irqhandler(void);
-void WEAK ssp0_irqhandler(void);
-void WEAK ssp1_irqhandler(void);
-void WEAK usart0_irqhandler(void);
-void WEAK uart1_irqhandler(void);
-void WEAK usart2_irqhandler(void);
-void WEAK usart3_irqhandler(void);
-void WEAK i2s0_irqhandler(void);
-void WEAK i2s1_irqhandler(void);
-void WEAK spifi_irqhandler(void);
-void WEAK sgpio_irqhandler(void);
-void WEAK pin_int0_irqhandler(void);
-void WEAK pin_int1_irqhandler(void);
-void WEAK pin_int2_irqhandler(void);
-void WEAK pin_int3_irqhandler(void);
-void WEAK pin_int4_irqhandler(void);
-void WEAK pin_int5_irqhandler(void);
-void WEAK pin_int6_irqhandler(void);
-void WEAK pin_int7_irqhandler(void);
-void WEAK gint0_irqhandler(void);
-void WEAK gint1_irqhandler(void);
-void WEAK eventrouter_irqhandler(void);
-void WEAK c_can1_irqhandler(void);
-void WEAK atimer_irqhandler(void);
-void WEAK rtc_irqhandler(void);
-void WEAK wwdt_irqhandler(void);
-void WEAK c_can0_irqhandler(void);
-void WEAK qei_irqhandler(void);
-
-__attribute__ ((section(".vectors")))
-void (*const vector_table[]) (void) = {
- /* Cortex-M4 interrupts */
- (void*)&_stack,
- reset_handler,
- nmi_handler,
- hard_fault_handler,
- mem_manage_handler,
- bus_fault_handler,
- usage_fault_handler,
- 0, 0, 0, 0, /* reserved */
- sv_call_handler,
- debug_monitor_handler,
- 0, /* reserved */
- pend_sv_handler,
- sys_tick_handler,
-
- /* LPC43xx interrupts */
- dac_irqhandler,
- m0core_irqhandler,
- dma_irqhandler,
- 0, /* reserved */
- 0, /* reserved */
- ethernet_irqhandler,
- sdio_irqhandler,
- lcd_irqhandler,
- usb0_irqhandler,
- usb1_irqhandler,
- sct_irqhandler,
- ritimer_irqhandler,
- timer0_irqhandler,
- timer1_irqhandler,
- timer2_irqhandler,
- timer3_irqhandler,
- mcpwm_irqhandler,
- adc0_irqhandler,
- i2c0_irqhandler,
- i2c1_irqhandler,
- spi_irqhandler,
- adc1_irqhandler,
- ssp0_irqhandler,
- ssp1_irqhandler,
- usart0_irqhandler,
- uart1_irqhandler,
- usart2_irqhandler,
- usart3_irqhandler,
- i2s0_irqhandler,
- i2s1_irqhandler,
- spifi_irqhandler,
- sgpio_irqhandler,
- pin_int0_irqhandler,
- pin_int1_irqhandler,
- pin_int2_irqhandler,
- pin_int3_irqhandler,
- pin_int4_irqhandler,
- pin_int5_irqhandler,
- pin_int6_irqhandler,
- pin_int7_irqhandler,
- gint0_irqhandler,
- gint1_irqhandler,
- eventrouter_irqhandler,
- c_can1_irqhandler,
- 0, /* reserved */
- 0, /* reserved */
- atimer_irqhandler,
- rtc_irqhandler,
- 0, /* reserved */
- wwdt_irqhandler,
- 0, /* reserved */
- c_can0_irqhandler,
- qei_irqhandler,
-};
-
-#define MMIO32(addr) (*(volatile unsigned long*)(addr))
#define CREG_M4MEMMAP MMIO32( (0x40043000 + 0x100) )
-void reset_handler(void)
+void WEAK reset_handler(void)
{
volatile unsigned *src, *dest;
- __asm__("MSR msp, %0" : : "r"(&_stack));
-
/* Copy the code from ROM to Real RAM (if enabled) */
if( (&_etext_ram-&_text_ram) > 0 )
{
@@ -186,79 +50,5 @@ void reset_handler(void)
/* Continue Execution in RAM */
}
- for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
- *dest = *src;
-
- while (dest < &_ebss)
- *dest++ = 0;
-
- /* Call the application's entry point. */
- main();
+ original_reset_handler();
}
-
-void blocking_handler(void)
-{
- while (1) ;
-}
-
-void null_handler(void)
-{
- /* Do nothing. */
-}
-
-#pragma weak nmi_handler = null_handler
-#pragma weak hard_fault_handler = blocking_handler
-#pragma weak mem_manage_handler = blocking_handler
-#pragma weak bus_fault_handler = blocking_handler
-#pragma weak usage_fault_handler = blocking_handler
-#pragma weak sv_call_handler = null_handler
-#pragma weak debug_monitor_handler = null_handler
-#pragma weak pend_sv_handler = null_handler
-#pragma weak sys_tick_handler = null_handler
-#pragma weak dac_irqhandler = null_handler
-#pragma weak m0core_irqhandler = null_handler
-#pragma weak dma_irqhandler = null_handler
-#pragma weak ethernet_irqhandler = null_handler
-#pragma weak sdio_irqhandler = null_handler
-#pragma weak lcd_irqhandler = null_handler
-#pragma weak usb0_irqhandler = null_handler
-#pragma weak usb1_irqhandler = null_handler
-#pragma weak sct_irqhandler = null_handler
-#pragma weak ritimer_irqhandler = null_handler
-#pragma weak timer0_irqhandler = null_handler
-#pragma weak timer1_irqhandler = null_handler
-#pragma weak timer2_irqhandler = null_handler
-#pragma weak timer3_irqhandler = null_handler
-#pragma weak mcpwm_irqhandler = null_handler
-#pragma weak adc0_irqhandler = null_handler
-#pragma weak i2c0_irqhandler = null_handler
-#pragma weak i2c1_irqhandler = null_handler
-#pragma weak spi_irqhandler = null_handler
-#pragma weak adc1_irqhandler = null_handler
-#pragma weak ssp0_irqhandler = null_handler
-#pragma weak ssp1_irqhandler = null_handler
-#pragma weak usart0_irqhandler = null_handler
-#pragma weak uart1_irqhandler = null_handler
-#pragma weak usart2_irqhandler = null_handler
-#pragma weak usart3_irqhandler = null_handler
-#pragma weak i2s0_irqhandler = null_handler
-#pragma weak i2s1_irqhandler = null_handler
-#pragma weak spifi_irqhandler = null_handler
-#pragma weak sgpio_irqhandler = null_handler
-#pragma weak pin_int0_irqhandler = null_handler
-#pragma weak pin_int1_irqhandler = null_handler
-#pragma weak pin_int2_irqhandler = null_handler
-#pragma weak pin_int3_irqhandler = null_handler
-#pragma weak pin_int4_irqhandler = null_handler
-#pragma weak pin_int5_irqhandler = null_handler
-#pragma weak pin_int6_irqhandler = null_handler
-#pragma weak pin_int7_irqhandler = null_handler
-#pragma weak gint0_irqhandler = null_handler
-#pragma weak gint1_irqhandler = null_handler
-#pragma weak eventrouter_irqhandler = null_handler
-#pragma weak c_can1_irqhandler = null_handler
-#pragma weak atimer_irqhandler = null_handler
-#pragma weak rtc_irqhandler = null_handler
-#pragma weak wwdt_irqhandler = null_handler
-#pragma weak c_can0_irqhandler = null_handler
-#pragma weak qei_irqhandler = null_handler
diff --git a/lib/stm32/f1/vector.c b/lib/stm32/f1/vector.c
index f496ae4..795773b 100644
--- a/lib/stm32/f1/vector.c
+++ b/lib/stm32/f1/vector.c
@@ -1,296 +1,2 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define WEAK __attribute__ ((weak))
-
-/* Symbols exported by the linker script(s): */
-extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
-
-void main(void);
-void reset_handler(void);
-void blocking_handler(void);
-void null_handler(void);
-
-void WEAK nmi_handler(void);
-void WEAK hard_fault_handler(void);
-void WEAK mem_manage_handler(void);
-void WEAK bus_fault_handler(void);
-void WEAK usage_fault_handler(void);
-void WEAK sv_call_handler(void);
-void WEAK debug_monitor_handler(void);
-void WEAK pend_sv_handler(void);
-void WEAK sys_tick_handler(void);
-void WEAK wwdg_isr(void);
-void WEAK pvd_isr(void);
-void WEAK tamper_isr(void);
-void WEAK rtc_isr(void);
-void WEAK flash_isr(void);
-void WEAK rcc_isr(void);
-void WEAK exti0_isr(void);
-void WEAK exti1_isr(void);
-void WEAK exti2_isr(void);
-void WEAK exti3_isr(void);
-void WEAK exti4_isr(void);
-void WEAK dma1_channel1_isr(void);
-void WEAK dma1_channel2_isr(void);
-void WEAK dma1_channel3_isr(void);
-void WEAK dma1_channel4_isr(void);
-void WEAK dma1_channel5_isr(void);
-void WEAK dma1_channel6_isr(void);
-void WEAK dma1_channel7_isr(void);
-void WEAK adc1_2_isr(void);
-void WEAK usb_hp_can_tx_isr(void);
-void WEAK usb_lp_can_rx0_isr(void);
-void WEAK can_rx1_isr(void);
-void WEAK can_sce_isr(void);
-void WEAK exti9_5_isr(void);
-void WEAK tim1_brk_isr(void);
-void WEAK tim1_up_isr(void);
-void WEAK tim1_trg_com_isr(void);
-void WEAK tim1_cc_isr(void);
-void WEAK tim2_isr(void);
-void WEAK tim3_isr(void);
-void WEAK tim4_isr(void);
-void WEAK i2c1_ev_isr(void);
-void WEAK i2c1_er_isr(void);
-void WEAK i2c2_ev_isr(void);
-void WEAK i2c2_er_isr(void);
-void WEAK spi1_isr(void);
-void WEAK spi2_isr(void);
-void WEAK usart1_isr(void);
-void WEAK usart2_isr(void);
-void WEAK usart3_isr(void);
-void WEAK exti15_10_isr(void);
-void WEAK rtc_alarm_isr(void);
-void WEAK usb_wakeup_isr(void);
-void WEAK tim8_brk_isr(void);
-void WEAK tim8_up_isr(void);
-void WEAK tim8_trg_com_isr(void);
-void WEAK tim8_cc_isr(void);
-void WEAK adc3_isr(void);
-void WEAK fsmc_isr(void);
-void WEAK sdio_isr(void);
-void WEAK tim5_isr(void);
-void WEAK spi3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK tim6_isr(void);
-void WEAK tim7_isr(void);
-void WEAK dma2_channel1_isr(void);
-void WEAK dma2_channel2_isr(void);
-void WEAK dma2_channel3_isr(void);
-void WEAK dma2_channel4_5_isr(void);
-void WEAK dma2_channel5_isr(void);
-void WEAK eth_isr(void);
-void WEAK eth_wkup_isr(void);
-void WEAK can2_tx_isr(void);
-void WEAK can2_rx0_isr(void);
-void WEAK can2_rx1_isr(void);
-void WEAK can2_sce_isr(void);
-void WEAK otg_fs_isr(void);
-
-
-__attribute__ ((section(".vectors")))
-void (*const vector_table[]) (void) = {
- (void*)&_stack, /* Addr: 0x0000_0000 */
- reset_handler, /* Addr: 0x0000_0004 */
- nmi_handler, /* Addr: 0x0000_0008 */
- hard_fault_handler, /* Addr: 0x0000_000C */
- mem_manage_handler, /* Addr: 0x0000_0010 */
- bus_fault_handler, /* Addr: 0x0000_0014 */
- usage_fault_handler, /* Addr: 0x0000_0018 */
- 0, 0, 0, 0, /* Reserved Addr: 0x0000_001C - 0x0000_002B */
- sv_call_handler, /* Addr: 0x0000_002C */
- debug_monitor_handler, /* Addr: 0x0000_0030*/
- 0, /* Reserved Addr: 0x0000_00034 */
- pend_sv_handler, /* Addr: 0x0000_0038 */
- sys_tick_handler, /* Addr: 0x0000_003C */
- wwdg_isr, /* Addr: 0x0000_0040 */
- pvd_isr, /* Addr: 0x0000_0044 */
- tamper_isr, /* Addr: 0x0000_0048 */
- rtc_isr, /* Addr: 0x0000_004C */
- flash_isr, /* Addr: 0x0000_0050 */
- rcc_isr, /* Addr: 0x0000_0054 */
- exti0_isr, /* Addr: 0x0000_0058 */
- exti1_isr, /* Addr: 0x0000_005C */
- exti2_isr, /* Addr: 0x0000_0060 */
- exti3_isr, /* Addr: 0x0000_0064 */
- exti4_isr, /* Addr: 0x0000_0068 */
- dma1_channel1_isr, /* Addr: 0x0000_006C */
- dma1_channel2_isr, /* Addr: 0x0000_0070 */
- dma1_channel3_isr, /* Addr: 0x0000_0074 */
- dma1_channel4_isr, /* Addr: 0x0000_0078 */
- dma1_channel5_isr, /* Addr: 0x0000_007C */
- dma1_channel6_isr, /* Addr: 0x0000_0080 */
- dma1_channel7_isr, /* Addr: 0x0000_0084 */
- adc1_2_isr, /* Addr: 0x0000_0088 */
- usb_hp_can_tx_isr, /* Addr: 0x0000_008C */
- usb_lp_can_rx0_isr, /* Addr: 0x0000_0090 */
- can_rx1_isr, /* Addr: 0x0000_0094 */
- can_sce_isr, /* Addr: 0x0000_0098 */
- exti9_5_isr, /* Addr: 0x0000_009C */
- tim1_brk_isr, /* Addr: 0x0000_00A0 */
- tim1_up_isr, /* Addr: 0x0000_00A4 */
- tim1_trg_com_isr, /* Addr: 0x0000_00A8 */
- tim1_cc_isr, /* Addr: 0x0000_00AC */
- tim2_isr, /* Addr: 0x0000_00B0 */
- tim3_isr, /* Addr: 0x0000_00B4 */
- tim4_isr, /* Addr: 0x0000_00B8 */
- i2c1_ev_isr, /* Addr: 0x0000_00BC */
- i2c1_er_isr, /* Addr: 0x0000_00C0 */
- i2c2_ev_isr, /* Addr: 0x0000_00C4 */
- i2c2_er_isr, /* Addr: 0x0000_00C8 */
- spi1_isr, /* Addr: 0x0000_00CC */
- spi2_isr, /* Addr: 0x0000_00D0 */
- usart1_isr, /* Addr: 0x0000_00D4 */
- usart2_isr, /* Addr: 0x0000_00D8 */
- usart3_isr, /* Addr: 0x0000_00DC */
- exti15_10_isr, /* Addr: 0x0000_00E0 */
- rtc_alarm_isr, /* Addr: 0x0000_00E4 */
- usb_wakeup_isr, /* Addr: 0x0000_00E8 */
- tim8_brk_isr, /* Addr: 0x0000_00EC */
- tim8_up_isr, /* Addr: 0x0000_00F0 */
- tim8_trg_com_isr, /* Addr: 0x0000_00F4 */
- tim8_cc_isr, /* Addr: 0x0000_00F8 */
- adc3_isr, /* Addr: 0x0000_00FC */
- fsmc_isr, /* Addr: 0x0000_0100 */
- sdio_isr, /* Addr: 0x0000_0104 */
- tim5_isr, /* Addr: 0x0000_0108 */
- spi3_isr, /* Addr: 0x0000_010C */
- uart4_isr, /* Addr: 0x0000_0110 */
- uart5_isr, /* Addr: 0x0000_0114 */
- tim6_isr, /* Addr: 0x0000_0118 */
- tim7_isr, /* Addr: 0x0000_011C */
- dma2_channel1_isr, /* Addr: 0x0000_0120 */
- dma2_channel2_isr, /* Addr: 0x0000_0124 */
- dma2_channel3_isr, /* Addr: 0x0000_0128 */
- dma2_channel4_5_isr, /* Addr: 0x0000_012C */
- dma2_channel5_isr, /* Addr: 0x0000_0130 */
- eth_isr, /* Addr: 0x0000_0134 */
- eth_wkup_isr, /* Addr: 0x0000_0138 */
- can2_tx_isr, /* Addr: 0x0000_013C */
- can2_rx0_isr, /* Addr: 0x0000_0140 */
- can2_rx1_isr, /* Addr: 0x0000_0144 */
- can2_sce_isr, /* Addr: 0x0000_0148 */
- otg_fs_isr, /* Addr: 0x0000_014C */
-};
-
-void reset_handler(void)
-{
- volatile unsigned *src, *dest;
-
- __asm__("MSR msp, %0" : : "r"(&_stack));
-
- for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
- *dest = *src;
-
- while (dest < &_ebss)
- *dest++ = 0;
-
- /* Call the application's entry point. */
- main();
-}
-
-void blocking_handler(void)
-{
- while (1) ;
-}
-
-void null_handler(void)
-{
- /* Do nothing. */
-}
-
-#pragma weak nmi_handler = null_handler
-#pragma weak hard_fault_handler = blocking_handler
-#pragma weak mem_manage_handler = blocking_handler
-#pragma weak bus_fault_handler = blocking_handler
-#pragma weak usage_fault_handler = blocking_handler
-#pragma weak sv_call_handler = null_handler
-#pragma weak debug_monitor_handler = null_handler
-#pragma weak pend_sv_handler = null_handler
-#pragma weak sys_tick_handler = null_handler
-#pragma weak wwdg_isr = null_handler
-#pragma weak pvd_isr = null_handler
-#pragma weak tamper_isr = null_handler
-#pragma weak rtc_isr = null_handler
-#pragma weak flash_isr = null_handler
-#pragma weak rcc_isr = null_handler
-#pragma weak exti0_isr = null_handler
-#pragma weak exti1_isr = null_handler
-#pragma weak exti2_isr = null_handler
-#pragma weak exti3_isr = null_handler
-#pragma weak exti4_isr = null_handler
-#pragma weak dma1_channel1_isr = null_handler
-#pragma weak dma1_channel2_isr = null_handler
-#pragma weak dma1_channel3_isr = null_handler
-#pragma weak dma1_channel4_isr = null_handler
-#pragma weak dma1_channel5_isr = null_handler
-#pragma weak dma1_channel6_isr = null_handler
-#pragma weak dma1_channel7_isr = null_handler
-#pragma weak adc1_2_isr = null_handler
-#pragma weak usb_hp_can_tx_isr = null_handler
-#pragma weak usb_lp_can_rx0_isr = null_handler
-#pragma weak can_rx1_isr = null_handler
-#pragma weak can_sce_isr = null_handler
-#pragma weak exti9_5_isr = null_handler
-#pragma weak tim1_brk_isr = null_handler
-#pragma weak tim1_up_isr = null_handler
-#pragma weak tim1_trg_com_isr = null_handler
-#pragma weak tim1_cc_isr = null_handler
-#pragma weak tim2_isr = null_handler
-#pragma weak tim3_isr = null_handler
-#pragma weak tim4_isr = null_handler
-#pragma weak i2c1_ev_isr = null_handler
-#pragma weak i2c1_er_isr = null_handler
-#pragma weak i2c2_ev_isr = null_handler
-#pragma weak i2c2_er_isr = null_handler
-#pragma weak spi1_isr = null_handler
-#pragma weak spi2_isr = null_handler
-#pragma weak usart1_isr = null_handler
-#pragma weak usart2_isr = null_handler
-#pragma weak usart3_isr = null_handler
-#pragma weak exti15_10_isr = null_handler
-#pragma weak rtc_alarm_isr = null_handler
-#pragma weak usb_wakeup_isr = null_handler
-#pragma weak tim8_brk_isr = null_handler
-#pragma weak tim8_up_isr = null_handler
-#pragma weak tim8_trg_com_isr = null_handler
-#pragma weak tim8_cc_isr = null_handler
-#pragma weak adc3_isr = null_handler
-#pragma weak fsmc_isr = null_handler
-#pragma weak sdio_isr = null_handler
-#pragma weak tim5_isr = null_handler
-#pragma weak spi3_isr = null_handler
-#pragma weak uart4_isr = null_handler
-#pragma weak uart5_isr = null_handler
-#pragma weak tim6_isr = null_handler
-#pragma weak tim7_isr = null_handler
-#pragma weak dma2_channel1_isr = null_handler
-#pragma weak dma2_channel2_isr = null_handler
-#pragma weak dma2_channel3_isr = null_handler
-#pragma weak dma2_channel4_5_isr = null_handler
-#pragma weak dma2_channel5_isr
-#pragma weak eth_isr = null_handler
-#pragma weak eth_wkup_isr = null_handler
-#pragma weak can2_tx_isr = null_handler
-#pragma weak can2_rx0_isr = null_handler
-#pragma weak can2_rx1_isr = null_handler
-#pragma weak can2_sce_isr = null_handler
-#pragma weak otg_fs_isr = null_handler
+#include <libopencm3/stm32/f1/irq.h>
+#include "../../cm3/vector.c"
diff --git a/lib/stm32/f2/vector.c b/lib/stm32/f2/vector.c
index 3429bfb..24d1185 100644
--- a/lib/stm32/f2/vector.c
+++ b/lib/stm32/f2/vector.c
@@ -1,336 +1,2 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define WEAK __attribute__ ((weak))
-
-/* Symbols exported by the linker script(s): */
-extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
-
-void main(void);
-void reset_handler(void);
-void blocking_handler(void);
-void null_handler(void);
-
-void WEAK reset_handler(void);
-void WEAK nmi_handler(void);
-void WEAK hard_fault_handler(void);
-void WEAK mem_manage_handler(void);
-void WEAK bus_fault_handler(void);
-void WEAK usage_fault_handler(void);
-void WEAK sv_call_handler(void);
-void WEAK debug_monitor_handler(void);
-void WEAK pend_sv_handler(void);
-void WEAK sys_tick_handler(void);
-void WEAK wwdg_isr(void);
-void WEAK pvd_isr(void);
-void WEAK tamp_stamp_isr(void);
-void WEAK rtc_wkup_isr(void);
-void WEAK flash_isr(void);
-void WEAK rcc_isr(void);
-void WEAK exti0_isr(void);
-void WEAK exti1_isr(void);
-void WEAK exti2_isr(void);
-void WEAK exti3_isr(void);
-void WEAK exti4_isr(void);
-void WEAK dma1_stream0_isr(void);
-void WEAK dma1_stream1_isr(void);
-void WEAK dma1_stream2_isr(void);
-void WEAK dma1_stream3_isr(void);
-void WEAK dma1_stream4_isr(void);
-void WEAK dma1_stream5_isr(void);
-void WEAK dma1_stream6_isr(void);
-void WEAK adc_isr(void);
-void WEAK can1_tx_isr(void);
-void WEAK can1_rx0_isr(void);
-void WEAK can1_rx1_isr(void);
-void WEAK can1_sce_isr(void);
-void WEAK exti9_5_isr(void);
-void WEAK tim1_brk_tim9_isr(void);
-void WEAK tim1_up_tim10_isr(void);
-void WEAK tim1_trg_com_tim11_isr(void);
-void WEAK tim1_cc_isr(void);
-void WEAK tim2_isr(void);
-void WEAK tim3_isr(void);
-void WEAK tim4_isr(void);
-void WEAK i2c1_ev_isr(void);
-void WEAK i2c1_er_isr(void);
-void WEAK i2c2_ev_isr(void);
-void WEAK i2c2_er_isr(void);
-void WEAK spi1_isr(void);
-void WEAK spi2_isr(void);
-void WEAK usart1_isr(void);
-void WEAK usart2_isr(void);
-void WEAK usart3_isr(void);
-void WEAK exti15_10_isr(void);
-void WEAK rtc_alarm_isr(void);
-void WEAK usb_fs_wkup_isr(void);
-void WEAK tim8_brk_tim12_isr(void);
-void WEAK tim8_up_tim13_isr(void);
-void WEAK tim8_trg_com_tim14_isr(void);
-void WEAK tim8_cc_isr(void);
-void WEAK dma1_stream7_isr(void);
-void WEAK fsmc_isr(void);
-void WEAK sdio_isr(void);
-void WEAK tim5_isr(void);
-void WEAK spi3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK tim6_dac_isr(void);
-void WEAK tim7_isr(void);
-void WEAK dma2_stream0_isr(void);
-void WEAK dma2_stream1_isr(void);
-void WEAK dma2_stream2_isr(void);
-void WEAK dma2_stream3_isr(void);
-void WEAK dma2_stream4_isr(void);
-void WEAK eth_isr(void);
-void WEAK eth_wkup_isr(void);
-void WEAK can2_tx_isr(void);
-void WEAK can2_rx0_isr(void);
-void WEAK can2_rx1_isr(void);
-void WEAK can2_sce_isr(void);
-void WEAK otg_fs_isr(void);
-void WEAK dma2_stream5_isr(void);
-void WEAK dma2_stream6_isr(void);
-void WEAK dma2_stream7_isr(void);
-void WEAK usart6_isr(void);
-void WEAK i2c3_ev_isr(void);
-void WEAK i2c3_er_isr(void);
-void WEAK otg_hs_ep1_out_isr(void);
-void WEAK otg_hs_ep1_in_isr(void);
-void WEAK otg_hs_wkup_isr(void);
-void WEAK otg_hs_isr(void);
-void WEAK dcmi_isr(void);
-void WEAK cryp_isr(void);
-void WEAK hash_rng_isr(void);
-
-__attribute__ ((section(".vectors")))
-void (*const vector_table[]) (void) = {
- (void *)&_stack,
- reset_handler,
- nmi_handler,
- hard_fault_handler,
- mem_manage_handler,
- bus_fault_handler,
- usage_fault_handler,
- 0, 0, 0, 0, /* Reserved */
- sv_call_handler,
- debug_monitor_handler,
- 0, /* Reserved */
- pend_sv_handler,
- sys_tick_handler,
- wwdg_isr,
- pvd_isr,
- tamp_stamp_isr,
- rtc_wkup_isr,
- flash_isr,
- rcc_isr,
- exti0_isr,
- exti1_isr,
- exti2_isr,
- exti3_isr,
- exti4_isr,
- dma1_stream0_isr,
- dma1_stream1_isr,
- dma1_stream2_isr,
- dma1_stream3_isr,
- dma1_stream4_isr,
- dma1_stream5_isr,
- dma1_stream6_isr,
- adc_isr,
- can1_tx_isr,
- can1_rx0_isr,
- can1_rx1_isr,
- can1_sce_isr,
- exti9_5_isr,
- tim1_brk_tim9_isr,
- tim1_up_tim10_isr,
- tim1_trg_com_tim11_isr,
- tim1_cc_isr,
- tim2_isr,
- tim3_isr,
- tim4_isr,
- i2c1_ev_isr,
- i2c1_er_isr,
- i2c2_ev_isr,
- i2c2_er_isr,
- spi1_isr,
- spi2_isr,
- usart1_isr,
- usart2_isr,
- usart3_isr,
- exti15_10_isr,
- rtc_alarm_isr,
- usb_fs_wkup_isr,
- tim8_brk_tim12_isr,
- tim8_up_tim13_isr,
- tim8_trg_com_tim14_isr,
- tim8_cc_isr,
- dma1_stream7_isr,
- fsmc_isr,
- sdio_isr,
- tim5_isr,
- spi3_isr,
- uart4_isr,
- uart5_isr,
- tim6_dac_isr,
- tim7_isr,
- dma2_stream0_isr,
- dma2_stream1_isr,
- dma2_stream2_isr,
- dma2_stream3_isr,
- dma2_stream4_isr,
- eth_isr,
- eth_wkup_isr,
- can2_tx_isr,
- can2_rx0_isr,
- can2_rx1_isr,
- can2_sce_isr,
- otg_fs_isr,
- dma2_stream5_isr,
- dma2_stream6_isr,
- dma2_stream7_isr,
- usart6_isr,
- i2c3_ev_isr,
- i2c3_er_isr,
- otg_hs_ep1_out_isr,
- otg_hs_ep1_in_isr,
- otg_hs_wkup_isr,
- otg_hs_isr,
- dcmi_isr,
- cryp_isr,
- hash_rng_isr,
-};
-
-void reset_handler(void)
-{
- volatile unsigned *src, *dest;
-
- __asm__("MSR msp, %0" : : "r"(&_stack));
-
- for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
- *dest = *src;
-
- while (dest < &_ebss)
- *dest++ = 0;
-
- /* Call the application's entry point. */
- main();
-}
-
-void blocking_handler(void)
-{
- while (1) ;
-}
-
-void null_handler(void)
-{
- /* Do nothing. */
-}
-
-#pragma weak nmi_handler = null_handler
-#pragma weak hard_fault_handler = blocking_handler
-#pragma weak mem_manage_handler = blocking_handler
-#pragma weak bus_fault_handler = blocking_handler
-#pragma weak usage_fault_handler = blocking_handler
-#pragma weak sv_call_handler = null_handler
-#pragma weak debug_monitor_handler = null_handler
-#pragma weak pend_sv_handler = null_handler
-#pragma weak sys_tick_handler = null_handler
-#pragma weak wwdg_isr = null_handler
-#pragma weak pvd_isr = null_handler
-#pragma weak tamp_stamp_isr = null_handler
-#pragma weak rtc_wkup_isr = null_handler
-#pragma weak flash_isr = null_handler
-#pragma weak rcc_isr = null_handler
-#pragma weak exti0_isr = null_handler
-#pragma weak exti1_isr = null_handler
-#pragma weak exti2_isr = null_handler
-#pragma weak exti3_isr = null_handler
-#pragma weak exti4_isr = null_handler
-#pragma weak dma1_stream0_isr = null_handler
-#pragma weak dma1_stream1_isr = null_handler
-#pragma weak dma1_stream2_isr = null_handler
-#pragma weak dma1_stream3_isr = null_handler
-#pragma weak dma1_stream4_isr = null_handler
-#pragma weak dma1_stream5_isr = null_handler
-#pragma weak dma1_stream6_isr = null_handler
-#pragma weak adc_isr = null_handler
-#pragma weak can1_tx_isr = null_handler
-#pragma weak can1_rx0_isr = null_handler
-#pragma weak can1_rx1_isr = null_handler
-#pragma weak can1_sce_isr = null_handler
-#pragma weak exti9_5_isr = null_handler
-#pragma weak tim1_brk_tim9_isr = null_handler
-#pragma weak tim1_up_tim10_isr = null_handler
-#pragma weak tim1_trg_com_tim11_isr = null_handler
-#pragma weak tim1_cc_isr = null_handler
-#pragma weak tim2_isr = null_handler
-#pragma weak tim3_isr = null_handler
-#pragma weak tim4_isr = null_handler
-#pragma weak i2c1_ev_isr = null_handler
-#pragma weak i2c1_er_isr = null_handler
-#pragma weak i2c2_ev_isr = null_handler
-#pragma weak i2c2_er_isr = null_handler
-#pragma weak spi1_isr = null_handler
-#pragma weak spi2_isr = null_handler
-#pragma weak usart1_isr = null_handler
-#pragma weak usart2_isr = null_handler
-#pragma weak usart3_isr = null_handler
-#pragma weak exti15_10_isr = null_handler
-#pragma weak rtc_alarm_isr = null_handler
-#pragma weak usb_fs_wkup_isr = null_handler
-#pragma weak tim8_brk_tim12_isr = null_handler
-#pragma weak tim8_up_tim13_isr = null_handler
-#pragma weak tim8_trg_com_tim14_isr = null_handler
-#pragma weak tim8_cc_isr = null_handler
-#pragma weak dma1_stream7_isr = null_handler
-#pragma weak fsmc_isr = null_handler
-#pragma weak sdio_isr = null_handler
-#pragma weak tim5_isr = null_handler
-#pragma weak spi3_isr = null_handler
-#pragma weak uart4_isr = null_handler
-#pragma weak uart5_isr = null_handler
-#pragma weak tim6_dac_isr = null_handler
-#pragma weak tim7_isr = null_handler
-#pragma weak dma2_stream0_isr = null_handler
-#pragma weak dma2_stream1_isr = null_handler
-#pragma weak dma2_stream2_isr = null_handler
-#pragma weak dma2_stream3_isr = null_handler
-#pragma weak dma2_stream4_isr = null_handler
-#pragma weak eth_isr = null_handler
-#pragma weak eth_wkup_isr = null_handler
-#pragma weak can2_tx_isr = null_handler
-#pragma weak can2_rx0_isr = null_handler
-#pragma weak can2_rx1_isr = null_handler
-#pragma weak can2_sce_isr = null_handler
-#pragma weak otg_fs_isr = null_handler
-#pragma weak dma2_stream5_isr = null_handler
-#pragma weak dma2_stream6_isr = null_handler
-#pragma weak dma2_stream7_isr = null_handler
-#pragma weak usart6_isr = null_handler
-#pragma weak i2c3_ev_isr = null_handler
-#pragma weak i2c3_er_isr = null_handler
-#pragma weak otg_hs_ep1_out_isr = null_handler
-#pragma weak otg_hs_ep1_in_isr = null_handler
-#pragma weak otg_hs_wkup_isr = null_handler
-#pragma weak otg_hs_isr = null_handler
-#pragma weak dcmi_isr = null_handler
-#pragma weak cryp_isr = null_handler
-#pragma weak hash_rng_isr = null_handler
+#include <libopencm3/stm32/f2/irq.h>
+#include "../../cm3/vector.c"
diff --git a/lib/stm32/f4/vector.c b/lib/stm32/f4/vector.c
index 3429bfb..8d158a6 100644
--- a/lib/stm32/f4/vector.c
+++ b/lib/stm32/f4/vector.c
@@ -1,336 +1,2 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#define WEAK __attribute__ ((weak))
-
-/* Symbols exported by the linker script(s): */
-extern unsigned _data_loadaddr, _data, _edata, _ebss, _stack;
-
-void main(void);
-void reset_handler(void);
-void blocking_handler(void);
-void null_handler(void);
-
-void WEAK reset_handler(void);
-void WEAK nmi_handler(void);
-void WEAK hard_fault_handler(void);
-void WEAK mem_manage_handler(void);
-void WEAK bus_fault_handler(void);
-void WEAK usage_fault_handler(void);
-void WEAK sv_call_handler(void);
-void WEAK debug_monitor_handler(void);
-void WEAK pend_sv_handler(void);
-void WEAK sys_tick_handler(void);
-void WEAK wwdg_isr(void);
-void WEAK pvd_isr(void);
-void WEAK tamp_stamp_isr(void);
-void WEAK rtc_wkup_isr(void);
-void WEAK flash_isr(void);
-void WEAK rcc_isr(void);
-void WEAK exti0_isr(void);
-void WEAK exti1_isr(void);
-void WEAK exti2_isr(void);
-void WEAK exti3_isr(void);
-void WEAK exti4_isr(void);
-void WEAK dma1_stream0_isr(void);
-void WEAK dma1_stream1_isr(void);
-void WEAK dma1_stream2_isr(void);
-void WEAK dma1_stream3_isr(void);
-void WEAK dma1_stream4_isr(void);
-void WEAK dma1_stream5_isr(void);
-void WEAK dma1_stream6_isr(void);
-void WEAK adc_isr(void);
-void WEAK can1_tx_isr(void);
-void WEAK can1_rx0_isr(void);
-void WEAK can1_rx1_isr(void);
-void WEAK can1_sce_isr(void);
-void WEAK exti9_5_isr(void);
-void WEAK tim1_brk_tim9_isr(void);
-void WEAK tim1_up_tim10_isr(void);
-void WEAK tim1_trg_com_tim11_isr(void);
-void WEAK tim1_cc_isr(void);
-void WEAK tim2_isr(void);
-void WEAK tim3_isr(void);
-void WEAK tim4_isr(void);
-void WEAK i2c1_ev_isr(void);
-void WEAK i2c1_er_isr(void);
-void WEAK i2c2_ev_isr(void);
-void WEAK i2c2_er_isr(void);
-void WEAK spi1_isr(void);
-void WEAK spi2_isr(void);
-void WEAK usart1_isr(void);
-void WEAK usart2_isr(void);
-void WEAK usart3_isr(void);
-void WEAK exti15_10_isr(void);
-void WEAK rtc_alarm_isr(void);
-void WEAK usb_fs_wkup_isr(void);
-void WEAK tim8_brk_tim12_isr(void);
-void WEAK tim8_up_tim13_isr(void);
-void WEAK tim8_trg_com_tim14_isr(void);
-void WEAK tim8_cc_isr(void);
-void WEAK dma1_stream7_isr(void);
-void WEAK fsmc_isr(void);
-void WEAK sdio_isr(void);
-void WEAK tim5_isr(void);
-void WEAK spi3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK tim6_dac_isr(void);
-void WEAK tim7_isr(void);
-void WEAK dma2_stream0_isr(void);
-void WEAK dma2_stream1_isr(void);
-void WEAK dma2_stream2_isr(void);
-void WEAK dma2_stream3_isr(void);
-void WEAK dma2_stream4_isr(void);
-void WEAK eth_isr(void);
-void WEAK eth_wkup_isr(void);
-void WEAK can2_tx_isr(void);
-void WEAK can2_rx0_isr(void);
-void WEAK can2_rx1_isr(void);
-void WEAK can2_sce_isr(void);
-void WEAK otg_fs_isr(void);
-void WEAK dma2_stream5_isr(void);
-void WEAK dma2_stream6_isr(void);
-void WEAK dma2_stream7_isr(void);
-void WEAK usart6_isr(void);
-void WEAK i2c3_ev_isr(void);
-void WEAK i2c3_er_isr(void);
-void WEAK otg_hs_ep1_out_isr(void);
-void WEAK otg_hs_ep1_in_isr(void);
-void WEAK otg_hs_wkup_isr(void);
-void WEAK otg_hs_isr(void);
-void WEAK dcmi_isr(void);
-void WEAK cryp_isr(void);
-void WEAK hash_rng_isr(void);
-
-__attribute__ ((section(".vectors")))
-void (*const vector_table[]) (void) = {
- (void *)&_stack,
- reset_handler,
- nmi_handler,
- hard_fault_handler,
- mem_manage_handler,
- bus_fault_handler,
- usage_fault_handler,
- 0, 0, 0, 0, /* Reserved */
- sv_call_handler,
- debug_monitor_handler,
- 0, /* Reserved */
- pend_sv_handler,
- sys_tick_handler,
- wwdg_isr,
- pvd_isr,
- tamp_stamp_isr,
- rtc_wkup_isr,
- flash_isr,
- rcc_isr,
- exti0_isr,
- exti1_isr,
- exti2_isr,
- exti3_isr,
- exti4_isr,
- dma1_stream0_isr,
- dma1_stream1_isr,
- dma1_stream2_isr,
- dma1_stream3_isr,
- dma1_stream4_isr,
- dma1_stream5_isr,
- dma1_stream6_isr,
- adc_isr,
- can1_tx_isr,
- can1_rx0_isr,
- can1_rx1_isr,
- can1_sce_isr,
- exti9_5_isr,
- tim1_brk_tim9_isr,
- tim1_up_tim10_isr,
- tim1_trg_com_tim11_isr,
- tim1_cc_isr,
- tim2_isr,
- tim3_isr,
- tim4_isr,
- i2c1_ev_isr,
- i2c1_er_isr,
- i2c2_ev_isr,
- i2c2_er_isr,
- spi1_isr,
- spi2_isr,
- usart1_isr,
- usart2_isr,
- usart3_isr,
- exti15_10_isr,
- rtc_alarm_isr,
- usb_fs_wkup_isr,
- tim8_brk_tim12_isr,
- tim8_up_tim13_isr,
- tim8_trg_com_tim14_isr,
- tim8_cc_isr,
- dma1_stream7_isr,
- fsmc_isr,
- sdio_isr,
- tim5_isr,
- spi3_isr,
- uart4_isr,
- uart5_isr,
- tim6_dac_isr,
- tim7_isr,
- dma2_stream0_isr,
- dma2_stream1_isr,
- dma2_stream2_isr,
- dma2_stream3_isr,
- dma2_stream4_isr,
- eth_isr,
- eth_wkup_isr,
- can2_tx_isr,
- can2_rx0_isr,
- can2_rx1_isr,
- can2_sce_isr,
- otg_fs_isr,
- dma2_stream5_isr,
- dma2_stream6_isr,
- dma2_stream7_isr,
- usart6_isr,
- i2c3_ev_isr,
- i2c3_er_isr,
- otg_hs_ep1_out_isr,
- otg_hs_ep1_in_isr,
- otg_hs_wkup_isr,
- otg_hs_isr,
- dcmi_isr,
- cryp_isr,
- hash_rng_isr,
-};
-
-void reset_handler(void)
-{
- volatile unsigned *src, *dest;
-
- __asm__("MSR msp, %0" : : "r"(&_stack));
-
- for (src = &_data_loadaddr, dest = &_data; dest < &_edata; src++, dest++)
- *dest = *src;
-
- while (dest < &_ebss)
- *dest++ = 0;
-
- /* Call the application's entry point. */
- main();
-}
-
-void blocking_handler(void)
-{
- while (1) ;
-}
-
-void null_handler(void)
-{
- /* Do nothing. */
-}
-
-#pragma weak nmi_handler = null_handler
-#pragma weak hard_fault_handler = blocking_handler
-#pragma weak mem_manage_handler = blocking_handler
-#pragma weak bus_fault_handler = blocking_handler
-#pragma weak usage_fault_handler = blocking_handler
-#pragma weak sv_call_handler = null_handler
-#pragma weak debug_monitor_handler = null_handler
-#pragma weak pend_sv_handler = null_handler
-#pragma weak sys_tick_handler = null_handler
-#pragma weak wwdg_isr = null_handler
-#pragma weak pvd_isr = null_handler
-#pragma weak tamp_stamp_isr = null_handler
-#pragma weak rtc_wkup_isr = null_handler
-#pragma weak flash_isr = null_handler
-#pragma weak rcc_isr = null_handler
-#pragma weak exti0_isr = null_handler
-#pragma weak exti1_isr = null_handler
-#pragma weak exti2_isr = null_handler
-#pragma weak exti3_isr = null_handler
-#pragma weak exti4_isr = null_handler
-#pragma weak dma1_stream0_isr = null_handler
-#pragma weak dma1_stream1_isr = null_handler
-#pragma weak dma1_stream2_isr = null_handler
-#pragma weak dma1_stream3_isr = null_handler
-#pragma weak dma1_stream4_isr = null_handler
-#pragma weak dma1_stream5_isr = null_handler
-#pragma weak dma1_stream6_isr = null_handler
-#pragma weak adc_isr = null_handler
-#pragma weak can1_tx_isr = null_handler
-#pragma weak can1_rx0_isr = null_handler
-#pragma weak can1_rx1_isr = null_handler
-#pragma weak can1_sce_isr = null_handler
-#pragma weak exti9_5_isr = null_handler
-#pragma weak tim1_brk_tim9_isr = null_handler
-#pragma weak tim1_up_tim10_isr = null_handler
-#pragma weak tim1_trg_com_tim11_isr = null_handler
-#pragma weak tim1_cc_isr = null_handler
-#pragma weak tim2_isr = null_handler
-#pragma weak tim3_isr = null_handler
-#pragma weak tim4_isr = null_handler
-#pragma weak i2c1_ev_isr = null_handler
-#pragma weak i2c1_er_isr = null_handler
-#pragma weak i2c2_ev_isr = null_handler
-#pragma weak i2c2_er_isr = null_handler
-#pragma weak spi1_isr = null_handler
-#pragma weak spi2_isr = null_handler
-#pragma weak usart1_isr = null_handler
-#pragma weak usart2_isr = null_handler
-#pragma weak usart3_isr = null_handler
-#pragma weak exti15_10_isr = null_handler
-#pragma weak rtc_alarm_isr = null_handler
-#pragma weak usb_fs_wkup_isr = null_handler
-#pragma weak tim8_brk_tim12_isr = null_handler
-#pragma weak tim8_up_tim13_isr = null_handler
-#pragma weak tim8_trg_com_tim14_isr = null_handler
-#pragma weak tim8_cc_isr = null_handler
-#pragma weak dma1_stream7_isr = null_handler
-#pragma weak fsmc_isr = null_handler
-#pragma weak sdio_isr = null_handler
-#pragma weak tim5_isr = null_handler
-#pragma weak spi3_isr = null_handler
-#pragma weak uart4_isr = null_handler
-#pragma weak uart5_isr = null_handler
-#pragma weak tim6_dac_isr = null_handler
-#pragma weak tim7_isr = null_handler
-#pragma weak dma2_stream0_isr = null_handler
-#pragma weak dma2_stream1_isr = null_handler
-#pragma weak dma2_stream2_isr = null_handler
-#pragma weak dma2_stream3_isr = null_handler
-#pragma weak dma2_stream4_isr = null_handler
-#pragma weak eth_isr = null_handler
-#pragma weak eth_wkup_isr = null_handler
-#pragma weak can2_tx_isr = null_handler
-#pragma weak can2_rx0_isr = null_handler
-#pragma weak can2_rx1_isr = null_handler
-#pragma weak can2_sce_isr = null_handler
-#pragma weak otg_fs_isr = null_handler
-#pragma weak dma2_stream5_isr = null_handler
-#pragma weak dma2_stream6_isr = null_handler
-#pragma weak dma2_stream7_isr = null_handler
-#pragma weak usart6_isr = null_handler
-#pragma weak i2c3_ev_isr = null_handler
-#pragma weak i2c3_er_isr = null_handler
-#pragma weak otg_hs_ep1_out_isr = null_handler
-#pragma weak otg_hs_ep1_in_isr = null_handler
-#pragma weak otg_hs_wkup_isr = null_handler
-#pragma weak otg_hs_isr = null_handler
-#pragma weak dcmi_isr = null_handler
-#pragma weak cryp_isr = null_handler
-#pragma weak hash_rng_isr = null_handler
+#include <libopencm3/stm32/f4/irq.h>
+#include "../../cm3/vector.c"