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AgeCommit message (Expand)Author
2015-03-29Improve cortexm_read/write_regs. Use more sensible return types.Gareth McMullin
2015-03-28Consistently use 'target *t' for target var.Gareth McMullin
2015-03-22Move MIN macro to general.hGareth McMullin
2015-03-15Remove abstraction of adiv5_dp_write. Both implementations were identical.Gareth McMullin
2015-03-15Replace adiv5_ap_mem* functions with inline wrappers to target mem*.Gareth McMullin
2015-03-15Consolidate target_mem_read* and target_mem_write* methods.Gareth McMullin
2015-03-14adiv5: Encode APnDP into register definition.Gareth McMullin
2015-03-01Clean up includes everywhere.Gareth McMullin
2015-01-06First cut at Freescale Kinetis support.Gareth McMullin
2014-10-21Add support for halfword memory accesses.Vegard Storheil Eriksen
2013-01-31Avoid double increment of dst in adiv5 write bytes function.Allen Ibara
2013-01-11Fixed magic numbers for CSW access.Gareth McMullin
2013-01-10Don't increment src address twice in ap_mem_read_bytes function. Fixes corrup...Allen Ibara
2012-11-21Check for 10-bit address over flow when auto-incrementing.Gareth McMullin
2012-07-05Correct stepping over programmed breakpoints.Gareth McMullin
2012-07-05cortexm: Moved all static data to the heap.Gareth McMullin
2012-07-05ADIv5 AP and DP are now allocated on the heap and reference counted.Gareth McMullin
2012-06-26Added option byte programming commands for STM32F1.Gareth McMullin
2012-06-24Added target.c for common target routines.Gareth McMullin
2012-06-18Removed target header files containing a single prototype.Gareth McMullin
2012-06-18Renamed Cortex-M driver appropriately since it support M0, M3 and M4F.Gareth McMullin
2012-06-18Cleaned up access to ADIv5 AP for target.Gareth McMullin
2011-03-08Further cleanup of adiv5*Gareth McMullin
2011-03-07Removed useless abstraction of low-level AP access functions.Gareth McMullin
2011-03-05Cleaned up some magic numbers in adiv5*Gareth McMullin
2011-02-04Import of working source tree.Gareth McMullin