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authorGareth McMullin2015-04-04 12:44:30 -0700
committerGareth McMullin2015-04-11 16:05:40 -0700
commitcd5d569d38ea8cc905739bd9189ac5f944de0207 (patch)
tree168dca4ce3784f902476fc056a654f2011e85942 /src/include
parent54eb3a719fc78c66d0fb60944440a830092f69eb (diff)
lpc: Reduce differences between lpc11xx and lpc43xx code.
Diffstat (limited to 'src/include')
-rw-r--r--src/include/cortexm.h10
-rw-r--r--src/include/lpc_common.h83
2 files changed, 93 insertions, 0 deletions
diff --git a/src/include/cortexm.h b/src/include/cortexm.h
index f7396bf..0a9c3ae 100644
--- a/src/include/cortexm.h
+++ b/src/include/cortexm.h
@@ -143,6 +143,16 @@
#define CORTEXM_DWT_FUNC_FUNC_WRITE (6 << 0)
#define CORTEXM_DWT_FUNC_FUNC_ACCESS (7 << 0)
+#define REG_SP 13
+#define REG_LR 14
+#define REG_PC 15
+#define REG_XPSR 16
+#define REG_MSP 17
+#define REG_PSP 18
+#define REG_SPECIAL 19
+
+#define ARM_THUMB_BREAKPOINT 0xBE00
+
bool cortexm_attach(target *t);
void cortexm_detach(target *t);
void cortexm_halt_resume(target *t, bool step);
diff --git a/src/include/lpc_common.h b/src/include/lpc_common.h
new file mode 100644
index 0000000..45d2964
--- /dev/null
+++ b/src/include/lpc_common.h
@@ -0,0 +1,83 @@
+/*
+ * This file is part of the Black Magic Debug project.
+ *
+ * Copyright (C) 2015 Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __LPC_COMMON_H
+#define __LPC_COMMON_H
+
+#define IAP_CMD_INIT 49
+#define IAP_CMD_PREPARE 50
+#define IAP_CMD_PROGRAM 51
+#define IAP_CMD_ERASE 52
+#define IAP_CMD_BLANKCHECK 53
+#define IAP_CMD_SET_ACTIVE_BANK 60
+
+#define IAP_STATUS_CMD_SUCCESS 0
+#define IAP_STATUS_INVALID_COMMAND 1
+#define IAP_STATUS_SRC_ADDR_ERROR 2
+#define IAP_STATUS_DST_ADDR_ERROR 3
+#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4
+#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5
+#define IAP_STATUS_COUNT_ERROR 6
+#define IAP_STATUS_INVALID_SECTOR 7
+#define IAP_STATUS_SECTOR_NOT_BLANK 8
+#define IAP_STATUS_SECTOR_NOT_PREPARED 9
+#define IAP_STATUS_COMPARE_ERROR 10
+#define IAP_STATUS_BUSY 11
+
+/* CPU Frequency */
+#define CPU_CLK_KHZ 12000
+
+struct flash_param {
+ uint16_t opcode;/* opcode to return to after calling the ROM */
+ uint16_t pad0;
+ uint32_t command;/* IAP command */
+ union {
+ uint32_t words[5];/* command parameters */
+ struct {
+ uint32_t start_sector;
+ uint32_t end_sector;
+ uint32_t flash_bank;
+ } prepare;
+ struct {
+ uint32_t start_sector;
+ uint32_t end_sector;
+ uint32_t cpu_clk_khz;
+ uint32_t flash_bank;
+ } erase;
+ struct {
+ uint32_t dest;
+ uint32_t source;
+ uint32_t byte_count;
+ uint32_t cpu_clk_khz;
+ } program;
+ struct {
+ uint32_t start_sector;
+ uint32_t end_sector;
+ uint32_t flash_bank;
+ } blank_check;
+ struct {
+ uint32_t flash_bank;
+ uint32_t cpu_clk_khz;
+ } make_active;
+ };
+ uint32_t result[5]; /* result data */
+} __attribute__((aligned(4)));
+
+#endif
+