// // Date init 14.12.2004 // // Revision date $Date:: 16-05-06 9:50 $ // // Filename $Workfile:: d_ioctrl.r $ // // Version $Revision:: 21 $ // // Archive $Archive:: /LMS2006/Sys01/Main/Firmware/Source/d_ioctrl.r $ // // Platform C // #ifdef SAM7S256 #define NO_TO_TX BYTES_TO_TX + 1 #define NO_TO_RX BYTES_TO_RX + 1 #define TIMEOUT 2100 extern void I2cHandler(void); static UBYTE *pIrq; static UBYTE Cnt; static UBYTE NoToTx; static UBYTE I2cStatus; static UBYTE I2cInBuffer[NO_TO_RX]; static UBYTE I2cOutBuffer[NO_TO_TX]; static UBYTE RxSum; #define I2C_IDLE 1 #define I2C_ERROR 2 #define I2C_TX 3 #define I2C_RX 4 #define I2CClk 400000L #define TIME400KHz (((OSC/16L)/(I2CClk * 2)) + 1) #define CLDIV (((OSC/I2CClk)/2)-3) #define DEVICE_ADR 0x01 #define DISABLEI2cIrqs *AT91C_TWI_IDR = 0x000001C7 #define ISSUEStopCond *AT91C_TWI_CR = AT91C_TWI_STOP #define WAITClk {\ ULONG PitTmr;\ PitTmr = (*AT91C_PITC_PIIR & AT91C_PITC_CPIV) + TIME400KHz;\ if (PitTmr >= (*AT91C_PITC_PIMR & AT91C_PITC_CPIV))\ {\ PitTmr -= (*AT91C_PITC_PIMR & AT91C_PITC_CPIV);\ }\ while ((*AT91C_PITC_PIIR & AT91C_PITC_CPIV) < PitTmr);\ } #define RESETI2c {\ UBYTE Tmp;\ *AT91C_PMC_PCER = (1L<