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-rw-r--r--ATmega48/Source/c_armcomm.c601
-rw-r--r--ATmega48/Source/c_armcomm.h44
-rw-r--r--ATmega48/Source/d_armcomm.c48
-rw-r--r--ATmega48/Source/d_armcomm.h28
-rw-r--r--ATmega48/Source/d_armcomm.r253
-rw-r--r--ATmega48/Source/d_button.c40
-rw-r--r--ATmega48/Source/d_button.h27
-rw-r--r--ATmega48/Source/d_button.r68
-rw-r--r--ATmega48/Source/d_input.c52
-rw-r--r--ATmega48/Source/d_input.h29
-rw-r--r--ATmega48/Source/d_input.r209
-rw-r--r--ATmega48/Source/d_output.c86
-rw-r--r--ATmega48/Source/d_output.h27
-rw-r--r--ATmega48/Source/d_output.r425
-rw-r--r--ATmega48/Source/d_pccomm.c33
-rw-r--r--ATmega48/Source/d_pccomm.h26
-rw-r--r--ATmega48/Source/d_pccomm.r93
-rw-r--r--ATmega48/Source/d_power.c122
-rw-r--r--ATmega48/Source/d_power.h35
-rw-r--r--ATmega48/Source/d_power.r79
-rw-r--r--ATmega48/Source/d_timer.c48
-rw-r--r--ATmega48/Source/d_timer.h30
-rw-r--r--ATmega48/Source/d_timer.r34
-rw-r--r--ATmega48/Source/m_sched.c54
-rw-r--r--ATmega48/Source/m_sched.h87
-rw-r--r--ATmega48/Source/stdconst.h44
26 files changed, 2622 insertions, 0 deletions
diff --git a/ATmega48/Source/c_armcomm.c b/ATmega48/Source/c_armcomm.c
new file mode 100644
index 0000000..6d5853d
--- /dev/null
+++ b/ATmega48/Source/c_armcomm.c
@@ -0,0 +1,601 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 10-11-05 15:35 $
+//
+// Filename $Workfile:: c_armcomm.c $
+//
+// Version $Revision:: 17 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/c_armcom $
+//
+// Platform C
+//
+
+/* Event Function State
+--------------------------------------- ------------------------------------- -----------------------------------
+
+Voltage > 4,3V, wakeup or reset button Brake motor drivers RESET
+ POWERUP
+ Batt measument off POWERUP_CHECK_FOR_RECHARGEABLE
+ Wait 10 mS
+ Rechargeable if switch > 0,5V
+ Batt measurement on POWERUP_CHECK_VOLTAGE_FOR_ARM_ON
+ Wait 10 mS
+ Check voltage for ARM on <= 11,8V
+ Batt measument off POWERUP_DISABLE_AMP
+ Wait 10 mS
+ Turn ARM on POWERUP_TURN_ARM_ON
+ Brake off
+ Wait 500 mS POWERUP_ENABLE_AMP
+ Batt measurement on
+ Check voltage for ARM on >= 6,5V (rechg) POWERUP_CHECK_RECHARGEABLE_VOLTAGE
+Samba active Reset copyright timer ON
+ Read all inputs and update buttons ON_RUNNING
+ Check ARM communicating
+ Check for high voltage/samba button
+ Control led (Batt measurement on/off)
+ Check for ARM samba request
+ Check for ARM powerdown request
+ Check for ARM copyright invalid
+
+
+High voltage (batt > 12,2V or samba button) Turn of input current drive ON_HIGH_VOLTAGE
+ Turn off ARM
+ Brake output drivers
+ Batt measurement off ON_CHECK_BUTTON
+ Check samba button
+
+
+Power down request or copyright invalid POWERDOWN
+ Batt measurement off POWERDOWN_DISABLE_AMP
+ Wait 10 mS
+ Turn ARM off POWERDOWN_TURN_ARM_OFF
+ Wait 1 sec
+Rechargeable < 6,5V OFF
+ SLEEP
+
+
+Samba button (long press) or samba request SAMBA
+ Wait 100 mS SAMBA_ACTIVATE
+ Batt measurement forced high SAMBA_TURN_ARM_OFF_AND_WAIT
+ Batt measurement off
+ Turn ARM off
+ Wait 1 sec
+ Turn ARM on SAMBA_TURN_ARM_ON_AND_WAIT
+ Wait 10 sec
+ Turn ARM off SAMBA_TURN_ARM_OFF_FOR_RESET
+ Remove batt measurement force
+ Wait 1 sec
+ Turn ARM on SAMBA_TURN_ARM_ON
+ ON
+
+
+*/
+
+#include "stdconst.h"
+#include "c_armcomm.h"
+#include "d_power.h"
+#include "d_output.h"
+#include "d_input.h"
+#include "d_button.h"
+#include "d_armcomm.h"
+#include "d_timer.h"
+
+
+#define INPUTPOWER_ONTIME 3000 // [uS] time between input A/D samples
+#define COPYRIGHT_TIME 300000L // [mS] time to power down if no copy right string found
+
+#define POWERUP_ENABLE_MEASURE_TIME 10 // [mS] time to enable voltage divider for measurement
+#define POWERUP_DISABLE_MEASURE_TIME 10 // [mS] time to disable voltage divider for measurement
+#define POWERUP_DISABLE_AMP_TIME 10 // [mS] time after amp is disenabled
+#define POWERUP_ENABLE_AMP_TIME 100 // [mS] time before amp is enabled
+#define POWERUP_RECHARGE_TEST_TIME 1000 // [mS] time testing voltage if rechargeable (to show low batt on display)
+#define ON_ARM_TIMEOUT_TIME 2000 // [mS] time between ARM communication (max)
+#define LED_TOGGLE_TIME 500 // [mS] time between led toggles on and off
+#define CHECK_TEST_BUTTON_TIME 2000 // [mS] time for stable button reading (samba activate)
+#define BUTTON_ACCEPT_TIME 200 // [mS] time from samba accept to actual active
+#define SAMBA_POWEROFF_TIME 1000 // [mS] time for ARM power to drop
+#define SAMBA_BOOT_TIME 10000 // [mS] time for copying samba boot loader
+#define POWEROFF_TIME 1000 // [mS] time from ARM off to sleep
+
+#define RECHARGEABLE_SWITCH_VOLTAGE 500L // [mV] trigger point for rechageable battery detect switch
+#define ARM_POWERUP_MAX_VOLTAGE 11800L // [mV] maximum allowable voltage when turning on ARM
+#define ARM_ON_MAX_VOLTAGE 12200L // [mV] maximum allowable voltage when running ARM
+#define ARM_ON_OK_VOLTAGE 10000L // [mV] maximum allowable voltage when turning on ARM (after high voltage)
+#define ARM_ON_MIN_VOLTAGE 6500L // [mV] minimum allowable voltage when turning on ARM (rechargeable)
+
+
+
+
+
+// Use compiler to calculate ticks from time
+#define INPUTPOWER_ONTICK (UBYTE)(((ULONG)TIMER_RESOLUTION / (1000000L / (ULONG)INPUTPOWER_ONTIME)))
+#define COPYRIGHT_TICK (ULONG)(((ULONG)COPYRIGHT_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define POWERUP_ENABLE_MEASURE_TICK (UWORD)(((ULONG)POWERUP_ENABLE_MEASURE_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define POWERUP_DISABLE_MEASURE_TICK (UWORD)(((ULONG)POWERUP_DISABLE_MEASURE_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define POWERUP_DISABLE_AMP_TICK (UWORD)(((ULONG)POWERUP_DISABLE_AMP_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define POWERUP_ENABLE_AMP_TICK (UWORD)(((ULONG)POWERUP_ENABLE_AMP_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define POWERUP_RECHARGE_TEST_TICK (UWORD)(((ULONG)POWERUP_RECHARGE_TEST_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define ON_ARM_TIMEOUT_TICK (UWORD)(((ULONG)ON_ARM_TIMEOUT_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define LED_TOGGLE_TICK (UWORD)(((ULONG)LED_TOGGLE_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define CHECK_TEST_BUTTON_TICK (UWORD)(((ULONG)CHECK_TEST_BUTTON_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define SAMBA_POWEROFF_TICK (UWORD)(((ULONG)SAMBA_POWEROFF_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define SAMBA_BOOT_TICK (UWORD)(((ULONG)SAMBA_BOOT_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define BUTTON_ACCEPT_TICK (UWORD)(((ULONG)BUTTON_ACCEPT_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+#define POWEROFF_TICK (UWORD)(((ULONG)POWEROFF_TIME * 1000L) / (ULONG)INPUTPOWER_ONTIME)
+
+
+// Use compiler to calculate counts from voltage
+#define ADC_REFERENCE 5000L // [mv]
+#define ADC_RESOLUTION 1023L // [Count]
+#define RESISTOR_HIGH 22000L // [ohm]
+#define RESISTOR_LOW 12000L // [ohm]
+#define RECHARGEABLE_SWITCH_COUNT (UWORD)(((((RECHARGEABLE_SWITCH_VOLTAGE * RESISTOR_LOW) / (RESISTOR_LOW + RESISTOR_HIGH)) * ADC_RESOLUTION) / ADC_REFERENCE))
+#define ARM_POWERUP_MAX_COUNT (UWORD)(((((ARM_POWERUP_MAX_VOLTAGE * RESISTOR_LOW) / (RESISTOR_LOW + RESISTOR_HIGH)) * ADC_RESOLUTION) / ADC_REFERENCE))
+#define ARM_ON_MAX_COUNT (UWORD)(((((ARM_ON_MAX_VOLTAGE * RESISTOR_LOW) / (RESISTOR_LOW + RESISTOR_HIGH)) * ADC_RESOLUTION) / ADC_REFERENCE))
+#define ARM_ON_OK_COUNT (UWORD)(((((ARM_ON_OK_VOLTAGE * RESISTOR_LOW) / (RESISTOR_LOW + RESISTOR_HIGH)) * ADC_RESOLUTION) / ADC_REFERENCE))
+#define ARM_ON_MIN_COUNT (UWORD)(((((ARM_ON_MIN_VOLTAGE * RESISTOR_LOW) / (RESISTOR_LOW + RESISTOR_HIGH)) * ADC_RESOLUTION) / ADC_REFERENCE))
+
+#define TEST_BUTTON_VALUE (ADC_RESOLUTION - 10)
+
+// State machine states
+enum
+{
+ RESET,
+ POWERUP,
+ POWERUP_CHECK_FOR_RECHARGEABLE,
+ POWERUP_CHECK_VOLTAGE_FOR_ARM_ON,
+ POWERUP_DISABLE_AMP,
+ POWERUP_TURN_ARM_ON,
+ POWERUP_ENABLE_AMP,
+ POWERUP_CHECK_RECHARGEABLE_VOLTAGE,
+ ON,
+ ON_RUNNING,
+ ON_HIGH_VOLTAGE,
+ ON_CHECK_BUTTON,
+ SAMBA,
+ SAMBA_ACTIVATE,
+ SAMBA_TURN_ARM_OFF_AND_WAIT,
+ SAMBA_TURN_ARM_ON_AND_WAIT,
+ SAMBA_TURN_ARM_OFF_FOR_RESET,
+ SAMBA_TURN_ARM_ON,
+ POWERDOWN,
+ POWERDOWN_DISABLE_AMP,
+ POWERDOWN_TURN_ARM_OFF,
+ OFF,
+ SLEEP
+};
+
+
+UBYTE State;
+UBYTE OldState;
+UBYTE OverwriteFloat;
+UWORD StateTimer;
+UBYTE Rechargeable;
+UWORD ArmTimer;
+UBYTE ArmFucked;
+UBYTE LedState;
+UWORD ButtonTimer;
+ULONG CopyRightTimer;
+
+
+void cArmCommInit(void)
+{
+ dPowerInit();
+ dOutputInit();
+ dInputInit();
+ dButtonInit();
+ dArmCommInit();
+ dTimerInit();
+
+ State = RESET;
+ OldState = ~State;
+}
+
+
+UBYTE cArmCommCtrl(void)
+{
+ UBYTE Result = TRUE;
+
+ // Update state machine if timeout (or RESET)
+ if ((dTimerRead() >= INPUTPOWER_ONTICK) || (State == RESET))
+ {
+ dTimerClear();
+
+ // Maintain StateTimer (clear if state changes else increament)
+ if (State != OldState)
+ {
+ OldState = State;
+ StateTimer = 0;
+ }
+ else
+ {
+ StateTimer++;
+ }
+
+ // STATE MACHINE
+ switch (State)
+ {
+
+ case RESET :
+ {
+ if (!StateTimer)
+ {
+ OverwriteFloat = TRUE;
+ State = POWERUP;
+ }
+ }
+ break;
+
+ case POWERUP :
+ {
+ State = POWERUP_CHECK_FOR_RECHARGEABLE;
+ }
+ break;
+
+ case POWERUP_CHECK_FOR_RECHARGEABLE :
+ {
+ if (!StateTimer)
+ {
+ dPowerDeselect();
+ }
+ if (StateTimer >= POWERUP_DISABLE_MEASURE_TICK)
+ {
+ if (dPowerConvert() > RECHARGEABLE_SWITCH_COUNT)
+ {
+ Rechargeable = TRUE;
+ }
+ dPowerRechargeable(Rechargeable);
+ State = POWERUP_CHECK_VOLTAGE_FOR_ARM_ON;
+ }
+ }
+ break;
+
+ case POWERUP_CHECK_VOLTAGE_FOR_ARM_ON :
+ {
+ if (!StateTimer)
+ {
+ dPowerSelect();
+ }
+ if (StateTimer >= POWERUP_ENABLE_MEASURE_TICK)
+ {
+ if (dPowerConvert() <= ARM_POWERUP_MAX_COUNT)
+ {
+ State = POWERUP_DISABLE_AMP;
+ }
+ }
+ }
+ break;
+
+ case POWERUP_DISABLE_AMP :
+ {
+ if (!StateTimer)
+ {
+ dPowerDeselect();
+ }
+ if (StateTimer >= POWERUP_DISABLE_AMP_TICK)
+ {
+ State = POWERUP_TURN_ARM_ON;
+ }
+ }
+ break;
+
+ case POWERUP_TURN_ARM_ON :
+ {
+ dPowerWriteOn(TRUE);
+ OverwriteFloat = FALSE;
+ State = POWERUP_ENABLE_AMP;
+ }
+ break;
+
+ case POWERUP_ENABLE_AMP :
+ {
+ if (StateTimer >= POWERUP_ENABLE_AMP_TICK)
+ {
+ dPowerSelect();
+ State = POWERUP_CHECK_RECHARGEABLE_VOLTAGE;
+ }
+ }
+ break;
+
+ case POWERUP_CHECK_RECHARGEABLE_VOLTAGE :
+ {
+ if (Rechargeable == TRUE)
+ {
+ if (dPowerConvert() < ARM_ON_MIN_COUNT)
+ {
+ if (StateTimer >= POWERUP_RECHARGE_TEST_TICK)
+ {
+ State = OFF;
+ }
+ }
+ else
+ {
+ State = ON;
+ }
+ }
+ else
+ {
+ State = ON;
+ }
+ }
+ break;
+
+ case ON :
+ {
+ CopyRightTimer = 0L;
+ State = ON_RUNNING;
+ }
+ break;
+
+ case ON_RUNNING :
+ {
+
+ // Read all inputs
+ dInputSelect(0);
+ dInputConvert(0);
+ dInputConvert(0);
+ dInputDeselect(0);
+
+ dInputSelect(1);
+ dInputConvert(1);
+ dInputConvert(1);
+ dInputDeselect(1);
+
+ dInputSelect(2);
+ dInputConvert(2);
+ dInputConvert(2);
+ dInputDeselect(2);
+
+ dInputSelect(3);
+ dInputConvert(3);
+ dInputConvert(3);
+ dInputDeselect(3);
+
+ // Update buttons
+ dButtonUpdate();
+
+ // Check for ARM communication
+ if (dArmCommCheck() == TRUE)
+ {
+ ArmTimer = 0;
+ ArmFucked = FALSE;
+ }
+
+ if (ArmTimer >= ON_ARM_TIMEOUT_TICK)
+ {
+ ArmFucked = TRUE;
+ }
+ else
+ {
+ ArmTimer++;
+ }
+
+ // Check for high voltage
+ dPowerSelect();
+ if (dPowerConvert() > ARM_ON_MAX_COUNT)
+ {
+ State = ON_HIGH_VOLTAGE;
+ }
+
+ // Control led
+ if (ArmFucked == TRUE)
+ {
+ if (StateTimer >= LED_TOGGLE_TICK)
+ {
+ StateTimer = 0;
+ if (LedState == TRUE)
+ {
+ LedState = FALSE;
+ }
+ else
+ {
+ LedState = TRUE;
+ }
+ }
+ }
+ else
+ {
+ LedState = TRUE;
+ }
+
+ if (LedState == FALSE)
+ {
+ dPowerDeselect();
+ }
+
+ // Check for SAMBA request
+ if (dPowerReadBoot() == TRUE)
+ {
+ State = SAMBA;
+ }
+
+ // Check for POWERDOWN request
+ if (dPowerReadOn() == FALSE)
+ {
+ State = POWERDOWN;
+ }
+
+ // Check for CopyRight valid
+ if (dArmCommCopyRight() != TRUE)
+ {
+ if (++CopyRightTimer >= COPYRIGHT_TICK)
+ {
+ State = POWERDOWN;
+ }
+ }
+ }
+ break;
+
+ case ON_HIGH_VOLTAGE :
+ {
+ dInputInit();
+ dPowerWriteOn(FALSE);
+ OverwriteFloat = TRUE;
+ ButtonTimer = CHECK_TEST_BUTTON_TICK;
+ State = ON_CHECK_BUTTON;
+ }
+ break;
+
+ case ON_CHECK_BUTTON :
+ {
+ dPowerSelect();
+ if (ButtonTimer)
+ {
+ dPowerDeselect();
+ if (dPowerConvert() >= TEST_BUTTON_VALUE)
+ {
+ ButtonTimer++;
+ if (ButtonTimer > (CHECK_TEST_BUTTON_TICK * 2))
+ {
+ dPowerSelect();
+ State = SAMBA;
+ }
+ }
+ else
+ {
+ ButtonTimer--;
+ }
+ }
+ else
+ {
+ if (dPowerConvert() <= ARM_ON_OK_COUNT)
+ {
+ State = RESET;
+ }
+ }
+ }
+ break;
+
+ case POWERDOWN :
+ {
+ State = POWERDOWN_DISABLE_AMP;
+ }
+ break;
+
+ case POWERDOWN_DISABLE_AMP :
+ {
+ if (!StateTimer)
+ {
+ dPowerDeselect();
+ }
+ if (StateTimer >= POWERUP_DISABLE_AMP_TICK)
+ {
+ State = POWERDOWN_TURN_ARM_OFF;
+ }
+ }
+ break;
+
+ case POWERDOWN_TURN_ARM_OFF :
+ {
+ if (!StateTimer)
+ {
+ dPowerWriteOn(FALSE);
+ }
+ if (StateTimer >= POWEROFF_TICK)
+ {
+ State = OFF;
+ }
+ }
+ break;
+
+ case OFF :
+ {
+ State = SLEEP;
+ }
+ break;
+
+ case SAMBA :
+ {
+ State = SAMBA_ACTIVATE;
+ }
+ break;
+
+ case SAMBA_ACTIVATE :
+ {
+ if (++StateTimer >= BUTTON_ACCEPT_TICK)
+ {
+ State = SAMBA_TURN_ARM_OFF_AND_WAIT;
+ }
+ }
+ break;
+
+ case SAMBA_TURN_ARM_OFF_AND_WAIT :
+ {
+ if (!StateTimer)
+ {
+ dPowerHigh();
+ dPowerDeselect();
+ dPowerWriteOn(FALSE);
+ }
+ if (++StateTimer >= SAMBA_POWEROFF_TICK)
+ {
+ State = SAMBA_TURN_ARM_ON_AND_WAIT;
+ }
+ }
+ break;
+
+ case SAMBA_TURN_ARM_ON_AND_WAIT :
+ {
+ if (!StateTimer)
+ {
+ dPowerWriteOn(TRUE);
+ }
+ if (++StateTimer >= SAMBA_BOOT_TICK)
+ {
+ State = SAMBA_TURN_ARM_OFF_FOR_RESET;
+ }
+ }
+ break;
+
+ case SAMBA_TURN_ARM_OFF_FOR_RESET :
+ {
+ if (!StateTimer)
+ {
+ dPowerWriteOn(FALSE);
+ dPowerFloat();
+ }
+ if (++StateTimer >= SAMBA_POWEROFF_TICK)
+ {
+ State = SAMBA_TURN_ARM_ON;
+ }
+ }
+ break;
+
+ case SAMBA_TURN_ARM_ON :
+ {
+ dPowerWriteOn(TRUE);
+ State = ON;
+ }
+ break;
+
+ case SLEEP :
+ {
+ Result = FALSE;
+ }
+ break;
+
+ }
+ }
+
+ // Update allways output
+ dOutputUpdate(OverwriteFloat);
+
+ return(Result);
+}
+
+
+void cArmCommExit(void)
+{
+ dTimerExit();
+ dArmCommExit();
+ dButtonExit();
+ dInputExit();
+ dOutputExit();
+ dPowerExit();
+}
diff --git a/ATmega48/Source/c_armcomm.h b/ATmega48/Source/c_armcomm.h
new file mode 100644
index 0000000..239ab73
--- /dev/null
+++ b/ATmega48/Source/c_armcomm.h
@@ -0,0 +1,44 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dkandlun $
+//
+// Revision date $Date:: 28-12-04 14:19 $
+//
+// Filename $Workfile:: c_armcomm.h $
+//
+// Version $Revision:: 1 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Peripheral/Firmware/Source/c_ar $
+//
+// Platform C
+//
+
+
+#ifndef C_ARMCOMM
+#define C_ARMCOMM
+
+#define NOS_OF_MOTORS 4
+#define NOS_OF_SENSORS 4
+#define NOS_OF_BTNS 5
+
+typedef struct
+{
+ UBYTE TimerTik;
+ UBYTE MotorStatus[NOS_OF_MOTORS];
+ UBYTE MotorSpeed[NOS_OF_MOTORS];
+}InputMap;
+
+typedef struct
+{
+ SWORD SensorValue[NOS_OF_SENSORS];
+ UBYTE ButtonState[NOS_OF_BTNS];
+}OutputMap;
+
+void cArmCommInit(void);
+UBYTE cArmCommCtrl(void);
+void cArmCommExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_armcomm.c b/ATmega48/Source/d_armcomm.c
new file mode 100644
index 0000000..bdcce63
--- /dev/null
+++ b/ATmega48/Source/d_armcomm.c
@@ -0,0 +1,48 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 28-10-05 13:46 $
+//
+// Filename $Workfile:: d_armcomm.c $
+//
+// Version $Revision:: 5 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_armcom $
+//
+// Platform C
+//
+
+
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "c_armcomm.h"
+#include "d_armcomm.r"
+
+
+void dArmCommInit(void)
+{
+ ARMCOMMInit;
+}
+
+
+UBYTE dArmCommCheck(void)
+{
+ return (ARMCOMMCheck);
+}
+
+
+UBYTE dArmCommCopyRight(void)
+{
+ return (ARMCOMMCopyRight);
+}
+
+
+void dArmCommExit(void)
+{
+ ARMCOMMExit;
+}
diff --git a/ATmega48/Source/d_armcomm.h b/ATmega48/Source/d_armcomm.h
new file mode 100644
index 0000000..416753e
--- /dev/null
+++ b/ATmega48/Source/d_armcomm.h
@@ -0,0 +1,28 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 28-10-05 13:46 $
+//
+// Filename $Workfile:: d_armcomm.h $
+//
+// Version $Revision:: 4 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_armcom $
+//
+// Platform C
+//
+
+
+#ifndef D_ARMCOMM
+#define D_ARMCOMM
+
+void dArmCommInit(void);
+UBYTE dArmCommCheck(void);
+UBYTE dArmCommCopyRight(void);
+void dArmCommExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_armcomm.r b/ATmega48/Source/d_armcomm.r
new file mode 100644
index 0000000..42712aa
--- /dev/null
+++ b/ATmega48/Source/d_armcomm.r
@@ -0,0 +1,253 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 28-10-05 13:46 $
+//
+// Filename $Workfile:: d_armcomm.r $
+//
+// Version $Revision:: 15 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_armcom $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+/****************************************************************************
+ TWI State codes
+****************************************************************************/
+
+#define TWI_START 0x08 // START has been transmitted
+#define TWI_REP_START 0x10 // Repeated START has been transmitted
+#define TWI_ARB_LOST 0x38 // Arbitration lost
+
+// TWI Master Transmitter staus codes
+#define TWI_MTX_ADR_ACK 0x18 // SLA+W has been tramsmitted and ACK received
+#define TWI_MTX_ADR_NACK 0x20 // SLA+W has been tramsmitted and NACK received
+#define TWI_MTX_DATA_ACK 0x28 // Data byte has been tramsmitted and ACK received
+#define TWI_MTX_DATA_NACK 0x30 // Data byte has been tramsmitted and NACK received
+
+// TWI Master Receiver staus codes
+#define TWI_MRX_ADR_ACK 0x40 // SLA+R has been tramsmitted and ACK received
+#define TWI_MRX_ADR_NACK 0x48 // SLA+R has been tramsmitted and NACK received
+#define TWI_MRX_DATA_ACK 0x50 // Data byte has been received and ACK tramsmitted
+#define TWI_MRX_DATA_NACK 0x58 // Data byte has been received and NACK tramsmitted
+
+// TWI Slave Transmitter staus codes
+#define TWI_STX_ADR_ACK 0xA8 // Own SLA+R has been received; ACK has been returned
+#define TWI_STX_ADR_ACK_M_ARB_LOST 0xB0 // Arbitration lost in SLA+R/W as Master; own SLA+R has been received; ACK has been returned
+#define TWI_STX_DATA_ACK 0xB8 // Data byte in TWDR has been transmitted; ACK has been received
+#define TWI_STX_DATA_NACK 0xC0 // Data byte in TWDR has been transmitted; NOT ACK has been received
+#define TWI_STX_DATA_ACK_LAST_BYTE 0xC8 // Last data byte in TWDR has been transmitted (TWEA = 0); ACK has been received
+
+// TWI Slave Receiver staus codes
+#define TWI_SRX_ADR_ACK 0x60 // Own SLA+W has been received ACK has been returned
+#define TWI_SRX_ADR_ACK_M_ARB_LOST 0x68 // Arbitration lost in SLA+R/W as Master; own SLA+W has been received; ACK has been returned
+#define TWI_SRX_GEN_ACK 0x70 // General call address has been received; ACK has been returned
+#define TWI_SRX_GEN_ACK_M_ARB_LOST 0x78 // Arbitration lost in SLA+R/W as Master; General call address has been received; ACK has been returned
+#define TWI_SRX_ADR_DATA_ACK 0x80 // Previously addressed with own SLA+W; data has been received; ACK has been returned
+#define TWI_SRX_ADR_DATA_NACK 0x88 // Previously addressed with own SLA+W; data has been received; NOT ACK has been returned
+#define TWI_SRX_GEN_DATA_ACK 0x90 // Previously addressed with general call; data has been received; ACK has been returned
+#define TWI_SRX_GEN_DATA_NACK 0x98 // Previously addressed with general call; data has been received; NOT ACK has been returned
+#define TWI_SRX_STOP_RESTART 0xA0 // A STOP condition or repeated START condition has been received while still addressed as Slave
+
+// TWI Miscellaneous status codes
+#define TWI_NO_STATE 0xF8 // No relevant state information available; TWINT = 0
+#define TWI_BUS_ERROR 0x00 // Bus error due to an illegal START or STOP condition
+
+
+
+/***********************************************************************************/
+/*********************** Declaration of variables *******************************/
+/***********************************************************************************/
+
+#define ADDRESS 1
+#define INBYTES BYTES_TO_TX // (sizeof(IoToAvr))
+#define OUTBYTES BYTES_TO_RX // (sizeof(IoFromAvr))
+
+__flash UBYTE CopyRightString[COPYRIGHTSTRINGLENGTH + 1] = COPYRIGHTSTRING;
+
+static UBYTE I2CInByte;
+static UBYTE I2CInBuffer[INBYTES + 1];
+static UBYTE *pI2CInBuffer;
+static UBYTE I2CInPointer;
+static UBYTE I2COutBuffer[OUTBYTES + 1];
+static UBYTE *pI2COutBuffer;
+static UBYTE I2COutPointer;
+static UBYTE Chksum;
+static UBYTE I2CInState;
+static UBYTE ArmCommFlag;
+static UBYTE ArmCopyRightValid;
+
+#define ARMCOMMInit TWAR = (UBYTE)(ADDRESS << 1);\
+ TWCR = 0xC5;\
+ ArmCommFlag = FALSE;\
+ ArmCopyRightValid = FALSE
+
+
+#pragma vector=TWI_vect
+__interrupt void I2CInterrupt(void)
+{
+ switch ((TWSR & 0xF8))
+ {
+
+ // Write command
+
+ case TWI_SRX_ADR_ACK :
+ {
+ I2CInPointer = 0;
+ I2CInState = 0;
+ }
+ break;
+
+ case TWI_SRX_ADR_DATA_ACK :
+ {
+ I2CInByte = TWDR;
+
+ switch (I2CInState)
+ {
+ case 0 :
+ {
+ if (I2CInByte != 0xCC)
+ {
+ I2CInBuffer[I2CInPointer++] = I2CInByte;
+ I2CInState++;
+ }
+ else
+ {
+ I2CInState = 2;
+ }
+ }
+ break;
+
+ case 1 :
+ {
+ I2CInBuffer[I2CInPointer++] = I2CInByte;
+ if (I2CInPointer >= (INBYTES + 1))
+ {
+ Chksum = 0;
+ for (I2CInPointer = 0;I2CInPointer < (INBYTES + 1);I2CInPointer++)
+ {
+ Chksum += I2CInBuffer[I2CInPointer];
+ }
+
+ if (Chksum == 0xFF)
+ {
+ pI2CInBuffer = (UBYTE*)&IoToAvr;
+ for (I2CInPointer = 0;I2CInPointer < INBYTES;I2CInPointer++)
+ {
+ *pI2CInBuffer = I2CInBuffer[I2CInPointer];
+ pI2CInBuffer++;
+ }
+ ArmCommFlag = TRUE;
+ }
+ I2CInState = 99;
+ }
+ }
+ break;
+
+ case 2 :
+ {
+ if (I2CInByte == CopyRightString[I2CInPointer++])
+ {
+ if (I2CInPointer >= COPYRIGHTSTRINGLENGTH)
+ {
+ ArmCopyRightValid = TRUE;
+ }
+ }
+ else
+ {
+ I2CInState = 99;
+ }
+ }
+ break;
+
+ default :
+ {
+ }
+ break;
+
+ }
+ }
+ break;
+
+ // Read command
+
+ case TWI_STX_ADR_ACK :
+ {
+ Chksum = 0;
+ pI2COutBuffer = (UBYTE*)&IoFromAvr;
+ for (I2COutPointer = 0;I2COutPointer < OUTBYTES;I2COutPointer++)
+ {
+ I2COutBuffer[I2COutPointer] = *pI2COutBuffer;
+ Chksum += *pI2COutBuffer;
+ pI2COutBuffer++;
+ }
+ I2COutBuffer[I2COutPointer] = ~Chksum;
+ I2COutPointer = 0;
+ TWDR = I2COutBuffer[I2COutPointer++];
+ }
+ break;
+
+ case TWI_STX_DATA_ACK :
+ {
+ if (I2COutPointer >= (OUTBYTES + 1))
+ {
+
+ }
+ else
+ {
+ TWDR = I2COutBuffer[I2COutPointer++];
+ }
+ }
+ break;
+ case TWI_NO_STATE:
+ {
+ TWCR |= 0x90;
+ }
+ break;
+ case TWI_BUS_ERROR:
+ {
+ UBYTE volatile Tmp;
+ Tmp = 1;
+ TWCR &= ~0x20;
+ Tmp = 0;
+ TWCR |= 0x90;
+ Tmp = 2;
+ }
+ break;
+
+ default:
+ {
+ }
+ break;
+
+ }
+ TWCR |= 0x80;
+}
+
+UBYTE ArmCommCheck(void)
+{
+ UBYTE Result;
+
+ Result = ArmCommFlag;
+ ArmCommFlag = FALSE;
+
+ return (Result);
+}
+
+
+#define ARMCOMMCheck ArmCommCheck()
+
+#define ARMCOMMCopyRight ArmCopyRightValid
+
+#define ARMCOMMExit PORTC &= ~0x30;\
+ DDRC |= 0x30;\
+ TWCR = 0x80
+
+#endif
diff --git a/ATmega48/Source/d_button.c b/ATmega48/Source/d_button.c
new file mode 100644
index 0000000..5fd3ebf
--- /dev/null
+++ b/ATmega48/Source/d_button.c
@@ -0,0 +1,40 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 28-10-05 13:46 $
+//
+// Filename $Workfile:: d_button.c $
+//
+// Version $Revision:: 7 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_button $
+//
+// Platform C
+//
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "d_button.h"
+#include "d_button.r"
+
+
+void dButtonInit(void)
+{
+ BUTTONInit;
+}
+
+
+void dButtonUpdate(void)
+{
+ IoFromAvr.Buttons = BUTTONRead;
+}
+
+
+void dButtonExit(void)
+{
+ BUTTONExit;
+}
diff --git a/ATmega48/Source/d_button.h b/ATmega48/Source/d_button.h
new file mode 100644
index 0000000..3fc62c8
--- /dev/null
+++ b/ATmega48/Source/d_button.h
@@ -0,0 +1,27 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 28-10-05 13:46 $
+//
+// Filename $Workfile:: d_button.h $
+//
+// Version $Revision:: 3 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_button $
+//
+// Platform C
+//
+
+
+#ifndef D_BUTTON
+#define D_BUTTON
+
+void dButtonInit(void);
+void dButtonUpdate(void);
+void dButtonExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_button.r b/ATmega48/Source/d_button.r
new file mode 100644
index 0000000..a1ab5c5
--- /dev/null
+++ b/ATmega48/Source/d_button.r
@@ -0,0 +1,68 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_button.r $
+//
+// Version $Revision:: 10 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_button $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+#pragma language=extended
+#pragma vector = INT1_vect
+__interrupt void OnInterrupt(void)
+{
+ EIMSK &= ~0x02;
+ HARDWAREReset;
+}
+
+#define BUTTONInit {\
+ EIMSK &= ~0x02;\
+ PORTD |= 0x08;\
+ DDRD &= ~0x08;\
+ PORTC &= ~0x08;\
+ DDRC &= ~0x08;\
+ DIDR0 |= 0x08;\
+ }
+
+
+UWORD ButtonRead(void)
+{
+ UWORD Result;
+
+ ADMUX = 0x43;
+ ADCSRA &= ~0x07;
+ ADCSRA |= 0x05;
+ ADCSRA |= 0x40;
+ while ((ADCSRA & 0x40));
+ ADCSRA |= 0x40;
+ while ((ADCSRA & 0x40));
+ Result = ADC;
+ if (!(PIND & 0x08))
+ {
+ Result += 0x7FF;
+ }
+ return (Result);
+}
+
+
+#define BUTTONRead ButtonRead()
+
+#define BUTTONExit {\
+ PORTD |= 0x08;\
+ DDRD &= ~0x08;\
+ EICRA &= ~0x0C;\
+ EIFR |= 0x02;\
+ EIMSK |= 0x02;\
+ }
+#endif
diff --git a/ATmega48/Source/d_input.c b/ATmega48/Source/d_input.c
new file mode 100644
index 0000000..e7d2c42
--- /dev/null
+++ b/ATmega48/Source/d_input.c
@@ -0,0 +1,52 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 16-06-05 14:32 $
+//
+// Filename $Workfile:: d_input.c $
+//
+// Version $Revision:: 3 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_input. $
+//
+// Platform C
+//
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "d_input.h"
+#include "d_input.r"
+
+
+void dInputInit(void)
+{
+ INPUTInit;
+}
+
+
+void dInputSelect(UBYTE No)
+{
+ INPUTSelect(No);
+}
+
+
+void dInputConvert(UBYTE No)
+{
+ INPUTConvert(No);
+}
+
+
+void dInputDeselect(UBYTE No)
+{
+ INPUTDeselect(No);
+}
+
+
+void dInputExit(void)
+{
+ INPUTExit;
+}
diff --git a/ATmega48/Source/d_input.h b/ATmega48/Source/d_input.h
new file mode 100644
index 0000000..15ef795
--- /dev/null
+++ b/ATmega48/Source/d_input.h
@@ -0,0 +1,29 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 16-06-05 14:32 $
+//
+// Filename $Workfile:: d_input.h $
+//
+// Version $Revision:: 3 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_input. $
+//
+// Platform C
+//
+
+
+#ifndef D_INPUT
+#define D_INPUT
+
+void dInputInit(void);
+void dInputSelect(UBYTE No);
+void dInputConvert(UBYTE No);
+void dInputDeselect(UBYTE No);
+void dInputExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_input.r b/ATmega48/Source/d_input.r
new file mode 100644
index 0000000..88f1eae
--- /dev/null
+++ b/ATmega48/Source/d_input.r
@@ -0,0 +1,209 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_input.r $
+//
+// Version $Revision:: 13 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_input. $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+// ADC input used for sensors :
+
+__flash UBYTE AdcInputNo[NOS_OF_AVR_INPUTS] =
+{
+ 7,0,1,6
+};
+
+#define ONInputPower0 {\
+ PORTD |= 0x02;\
+ DDRD |= 0x02;\
+ }
+
+#define OFFInputPower0 {\
+ PORTD &= ~0x02;\
+ DDRD |= 0x02;\
+ }
+
+#define ONInputPower1 {\
+ PORTD |= 0x01;\
+ DDRD |= 0x01;\
+ }
+
+#define OFFInputPower1 {\
+ PORTD &= ~0x01;\
+ DDRD |= 0x01;\
+ }
+
+#define ONInputPower2 {\
+ PORTB |= 0x10;\
+ DDRB |= 0x10;\
+ }
+
+#define OFFInputPower2 {\
+ PORTB &= ~0x10;\
+ DDRB |= 0x10;\
+ }
+
+#define ONInputPower3 {\
+ PORTB |= 0x20;\
+ DDRB |= 0x20;\
+ }
+
+#define OFFInputPower3 {\
+ PORTB &= ~0x20;\
+ DDRB |= 0x20;\
+ }
+
+void OnInputPower(UBYTE No)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ ONInputPower0;
+ }
+ break;
+
+ case 1 :
+ {
+ ONInputPower1;
+ }
+ break;
+
+ case 2 :
+ {
+ ONInputPower2;
+ }
+ break;
+
+ case 3 :
+ {
+ ONInputPower3;
+ }
+ break;
+
+ }
+}
+
+void OffInputPower(UBYTE No)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OFFInputPower0;
+ }
+ break;
+
+ case 1 :
+ {
+ OFFInputPower1;
+ }
+ break;
+
+ case 2 :
+ {
+ OFFInputPower2;
+ }
+ break;
+
+ case 3 :
+ {
+ OFFInputPower3;
+ }
+ break;
+
+ }
+}
+
+
+#define STARTInput {\
+ ADCSRA &= ~0x07;\
+ ADCSRA |= 0x05;\
+ ADCSRA |= 0x40;\
+ }
+
+#define SELECTInput(No) {\
+ UBYTE Mask;\
+ Mask = 1 << AdcInputNo[No];\
+ PORTC &= ~Mask;\
+ DDRC &= ~Mask;\
+ DIDR0 |= Mask;\
+ ADMUX = 0x40 + (AdcInputNo[No]);\
+ ADCSRA &= ~0x07;\
+ ADCSRA |= 0x04;\
+ ADCSRA |= 0x40;\
+ }
+
+#define BUSYInput ((ADCSRA & 0x40))
+
+#define READInput ADC
+
+#define EXITInput(No) {\
+ UBYTE Mask;\
+ Mask = 1 << AdcInputNo[No];\
+ PORTC &= ~Mask;\
+ DDRC |= Mask;\
+ }
+
+#define INPUTInit {\
+ UBYTE AdcTmp;\
+ for (AdcTmp = 0;AdcTmp < NOS_OF_AVR_INPUTS;AdcTmp++)\
+ {\
+ OffInputPower(AdcTmp);\
+ }\
+ ADCSRA = 0x94;\
+ ADCSRB = 0x00;\
+ }
+
+
+#define INPUTSelect(Inp) {\
+ SELECTInput(Inp);\
+ if ((IoToAvr.InputPower & (0x10 << Inp)))\
+ {\
+ OnInputPower(Inp);\
+ }\
+ else\
+ {\
+ OffInputPower(Inp);\
+ }\
+ }
+
+
+#define INPUTConvert(Inp) {\
+ STARTInput;\
+ while (BUSYInput);\
+ IoFromAvr.AdValue[Inp] = ADC;\
+ }
+
+
+#define INPUTDeselect(Inp) {\
+ if ((IoToAvr.InputPower & (0x01 << Inp)))\
+ {\
+ OnInputPower(Inp);\
+ }\
+ }
+
+
+#define INPUTExit {\
+ UBYTE AdcTmp;\
+ for (AdcTmp = 0;AdcTmp < NOS_OF_AVR_INPUTS;AdcTmp++)\
+ {\
+ OffInputPower(AdcTmp);\
+ EXITInput(AdcTmp);\
+ }\
+ ADCSRA = 0x10;\
+ }
+
+#endif
diff --git a/ATmega48/Source/d_output.c b/ATmega48/Source/d_output.c
new file mode 100644
index 0000000..7141ef9
--- /dev/null
+++ b/ATmega48/Source/d_output.c
@@ -0,0 +1,86 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 17-08-05 8:20 $
+//
+// Filename $Workfile:: d_output.c $
+//
+// Version $Revision:: 13 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_output $
+//
+// Platform C
+//
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "d_output.h"
+#include "d_output.r"
+
+static SBYTE Dutycycle[NOS_OF_AVR_OUTPUTS];
+static UBYTE Frequency;
+static UBYTE LastOutputMode;
+
+
+void dOutputInit(void)
+{
+ UBYTE Tmp;
+
+ OUTPUTInit;
+ for (Tmp = 0;Tmp < NOS_OF_AVR_OUTPUTS;Tmp++)
+ {
+ Dutycycle[Tmp] = 0;
+ OUTPUTWrite(Tmp,Dutycycle[Tmp]);
+ }
+ LastOutputMode = 0x00;
+}
+
+
+void dOutputUpdate(UBYTE Brake)
+{
+ UBYTE Tmp;
+ UBYTE TmpMask;
+
+ Tmp = IoToAvr.PwmFreq;
+ if (Frequency != Tmp)
+ {
+ if ((Tmp >= 1) && (Tmp <= 32))
+ {
+ Frequency = Tmp;
+ OUTPUTFreq(Frequency);
+ for (Tmp = 0;Tmp < NOS_OF_AVR_OUTPUTS;Tmp++)
+ {
+ Dutycycle[Tmp] = 0;
+ }
+ }
+ }
+
+ TmpMask = IoToAvr.OutputMode;
+
+ for (Tmp = 0;Tmp < NOS_OF_AVR_OUTPUTS;Tmp++)
+ {
+ if (Brake == TRUE)
+ {
+ TmpMask |= (0x01 << Tmp);
+ IoToAvr.PwmValue[Tmp] = 0;
+ }
+ if ((Dutycycle[Tmp] != IoToAvr.PwmValue[Tmp]) || ((LastOutputMode ^ TmpMask) & (0x01 << Tmp)))
+ {
+ OUTPUTWriteBrakeMask(TmpMask);
+ Dutycycle[Tmp] = IoToAvr.PwmValue[Tmp];
+ OUTPUTWrite(Tmp,Dutycycle[Tmp]);
+ }
+ }
+ LastOutputMode = TmpMask;
+ OUTPUTUpdate;
+}
+
+
+void dOutputExit(void)
+{
+ OUTPUTExit;
+}
diff --git a/ATmega48/Source/d_output.h b/ATmega48/Source/d_output.h
new file mode 100644
index 0000000..d130ba9
--- /dev/null
+++ b/ATmega48/Source/d_output.h
@@ -0,0 +1,27 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 16-06-05 14:32 $
+//
+// Filename $Workfile:: d_output.h $
+//
+// Version $Revision:: 4 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_output $
+//
+// Platform C
+//
+
+
+#ifndef D_OUTPUT
+#define D_OUTPUT
+
+void dOutputInit(void);
+void dOutputUpdate(UBYTE Brake);
+void dOutputExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_output.r b/ATmega48/Source/d_output.r
new file mode 100644
index 0000000..f883bde
--- /dev/null
+++ b/ATmega48/Source/d_output.r
@@ -0,0 +1,425 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_output.r $
+//
+// Version $Revision:: 17 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_output $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+// Schematics Function PORT
+// ---------- -------- ----
+// MAIN0 PB0 (PD6)
+// MAPWM OC1B PB2 (PD5)
+// MAIN1 PB3 (PD7)
+
+#define OUTPUTAFloat PORTB &= ~0x0B;\
+ DDRB |= 0x0B;\
+ TCCR1A &= ~0x30
+
+#define OUTPUTABrake PORTB |= 0x0B;\
+ DDRB |= 0x0B;\
+ TCCR1A &= ~0x30
+
+#define OUTPUTAInit OUTPUTABrake;\
+ TCCR1A = 0x01;\
+ TCCR1B = 0x09;\
+ TCNT1 = 0;\
+ OCR1B = 0;\
+ TIMSK1 = 0x00
+
+#define OUTPUTAFwdFloat(D) OUTPUTAFloat;\
+ DDRB &= ~0x01;\
+ TCCR1A |= 0x20;\
+ OCR1B = D
+
+#define OUTPUTAFwdBrake(D) OUTPUTABrake;\
+ PORTB &= ~0x08;\
+ DDRB &= ~0x08;\
+ TCCR1A |= 0x30;\
+ OCR1B = D
+
+#define OUTPUTABwdFloat(D) OUTPUTAFloat;\
+ DDRB &= ~0x08;\
+ TCCR1A |= 0x20;\
+ OCR1B = D
+
+#define OUTPUTABwdBrake(D) OUTPUTABrake;\
+ PORTB &= ~0x01;\
+ DDRB &= ~0x01;\
+ TCCR1A |= 0x30;\
+ OCR1B = D
+
+#define OUTPUTAExit OUTPUTAFloat
+
+
+
+
+
+// Schematics Function PORT
+// ---------- -------- ----
+// MBIN0 PD6 (PB0)
+// MBPWM OC1A PB1 (PB1)
+// MBIN1 PD7 (PB3)
+
+#define OUTPUTBFloat PORTD &= ~0xE0;\
+ DDRD |= 0xE0;\
+ TCCR1A &= ~0xC0
+
+#define OUTPUTBBrake PORTD |= 0xE0;\
+ DDRD |= 0xE0;\
+ TCCR1A &= ~0xC0
+
+#define OUTPUTBInit OUTPUTBBrake;\
+ TCCR1A = 0x01;\
+ TCCR1B = 0x09;\
+ TCNT1 = 0;\
+ OCR1A = 0;\
+ TIMSK1 = 0x00
+
+#define OUTPUTBFwdFloat(D) OUTPUTBFloat;\
+ DDRD &= ~0x40;\
+ TCCR1A |= 0x80;\
+ OCR1A = D
+
+#define OUTPUTBFwdBrake(D) OUTPUTBBrake;\
+ PORTD &= ~0x80;\
+ DDRD &= ~0x80;\
+ TCCR1A |= 0xC0;\
+ OCR1A = D
+
+#define OUTPUTBBwdFloat(D) OUTPUTBFloat;\
+ DDRD &= ~0x80;\
+ TCCR1A |= 0x80;\
+ OCR1A = D
+
+#define OUTPUTBBwdBrake(D) OUTPUTBBrake;\
+ PORTD &= ~0x40;\
+ DDRD &= ~0x40;\
+ TCCR1A |= 0xC0;\
+ OCR1A = D
+
+#define OUTPUTBExit OUTPUTBFloat
+
+
+
+// Schematics Function PORT
+// ---------- -------- ----
+// MCIN0 PB7 (PB7)
+// MCPWM OC0B PD5 (PB2)
+// MCIN1 PB6 (PB6)
+
+#define OUTPUTCFloat PORTB &= ~0xC4;\
+ DDRB |= 0xC4;\
+ TCCR0A &= ~0x30
+
+#define OUTPUTCBrake PORTB |= 0xC4;\
+ DDRB |= 0xC4;\
+ TCCR0A &= ~0x30
+
+#define OUTPUTCInit OUTPUTCBrake;\
+ TCCR0A = 0x03;\
+ TCCR0B = 0x01;\
+ TCNT0 = 0;\
+ OCR0B = 0;\
+ TIMSK0 = 0x00
+
+#define OUTPUTCFwdFloat(D) OUTPUTCFloat;\
+ DDRB &= ~0x80;\
+ TCCR0A |= 0x20;\
+ OCR0B = D
+
+#define OUTPUTCFwdBrake(D) OUTPUTCBrake;\
+ PORTB &= ~0x40;\
+ DDRB &= ~0x40;\
+ TCCR0A |= 0x30;\
+ OCR0B = D
+
+#define OUTPUTCBwdFloat(D) OUTPUTCFloat;\
+ DDRB &= ~0x40;\
+ TCCR0A |= 0x20;\
+ OCR0B = D
+
+#define OUTPUTCBwdBrake(D) OUTPUTCBrake;\
+ PORTB &= ~0x80;\
+ DDRB &= ~0x80;\
+ TCCR0A |= 0x30;\
+ OCR0B = D
+
+#define OUTPUTCExit OUTPUTCFloat
+
+
+
+UBYTE TopValue = 255;
+UBYTE BrakeMask;
+
+void WriteFreq(UBYTE Freq)
+{
+ if (Freq >= 4)
+ {
+ TopValue = (UBYTE)(((ULONG)OSC / 8000L) / (ULONG)Freq);
+ TCCR0B &= ~0x0F;
+ TCCR0B |= 0x0A;
+
+ TCCR1A &= ~0x03;
+ TCCR1A |= 0x02;
+ TCCR1B &= ~0x1F;
+ TCCR1B |= 0x1A;
+ }
+ else
+ {
+ TopValue = (UBYTE)(((ULONG)OSC / 64000L) / (ULONG)Freq);
+ TCCR0B &= ~0x0F;
+ TCCR0B |= 0x0B;
+
+ TCCR1A &= ~0x03;
+ TCCR1A |= 0x02;
+ TCCR1B &= ~0x1F;
+ TCCR1B |= 0x1B;
+ }
+ OCR0B = 0;
+ OCR0A = TopValue;
+ OCR1A = 0;
+ OCR1B = 0;
+ ICR1L = TopValue;
+ ICR1H = 0;
+}
+
+
+void OutputBrake(UBYTE No)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OUTPUTABrake;
+ }
+ break;
+
+ case 1 :
+ {
+ OUTPUTBBrake;
+ }
+ break;
+
+ case 2 :
+ {
+ OUTPUTCBrake;
+ }
+ break;
+
+ }
+}
+
+void OutputFloat(UBYTE No)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OUTPUTAFloat;
+ }
+ break;
+
+ case 1 :
+ {
+ OUTPUTBFloat;
+ }
+ break;
+
+ case 2 :
+ {
+ OUTPUTCFloat;
+ }
+ break;
+
+ }
+}
+
+void OutputFwdBrake(UBYTE No,UBYTE Pwm)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OUTPUTAFwdBrake(Pwm);
+ }
+ break;
+
+ case 1 :
+ {
+ OUTPUTBFwdBrake(Pwm);
+ }
+ break;
+
+ case 2 :
+ {
+ OUTPUTCFwdBrake(Pwm);
+ }
+ break;
+
+ }
+}
+
+void OutputBwdBrake(UBYTE No,UBYTE Pwm)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OUTPUTABwdBrake(Pwm);
+ }
+ break;
+
+ case 1 :
+ {
+ OUTPUTBBwdBrake(Pwm);
+ }
+ break;
+
+ case 2 :
+ {
+ OUTPUTCBwdBrake(Pwm);
+ }
+ break;
+
+ }
+}
+
+void OutputFwdFloat(UBYTE No,UBYTE Pwm)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OUTPUTAFwdFloat(Pwm);
+ }
+ break;
+
+ case 1 :
+ {
+ OUTPUTBFwdFloat(Pwm);
+ }
+ break;
+
+ case 2 :
+ {
+ OUTPUTCFwdFloat(Pwm);
+ }
+ break;
+
+ }
+}
+
+void OutputBwdFloat(UBYTE No,UBYTE Pwm)
+{
+ switch (No)
+ {
+ case 0 :
+ {
+ OUTPUTABwdFloat(Pwm);
+ }
+ break;
+
+ case 1 :
+ {
+ OUTPUTBBwdFloat(Pwm);
+ }
+ break;
+
+ case 2 :
+ {
+ OUTPUTCBwdFloat(Pwm);
+ }
+ break;
+
+ }
+}
+
+void OutputWrite(UBYTE No,SBYTE Duty)
+{
+ UBYTE Pwm;
+
+ if (No < NOS_OF_AVR_OUTPUTS)
+ {
+ if (Duty < 0)
+ {
+ Pwm = (UBYTE)(0 - Duty);
+ }
+ else
+ {
+ Pwm = (UBYTE)Duty;
+ }
+ Pwm = (UBYTE)(((UWORD)Pwm * (UWORD)TopValue) / 100);
+
+
+ if ((BrakeMask & (0x01 << No)))
+ {
+ if (Duty)
+ {
+ if (Duty > 0)
+ {
+ OutputFwdBrake(No,Pwm);
+ }
+ else
+ {
+ OutputBwdBrake(No,Pwm);
+ }
+ }
+ else
+ {
+ OutputBrake(No);
+ }
+ }
+ else
+ {
+ if (Duty)
+ {
+ if (Duty > 0)
+ {
+ OutputFwdFloat(No,Pwm);
+ }
+ else
+ {
+ OutputBwdFloat(No,Pwm);
+ }
+ }
+ else
+ {
+ OutputFloat(No);
+ }
+ }
+ }
+}
+
+
+
+#define OUTPUTInit OUTPUTAInit;\
+ OUTPUTBInit;\
+ OUTPUTCInit;\
+ BrakeMask = 0xFF
+
+#define OUTPUTWriteBrakeMask(M) BrakeMask = M
+
+#define OUTPUTWrite(No,Duty) OutputWrite(No,Duty)
+
+#define OUTPUTFreq(Freq) WriteFreq(Freq)
+
+#define OUTPUTUpdate
+
+#define OUTPUTExit OUTPUTAExit;\
+ OUTPUTBExit;\
+ OUTPUTCExit
+
+#endif
diff --git a/ATmega48/Source/d_pccomm.c b/ATmega48/Source/d_pccomm.c
new file mode 100644
index 0000000..b2e3c6c
--- /dev/null
+++ b/ATmega48/Source/d_pccomm.c
@@ -0,0 +1,33 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 8-04-05 9:51 $
+//
+// Filename $Workfile:: d_pccomm.c $
+//
+// Version $Revision:: 3 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_pccomm $
+//
+// Platform C
+//
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "d_pccomm.h"
+#include "d_pccomm.r"
+
+
+void dPcCommInit(void)
+{
+ //INITPcComm;
+}
+
+void dPcCommExit(void)
+{
+ //EXITPcComm;
+}
diff --git a/ATmega48/Source/d_pccomm.h b/ATmega48/Source/d_pccomm.h
new file mode 100644
index 0000000..29ca916
--- /dev/null
+++ b/ATmega48/Source/d_pccomm.h
@@ -0,0 +1,26 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dkandlun $
+//
+// Revision date $Date:: 28-12-04 14:19 $
+//
+// Filename $Workfile:: d_pccomm.h $
+//
+// Version $Revision:: 1 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Peripheral/Firmware/Source/d_pc $
+//
+// Platform C
+//
+
+
+#ifndef D_PCCOMM
+#define D_PCCOMM
+
+void dPcCommInit(void);
+void dPcCommExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_pccomm.r b/ATmega48/Source/d_pccomm.r
new file mode 100644
index 0000000..0660ac7
--- /dev/null
+++ b/ATmega48/Source/d_pccomm.r
@@ -0,0 +1,93 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 22-02-05 11:10 $
+//
+// Filename $Workfile:: d_pccomm.r $
+//
+// Version $Revision:: 6 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_pccomm $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+#define BAUD_RATE 4800L
+
+#define RX_BUFFERSIZE (BYTES_TO_TX)
+#define TX_BUFFERSIZE (BYTES_TO_RX)
+
+UBYTE RxBuffer[RX_BUFFERSIZE];
+UBYTE RxPointer;
+
+UBYTE TxBuffer[TX_BUFFERSIZE];
+UBYTE TxPointer;
+
+#pragma language=extended
+#pragma vector = USART_RX_vect
+__interrupt void RxInterrupt(void)
+{
+ UBYTE *pBuffer;
+
+ RxBuffer[RxPointer] = UDR0;
+ RxPointer++;
+ if (RxPointer >= RX_BUFFERSIZE)
+ {
+ pBuffer = (UBYTE*)&IoToAvr;
+ for (RxPointer = 0;RxPointer < RX_BUFFERSIZE;RxPointer++)
+ {
+ *pBuffer = RxBuffer[RxPointer];
+ pBuffer++;
+ }
+ RxPointer = 0;
+ pBuffer = (UBYTE*)&IoFromAvr;
+ for (TxPointer = 0;TxPointer < TX_BUFFERSIZE;TxPointer++)
+ {
+ TxBuffer[TxPointer] = *pBuffer;
+ pBuffer++;
+ }
+ TxPointer = 0;
+ UDR0 = TxBuffer[TxPointer];
+ TxPointer++;
+ UCSR0B |= 0x40;
+ }
+}
+
+#pragma language=extended
+#pragma vector = USART_TX_vect
+__interrupt void TxInterrupt(void)
+{
+ UDR0 = TxBuffer[TxPointer];
+ TxPointer++;
+ if (TxPointer >= TX_BUFFERSIZE)
+ {
+ UCSR0B &= ~0x40;
+ TxPointer = 0;
+ RxPointer = 0;
+ }
+}
+
+#define INITPcComm {\
+ DDRD |= 0x02;\
+ DDRD &= ~0x01;\
+ UBRR0 = (UWORD)((OSC/(16 * BAUD_RATE)) - 1);\
+ UCSR0A = 0x40;\
+ UCSR0B = 0x98;\
+ UCSR0C = 0x36;\
+ RxPointer = 0;\
+ }
+
+#define EXITPcComm {\
+ UCSR0B = 0x00;\
+ PORTD &= ~0x01;\
+ DDRD |= 0x01;\
+ }
+
+
+#endif
diff --git a/ATmega48/Source/d_power.c b/ATmega48/Source/d_power.c
new file mode 100644
index 0000000..f28179a
--- /dev/null
+++ b/ATmega48/Source/d_power.c
@@ -0,0 +1,122 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_power.c $
+//
+// Version $Revision:: 7 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_power. $
+//
+// Platform C
+//
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "d_power.h"
+#include "d_power.r"
+
+
+void dPowerInit(void)
+{
+ POWERInit;
+}
+
+
+void dPowerRechargeable(UBYTE Mounted)
+{
+ if (Mounted)
+ {
+ IoFromAvr.Battery |= 0x8000;
+ }
+ else
+ {
+ IoFromAvr.Battery &= ~0x8000;
+ }
+}
+
+
+UBYTE dPowerReadOn(void)
+{
+ UBYTE Result = TRUE;
+
+ if (IoToAvr.Power == 0x5A)
+ {
+ Result = FALSE;
+ }
+
+ return (Result);
+}
+
+
+UBYTE dPowerReadBoot(void)
+{
+ UBYTE Result = FALSE;
+
+ if ((IoToAvr.Power == 0xA5) && (IoToAvr.PwmFreq == 0x5A))
+ {
+ IoToAvr.Power = 0x00;
+ IoToAvr.PwmFreq = 0x00;
+ Result = TRUE;
+ }
+
+ return (Result);
+}
+
+
+void dPowerSelect(void)
+{
+ POWERSelect;
+}
+
+
+UWORD dPowerConvert(void)
+{
+ UWORD Result;
+
+ POWERConvert(Result);
+
+ return (Result);
+}
+
+
+void dPowerDeselect(void)
+{
+ POWERDeselect;
+}
+
+
+void dPowerWriteOn(UBYTE On)
+{
+ if (On == TRUE)
+ {
+ POWEROn;
+ }
+ else
+ {
+ POWEROff;
+ }
+}
+
+
+void dPowerHigh(void)
+{
+ POWERHigh;
+}
+
+
+void dPowerFloat(void)
+{
+ POWERFloat;
+}
+
+
+void dPowerExit(void)
+{
+ POWERExit;
+}
diff --git a/ATmega48/Source/d_power.h b/ATmega48/Source/d_power.h
new file mode 100644
index 0000000..f1b5c2f
--- /dev/null
+++ b/ATmega48/Source/d_power.h
@@ -0,0 +1,35 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_power.h $
+//
+// Version $Revision:: 4 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_power. $
+//
+// Platform C
+//
+
+
+#ifndef D_POWER
+#define D_POWER
+
+void dPowerInit(void);
+void dPowerRechargeable(UBYTE Mounted);
+UBYTE dPowerReadOn(void);
+UBYTE dPowerReadBoot(void);
+void dPowerWriteOn(UBYTE On);
+void dPowerSelect(void);
+UWORD dPowerConvert(void);
+void dPowerDeselect(void);
+void dPowerHigh(void);
+void dPowerFloat(void);
+void dPowerExit(void);
+
+#endif
diff --git a/ATmega48/Source/d_power.r b/ATmega48/Source/d_power.r
new file mode 100644
index 0000000..de229a3
--- /dev/null
+++ b/ATmega48/Source/d_power.r
@@ -0,0 +1,79 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_power.r $
+//
+// Version $Revision:: 8 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_power. $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+#define POWERInit {\
+ PORTC &= ~0x04;\
+ DDRC &= ~0x04;\
+ DIDR0 |= 0x04;\
+ }
+
+#define POWEROff {\
+ PORTD &= ~0x10;\
+ DDRD |= 0x10;\
+ }
+
+#define POWEROn {\
+ PORTD |= 0x10;\
+ DDRD |= 0x10;\
+ }
+
+#define POWERSelect {\
+ PORTD |= 0x04;\
+ DDRD |= 0x04;\
+ }
+
+#define POWERConvert(V) {\
+ ADMUX = 0x42;\
+ ADCSRA &= ~0x07;\
+ ADCSRA |= 0x05;\
+ ADCSRA |= 0x40;\
+ while ((ADCSRA & 0x40));\
+ ADCSRA |= 0x40;\
+ while ((ADCSRA & 0x40));\
+ V = ADC;\
+ V &= 0x7FFF;\
+ IoFromAvr.Battery &= 0x8000;\
+ IoFromAvr.Battery |= V;\
+ }
+
+#define POWERDeselect {\
+ PORTD &= ~0x04;\
+ DDRD |= 0x04;\
+ }
+
+#define POWERHigh {\
+ PORTC |= 0x04;\
+ DDRC |= 0x04;\
+ }
+
+#define POWERFloat {\
+ PORTC &= ~0x04;\
+ DDRC &= ~0x04;\
+ }
+
+
+
+#define POWERExit {\
+ POWEROff;\
+ POWERDeselect;\
+ POWERConvert(ADC);\
+ }
+
+#endif
diff --git a/ATmega48/Source/d_timer.c b/ATmega48/Source/d_timer.c
new file mode 100644
index 0000000..94758c9
--- /dev/null
+++ b/ATmega48/Source/d_timer.c
@@ -0,0 +1,48 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 16-06-05 14:32 $
+//
+// Filename $Workfile:: d_timer.c $
+//
+// Version $Revision:: 2 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_timer. $
+//
+// Platform C
+//
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "d_timer.h"
+#include "d_timer.r"
+
+UBYTE Timer;
+
+
+void dTimerInit(void)
+{
+ TIMERInit;
+}
+
+
+void dTimerClear(void)
+{
+ Timer = TIMERRead;
+}
+
+
+UBYTE dTimerRead(void)
+{
+ return ((UBYTE)(TIMERRead - Timer));
+}
+
+
+void dTimerExit(void)
+{
+ TIMERExit;
+}
diff --git a/ATmega48/Source/d_timer.h b/ATmega48/Source/d_timer.h
new file mode 100644
index 0000000..862f4f4
--- /dev/null
+++ b/ATmega48/Source/d_timer.h
@@ -0,0 +1,30 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 16-06-05 14:32 $
+//
+// Filename $Workfile:: d_timer.h $
+//
+// Version $Revision:: 2 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_timer. $
+//
+// Platform C
+//
+
+
+#ifndef D_TIMER
+#define D_TIMER
+
+void dTimerInit(void);
+void dTimerClear(void);
+UBYTE dTimerRead(void);
+void dTimerExit(void);
+
+#define TIMER_RESOLUTION (8000000L / 256L)
+
+#endif
diff --git a/ATmega48/Source/d_timer.r b/ATmega48/Source/d_timer.r
new file mode 100644
index 0000000..9798be9
--- /dev/null
+++ b/ATmega48/Source/d_timer.r
@@ -0,0 +1,34 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: d_timer.r $
+//
+// Version $Revision:: 4 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/d_timer. $
+//
+// Platform C
+//
+
+#ifdef ATMEGAX8
+
+#define TIMERInit {\
+ TCCR2A = 0x00;\
+ TCCR2B = 0x06;\
+ TCNT2 = 0x00;\
+ }
+
+#define TIMERRead TCNT2
+
+
+#define TIMERExit {\
+ }
+
+
+#endif
diff --git a/ATmega48/Source/m_sched.c b/ATmega48/Source/m_sched.c
new file mode 100644
index 0000000..d208469
--- /dev/null
+++ b/ATmega48/Source/m_sched.c
@@ -0,0 +1,54 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 2-09-05 14:37 $
+//
+// Filename $Workfile:: m_sched.c $
+//
+// Version $Revision:: 2 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/m_sched. $
+//
+// Platform C
+//
+
+
+#define INCLUDE_OS
+
+
+#include "stdconst.h"
+#include "m_sched.h"
+#include "c_armcomm.h"
+
+
+UBYTE Run;
+
+
+void mSchedInit(void)
+{
+ Run = FALSE;
+
+ cArmCommInit();
+ Run = TRUE;
+}
+
+
+UBYTE mSchedCtrl(void)
+{
+ Run = cArmCommCtrl();
+
+ return (Run);
+}
+
+
+void mSchedExit(void)
+{
+ Run = FALSE;
+
+ cArmCommExit();
+}
+
diff --git a/ATmega48/Source/m_sched.h b/ATmega48/Source/m_sched.h
new file mode 100644
index 0000000..1dd7a09
--- /dev/null
+++ b/ATmega48/Source/m_sched.h
@@ -0,0 +1,87 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dktochpe $
+//
+// Revision date $Date:: 28-10-05 13:46 $
+//
+// Filename $Workfile:: m_sched.h $
+//
+// Version $Revision:: 15 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Ioctrl/Firmware/Source/m_sched. $
+//
+// Platform C
+//
+
+
+#define COPYRIGHTSTRING "Let's samba nxt arm in arm, (c)LEGO System A/S"
+
+#define COPYRIGHTSTRINGLENGTH 46 // Number of bytes checked in COPYRIGHTSTRING
+
+#define OSC 8000000L // Main oscillator frequency
+
+#include "..\mega48\include\atmega48.h"
+
+#define BYTES_TO_TX 8 // Number of bytes received from ARM = sizeof(IOTOAVR)
+#define BYTES_TO_RX 12 // Number of bytes transmitted to ARM = sizeof(IOFROMAVR)
+#define NOS_OF_AVR_OUTPUTS 4 // Number of motor outputs
+#define NOS_OF_AVR_INPUTS 4 // Number of a/d inputs
+
+
+typedef struct // From AVR to ARM
+{
+ UWORD AdValue[NOS_OF_AVR_INPUTS]; // Raw a/d converter values [0..1023]
+ UWORD Buttons; // Raw a/d converter value [0..1023] (Enter -> +0x07FF)
+ UWORD Battery; // Raw a/d converter value [0..1023] (rechargeable -> +0x8000)
+}IOFROMAVR;
+
+
+typedef struct // From ARM to AVR
+{
+ UBYTE Power; // Command descriped below
+ UBYTE PwmFreq; // Common pwm freq [Khz] [1..32]
+ SBYTE PwmValue[NOS_OF_AVR_OUTPUTS]; // Pwm value [%] [-100..100]
+ UBYTE OutputMode; // Bitwise Bit 0 = Motor A [0 = float, 1 = brake]
+ UBYTE InputPower; // Bitwise Bit 0 and 4 = input 1 [00 = inactive,01 = pulsed, 11 = constant]
+}IOTOAVR;
+
+/*
+ Powerdown request: Power = 0x5A
+ Samba boot request: Power = 0xA5 and PwmFreq = 0x5A
+ Copyright string: Power = 0xCC
+*/
+
+
+#ifdef INCLUDE_OS
+
+#include "..\mega48\include\atmega48.c"
+
+IOFROMAVR IoFromAvr =
+{
+ { 0,0,0,0 },
+ 0,
+ 0
+};
+
+IOTOAVR IoToAvr =
+{
+ 0,
+ 4,
+ { 0,0,0,0 },
+ 0x0F,0x0F
+};
+
+#endif
+
+extern IOTOAVR IoToAvr;
+extern IOFROMAVR IoFromAvr;
+extern UBYTE Run;
+
+
+
+
+
+
diff --git a/ATmega48/Source/stdconst.h b/ATmega48/Source/stdconst.h
new file mode 100644
index 0000000..392633e
--- /dev/null
+++ b/ATmega48/Source/stdconst.h
@@ -0,0 +1,44 @@
+//
+// Programmer
+//
+// Date init 14.12.2004
+//
+// Reviser $Author:: Dkandlun $
+//
+// Revision date $Date:: 28-12-04 14:19 $
+//
+// Filename $Workfile:: stdconst.h $
+//
+// Version $Revision:: 1 $
+//
+// Archive $Archive:: /LMS2006/Sys01/Peripheral/Firmware/Source/stdc $
+//
+// Platform C
+//
+
+
+#ifndef STDCONST
+#define STDCONST
+
+
+#define TRUE 1
+#define FALSE 0
+
+typedef unsigned char UCHAR;
+typedef unsigned short USHORT;
+typedef unsigned char UBYTE;
+typedef signed char SBYTE;
+typedef unsigned int UWORD;
+typedef signed int SWORD;
+typedef unsigned long ULONG;
+typedef signed long SLONG;
+
+typedef ULONG* PULONG;
+typedef USHORT* PUSHORT;
+typedef UCHAR* PUCHAR;
+typedef char* PSZ;
+
+#define BASETYPES
+
+
+#endif