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-rw-r--r--AT91SAM7S256/SAM7S256/Include/Cstartup.S442
-rw-r--r--AT91SAM7S256/SAM7S256/Include/Cstartup_SAM7.c7
-rw-r--r--AT91SAM7S256/SAM7S256/Include/sam7s256.h4
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/.gitignore3
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/Makefile96
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/lib/errno.c32
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/lib/sbrk.c44
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/lib/sscanf.c49
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/lib/strtod.c257
-rw-r--r--AT91SAM7S256/SAM7S256/gcc/nxt.ld136
10 files changed, 1069 insertions, 1 deletions
diff --git a/AT91SAM7S256/SAM7S256/Include/Cstartup.S b/AT91SAM7S256/SAM7S256/Include/Cstartup.S
new file mode 100644
index 0000000..b60ba2c
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Include/Cstartup.S
@@ -0,0 +1,442 @@
+/*------------------------------------------------------------------------------
+//*- ATMEL Microcontroller Software Support - ROUSSET -
+//*------------------------------------------------------------------------------
+//* The software is delivered "AS IS" without warranty or condition of any
+//* kind, either express, implied or statutory. This includes without
+//* limitation any warranty or condition with respect to merchantability or
+//* fitness for any particular purpose, or against the infringements of
+//* intellectual property rights of others.
+//*-----------------------------------------------------------------------------
+//*- File source : Cstartup.s
+//*- Object : Generic CStartup for KEIL and GCC
+//*- Compilation flag : None
+//*-
+//*- 1.0 18/Oct/04 JPP : Creation
+//*- 1.1 21/Feb/05 JPP : Set Interrupt
+//*- 1.1 01/Apr/05 JPP : save SPSR
+//*
+//*- WinARM/arm-elf-gcc-version by Martin Thomas - Modifications:
+//* remapping-support, vector-location, stack-position and more...
+//*-----------------------------------------------------------------------------*/
+
+/*
+ 20060902 (mth) : moved IRQ-Handler from section .vect* to
+ .init/.fastrun
+ 20061101 (mth) : update IRQ-Handler
+ FIQ-stack init
+*/
+
+/* check configuration-options and map to "assembler symbols": */
+
+/*#include "AT91SAM7S256_inc.h"*/
+
+#ifdef ROM_RUN
+.set RAM_MODE, 0
+#ifdef VECTORS_IN_RAM
+.set REMAP, 1
+.set VECTREMAPPED, 1
+#else
+.set REMAP, 0
+.set VECTREMAPPED, 0
+#endif
+#endif
+
+#ifdef RAM_RUN
+.set RAM_MODE, 1
+.set REMAP, 1
+.set VECTREMAPPED, 0
+#endif
+
+.set VECTREMAPPED_AUTODETECT, 0
+.set CPP_CONSTRUCTORS, 0
+
+
+.if (RAM_MODE)
+.print "RAM_MODE enabled"
+.else
+.print "ROM_MODE enabled"
+.endif
+
+.if (REMAP)
+.print "remapping enabled"
+.endif
+
+.if (VECTREMAPPED)
+.print "Vectors at start of RAM"
+.else
+.print "Vectors at start of Code"
+.endif
+
+ .equ AIC_IVR, (256)
+ .equ AIC_FVR, (260)
+ .equ AIC_EOICR, (304)
+ .equ AT91C_BASE_AIC, (0xFFFFF000)
+
+/*------------------------------------------------------------------------------
+//*- Exception vectors
+//*--------------------
+//*- These vectors can be read at address 0 or at RAM address
+//*- They ABSOLUTELY requires to be in relative addresssing mode in order to
+//*- guarantee a valid jump. For the moment, all are just looping.
+//*- If an exception occurs before remap, this would result in an infinite loop.
+//*- To ensure if a exeption occurs before start application to infinite loop.
+//*------------------------------------------------------------------------------*/
+
+.if (VECTREMAPPED)
+.print "Vectors in section .vectmapped -> .data"
+.section .vectmapped, "ax"
+.else
+.print "Vectors in section .vectorg -> .text"
+.section .vectorg, "ax"
+.endif
+
+ LDR PC,Reset_Addr /* 0x00 Reset handler */
+ LDR PC,Undef_Addr /* 0x04 Undefined Instruction */
+ LDR PC,SWI_Addr /* 0x08 Software Interrupt */
+ LDR PC,PAbt_Addr /* 0x0C Prefetch Abort */
+ LDR PC,DAbt_Addr /* 0x10 Data Abort */
+ NOP /* 0x14 reserved */
+ LDR PC,IRQ_Addr /* 0x18 IRQ */
+fiqvec: /* 0x1c FIQ */
+/*------------------------------------------------------------------------------
+//*- Function : FIQ_Handler_Entry
+//*- Treatments : FIQ Controller Interrupt Handler.
+//*- Called Functions : AIC_FVR[interrupt]
+//*------------------------------------------------------------------------------*/
+
+FIQ_Handler_Entry:
+
+/*- Switch in SVC/User Mode to allow User Stack access for C code */
+/* because the FIQ is not yet acknowledged*/
+
+/*- Save and r0 in FIQ_Register */
+ mov r9,r0
+ ldr r0 , [r8, #AIC_FVR]
+ msr CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC
+
+/*- Save scratch/used registers and LR in User Stack */
+ stmfd sp!, { r1-r3, r12, lr}
+
+/*- Branch to the routine pointed by the AIC_FVR */
+ mov r14, pc
+ bx r0
+
+/*- Restore scratch/used registers and LR from User Stack */
+ ldmia sp!, { r1-r3, r12, lr}
+
+/*- Leave Interrupts disabled and switch back in FIQ mode */
+ msr CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
+
+/*- Restore the R0 ARM_MODE_SVC register */
+ mov r0,r9
+
+/*- Restore the Program Counter using the LR_fiq directly in the PC */
+ subs pc,lr,#4
+
+/* end of fiqhandler */
+
+Reset_Addr: .word InitReset
+Undef_Addr: .word Undef_Handler
+SWI_Addr: .word SWI_Handler
+/*SWI_Addr: .word SoftwareInterruptASM*/ /*in swi_handler.S */
+PAbt_Addr: .word PAbt_Handler
+DAbt_Addr: .word DAbt_Handler
+IRQ_Addr: .word IRQ_Handler_Entry
+
+Undef_Handler: B Undef_Handler
+SWI_Handler: B SWI_Handler
+PAbt_Handler: B PAbt_Handler
+DAbt_Handler: B DAbt_Handler
+
+
+ .arm
+ .section .init, "ax"
+ .global _startup
+ .func _startup
+_startup:
+reset:
+
+.if (VECTREMAPPED)
+/* mthomas: Dummy used during startup */
+ LDR PC, Reset_Addr_F
+ NOP
+ NOP
+ NOP
+ NOP
+ NOP /*.word 0xdeadbeef*/ /* Reserved Address */
+ NOP
+ NOP
+Reset_Addr_F: .word InitReset
+.endif
+
+.RAM_TOP:
+ .word __TOP_STACK
+
+InitReset:
+
+/*------------------------------------------------------------------------------
+/*- Remapping
+/*------------------------------------------------------------------------------*/
+.if (VECTREMAPPED)
+ .print "RCR setting for remapping enabled"
+ .equ MC_BASE,0xFFFFFF00 /* MC Base Address */
+ .equ MC_RCR, 0x00 /* MC_RCR Offset */
+
+
+.if (VECTREMAPPED_AUTODETECT)
+ /* store first word in RAM into r4 */
+ ldr r0,=__FIRST_IN_RAM
+ ldr r4,[r0]
+ /* load value at address 0 into R2 */
+ ldr r1,=0x00000000
+ ldr r2,[r1]
+ /* xor value from address 0 (flip all bits), store in R3 */
+ ldr r3,=0xffffffff
+ eor r3, r2, r3
+ /* write xored value to first word in RAM
+ if already remapped this will also change
+ the value at 0 */
+ str r3,[r0]
+ /* load from address 0 again into R3 */
+ ldr r3,[r1]
+ /* restore first value in RAM */
+ str r4,[r0]
+
+ /* compare */
+ cmp r3, r2
+ bne already_remapped
+.endif
+
+ /* if both values have been equal the change of the
+ RAM-value had no effect on the value at 0x00000000
+ so we are not remapping yet -> remap now: */
+ LDR R0, =MC_BASE
+ MOV R1, #1
+ STR R1, [R0, #MC_RCR]
+
+already_remapped:
+.endif
+
+
+/*------------------------------------------------------------------------------
+/*- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
+/*------------------------------------------------------------------------------*/
+ .extern AT91F_LowLevelInit
+/*- minumum C initialization */
+/*- call AT91F_LowLevelInit( void) */
+
+ ldr sp, .RAM_TOP /* temporary stack in internal RAM (**) */
+/*--Call Low level init function in ABSOLUTE through the Interworking */
+ ldr r0,=AT91F_LowLevelInit
+ mov lr, pc
+ bx r0
+/*------------------------------------------------------------------------------
+//*- Stack Sizes Definition
+//*------------------------
+//*- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
+//*- the vectoring. This assume that the IRQ management.
+//*- The Interrupt Stack must be adjusted depending on the interrupt handlers.
+//*- Fast Interrupt not requires stack If in your application it required you must
+//*- be definehere.
+//*- The System stack size is not defined and is limited by the free internal
+//*- SRAM.
+//*------------------------------------------------------------------------------*/
+
+/*------------------------------------------------------------------------------
+//*- Top of Stack Definition
+//*-------------------------
+//*- Interrupt and Supervisor Stack are located at the top of internal memory in
+//*- order to speed the exception handling context saving and restoring.
+//*- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
+//*------------------------------------------------------------------------------*/
+
+ .EQU IRQ_STACK_SIZE, (3*8*4)
+ .EQU FIQ_STACK_SIZE, (3*8*4)
+ .EQU ARM_MODE_FIQ, 0x11
+ .EQU ARM_MODE_IRQ, 0x12
+ .EQU ARM_MODE_SVC, 0x13
+
+ .EQU I_BIT, 0x80
+ .EQU F_BIT, 0x40
+
+/*------------------------------------------------------------------------------
+//*- Setup the stack for each mode
+//*-------------------------------*/
+ mov r0, sp /* see (**) */
+
+/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
+ msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
+ mov sp, r0
+ sub r0, r0, #FIQ_STACK_SIZE
+/*- Init the FIQ register*/
+ ldr r8, =AT91C_BASE_AIC
+
+/*- Set up Interrupt Mode and set IRQ Mode Stack*/
+ msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
+ mov sp, r0 /* Init stack IRQ */
+ sub r0, r0, #IRQ_STACK_SIZE
+
+/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
+// /* start with INT and FIQ enabled */
+ msr CPSR_c, #ARM_MODE_SVC
+
+ /* start with INT and FIQ disabled */
+// msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
+
+ mov sp, r0 /* Init stack Sup */
+
+
+/*- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack*/
+
+/* Relocate .data section (Copy from ROM to RAM)
+ This will also copy the .vectmapped and .fastrun */
+ LDR R1, =_etext
+ LDR R2, =_data
+ LDR R3, =_edata
+LoopRel: CMP R2, R3
+ LDRLO R0, [R1], #4
+ STRLO R0, [R2], #4
+ BLO LoopRel
+
+/* Clear .bss section (Zero init) */
+ MOV R0, #0
+ LDR R1, =__bss_start__
+ LDR R2, =__bss_end__
+LoopZI: CMP R1, R2
+ STRLO R0, [R1], #4
+ BLO LoopZI
+
+
+.if (CPP_CONSTRUCTORS)
+/* call C++ constructors of global objects */
+ LDR r0, =__ctors_start__
+ LDR r1, =__ctors_end__
+ctor_loop:
+ CMP r0, r1
+ BEQ ctor_end
+ LDR r2, [r0], #4
+ STMFD sp!, {r0-r1}
+ MOV lr, pc
+/* MOV pc, r2 */
+ BX r2 /* mthomas 8/2006 */
+ LDMFD sp!, {r0-r1}
+ B ctor_loop
+ctor_end:
+.endif
+
+
+/* call main() */
+ ldr lr,=exit
+ ldr r0,=main
+ bx r0
+
+ .size _startup, . - _startup
+ .endfunc
+
+/* "exit" dummy added by mthomas to avoid sbrk write read etc. needed
+ by the newlib default "exit" */
+ .global exit
+ .func exit
+exit:
+ b .
+ .size exit, . - exit
+ .endfunc
+
+
+
+
+/*------------------------------------------------------------------------------
+//*- Manage exception
+//*---------------
+//*- This module The exception must be ensure in ARM mode
+//*------------------------------------------------------------------------------
+//*------------------------------------------------------------------------------
+//*- Function : IRQ_Handler_Entry
+//*- Treatments : IRQ Controller Interrupt Handler.
+//*- Called Functions : AIC_IVR[interrupt]
+//*------------------------------------------------------------------------------*/
+
+.if (VECTREMAPPED)
+.print "IRQ_Handler_Entry in section .fastrun -> .data"
+.section .fastrun, "ax"
+.else
+.print "IRQ_Handler_Entry in section .init -> .text"
+.section .init, "ax"
+.endif
+
+ .global IRQ_Handler_Entry
+ .func IRQ_Handler_Entry
+IRQ_Handler_Entry:
+/*---- Adjust and save return address on the stack */
+ sub lr, lr, #4
+ stmfd sp!, {lr}
+
+/*---- Save r0 and SPSR on the stack */
+ mrs r14, SPSR
+ stmfd sp!, {r0, r14}
+
+/*---- Write in the IVR to support Protect mode */
+/*---- No effect in Normal Mode */
+/*---- De-assert NIRQ and clear the source in Protect mode */
+ ldr r14, =AT91C_BASE_AIC
+ ldr r0, [r14, #AIC_IVR]
+ str r14, [r14, #AIC_IVR]
+
+/*---- Enable nested interrupts and switch to Supervisor mode */
+ msr CPSR_c, #ARM_MODE_SVC
+
+/*---- Save scratch/used registers and LR on the stack */
+ stmfd sp!, {r1-r3, r12, r14}
+
+/*---- Branch to the routine pointed by AIC_IVR */
+ mov r14, pc
+ bx r0
+
+/*---- Restore scratch/used registers and LR from the stack */
+ ldmia sp!, {r1-r3, r12, r14}
+
+/*---- Disable nested interrupts and switch back to IRQ mode */
+ msr CPSR_c, #I_BIT | ARM_MODE_IRQ
+
+/*---- Acknowledge interrupt by writing AIC_EOICR */
+ ldr r14, =AT91C_BASE_AIC
+ str r14, [r14, #AIC_EOICR]
+
+/*---- Restore SPSR and r0 from the stack */
+ ldmia sp!, {r0, r14}
+ msr SPSR_cxsf, r14
+
+/*---- Return from interrupt handler */
+ ldmia sp!, {pc}^
+
+ .size IRQ_Handler_Entry, . - IRQ_Handler_Entry
+ .endfunc
+
+
+/*---------------------------------------------------------------
+//* ?EXEPTION_VECTOR
+//* This module is only linked if needed for closing files.
+//*---------------------------------------------------------------*/
+ .global AT91F_Default_FIQ_handler
+ .func AT91F_Default_FIQ_handler
+AT91F_Default_FIQ_handler:
+ b AT91F_Default_FIQ_handler
+ .size AT91F_Default_FIQ_handler, . - AT91F_Default_FIQ_handler
+ .endfunc
+
+ .global AT91F_Default_IRQ_handler
+ .func AT91F_Default_IRQ_handler
+AT91F_Default_IRQ_handler:
+ b AT91F_Default_IRQ_handler
+ .size AT91F_Default_IRQ_handler, . - AT91F_Default_IRQ_handler
+ .endfunc
+
+ .global AT91F_Spurious_handler
+ .func AT91F_Spurious_handler
+AT91F_Spurious_handler:
+ b AT91F_Spurious_handler
+ .size AT91F_Spurious_handler, . - AT91F_Spurious_handler
+ .endfunc
+
+ .end
+
diff --git a/AT91SAM7S256/SAM7S256/Include/Cstartup_SAM7.c b/AT91SAM7S256/SAM7S256/Include/Cstartup_SAM7.c
index b23e3ac..c0a7da4 100644
--- a/AT91SAM7S256/SAM7S256/Include/Cstartup_SAM7.c
+++ b/AT91SAM7S256/SAM7S256/Include/Cstartup_SAM7.c
@@ -23,13 +23,18 @@ extern void AT91F_Spurious_handler(void);
extern void AT91F_Default_IRQ_handler(void);
extern void AT91F_Default_FIQ_handler(void);
+#ifdef __IAR_SYSTEMS_ICC__
+# define SECTION_ICODE @ "ICODE"
+#else
+# define SECTION_ICODE
+#endif
//*----------------------------------------------------------------------------
//* \fn AT91F_LowLevelInit
//* \brief This function performs very low level HW initialization
//* this function can be use a Stack, depending the compilation
//* optimization mode
//*----------------------------------------------------------------------------
-void AT91F_LowLevelInit( void) @ "ICODE"
+void AT91F_LowLevelInit( void) SECTION_ICODE
{
int i;
AT91PS_PMC pPMC = AT91C_BASE_PMC;
diff --git a/AT91SAM7S256/SAM7S256/Include/sam7s256.h b/AT91SAM7S256/SAM7S256/Include/sam7s256.h
index 332e39d..0118c40 100644
--- a/AT91SAM7S256/SAM7S256/Include/sam7s256.h
+++ b/AT91SAM7S256/SAM7S256/Include/sam7s256.h
@@ -15,7 +15,11 @@
#ifndef SAM7S256_H
#define SAM7S256_H
+#ifdef __IAR_SYSTEMS_ICC__
#include "ioat91sam7s256.h"
+#else
+#include "AT91SAM7S256.h"
+#endif
#define SAM7S256
diff --git a/AT91SAM7S256/SAM7S256/gcc/.gitignore b/AT91SAM7S256/SAM7S256/gcc/.gitignore
new file mode 100644
index 0000000..83a204c
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/.gitignore
@@ -0,0 +1,3 @@
+version.mak
+nxt_firmware.bin
+nxt_firmware.rfw
diff --git a/AT91SAM7S256/SAM7S256/gcc/Makefile b/AT91SAM7S256/SAM7S256/gcc/Makefile
new file mode 100644
index 0000000..7ad3156
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/Makefile
@@ -0,0 +1,96 @@
+BASE = ../..
+SRCDIR = $(BASE)/Source
+CPUINCDIR = $(BASE)/SAM7S256/Include
+
+GIT_VERSION := $(shell git rev-parse --short=7 HEAD)
+CUSTOM_FIRMWAREVERSION = $(GIT_VERSION)
+
+TARGET = nxt_firmware
+
+ARM_SOURCES =
+THUMB_SOURCES = c_button.c c_cmd.c c_comm.c c_display.c c_input.c c_ioctrl.c \
+ c_loader.c c_lowspeed.c c_output.c c_sound.c c_ui.c \
+ d_bt.c d_button.c d_display.c d_hispeed.c d_input.c \
+ d_ioctrl.c d_loader.c d_lowspeed.c d_output.c d_sound.c \
+ d_timer.c d_usb.c \
+ m_sched.c \
+ errno.c sbrk.c strtod.c sscanf.c \
+ Cstartup_SAM7.c
+
+ASM_ARM_SOURCE = Cstartup.S
+ASM_THUMB_SOURCE =
+
+vpath %.c $(SRCDIR)
+vpath %.c $(CPUINCDIR)
+vpath %.c lib
+vpath %.S $(CPUINCDIR)
+
+INCLUDES =
+
+MCU = arm7tdmi
+STARTOFUSERFLASH_DEFINES = -DSTARTOFUSERFLASH_FROM_LINKER=1
+VERSION_DEFINES = -DCUSTOM_FIRMWAREVERSION=\"$(CUSTOM_FIRMWAREVERSION)\"
+DEFINES = -DPROTOTYPE_PCB_4 -DNEW_MENU -DROM_RUN -DVECTORS_IN_RAM \
+ $(STARTOFUSERFLASH_DEFINES) $(VERSION_DEFINES)
+OPTIMIZE = -Os -fno-strict-aliasing \
+ -ffunction-sections -fdata-sections
+WARNINGS = -Wall -W -Wundef -Wno-unused -Wno-format
+THUMB_INTERWORK = -mthumb-interwork
+CFLAGS = -mcpu=$(MCU) $(THUMB) $(THUMB_INTERWORK) $(WARNINGS) $(OPTIMIZE)
+ASFLAGS = -mcpu=$(MCU) $(THUMB) $(THUMB_INTERWORK)
+CPPFLAGS = $(INCLUDES) $(DEFINES) -MMD
+LDSCRIPT = nxt.ld
+LDFLAGS = -nostdlib -T $(LDSCRIPT) -Wl,--gc-sections
+LDLIBS = -lc -lm -lgcc
+
+CROSS_COMPILE = arm-none-eabi-
+CC = $(CROSS_COMPILE)gcc
+OBJDUMP = $(CROSS_COMPILE)objdump
+OBJCOPY = $(CROSS_COMPILE)objcopy
+
+FWFLASH = fwflash
+
+ARM_OBJECTS = $(ARM_SOURCES:%.c=%.o) $(ASM_ARM_SOURCE:%.S=%.o)
+THUMB_OBJECTS = $(THUMB_SOURCES:%.c=%.o) $(THUMB_ARM_SOURCE:%.S=%.o)
+OBJECTS = $(ARM_OBJECTS) $(THUMB_OBJECTS)
+
+all: bin
+
+elf: $(TARGET).elf
+bin: $(TARGET).bin
+sym: $(TARGET).sym
+lst: $(TARGET).lst
+
+$(TARGET).elf: THUMB = -mthumb
+$(TARGET).elf: $(OBJECTS) $(LDSCRIPT)
+ $(LINK.c) $(OBJECTS) $(LOADLIBES) $(LDLIBS) -o $@
+
+%.bin: %.elf
+ $(OBJCOPY) --pad-to=0x140000 --gap-fill=0xff -O binary $< $@
+
+%.sym: %.elf
+ $(OBJDUMP) -h -t $< > $@
+
+%.lst: %.elf
+ $(OBJDUMP) -S $< > $@
+
+$(THUMB_OBJECTS): THUMB = -mthumb
+
+-include $(OBJECTS:%.o=%.d)
+
+LAST_CUSTOM_FIRMWAREVERSION=none
+-include version.mak
+ifneq ($(LAST_CUSTOM_FIRMWAREVERSION),$(CUSTOM_FIRMWAREVERSION))
+.PHONY: version.mak
+version.mak:
+ echo "LAST_CUSTOM_FIRMWAREVERSION = $(CUSTOM_FIRMWAREVERSION)" > $@
+endif
+
+c_ui.o: version.mak
+
+program: $(TARGET).bin
+ $(FWFLASH) $(TARGET).bin
+
+clean:
+ rm -f $(TARGET).elf $(TARGET).bin $(TARGET).sym $(TARGET).lst \
+ $(OBJECTS) $(OBJECTS:%.o=%.d) version.mak
diff --git a/AT91SAM7S256/SAM7S256/gcc/lib/errno.c b/AT91SAM7S256/SAM7S256/gcc/lib/errno.c
new file mode 100644
index 0000000..3eb52ac
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/lib/errno.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2010 Nicolas Schodet
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/* This is needed for libm. Provide a non thread safe errno. */
+
+static int __the_errno;
+
+int *
+__errno (void)
+{
+ return &__the_errno;
+}
+
diff --git a/AT91SAM7S256/SAM7S256/gcc/lib/sbrk.c b/AT91SAM7S256/SAM7S256/gcc/lib/sbrk.c
new file mode 100644
index 0000000..317a94b
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/lib/sbrk.c
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2010 Nicolas Schodet
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/* The newlib sprintf use dynamic allocation for floating point. Therefore,
+ * the sbrk syscall should be provided.
+ *
+ * This works by taking memory above BSS and below stack. There is no
+ * collision detection as it whould not known what to do then. */
+
+extern char _end;
+
+void *
+_sbrk (int incr)
+{
+ static char *heap = 0;
+ char *base;
+ /* Initialise if first call. */
+ if (heap == 0)
+ heap = &_end;
+ /* Increment and return old heap base. */
+ base = heap;
+ heap += incr;
+ return base;
+}
+
diff --git a/AT91SAM7S256/SAM7S256/gcc/lib/sscanf.c b/AT91SAM7S256/SAM7S256/gcc/lib/sscanf.c
new file mode 100644
index 0000000..a4f5e64
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/lib/sscanf.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2010 Nicolas Schodet
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/* NXT source code is using sscanf to parse a float. Newlib sscanf will pull
+ * too many code, so here is a stub which implement just what is used. */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+
+int
+sscanf (const char *str, const char *fmt, ...)
+{
+ va_list ap;
+ float *f;
+ char *tailptr;
+ /* Only support use in NXT source code. */
+ if (fmt[0] != '%' || fmt[1] != 'f' || fmt[2] != '\0')
+ return 0;
+ /* Retrieve float pointer. */
+ va_start (ap, fmt);
+ f = va_arg (ap, float *);
+ va_end (ap);
+ /* Parse using the nice strtod. */
+ *f = strtod (str, &tailptr);
+ if (str == tailptr)
+ return 0;
+ else
+ return 1;
+}
+
diff --git a/AT91SAM7S256/SAM7S256/gcc/lib/strtod.c b/AT91SAM7S256/SAM7S256/gcc/lib/strtod.c
new file mode 100644
index 0000000..49d02a2
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/lib/strtod.c
@@ -0,0 +1,257 @@
+/*
+ * strtod.c --
+ *
+ * Source code for the "strtod" library procedure.
+ *
+ * Copyright (c) 1988-1993 The Regents of the University of California.
+ * Copyright (c) 1994 Sun Microsystems, Inc.
+ *
+ * Permission to use, copy, modify, and distribute this
+ * software and its documentation for any purpose and without
+ * fee is hereby granted, provided that the above copyright
+ * notice appear in all copies. The University of California
+ * makes no representations about the suitability of this
+ * software for any purpose. It is provided "as is" without
+ * express or implied warranty.
+ */
+
+#include <stdlib.h>
+#include <ctype.h>
+#include <errno.h>
+
+#ifndef TRUE
+#define TRUE 1
+#define FALSE 0
+#endif
+#ifndef NULL
+#define NULL 0
+#endif
+
+static int maxExponent = 511; /* Largest possible base 10 exponent. Any
+ * exponent larger than this will already
+ * produce underflow or overflow, so there's
+ * no need to worry about additional digits.
+ */
+static double powersOf10[] = { /* Table giving binary powers of 10. Entry */
+ 10., /* is 10^2^i. Used to convert decimal */
+ 100., /* exponents into floating-point numbers. */
+ 1.0e4,
+ 1.0e8,
+ 1.0e16,
+ 1.0e32,
+ 1.0e64,
+ 1.0e128,
+ 1.0e256
+};
+
+/*
+ *----------------------------------------------------------------------
+ *
+ * strtod --
+ *
+ * This procedure converts a floating-point number from an ASCII
+ * decimal representation to internal double-precision format.
+ *
+ * Results:
+ * The return value is the double-precision floating-point
+ * representation of the characters in string. If endPtr isn't
+ * NULL, then *endPtr is filled in with the address of the
+ * next character after the last one that was part of the
+ * floating-point number.
+ *
+ * Side effects:
+ * None.
+ *
+ *----------------------------------------------------------------------
+ */
+
+double
+strtod(string, endPtr)
+ const char *string; /* A decimal ASCII floating-point number,
+ * optionally preceded by white space.
+ * Must have form "-I.FE-X", where I is the
+ * integer part of the mantissa, F is the
+ * fractional part of the mantissa, and X
+ * is the exponent. Either of the signs
+ * may be "+", "-", or omitted. Either I
+ * or F may be omitted, or both. The decimal
+ * point isn't necessary unless F is present.
+ * The "E" may actually be an "e". E and X
+ * may both be omitted (but not just one).
+ */
+ char **endPtr; /* If non-NULL, store terminating character's
+ * address here. */
+{
+ int sign, expSign = FALSE;
+ double fraction, dblExp, *d;
+ register const char *p;
+ register int c;
+ int exp = 0; /* Exponent read from "EX" field. */
+ int fracExp = 0; /* Exponent that derives from the fractional
+ * part. Under normal circumstatnces, it is
+ * the negative of the number of digits in F.
+ * However, if I is very long, the last digits
+ * of I get dropped (otherwise a long I with a
+ * large negative exponent could cause an
+ * unnecessary overflow on I alone). In this
+ * case, fracExp is incremented one for each
+ * dropped digit. */
+ int mantSize; /* Number of digits in mantissa. */
+ int decPt; /* Number of mantissa digits BEFORE decimal
+ * point. */
+ const char *pExp; /* Temporarily holds location of exponent
+ * in string. */
+
+ /*
+ * Strip off leading blanks and check for a sign.
+ */
+
+ p = string;
+ while (isspace(*p)) {
+ p += 1;
+ }
+ if (*p == '-') {
+ sign = TRUE;
+ p += 1;
+ } else {
+ if (*p == '+') {
+ p += 1;
+ }
+ sign = FALSE;
+ }
+
+ /*
+ * Count the number of digits in the mantissa (including the decimal
+ * point), and also locate the decimal point.
+ */
+
+ decPt = -1;
+ for (mantSize = 0; ; mantSize += 1)
+ {
+ c = *p;
+ if (!isdigit(c)) {
+ if ((c != '.') || (decPt >= 0)) {
+ break;
+ }
+ decPt = mantSize;
+ }
+ p += 1;
+ }
+
+ /*
+ * Now suck up the digits in the mantissa. Use two integers to
+ * collect 9 digits each (this is faster than using floating-point).
+ * If the mantissa has more than 18 digits, ignore the extras, since
+ * they can't affect the value anyway.
+ */
+
+ pExp = p;
+ p -= mantSize;
+ if (decPt < 0) {
+ decPt = mantSize;
+ } else {
+ mantSize -= 1; /* One of the digits was the point. */
+ }
+ if (mantSize > 18) {
+ fracExp = decPt - 18;
+ mantSize = 18;
+ } else {
+ fracExp = decPt - mantSize;
+ }
+ if (mantSize == 0) {
+ fraction = 0.0;
+ p = string;
+ goto done;
+ } else {
+ int frac1, frac2;
+ frac1 = 0;
+ for ( ; mantSize > 9; mantSize -= 1)
+ {
+ c = *p;
+ p += 1;
+ if (c == '.') {
+ c = *p;
+ p += 1;
+ }
+ frac1 = 10*frac1 + (c - '0');
+ }
+ frac2 = 0;
+ for (; mantSize > 0; mantSize -= 1)
+ {
+ c = *p;
+ p += 1;
+ if (c == '.') {
+ c = *p;
+ p += 1;
+ }
+ frac2 = 10*frac2 + (c - '0');
+ }
+ fraction = (1.0e9 * frac1) + frac2;
+ }
+
+ /*
+ * Skim off the exponent.
+ */
+
+ p = pExp;
+ if ((*p == 'E') || (*p == 'e')) {
+ p += 1;
+ if (*p == '-') {
+ expSign = TRUE;
+ p += 1;
+ } else {
+ if (*p == '+') {
+ p += 1;
+ }
+ expSign = FALSE;
+ }
+ while (isdigit(*p)) {
+ exp = exp * 10 + (*p - '0');
+ p += 1;
+ }
+ }
+ if (expSign) {
+ exp = fracExp - exp;
+ } else {
+ exp = fracExp + exp;
+ }
+
+ /*
+ * Generate a floating-point number that represents the exponent.
+ * Do this by processing the exponent one bit at a time to combine
+ * many powers of 2 of 10. Then combine the exponent with the
+ * fraction.
+ */
+
+ if (exp < 0) {
+ expSign = TRUE;
+ exp = -exp;
+ } else {
+ expSign = FALSE;
+ }
+ if (exp > maxExponent) {
+ exp = maxExponent;
+ errno = ERANGE;
+ }
+ dblExp = 1.0;
+ for (d = powersOf10; exp != 0; exp >>= 1, d += 1) {
+ if (exp & 01) {
+ dblExp *= *d;
+ }
+ }
+ if (expSign) {
+ fraction /= dblExp;
+ } else {
+ fraction *= dblExp;
+ }
+
+done:
+ if (endPtr != NULL) {
+ *endPtr = (char *) p;
+ }
+
+ if (sign) {
+ return -fraction;
+ }
+ return fraction;
+}
diff --git a/AT91SAM7S256/SAM7S256/gcc/nxt.ld b/AT91SAM7S256/SAM7S256/gcc/nxt.ld
new file mode 100644
index 0000000..8e5f0cb
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/gcc/nxt.ld
@@ -0,0 +1,136 @@
+
+MEMORY
+{
+ CODE (rx) : ORIGIN = 0x00100000, LENGTH = 256k
+ DATA (rwx) : ORIGIN = 0x00200000, LENGTH = 64k
+}
+
+__FIRST_IN_RAM = ORIGIN(DATA);
+__TOP_STACK = ORIGIN(DATA) + LENGTH(DATA);
+
+/* Section Definitions */
+
+SECTIONS
+{
+ /* first section is .text which is used for code */
+ . = ORIGIN(CODE);
+
+ .text :
+ {
+ KEEP(*(.vectorg))
+ . = ALIGN(4);
+ KEEP(*(.init))
+ *(.text .text.*) /* remaining code */
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.gcc_except_table)
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata.*)
+ *(.gnu.linkonce.r.*)
+ . = ALIGN(4);
+ } >CODE
+
+ . = ALIGN(4);
+
+ /* .ctors .dtors are used for c++ constructors/destructors */
+
+ .ctors :
+ {
+ PROVIDE(__ctors_start__ = .);
+ KEEP(*(SORT(.ctors.*)))
+ KEEP(*(.ctors))
+ PROVIDE(__ctors_end__ = .);
+ } >CODE
+
+ .dtors :
+ {
+ PROVIDE(__dtors_start__ = .);
+ KEEP(*(SORT(.dtors.*)))
+ KEEP(*(.dtors))
+ PROVIDE(__dtors_end__ = .);
+ } >CODE
+
+ . = ALIGN(4);
+
+ _etext = . ;
+ PROVIDE (etext = .);
+
+ /* .data section which is used for initialized data */
+ .data : AT (_etext)
+ {
+ _data = . ;
+ KEEP(*(.vectmapped))
+ . = ALIGN(4);
+ *(.fastrun .fastrun.*)
+ . = ALIGN(4);
+ SORT(CONSTRUCTORS)
+ . = ALIGN(4);
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d.*)
+ . = ALIGN(4);
+ } >DATA
+
+ . = ALIGN(4);
+
+ _edata = . ;
+ PROVIDE (edata = .);
+
+ __STARTOFUSERFLASH_FROM_LINKER =
+ ALIGN (LOADADDR (.data) + SIZEOF (.data), 0x100);
+
+ /* .bss section which is used for uninitialized data */
+ .bss (NOLOAD) :
+ {
+ __bss_start = . ;
+ __bss_start__ = . ;
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ } >DATA
+
+ . = ALIGN(4);
+
+ __bss_end__ = . ;
+
+ _end = .;
+ PROVIDE (end = .);
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+
+}