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-rw-r--r--AT91SAM7S256/SAM7S256/Tools/AT91SAM7S256.i7938
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/LMS_ARM.dep2453
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewd1354
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewp2538
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/LMS_ARM.eww10
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/SAM7.mac178
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_NoRemap.xcl138
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_Remap.xcl143
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/at91SAM7S64_NoRemap.xcl139
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/ioat91sam7s256.ddf1577
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dbgdt54
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dni19
-rw-r--r--AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.wsdt80
13 files changed, 8721 insertions, 0 deletions
diff --git a/AT91SAM7S256/SAM7S256/Tools/AT91SAM7S256.i79 b/AT91SAM7S256/SAM7S256/Tools/AT91SAM7S256.i79
new file mode 100644
index 0000000..16df94d
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/AT91SAM7S256.i79
@@ -0,0 +1,38 @@
+[FILEFORMAT]
+rev=1.0
+
+
+[CHIP]
+//Chip name
+name=AT91SAM7S256
+
+//What endian modes does the chip support? (littleonly, bigonly, both(default))
+endiansupport=
+
+//Does the chip support the thumb instruction set? (true(default), false)
+thumbsupport=
+
+//Does the chip have an FPU coprocessor?
+//(VFPv1,VFPv2,VFP9-S,MaverickCrunch,None(default)
+fpu=
+
+
+[CORE]
+//Name of the ARM processor core
+name=ARM7TDMI
+
+
+[DDF FILE]
+//Name of the ddf file
+name=ioat91sam7s256.ddf
+
+
+[XCL FILE]
+//Name of the linker config file
+name=
+
+[FLASH LOADER]
+name=$TOOLKIT_DIR$\config\flashloader\Atmel\FlashAT91SAM7Sxx.d79
+args=
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.dep b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.dep
new file mode 100644
index 0000000..6f4e5e9
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.dep
@@ -0,0 +1,2453 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>Bin Output</name>
+ <file>
+ <name>[ROOT_NODE]</name>
+ <outputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\Bin Output\List\LMS_ARM.map</file>
+ <file>$PROJ_DIR$\Bin Output\Exe\LMS_ARM.d79</file>
+ <file>$PROJ_DIR$\Bin Output\Exe\LMS_ARM.a79</file>
+ <file>$PROJ_DIR$\..\Object\LMS_ARM.d79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\Bin Output\Exe\LMS_ARM.d79</name>
+ <outputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\Bin Output\List\LMS_ARM.map</file>
+ <file>$PROJ_DIR$\Bin Output\Exe\LMS_ARM.a79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\at91SAM7S256_Remap.xcl</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\Cstartup.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\Cstartup_SAM7.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_button.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_cmd.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_comm.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_display.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_input.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_ioctrl.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_led.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_loader.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_lowspeed.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_output.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_sound.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\c_ui.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_bt.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_button.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_display.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_hispeed.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_input.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_ioctrl.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_led.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_loader.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_lowspeed.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_output.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_sound.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_timer.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\d_usb.r79</file>
+ <file>$PROJ_DIR$\Bin Output\Obj\m_sched.r79</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_led.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_led.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ui.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_ui.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\ctype.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtls.h</file>
+ <file>$TOOLKIT_DIR$\inc\xmtx.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocaleuse.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale_c.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtinfo.h</file>
+ <file>$TOOLKIT_DIR$\inc\time.h</file>
+ <file>$TOOLKIT_DIR$\inc\wchar.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\Display.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\LowBattery.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Startup.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Font.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Status.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Functions.inc</file>
+ <file>$PROJ_DIR$\..\..\Source\Test1.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Test2.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Running.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\BtTest.inc</file>
+ <file>$PROJ_DIR$\..\..\Source\Mainmenu.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu01.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu02.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu03.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu04.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu05.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu06.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu07.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu10.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu11.rms</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_display.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_display.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_input.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_input.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ioctrl.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_ioctrl.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_loader.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_loader.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_lowspeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_lowspeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_output.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_output.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_sound.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_sound.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup.s79</name>
+ <outputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\..\Object\Cstartup.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S256_inc.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup_SAM7.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\Cstartup_SAM7.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S256.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_bt.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_bt.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_usb.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_usb.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_button.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_button.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_display.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_display.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_hispeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_hispeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_input.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_input.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_input.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_button.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_button.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_ioctrl.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_ioctrl.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_loader.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_loader.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_loader.r</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\ctype.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtls.h</file>
+ <file>$TOOLKIT_DIR$\inc\xmtx.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocaleuse.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale_c.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtinfo.h</file>
+ <file>$TOOLKIT_DIR$\inc\time.h</file>
+ <file>$TOOLKIT_DIR$\inc\wchar.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_lowspeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_lowspeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_output.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_output.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_output.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_sound.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_sound.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_timer.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_timer.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_led.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_led.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\m_sched.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\m_sched.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.c</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_cmd.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_cmd.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd_bytecodes.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_comm.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_comm.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\ctype.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtls.h</file>
+ <file>$TOOLKIT_DIR$\inc\xmtx.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocaleuse.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale_c.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtinfo.h</file>
+ <file>$TOOLKIT_DIR$\inc\time.h</file>
+ <file>$TOOLKIT_DIR$\inc\wchar.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <forcedrebuild>
+ <name>[MULTI_TOOL]</name>
+ <tool>XLINK</tool>
+ </forcedrebuild>
+ <forcedrebuild>
+ <name>[REBUILD_ALL]</name>
+ </forcedrebuild>
+ </configuration>
+ <configuration>
+ <name>Flash Debug</name>
+ <file>
+ <name>[ROOT_NODE]</name>
+ <outputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\..\Object\LMS_ARM.map</file>
+ <file>$PROJ_DIR$\..\Object\LMS_ARM.sim</file>
+ <file>$PROJ_DIR$\..\Object\LMS_ARM.d79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Object\LMS_ARM.d79</name>
+ <outputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\..\Object\LMS_ARM.map</file>
+ <file>$PROJ_DIR$\..\Object\LMS_ARM.sim</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\at91SAM7S256_Remap.xcl</file>
+ <file>$PROJ_DIR$\..\Object\Cstartup.r79</file>
+ <file>$PROJ_DIR$\..\Object\Cstartup_SAM7.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_button.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_cmd.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_comm.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_display.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_input.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_ioctrl.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_loader.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_lowspeed.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_output.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_sound.r79</file>
+ <file>$PROJ_DIR$\..\Object\c_ui.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_bt.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_button.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_display.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_hispeed.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_input.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_ioctrl.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_loader.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_lowspeed.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_output.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_sound.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_timer.r79</file>
+ <file>$PROJ_DIR$\..\Object\d_usb.r79</file>
+ <file>$PROJ_DIR$\..\Object\m_sched.r79</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_led.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_led.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ui.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_ui.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\ctype.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtls.h</file>
+ <file>$TOOLKIT_DIR$\inc\xmtx.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocaleuse.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale_c.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtinfo.h</file>
+ <file>$TOOLKIT_DIR$\inc\time.h</file>
+ <file>$TOOLKIT_DIR$\inc\wchar.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\Display.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\LowBattery.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Font.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Step.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Cursor.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Incomming.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Running.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Port.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Ok.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_1.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_2.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_3.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_4.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_5.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_6.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_7.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_8.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_9.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_10.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_11.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_12.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_13.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_14.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_15.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\RCXintro_16.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Status.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Ui.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Mainmenu.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu01.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu02.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu03.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu04.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu05.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu06.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu07.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Submenu10.rms</file>
+ <file>$PROJ_DIR$\..\..\Source\Functions.inl</file>
+ <file>$PROJ_DIR$\..\..\Source\BtTest.inc</file>
+ <file>$PROJ_DIR$\..\..\Source\Test1.txt</file>
+ <file>$PROJ_DIR$\..\..\Source\Test2.txt</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_display.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_display.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_input.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_input.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ioctrl.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_ioctrl.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_loader.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_loader.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_lowspeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_lowspeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_output.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_output.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdbool.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_sound.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_sound.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup.s79</name>
+ <outputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\..\Object\Cstartup.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S256_inc.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup_SAM7.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\Cstartup_SAM7.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S256.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_bt.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_bt.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_usb.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_usb.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_button.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_button.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_display.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_display.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_hispeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_hispeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_input.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_input.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_input.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_button.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_button.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_ioctrl.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_ioctrl.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_loader.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_loader.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_loader.r</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\ctype.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtls.h</file>
+ <file>$TOOLKIT_DIR$\inc\xmtx.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocaleuse.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale_c.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtinfo.h</file>
+ <file>$TOOLKIT_DIR$\inc\time.h</file>
+ <file>$TOOLKIT_DIR$\inc\wchar.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_lowspeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_lowspeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_output.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_output.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_output.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_sound.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_sound.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_timer.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_timer.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_led.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_led.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\m_sched.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\m_sched.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.c</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_cmd.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_cmd.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_output.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_input.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd_bytecodes.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd_drawing.inc</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\src\main.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\main.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\SrcIAR\Board.h</file>
+ <file>$PROJ_DIR$\..\..\include\AT91SAM7S64.h</file>
+ <file>$PROJ_DIR$\..\..\include\lib_AT91SAM7S64.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_avrcomm.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_avrcomm.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_avrcomm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_avrcomm.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\SrcIAR\Cstartup.s79</name>
+ <outputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\Cstartup.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\..\..\include\AT91SAM7S64_inc.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\main.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\main.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Include\Board.h</file>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S64.h</file>
+ <file>$PROJ_DIR$\..\Include\lib_AT91SAM7S64.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_hispeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_hispeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_hispeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_net.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_net.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_net.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_net.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_avrcomm.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_avrcomm.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_avrcomm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_avrcomm.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\SrcIAR\Cstartup_SAM7.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\Cstartup_SAM7.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\SrcIAR\Board.h</file>
+ <file>$PROJ_DIR$\..\..\include\AT91SAM7S64.h</file>
+ <file>$PROJ_DIR$\..\..\include\lib_AT91SAM7S64.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_bt.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_bt.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_bt.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_bt.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_usb.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_usb.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_usb.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_net.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_net.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_net.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_net.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_motor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_motor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_motor.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_motor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_motor.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\Flash_Debug\Exe\Basic.d79</name>
+ <inputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\at91SAM7S64_NoRemap.xcl</file>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\Cstartup.r79</file>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\Cstartup_SAM7.r79</file>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\main.r79</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_sensor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_sensor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sensor.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sensor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sensor.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_motor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_motor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_motor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_motor.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_sensor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\d_sensor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sensor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sensor.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\Flash_Debug\Exe\LMS_ARM.d79</name>
+ <inputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\at91SAM7S64_NoRemap.xcl</file>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\Cstartup.r79</file>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\Cstartup_SAM7.r79</file>
+ <file>$PROJ_DIR$\Flash_Debug\Obj\main.r79</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_comm.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Object\c_comm.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ui.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ <file>$TOOLKIT_DIR$\inc\string.h</file>
+ <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+ <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+ <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+ <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+ <file>$TOOLKIT_DIR$\inc\ctype.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtls.h</file>
+ <file>$TOOLKIT_DIR$\inc\xmtx.h</file>
+ <file>$TOOLKIT_DIR$\inc\stdlib.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocaleuse.h</file>
+ <file>$TOOLKIT_DIR$\inc\xlocale_c.h</file>
+ <file>$TOOLKIT_DIR$\inc\xtinfo.h</file>
+ <file>$TOOLKIT_DIR$\inc\time.h</file>
+ <file>$TOOLKIT_DIR$\inc\wchar.h</file>
+ </tool>
+ </inputs>
+ </file>
+ </configuration>
+ <configuration>
+ <name>RAM_Debug</name>
+ <file>
+ <name>[ROOT_NODE]</name>
+ <outputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\RAM_Debug\List\LMS_ARM.map</file>
+ <file>$PROJ_DIR$\RAM_Debug\Exe\LMS_ARM.d79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\sam7s256.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\sam7s256.r79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_led.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_led.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_display.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_display.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ioctrl.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_ioctrl.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_loader.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_loader.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_lowspeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_lowspeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_sound.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_sound.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup.s79</name>
+ <outputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S64_inc.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup_SAM7.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup_SAM7.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\Include\Board.h</file>
+ <file>$PROJ_DIR$\..\Include\AT91SAM7S64.h</file>
+ <file>$PROJ_DIR$\..\Include\lib_AT91SAM7S64.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_bt.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_bt.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_usb.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_usb.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_button.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_button.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_display.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_display.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_display.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_hispeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_hispeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_button.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_button.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\d_button.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_ioctrl.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_ioctrl.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_ioctrl.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_lowspeed.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_lowspeed.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_lowspeed.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_sound.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_sound.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sound.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_timer.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_timer.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_led.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_led.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_led.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\m_sched.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\m_sched.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.c</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sensor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_button.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_loader.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sound.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_display.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_lowspeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_motor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_ioctrl.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_cmd.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_cmd.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_led.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_cmd.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_timer.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\src\main.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\main.r79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\SrcIAR\Cstartup.s79</name>
+ <outputs>
+ <tool>
+ <name>AARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup.r79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\main.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\main.r79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\SrcIAR\Cstartup_SAM7.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup_SAM7.r79</file>
+ </tool>
+ </outputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_motor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_motor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_motor.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_motor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_motor.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_sensor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_sensor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sensor.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_sensor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sensor.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_motor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_motor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_motor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_motor.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_sensor.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_sensor.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\m_sched.h</file>
+ <file>$PROJ_DIR$\..\Include\sam7s256.h</file>
+ <file>$PROJ_DIR$\..\Include\ioat91sam7s64.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sensor.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_sensor.r</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\RAM_Debug\Exe\LMS_ARM.d79</name>
+ <outputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\RAM_Debug\List\LMS_ARM.map</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>XLINK</name>
+ <file>$PROJ_DIR$\at91SAM7S64_16KRAM.xcl</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup_SAM7.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_button.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_cmd.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_comm.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_display.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_ioctrl.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_led.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_loader.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_lowspeed.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_motor.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_sensor.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_sound.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_bt.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_button.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_display.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_hispeed.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_ioctrl.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_led.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_lowspeed.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_motor.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_sensor.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_sound.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_timer.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\d_usb.r79</file>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\m_sched.r79</file>
+ <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+ </tool>
+ </inputs>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_comm.c</name>
+ <outputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\RAM_Debug\Obj\c_comm.r79</file>
+ </tool>
+ </outputs>
+ <inputs>
+ <tool>
+ <name>ICCARM</name>
+ <file>$PROJ_DIR$\..\..\Source\stdconst.h</file>
+ <file>$PROJ_DIR$\..\..\Source\modules.h</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.iom</file>
+ <file>$PROJ_DIR$\..\..\Source\c_comm.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_usb.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_hispeed.h</file>
+ <file>$PROJ_DIR$\..\..\Source\d_bt.h</file>
+ </tool>
+ </inputs>
+ </file>
+ <forcedrebuild>
+ <name>[MULTI_TOOL]</name>
+ <tool>XLINK</tool>
+ </forcedrebuild>
+ </configuration>
+</project>
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewd b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewd
new file mode 100644
index 0000000..edb35bb
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewd
@@ -0,0 +1,1354 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>RAM_Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>12</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCVariant</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacFile</name>
+ <state>$PROJ_DIR$\resource\SAM7_RAM.mac</state>
+ </option>
+ <option>
+ <name>MemOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$TOOLKIT_DIR$\CONFIG\ioat91sam7s64.ddf</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadVerifyAll</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoader</name>
+ <state>$TOOLKIT_DIR$\config\flashloader\Atmel\FlashAT91SAM7Sx.d79</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoaderSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCProductVersion</name>
+ <state>4.10B</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>JLINK_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>4.11B</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoaderArgs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadFlashBaseAddrOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashBaseAddr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadAttachToProgram</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ANGEL_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCAngelHeartbeat</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommunication</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommBaud</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CAngelCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ANGELTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoAngelLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AngelLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARROM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRomLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CRomCommunication</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommBaud</name>
+ <version>0</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>30</state>
+ </option>
+ <option>
+ <name>CCJLinkHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTRSTReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>32</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>MACRAIGOR_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>jtag</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuSpeed</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>DoEmuMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuMultiTarget</name>
+ <state>0@ARM7TDMI</state>
+ </option>
+ <option>
+ <name>EmuHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CEmuCommBaud</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>CEmuCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>jtago</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UnusedAddr</name>
+ <state>0x00800000</state>
+ </option>
+ <option>
+ <name>CCMacraigorHWResetDelay</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>RDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRDIDriverDll</name>
+ <state>Browse to your RDI driver</state>
+ </option>
+ <option>
+ <name>CRDILogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRDILogFileEdit</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCRDIHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDIUseETM</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>Browse to your third-party driver</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Trace\Trace.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+ <configuration>
+ <name>Flash Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>12</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCVariant</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacFile</name>
+ <state>$PROJ_DIR$\SAM7.mac</state>
+ </option>
+ <option>
+ <name>MemOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$PROJ_DIR$\ioat91sam7s256.ddf</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadVerifyAll</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashDownload</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoader</name>
+ <state>$TOOLKIT_DIR$\config\flashloader\Atmel\FlashAT91SAM7Sxx.d79</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoaderSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCProductVersion</name>
+ <state>4.10B</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>JLINK_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>4.20A</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoaderArgs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadFlashBaseAddrOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashBaseAddr</name>
+ <state>0x00100000</state>
+ </option>
+ <option>
+ <name>OCDownloadAttachToProgram</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ANGEL_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCAngelHeartbeat</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommunication</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommBaud</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CAngelCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ANGELTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoAngelLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AngelLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARROM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRomLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CRomCommunication</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommBaud</name>
+ <version>0</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>30</state>
+ </option>
+ <option>
+ <name>CCJLinkHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTRSTReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>32</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>MACRAIGOR_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>jtag</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuSpeed</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>DoEmuMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuMultiTarget</name>
+ <state>0@ARM7TDMI</state>
+ </option>
+ <option>
+ <name>EmuHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CEmuCommBaud</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>CEmuCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>jtago</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UnusedAddr</name>
+ <state>0x00800000</state>
+ </option>
+ <option>
+ <name>CCMacraigorHWResetDelay</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>RDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRDIDriverDll</name>
+ <state>Browse to your RDI driver</state>
+ </option>
+ <option>
+ <name>CRDILogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRDILogFileEdit</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCRDIHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDIUseETM</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>Browse to your third-party driver</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Trace\Trace.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+ <configuration>
+ <name>Bin Output</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>C-SPY</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>12</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CInput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCVariant</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacFile</name>
+ <state>$PROJ_DIR$\SAM7.mac</state>
+ </option>
+ <option>
+ <name>MemOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MemFile</name>
+ <state>$PROJ_DIR$\ioat91sam7s256.ddf</state>
+ </option>
+ <option>
+ <name>RunToEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RunToName</name>
+ <state>main</state>
+ </option>
+ <option>
+ <name>CExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDDFArgumentProducer</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadSuppressDownload</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadVerifyAll</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashDownload</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoader</name>
+ <state>$TOOLKIT_DIR$\config\flashloader\Atmel\FlashAT91SAM7Sxx.d79</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoaderSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCProductVersion</name>
+ <state>4.10B</state>
+ </option>
+ <option>
+ <name>OCDynDriverList</name>
+ <state>JLINK_ID</state>
+ </option>
+ <option>
+ <name>OCLastSavedByProductVersion</name>
+ <state>4.20A</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashLoaderArgs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>OCDownloadFlashBaseAddrOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OCDownloadFlashBaseAddr</name>
+ <state>0x00100000</state>
+ </option>
+ <option>
+ <name>OCDownloadAttachToProgram</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ARMSIM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>OCSimDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ANGEL_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCAngelHeartbeat</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommunication</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CAngelCommBaud</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CAngelCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ANGELTCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoAngelLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AngelLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>IARROM_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRomLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CRomCommunication</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRomCommBaud</name>
+ <version>0</version>
+ <state>7</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>JLINK_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>JLinkSpeed</name>
+ <state>30</state>
+ </option>
+ <option>
+ <name>CCJLinkHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkTRSTReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDoJlinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkDoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCJLinkLogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCJLinkHWResetDelay</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCJLinkSpeedRadio</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>JLinkInitialSpeed</name>
+ <state>32</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>MACRAIGOR_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>jtag</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuSpeed</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>TCPIP</name>
+ <state>aaa.bbb.ccc.ddd</state>
+ </option>
+ <option>
+ <name>DoLogfile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>LogFile</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>DoEmuMultiTarget</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>EmuMultiTarget</name>
+ <state>0@ARM7TDMI</state>
+ </option>
+ <option>
+ <name>EmuHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CEmuCommBaud</name>
+ <version>0</version>
+ <state>4</state>
+ </option>
+ <option>
+ <name>CEmuCommPort</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>jtago</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UnusedAddr</name>
+ <state>0x00800000</state>
+ </option>
+ <option>
+ <name>CCMacraigorHWResetDelay</name>
+ <state></state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>RDI_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>1</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CRDIDriverDll</name>
+ <state>Browse to your RDI driver</state>
+ </option>
+ <option>
+ <name>CRDILogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CRDILogFileEdit</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>CCRDIHWReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchReset</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchUndef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchSWI</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchData</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchPrefetch</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchIRQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDICatchFIQ</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCRDIUseETM</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>THIRDPARTY_ID</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CThirdPartyDriverDll</name>
+ <state>Browse to your third-party driver</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CThirdPartyLogFileEditB</name>
+ <state>$TOOLKIT_DIR$\cspycomm.log</state>
+ </option>
+ <option>
+ <name>OCDriverInfo</name>
+ <state>1</state>
+ </option>
+ </data>
+ </settings>
+ <debuggerPlugins>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$EW_DIR$\common\plugins\Trace\Trace.ewplugin</file>
+ <loadFlag>1</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ <plugin>
+ <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>
+ <loadFlag>0</loadFlag>
+ </plugin>
+ </debuggerPlugins>
+ </configuration>
+</project>
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewp b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewp
new file mode 100644
index 0000000..9106c9f
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.ewp
@@ -0,0 +1,2538 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+ <fileVersion>1</fileVersion>
+ <configuration>
+ <name>RAM_Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>8</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>GProcessorMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ExePath</name>
+ <state>RAM_Debug\Exe</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>RAM_Debug\Obj</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>RAM_Debug\List</state>
+ </option>
+ <option>
+ <name>Variant</name>
+ <version>2</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GInterwork</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GStackAlign</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>Input variant</name>
+ <version>1</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Input description</name>
+ <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+ </option>
+ <option>
+ <name>Output variant</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>Output description</name>
+ <state>No specifier a, A, no specifier n, no float nor long long, no flags.</state>
+ </option>
+ <option>
+ <name>GOutputBinary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FPU</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OGCoreOrChip</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OGChipSelect</name>
+ <state>$TOOLKIT_DIR$\config\chip\Atmel\AT91SAM7S64.i79</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelect</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GRuntimeLibSelectSlave</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>RTDescription</name>
+ <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+ </option>
+ <option>
+ <name>RTConfigPath</name>
+ <state>$TOOLKIT_DIR$\LIB\dl4tptinl8n.h</state>
+ </option>
+ <option>
+ <name>RTLibraryPath</name>
+ <state>$TOOLKIT_DIR$\LIB\dl4tptinl8n.r79</state>
+ </option>
+ <option>
+ <name>OGProductVersion</name>
+ <state>4.10B</state>
+ </option>
+ <option>
+ <name>OGLastSavedByProductVersion</name>
+ <state>4.11B</state>
+ </option>
+ <option>
+ <name>GeneralMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>GeneralEnableMisra</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GeneralMisraVerbose</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>ICCARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>11</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>CCIncludePaths</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ <state>$PROJ_DIR$\srciar\</state>
+ <state>$PROJ_DIR$\..\..\</state>
+ </option>
+ <option>
+ <name>CCDefines</name>
+ <state>ESS</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptSizeSpeed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptimization</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>1111111</state>
+ </option>
+ <option>
+ <name>CCMakeLibraryModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCObjUseModuleName</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCObjModuleName</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessorMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IStackAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IInterwork</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.r79</state>
+ </option>
+ <option>
+ <name>CCLangSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptSizeSpeedSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptimizationSlave</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCCodeFunctions</name>
+ <state>CODE</state>
+ </option>
+ <option>
+ <name>CCData</name>
+ <state>DATA</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>5</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MakeLibrary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
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+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
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+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
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+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>UndefAsm</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefLine</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefTime</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefDate</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefTid</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefVer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AIncludes</name>
+ <state>$TOOLKIT_DIR$\INC\</state>
+ <state>$PROJ_DIR$\srciar\</state>
+ <state>$PROJ_DIR$\..\..\include\</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefLittleEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.r79</state>
+ </option>
+ <option>
+ <name>AMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>XLINK</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>17</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>XOutOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>LMS_ARM.d79</state>
+ </option>
+ <option>
+ <name>OutputFormat</name>
+ <version>10</version>
+ <state>16</state>
+ </option>
+ <option>
+ <name>FormatVariant</name>
+ <version>6</version>
+ <state>15</state>
+ </option>
+ <option>
+ <name>SecondaryOutputFile</name>
+ <state>(None for the selected format)</state>
+ </option>
+ <option>
+ <name>XDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AlwaysOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OverlapWarnings</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NoGlobalCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XList</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>SegmentMap</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ListSymbols</name>
+ <state>2</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>XIncludes</name>
+ <state>$TOOLKIT_DIR$\LIB\</state>
+ </option>
+ <option>
+ <name>ModuleStatus</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XclOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XclFile</name>
+ <state>$PROJ_DIR$\at91SAM7S64_16KRAM.xcl</state>
+ </option>
+ <option>
+ <name>XclFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlgo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
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+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
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+ <option>
+ <name>RangeCheckAlternatives</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>SuppressAllWarn</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>SuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>TreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>TreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ModuleLocalSym</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IncludeSuppressed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OXLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ModuleSummary</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>xcProgramEntryLabel</name>
+ <state>__program_start</state>
+ </option>
+ <option>
+ <name>DebugInformation</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RuntimeControl</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IoEmulation</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XcRTLibraryFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AllowExtraOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GenerateExtraOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XExtraOutOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ExtraOutputFile</name>
+ <state>LMS_ARM.a79</state>
+ </option>
+ <option>
+ <name>ExtraOutputFormat</name>
+ <version>10</version>
+ <state>23</state>
+ </option>
+ <option>
+ <name>ExtraFormatVariant</name>
+ <version>6</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>xcOverrideProgramEntryLabel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>xcProgramEntryLabelSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ListOutputFormat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>BufferedTermOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OverlaySystemMap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>RawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>RawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>RawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>XAR</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>XARInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>XAROverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XAROutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <configuration>
+ <name>Flash Debug</name>
+ <toolchain>
+ <name>ARM</name>
+ </toolchain>
+ <debug>1</debug>
+ <settings>
+ <name>General</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>8</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>GProcessorMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ExePath</name>
+ <state>..\Object</state>
+ </option>
+ <option>
+ <name>ObjPath</name>
+ <state>..\Object</state>
+ </option>
+ <option>
+ <name>ListPath</name>
+ <state>..\Object</state>
+ </option>
+ <option>
+ <name>Variant</name>
+ <version>2</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GEndianMode</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>GInterwork</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GStackAlign</name>
+ <state>0</state>
+ </option>
+ <option>
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+ <state>PROTOTYPE_PCB_4</state>
+ <state>NEW_MENU</state>
+ </option>
+ <option>
+ <name>CCPreprocFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocComments</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCPreprocLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMnemonics</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListCMessages</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssFile</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCListAssSource</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCEnableRemarks</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagSuppress</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagRemark</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagWarning</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDiagError</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptSizeSpeed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptimization</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCAllowList</name>
+ <version>1</version>
+ <state>1111111</state>
+ </option>
+ <option>
+ <name>CCMakeLibraryModule</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCObjUseModuleName</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCObjModuleName</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCDebugInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessorMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IEndianMode</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IStackAlign</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IInterwork</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>IExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CCLangConformance</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCSignedPlainChar</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCRequirePrototypes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCDiagWarnAreErr</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCCompilerRuntimeInfo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>$FILE_BNAME$.r79</state>
+ </option>
+ <option>
+ <name>CCLangSelect</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCLibConfigHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CCOptSizeSpeedSlave</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CCOptimizationSlave</name>
+ <version>0</version>
+ <state>3</state>
+ </option>
+ <option>
+ <name>CCCodeFunctions</name>
+ <state>CODE</state>
+ </option>
+ <option>
+ <name>CCData</name>
+ <state>DATA</state>
+ </option>
+ <option>
+ <name>PreInclude</name>
+ <state></state>
+ </option>
+ <option>
+ <name>CompilerMisraRules</name>
+ <version>0</version>
+ <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+ </option>
+ <option>
+ <name>CompilerMisraOverride</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>AARM</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>5</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>AObjPrefix</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ACaseSensitivity</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacroChars</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnEnable</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnWhat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AWarnOne</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange1</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AWarnRange2</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ADebug</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MakeLibrary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AltRegisterNames</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ADefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AList</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AListHeader</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AListing</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>Includes</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacDefs</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MacExps</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>MacExec</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OnlyAssed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>MultiLine</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>TabSpacing</name>
+ <state>8</state>
+ </option>
+ <option>
+ <name>AXRef</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDefines</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefInternal</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AXRefDual</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>UndefAsm</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefLine</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefTime</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefDate</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefTid</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefVer</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AIncludes</name>
+ <state>$PROJ_DIR$\..\..\include\</state>
+ </option>
+ <option>
+ <name>AProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>AExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AFpuProcessor</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>UndefLittleEndian</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AOutputFile</name>
+ <state>$FILE_BNAME$.r79</state>
+ </option>
+ <option>
+ <name>AMultibyteSupport</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>CUSTOM</name>
+ <archiveVersion>3</archiveVersion>
+ <data>
+ <extensions></extensions>
+ <cmdline></cmdline>
+ </data>
+ </settings>
+ <settings>
+ <name>BICOMP</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ <settings>
+ <name>BUILDACTION</name>
+ <archiveVersion>1</archiveVersion>
+ <data>
+ <prebuild></prebuild>
+ <postbuild></postbuild>
+ </data>
+ </settings>
+ <settings>
+ <name>XLINK</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>17</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>XOutOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OutputFile</name>
+ <state>LMS_ARM.d79</state>
+ </option>
+ <option>
+ <name>OutputFormat</name>
+ <version>10</version>
+ <state>16</state>
+ </option>
+ <option>
+ <name>FormatVariant</name>
+ <version>6</version>
+ <state>15</state>
+ </option>
+ <option>
+ <name>SecondaryOutputFile</name>
+ <state>(None for the selected format)</state>
+ </option>
+ <option>
+ <name>XDefines</name>
+ <state></state>
+ </option>
+ <option>
+ <name>AlwaysOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OverlapWarnings</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>NoGlobalCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XList</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>SegmentMap</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ListSymbols</name>
+ <state>2</state>
+ </option>
+ <option>
+ <name>PageLengthCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>PageLength</name>
+ <state>80</state>
+ </option>
+ <option>
+ <name>XIncludes</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ModuleStatus</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XclOverride</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XclFile</name>
+ <state>$PROJ_DIR$\at91SAM7S256_Remap.xcl</state>
+ </option>
+ <option>
+ <name>XclFileSlave</name>
+ <state></state>
+ </option>
+ <option>
+ <name>DoFill</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>FillerByte</name>
+ <state>0xFF</state>
+ </option>
+ <option>
+ <name>DoCrc</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcSize</name>
+ <version>0</version>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcAlgo</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>CrcPoly</name>
+ <state>0x11021</state>
+ </option>
+ <option>
+ <name>CrcCompl</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RangeCheckAlternatives</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>SuppressAllWarn</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>SuppressDiags</name>
+ <state></state>
+ </option>
+ <option>
+ <name>TreatAsWarn</name>
+ <state></state>
+ </option>
+ <option>
+ <name>TreatAsErr</name>
+ <state></state>
+ </option>
+ <option>
+ <name>ModuleLocalSym</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>CrcBitOrder</name>
+ <version>0</version>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XExtraOptionsCheck</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XExtraOptions</name>
+ <state></state>
+ </option>
+ <option>
+ <name>IncludeSuppressed</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OXLibIOConfig</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ModuleSummary</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>xcProgramEntryLabel</name>
+ <state>__program_start</state>
+ </option>
+ <option>
+ <name>DebugInformation</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RuntimeControl</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>IoEmulation</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XcRTLibraryFile</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>AllowExtraOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>GenerateExtraOutput</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>XExtraOutOverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>ExtraOutputFile</name>
+ <state>LMS_ARM.a79</state>
+ </option>
+ <option>
+ <name>ExtraOutputFormat</name>
+ <version>10</version>
+ <state>57</state>
+ </option>
+ <option>
+ <name>ExtraFormatVariant</name>
+ <version>6</version>
+ <state>2</state>
+ </option>
+ <option>
+ <name>xcOverrideProgramEntryLabel</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>xcProgramEntryLabelSelect</name>
+ <state>1</state>
+ </option>
+ <option>
+ <name>ListOutputFormat</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>BufferedTermOutput</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>OverlaySystemMap</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>RawBinaryFile</name>
+ <state></state>
+ </option>
+ <option>
+ <name>RawBinarySymbol</name>
+ <state></state>
+ </option>
+ <option>
+ <name>RawBinarySegment</name>
+ <state></state>
+ </option>
+ <option>
+ <name>RawBinaryAlign</name>
+ <state></state>
+ </option>
+ <option>
+ <name>XLinkMisraHandler</name>
+ <state>0</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>XAR</name>
+ <archiveVersion>2</archiveVersion>
+ <data>
+ <version>0</version>
+ <wantNonLocal>1</wantNonLocal>
+ <debug>1</debug>
+ <option>
+ <name>XARInputs</name>
+ <state></state>
+ </option>
+ <option>
+ <name>XAROverride</name>
+ <state>0</state>
+ </option>
+ <option>
+ <name>XAROutput</name>
+ <state>###Unitialized###</state>
+ </option>
+ </data>
+ </settings>
+ <settings>
+ <name>BILINK</name>
+ <archiveVersion>0</archiveVersion>
+ <data/>
+ </settings>
+ </configuration>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_button.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_cmd.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_comm.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_display.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_input.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ioctrl.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_loader.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_lowspeed.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_output.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_sound.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\c_ui.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup.s79</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\Include\Cstartup_SAM7.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_bt.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_button.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_display.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_hispeed.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_input.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_ioctrl.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_loader.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_lowspeed.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_output.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_sound.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_timer.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\d_usb.c</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\Functions.inl</name>
+ </file>
+ <file>
+ <name>$PROJ_DIR$\..\..\Source\m_sched.c</name>
+ </file>
+</project>
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.eww b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.eww
new file mode 100644
index 0000000..8c43a5a
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/LMS_ARM.eww
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+ <project>
+ <path>$WS_DIR$\LMS_ARM.ewp</path>
+ </project>
+ <batchBuild/>
+</workspace>
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/SAM7.mac b/AT91SAM7S256/SAM7S256/Tools/SAM7.mac
new file mode 100644
index 0000000..1177dc2
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/SAM7.mac
@@ -0,0 +1,178 @@
+// ---------------------------------------------------------
+// ATMEL Microcontroller Software Support - ROUSSET -
+// ---------------------------------------------------------
+// The software is delivered "AS IS" without warranty or
+// condition of any kind, either express, implied or
+// statutory. This includes without limitation any warranty
+// or condition with respect to merchantability or fitness
+// for any particular purpose, or against the infringements of
+// intellectual property rights of others.
+// ---------------------------------------------------------
+// File: SAM7.mac
+//
+// 1.0 08/Mar/04 JPP : Creation
+// 1.1 23/Mar/05 JPP : Change Variable name
+//
+// $Revision: 1.5 $
+//
+// ---------------------------------------------------------
+
+__var __mac_i;
+__var __mac_pt;
+
+execUserReset()
+{
+ CheckRemap();
+ ini();
+ AIC();
+ __message "-------------------------------Set Reset ----------------------------------------";
+ __writeMemory32(0x00000000,0xB4,"Register");
+}
+
+
+//-----------------------------------------------------------------------------
+// Watchdog
+//-------------------------------
+// Normally, the Watchdog is enable at the reset for load it's preferable to
+// Disable.
+//-----------------------------------------------------------------------------
+Watchdog()
+{
+//* Watchdog Disable
+// AT91C_BASE_WDTC->WDTC_WDMR= AT91C_WDTC_WDDIS;
+ __writeMemory32(0x00008000,0xFFFFFD44,"Memory");
+ __message "------------------------------- Watchdog Disable ----------------------------------------";
+}
+
+
+//-----------------------------------------------------------------------------
+// Check Remap
+//-------------
+//-----------------------------------------------------------------------------
+CheckRemap()
+{
+//* Read the value at 0x0
+ __mac_i =__readMemory32(0x00000000,"Memory");
+ __mac_i =__mac_i+1;
+ __writeMemory32(__mac_i,0x00,"Memory");
+ __mac_pt =__readMemory32(0x00000000,"Memory");
+
+ if (__mac_i == __mac_pt)
+ {
+ __message "------------------------------- The Remap is done ----------------------------------------";
+//* Toggel RESET The remap
+ __writeMemory32(0x00000001,0xFFFFFF00,"Memory");
+
+ } else {
+ __message "------------------------------- The Remap is NOT -----------------------------------------";
+ }
+
+}
+
+
+execUserSetup()
+{
+ ini();
+ __message "-------------------------------Set PC ----------------------------------------";
+ __writeMemory32(0x00000000,0xB4,"Register");
+}
+
+//-----------------------------------------------------------------------------
+// Reset the Interrupt Controller
+//-------------------------------
+// Normally, the code is executed only if a reset has been actually performed.
+// So, the AIC initialization resumes at setting up the default vectors.
+//-----------------------------------------------------------------------------
+AIC()
+{
+// Mask All interrupt pAic->AIC_IDCR = 0xFFFFFFFF;
+ __writeMemory32(0xffffffff,0xFFFFF124,"Memory");
+ __writeMemory32(0xffffffff,0xFFFFF128,"Memory");
+// disable peripheral clock Peripheral Clock Disable Register
+ __writeMemory32(0xffffffff,0xFFFFFC14,"Memory");
+
+// #define AT91C_TC0_SR ((AT91_REG *) 0xFFFA0020) // (TC0) Status Register
+// #define AT91C_TC1_SR ((AT91_REG *) 0xFFFA0060) // (TC1) Status Register
+// #define AT91C_TC2_SR ((AT91_REG *) 0xFFFA00A0) // (TC2) Status Register
+ __readMemory32(0xFFFA0020,"Memory");
+ __readMemory32(0xFFFA0060,"Memory");
+ __readMemory32(0xFFFA00A0,"Memory");
+ for (__mac_i=0;__mac_i < 8; __mac_i++)
+ {
+ // AT91C_BASE_AIC->AIC_EOICR
+ __mac_pt = __readMemory32(0xFFFFF130,"Memory");
+
+ }
+ __message "------------------------------- AIC 2 INIT ---------------------------------------------";
+}
+
+ini()
+{
+__writeMemory32(0x0,0x00,"Register");
+__writeMemory32(0x0,0x04,"Register");
+__writeMemory32(0x0,0x08,"Register");
+__writeMemory32(0x0,0x0C,"Register");
+__writeMemory32(0x0,0x10,"Register");
+__writeMemory32(0x0,0x14,"Register");
+__writeMemory32(0x0,0x18,"Register");
+__writeMemory32(0x0,0x1C,"Register");
+__writeMemory32(0x0,0x20,"Register");
+__writeMemory32(0x0,0x24,"Register");
+__writeMemory32(0x0,0x28,"Register");
+__writeMemory32(0x0,0x2C,"Register");
+__writeMemory32(0x0,0x30,"Register");
+__writeMemory32(0x0,0x34,"Register");
+__writeMemory32(0x0,0x38,"Register");
+
+// Set CPSR
+__writeMemory32(0x0D3,0x98,"Register");
+
+
+}
+
+RG()
+{
+
+__mac_i =__readMemory32(0x00,"Register"); __message "R00 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x04,"Register"); __message "R01 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x08,"Register"); __message "R02 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x0C,"Register"); __message "R03 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x10,"Register"); __message "R04 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x14,"Register"); __message "R05 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x18,"Register"); __message "R06 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x1C,"Register"); __message "R07 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x20,"Register"); __message "R08 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x24,"Register"); __message "R09 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x28,"Register"); __message "R10 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x2C,"Register"); __message "R11 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x30,"Register"); __message "R12 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x34,"Register"); __message "R13 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x38,"Register"); __message "R14 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x3C,"Register"); __message "R13 SVC 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x40,"Register"); __message "R14 SVC 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x44,"Register"); __message "R13 ABT 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x48,"Register"); __message "R14 ABT 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x4C,"Register"); __message "R13 UND 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x50,"Register"); __message "R14 UND 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x54,"Register"); __message "R13 IRQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x58,"Register"); __message "R14 IRQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x5C,"Register"); __message "R08 FIQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x60,"Register"); __message "R09 FIQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x64,"Register"); __message "R10 FIQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x68,"Register"); __message "R11 FIQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x6C,"Register"); __message "R12 FIQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x70,"Register"); __message "R13 FIQ 0x",__mac_i:%X;
+__mac_i =__readMemory32(0x74,"Register"); __message "R14 FIQ0x",__mac_i:%X;
+__mac_i =__readMemory32(0x98,"Register"); __message "CPSR ",__mac_i:%X;
+__mac_i =__readMemory32(0x94,"Register"); __message "SPSR ",__mac_i:%X;
+__mac_i =__readMemory32(0x9C,"Register"); __message "SPSR ABT ",__mac_i:%X;
+__mac_i =__readMemory32(0xA0,"Register"); __message "SPSR ABT ",__mac_i:%X;
+__mac_i =__readMemory32(0xA4,"Register"); __message "SPSR UND ",__mac_i:%X;
+__mac_i =__readMemory32(0xA8,"Register"); __message "SPSR IRQ ",__mac_i:%X;
+__mac_i =__readMemory32(0xAC,"Register"); __message "SPSR FIQ ",__mac_i:%X;
+
+__mac_i =__readMemory32(0xB4,"Register"); __message "PC 0x",__mac_i:%X;
+
+}
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_NoRemap.xcl b/AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_NoRemap.xcl
new file mode 100644
index 0000000..3682046
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_NoRemap.xcl
@@ -0,0 +1,138 @@
+// ---------------------------------------------------------
+// ATMEL Microcontroller Software Support - ROUSSET -
+// ---------------------------------------------------------
+// The software is delivered "AS IS" without warranty or
+// condition of any kind, either express, implied or
+// statutory. This includes without limitation any warranty
+// or condition with respect to merchantability or fitness
+// for any particular purpose, or against the infringements of
+// intellectual property rights of others.
+// ---------------------------------------------------------
+// File: at91SAM7S256_NoRemap.xlc
+//
+// 1.1 24/Feb/05 JPP : Creation for 4.11A
+//
+// $Revision: 1.1.1.1 $
+//
+// ---------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage: xlink -f lnkarm <your_object_file(s)>
+// -s <program start label> <C/C++ runtime library>
+//
+// $Revision: 1.1.1.1 $
+//*************************************************************************
+
+//************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7S256 Memory mapping
+// No remap
+// ROMSTART
+// Start address 0x0000 0000
+// Size 256 Kbo 0x0004 0000
+// RAMSTART
+// Start address 0x0020 0000
+// Size 64 Kbo 0x0001 0000
+// Remap done
+// RAMSTART
+// Start address 0x0000 0000
+// Size 64 Kbo 0x0001 0000
+// ROMSTART
+// Start address 0x0010 0000
+// Size 256 Kbo 0x0004 0000
+
+//************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 64 K.
+//*************************************************************************
+// Use these addresses for the .
+// Use these addresses for the .
+-Z(CONST)INTRAMSTART_REMAP=00200000
+-Z(CONST)INTRAMEND_REMAP=0020FFFF
+
+//*************************************************************************
+// Read-only segments mapped to Flash 256 K.
+//*************************************************************************
+-DROMSTART=00000000
+-DROMEND=0003FFFF
+//*************************************************************************
+// Read/write segments mapped to 64 K RAM.
+//*************************************************************************
+-DRAMSTART=00200000
+-DRAMEND=0020FFFF
+
+//************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//************************************************
+-Z(CODE)INTVEC=00-3F
+
+//************************************************
+// Startup code and exception routines (ICODE).
+//************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//************************************************
+// Code segments may be placed anywhere.
+//************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//************************************************
+// Various constants and initializers.
+//************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+//************************************************
+// Data segments.
+//************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//************************************************
+// __ramfunc code copied to and executed from RAM.
+//************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+//************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//************************************************
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+// "-yn": Suppress DWARF debug output
+// "-yp": Multiple ELF program sections
+// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf
diff --git a/AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_Remap.xcl b/AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_Remap.xcl
new file mode 100644
index 0000000..ebc4205
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/at91SAM7S256_Remap.xcl
@@ -0,0 +1,143 @@
+// ---------------------------------------------------------
+// ATMEL Microcontroller Software Support - ROUSSET -
+// ---------------------------------------------------------
+// The software is delivered "AS IS" without warranty or
+// condition of any kind, either express, implied or
+// statutory. This includes without limitation any warranty
+// or condition with respect to merchantability or fitness
+// for any particular purpose, or against the infringements of
+// intellectual property rights of others.
+// ---------------------------------------------------------
+// File: at91SAM7S64_Remap.xlc
+//
+// 1.2 04/Feb/05 JPP : Creation for 4.11A
+// 1.2 08/Feb/05 JPP : Add Remap address and CODE_I for __ramfuc
+//
+// $Revision: 1.2 $
+//
+// ---------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage: xlink -f lnkarm <your_object_file(s)>
+// -s <program start label> <C/C++ runtime library>
+//
+// $Revision: 1.2 $
+//*************************************************************************
+
+//************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7S64 Memory mapping
+// No remap
+// ROMSTART
+// Start address 0x0000 0000
+// Size 256 Kbo 0x0004 0000
+// RAMSTART
+// Start address 0x0020 0000
+// Size 64 Kbo 0x0001 0000
+// Remap done
+// RAMSTART
+// Start address 0x0000 0000
+// Size 64 Kbo 0x0001 0000
+// ROMSTART
+// Start address 0x0010 0000
+// Size 256 Kbo 0x0004 0000
+
+//************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 64 K.
+//*************************************************************************
+
+// Base address used to stack before remap
+-Z(CONST)INTRAMSTART=00200000
+-Z(CONST)INTRAMEND_BEFORE_REMAP=00210000
+// Base address used to RAM after Reamp
+-Z(CONST)INTRAMEND_REMAP=00010000
+
+//*************************************************************************
+// Read-only segments mapped to Flash 256 K.
+//*************************************************************************
+-DROMSTART=00100000
+-DROMEND=0013FFFF
+//*************************************************************************
+// Read/write segments mapped to RAM.
+//*************************************************************************
+// the first space it used for interrupt vector
+-DRAMSTART=00000100
+-DRAMEND=0000FFFF
+
+//************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//************************************************
+-Z(CODE)INTVEC=00-3F
+
+//************************************************
+// Startup code and exception routines (ICODE).
+//************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//************************************************
+// Code segments may be placed anywhere.
+//************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//************************************************
+// Various constants and initializers.
+//************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+
+//************************************************
+// Data segments.
+//************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//************************************************
+//************************************************
+// __ramfunc code copied to and executed from RAM.
+//************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+// "-yn": Suppress DWARF debug output
+// "-yp": Multiple ELF program sections
+// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf
diff --git a/AT91SAM7S256/SAM7S256/Tools/at91SAM7S64_NoRemap.xcl b/AT91SAM7S256/SAM7S256/Tools/at91SAM7S64_NoRemap.xcl
new file mode 100644
index 0000000..754cb14
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/at91SAM7S64_NoRemap.xcl
@@ -0,0 +1,139 @@
+// ---------------------------------------------------------
+// ATMEL Microcontroller Software Support - ROUSSET -
+// ---------------------------------------------------------
+// The software is delivered "AS IS" without warranty or
+// condition of any kind, either express, implied or
+// statutory. This includes without limitation any warranty
+// or condition with respect to merchantability or fitness
+// for any particular purpose, or against the infringements of
+// intellectual property rights of others.
+// ---------------------------------------------------------
+// File: at91SAM7S64_NoRemap.xlc
+//
+// 1.1 16/Jun/04 JPP : Creation for 4.11A
+// 1.2 08/Feb/05 JPP : Add CODE_I for __ramfuc
+//
+// $Revision: 1.1 $
+//
+// ---------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage: xlink -f lnkarm <your_object_file(s)>
+// -s <program start label> <C/C++ runtime library>
+//
+// $Revision: 1.1 $
+//*************************************************************************
+
+//************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7S64 Memory mapping
+// No remap
+// ROMSTART
+// Start address 0x0000 0000
+// Size 64 Kbo 0x0001 0000
+// RAMSTART
+// Start address 0x0020 0000
+// Size 16 Kbo 0x0000 4000
+// Remap done
+// RAMSTART
+// Start address 0x0000 0000
+// Size 16 Kbo 0x0000 4000
+// ROMSTART
+// Start address 0x0010 0000
+// Size 64 Kbo 0x0001 0000
+
+//************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 16 K.
+//*************************************************************************
+// Use these addresses for the .
+-Z(CONST)INTRAMSTART_REMAP=00200000
+-Z(CONST)INTRAMEND_REMAP=00203FFF
+
+//*************************************************************************
+// Read-only segments mapped to Flash 64 K.
+//*************************************************************************
+-DROMSTART=00000000
+-DROMEND=0000FFFF
+//*************************************************************************
+// Read/write segments mapped to RAM.
+//*************************************************************************
+-DRAMSTART=00200000
+-DRAMEND=002003FFF
+
+//************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//************************************************
+-Z(CODE)INTVEC=00-3F
+
+//************************************************
+// Startup code and exception routines (ICODE).
+//************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//************************************************
+// Code segments may be placed anywhere.
+//************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//************************************************
+// Various constants and initializers.
+//************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+
+//************************************************
+// Data segments.
+//************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//************************************************
+// __ramfunc code copied to and executed from RAM.
+//************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+//************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//************************************************
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+// "-yn": Suppress DWARF debug output
+// "-yp": Multiple ELF program sections
+// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf
diff --git a/AT91SAM7S256/SAM7S256/Tools/ioat91sam7s256.ddf b/AT91SAM7S256/SAM7S256/Tools/ioat91sam7s256.ddf
new file mode 100644
index 0000000..19e5e04
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/ioat91sam7s256.ddf
@@ -0,0 +1,1577 @@
+; ----------------------------------------------------------------------------
+; ATMEL Microcontroller Software Support - ROUSSET -
+; ----------------------------------------------------------------------------
+; DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+; MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+; DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+; OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; ----------------------------------------------------------------------------
+; File Name : AT91SAM7S256.ddf
+; Object : AT91SAM7S256 definitions
+; Generated : AT91 SW Application Group 03/08/2005 (15:46:17)
+;
+; CVS Reference : /AT91SAM7S256.pl/1.8/Wed Feb 9 15:29:26 2005//
+; CVS Reference : /SYS_SAM7S.pl/1.2/Tue Feb 1 17:01:52 2005//
+; CVS Reference : /MC_SAM7S.pl/1.2/Tue Feb 1 17:01:00 2005//
+; CVS Reference : /PMC_SAM7S_USB.pl/1.4/Tue Feb 8 13:58:22 2005//
+; CVS Reference : /RSTC_SAM7S.pl/1.1/Tue Feb 1 16:16:35 2005//
+; CVS Reference : /RTTC_6081A.pl/1.2/Tue Nov 9 14:43:58 2004//
+; CVS Reference : /PITC_6079A.pl/1.2/Tue Nov 9 14:43:56 2004//
+; CVS Reference : /WDTC_6080A.pl/1.3/Tue Nov 9 14:44:00 2004//
+; CVS Reference : /VREG_6085B.pl/1.1/Tue Feb 1 16:05:48 2005//
+; CVS Reference : /UDP_6083C.pl/1.1/Mon Jan 31 13:01:46 2005//
+; CVS Reference : /AIC_6075A.pl/1.1/Fri Jun 28 10:36:48 2002//
+; CVS Reference : /PIO_6057A.pl/1.2/Thu Feb 3 10:18:28 2005//
+; CVS Reference : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+; CVS Reference : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+; CVS Reference : /SPI_6088D.pl/1.2/Mon Feb 14 07:24:18 2005//
+; CVS Reference : /SSC_6078A.pl/1.1/Tue Jul 13 07:45:40 2004//
+; CVS Reference : /TC_6082A.pl/1.6/Fri Feb 18 13:53:30 2005//
+; CVS Reference : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+; CVS Reference : /PDC_6074C.pl/1.2/Thu Feb 3 08:48:54 2005//
+; CVS Reference : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+; CVS Reference : /PWM_6044D.pl/1.1/Tue Apr 27 14:53:52 2004//
+; ----------------------------------------------------------------------------
+
+[Sfr]
+
+; ========== Register definition for SYS peripheral ==========
+; ========== Register definition for AIC peripheral ==========
+sfr = "AIC_SMR", "Memory", 0xfffff000, 4, base=16
+sfr = "AIC_SMR.PRIOR", "Memory", 0xfffff000, 4, base=16, bitRange=0-2
+sfr = "AIC_SMR.SRCTYPE", "Memory", 0xfffff000, 4, base=16, bitRange=5-6
+sfr = "AIC_SVR", "Memory", 0xfffff080, 4, base=16
+sfr = "AIC_IVR", "Memory", 0xfffff100, 4, base=16
+sfr = "AIC_FVR", "Memory", 0xfffff104, 4, base=16
+sfr = "AIC_ISR", "Memory", 0xfffff108, 4, base=16
+sfr = "AIC_IPR", "Memory", 0xfffff10c, 4, base=16
+sfr = "AIC_IMR", "Memory", 0xfffff110, 4, base=16
+sfr = "AIC_CISR", "Memory", 0xfffff114, 4, base=16
+sfr = "AIC_CISR.NFIQ", "Memory", 0xfffff114, 4, base=16, bitRange=0
+sfr = "AIC_CISR.NIRQ", "Memory", 0xfffff114, 4, base=16, bitRange=1
+sfr = "AIC_IECR", "Memory", 0xfffff120, 4, base=16
+sfr = "AIC_IDCR", "Memory", 0xfffff124, 4, base=16
+sfr = "AIC_ICCR", "Memory", 0xfffff128, 4, base=16
+sfr = "AIC_ISCR", "Memory", 0xfffff12c, 4, base=16
+sfr = "AIC_EOICR", "Memory", 0xfffff130, 4, base=16
+sfr = "AIC_SPU", "Memory", 0xfffff134, 4, base=16
+sfr = "AIC_DCR", "Memory", 0xfffff138, 4, base=16
+sfr = "AIC_DCR.PROT", "Memory", 0xfffff138, 4, base=16, bitRange=0
+sfr = "AIC_DCR.GMSK", "Memory", 0xfffff138, 4, base=16, bitRange=1
+sfr = "AIC_FFER", "Memory", 0xfffff140, 4, base=16
+sfr = "AIC_FFDR", "Memory", 0xfffff144, 4, base=16
+sfr = "AIC_FFSR", "Memory", 0xfffff148, 4, base=16
+; ========== Register definition for PDC_DBGU peripheral ==========
+sfr = "DBGU_RPR", "Memory", 0xfffff300, 4, base=16
+sfr = "DBGU_RCR", "Memory", 0xfffff304, 4, base=16
+sfr = "DBGU_TPR", "Memory", 0xfffff308, 4, base=16
+sfr = "DBGU_TCR", "Memory", 0xfffff30c, 4, base=16
+sfr = "DBGU_RNPR", "Memory", 0xfffff310, 4, base=16
+sfr = "DBGU_RNCR", "Memory", 0xfffff314, 4, base=16
+sfr = "DBGU_TNPR", "Memory", 0xfffff318, 4, base=16
+sfr = "DBGU_TNCR", "Memory", 0xfffff31c, 4, base=16
+sfr = "DBGU_PTCR", "Memory", 0xfffff320, 4, base=16
+sfr = "DBGU_PTCR.RXTEN", "Memory", 0xfffff320, 4, base=16, bitRange=0
+sfr = "DBGU_PTCR.RXTDIS", "Memory", 0xfffff320, 4, base=16, bitRange=1
+sfr = "DBGU_PTCR.TXTEN", "Memory", 0xfffff320, 4, base=16, bitRange=8
+sfr = "DBGU_PTCR.TXTDIS", "Memory", 0xfffff320, 4, base=16, bitRange=9
+sfr = "DBGU_PTSR", "Memory", 0xfffff324, 4, base=16
+sfr = "DBGU_PTSR.RXTEN", "Memory", 0xfffff324, 4, base=16, bitRange=0
+sfr = "DBGU_PTSR.TXTEN", "Memory", 0xfffff324, 4, base=16, bitRange=8
+; ========== Register definition for DBGU peripheral ==========
+sfr = "DBGU_CR", "Memory", 0xfffff200, 4, base=16
+sfr = "DBGU_CR.RSTRX", "Memory", 0xfffff200, 4, base=16, bitRange=2
+sfr = "DBGU_CR.RSTTX", "Memory", 0xfffff200, 4, base=16, bitRange=3
+sfr = "DBGU_CR.RXEN", "Memory", 0xfffff200, 4, base=16, bitRange=4
+sfr = "DBGU_CR.RXDIS", "Memory", 0xfffff200, 4, base=16, bitRange=5
+sfr = "DBGU_CR.TXEN", "Memory", 0xfffff200, 4, base=16, bitRange=6
+sfr = "DBGU_CR.TXDIS", "Memory", 0xfffff200, 4, base=16, bitRange=7
+sfr = "DBGU_CR.RSTSTA", "Memory", 0xfffff200, 4, base=16, bitRange=8
+sfr = "DBGU_MR", "Memory", 0xfffff204, 4, base=16
+sfr = "DBGU_MR.PAR", "Memory", 0xfffff204, 4, base=16, bitRange=9-11
+sfr = "DBGU_MR.CHMODE", "Memory", 0xfffff204, 4, base=16, bitRange=14-15
+sfr = "DBGU_IER", "Memory", 0xfffff208, 4, base=16
+sfr = "DBGU_IER.RXRDY", "Memory", 0xfffff208, 4, base=16, bitRange=0
+sfr = "DBGU_IER.TXRDY", "Memory", 0xfffff208, 4, base=16, bitRange=1
+sfr = "DBGU_IER.ENDRX", "Memory", 0xfffff208, 4, base=16, bitRange=3
+sfr = "DBGU_IER.ENDTX", "Memory", 0xfffff208, 4, base=16, bitRange=4
+sfr = "DBGU_IER.OVRE", "Memory", 0xfffff208, 4, base=16, bitRange=5
+sfr = "DBGU_IER.FRAME", "Memory", 0xfffff208, 4, base=16, bitRange=6
+sfr = "DBGU_IER.PARE", "Memory", 0xfffff208, 4, base=16, bitRange=7
+sfr = "DBGU_IER.TXEMPTY", "Memory", 0xfffff208, 4, base=16, bitRange=9
+sfr = "DBGU_IER.TXBUFE", "Memory", 0xfffff208, 4, base=16, bitRange=11
+sfr = "DBGU_IER.RXBUFF", "Memory", 0xfffff208, 4, base=16, bitRange=12
+sfr = "DBGU_IER.TX", "Memory", 0xfffff208, 4, base=16, bitRange=30
+sfr = "DBGU_IER.RX", "Memory", 0xfffff208, 4, base=16, bitRange=31
+sfr = "DBGU_IDR", "Memory", 0xfffff20c, 4, base=16
+sfr = "DBGU_IDR.RXRDY", "Memory", 0xfffff20c, 4, base=16, bitRange=0
+sfr = "DBGU_IDR.TXRDY", "Memory", 0xfffff20c, 4, base=16, bitRange=1
+sfr = "DBGU_IDR.ENDRX", "Memory", 0xfffff20c, 4, base=16, bitRange=3
+sfr = "DBGU_IDR.ENDTX", "Memory", 0xfffff20c, 4, base=16, bitRange=4
+sfr = "DBGU_IDR.OVRE", "Memory", 0xfffff20c, 4, base=16, bitRange=5
+sfr = "DBGU_IDR.FRAME", "Memory", 0xfffff20c, 4, base=16, bitRange=6
+sfr = "DBGU_IDR.PARE", "Memory", 0xfffff20c, 4, base=16, bitRange=7
+sfr = "DBGU_IDR.TXEMPTY", "Memory", 0xfffff20c, 4, base=16, bitRange=9
+sfr = "DBGU_IDR.TXBUFE", "Memory", 0xfffff20c, 4, base=16, bitRange=11
+sfr = "DBGU_IDR.RXBUFF", "Memory", 0xfffff20c, 4, base=16, bitRange=12
+sfr = "DBGU_IDR.TX", "Memory", 0xfffff20c, 4, base=16, bitRange=30
+sfr = "DBGU_IDR.RX", "Memory", 0xfffff20c, 4, base=16, bitRange=31
+sfr = "DBGU_IMR", "Memory", 0xfffff210, 4, base=16
+sfr = "DBGU_IMR.RXRDY", "Memory", 0xfffff210, 4, base=16, bitRange=0
+sfr = "DBGU_IMR.TXRDY", "Memory", 0xfffff210, 4, base=16, bitRange=1
+sfr = "DBGU_IMR.ENDRX", "Memory", 0xfffff210, 4, base=16, bitRange=3
+sfr = "DBGU_IMR.ENDTX", "Memory", 0xfffff210, 4, base=16, bitRange=4
+sfr = "DBGU_IMR.OVRE", "Memory", 0xfffff210, 4, base=16, bitRange=5
+sfr = "DBGU_IMR.FRAME", "Memory", 0xfffff210, 4, base=16, bitRange=6
+sfr = "DBGU_IMR.PARE", "Memory", 0xfffff210, 4, base=16, bitRange=7
+sfr = "DBGU_IMR.TXEMPTY", "Memory", 0xfffff210, 4, base=16, bitRange=9
+sfr = "DBGU_IMR.TXBUFE", "Memory", 0xfffff210, 4, base=16, bitRange=11
+sfr = "DBGU_IMR.RXBUFF", "Memory", 0xfffff210, 4, base=16, bitRange=12
+sfr = "DBGU_IMR.TX", "Memory", 0xfffff210, 4, base=16, bitRange=30
+sfr = "DBGU_IMR.RX", "Memory", 0xfffff210, 4, base=16, bitRange=31
+sfr = "DBGU_CSR", "Memory", 0xfffff214, 4, base=16
+sfr = "DBGU_CSR.RXRDY", "Memory", 0xfffff214, 4, base=16, bitRange=0
+sfr = "DBGU_CSR.TXRDY", "Memory", 0xfffff214, 4, base=16, bitRange=1
+sfr = "DBGU_CSR.ENDRX", "Memory", 0xfffff214, 4, base=16, bitRange=3
+sfr = "DBGU_CSR.ENDTX", "Memory", 0xfffff214, 4, base=16, bitRange=4
+sfr = "DBGU_CSR.OVRE", "Memory", 0xfffff214, 4, base=16, bitRange=5
+sfr = "DBGU_CSR.FRAME", "Memory", 0xfffff214, 4, base=16, bitRange=6
+sfr = "DBGU_CSR.PARE", "Memory", 0xfffff214, 4, base=16, bitRange=7
+sfr = "DBGU_CSR.TXEMPTY", "Memory", 0xfffff214, 4, base=16, bitRange=9
+sfr = "DBGU_CSR.TXBUFE", "Memory", 0xfffff214, 4, base=16, bitRange=11
+sfr = "DBGU_CSR.RXBUFF", "Memory", 0xfffff214, 4, base=16, bitRange=12
+sfr = "DBGU_CSR.TX", "Memory", 0xfffff214, 4, base=16, bitRange=30
+sfr = "DBGU_CSR.RX", "Memory", 0xfffff214, 4, base=16, bitRange=31
+sfr = "DBGU_RHR", "Memory", 0xfffff218, 4, base=16
+sfr = "DBGU_THR", "Memory", 0xfffff21c, 4, base=16
+sfr = "DBGU_BRGR", "Memory", 0xfffff220, 4, base=16
+sfr = "DBGU_CIDR", "Memory", 0xfffff240, 4, base=16
+sfr = "DBGU_EXID", "Memory", 0xfffff244, 4, base=16
+sfr = "DBGU_FNTR", "Memory", 0xfffff248, 4, base=16
+sfr = "DBGU_FNTR.NTRST", "Memory", 0xfffff248, 4, base=16, bitRange=0
+; ========== Register definition for PIOA peripheral ==========
+sfr = "PIOA_PER", "Memory", 0xfffff400, 4, base=16
+sfr = "PIOA_PDR", "Memory", 0xfffff404, 4, base=16
+sfr = "PIOA_PSR", "Memory", 0xfffff408, 4, base=16
+sfr = "PIOA_OER", "Memory", 0xfffff410, 4, base=16
+sfr = "PIOA_ODR", "Memory", 0xfffff414, 4, base=16
+sfr = "PIOA_OSR", "Memory", 0xfffff418, 4, base=16
+sfr = "PIOA_IFER", "Memory", 0xfffff420, 4, base=16
+sfr = "PIOA_IFDR", "Memory", 0xfffff424, 4, base=16
+sfr = "PIOA_IFSR", "Memory", 0xfffff428, 4, base=16
+sfr = "PIOA_SODR", "Memory", 0xfffff430, 4, base=16
+sfr = "PIOA_CODR", "Memory", 0xfffff434, 4, base=16
+sfr = "PIOA_ODSR", "Memory", 0xfffff438, 4, base=16
+sfr = "PIOA_PDSR", "Memory", 0xfffff43c, 4, base=16
+sfr = "PIOA_IER", "Memory", 0xfffff440, 4, base=16
+sfr = "PIOA_IDR", "Memory", 0xfffff444, 4, base=16
+sfr = "PIOA_IMR", "Memory", 0xfffff448, 4, base=16
+sfr = "PIOA_ISR", "Memory", 0xfffff44c, 4, base=16
+sfr = "PIOA_MDER", "Memory", 0xfffff450, 4, base=16
+sfr = "PIOA_MDDR", "Memory", 0xfffff454, 4, base=16
+sfr = "PIOA_MDSR", "Memory", 0xfffff458, 4, base=16
+sfr = "PIOA_PPUDR", "Memory", 0xfffff460, 4, base=16
+sfr = "PIOA_PPUER", "Memory", 0xfffff464, 4, base=16
+sfr = "PIOA_PPUSR", "Memory", 0xfffff468, 4, base=16
+sfr = "PIOA_ASR", "Memory", 0xfffff470, 4, base=16
+sfr = "PIOA_BSR", "Memory", 0xfffff474, 4, base=16
+sfr = "PIOA_ABSR", "Memory", 0xfffff478, 4, base=16
+sfr = "PIOA_OWER", "Memory", 0xfffff4a0, 4, base=16
+sfr = "PIOA_OWDR", "Memory", 0xfffff4a4, 4, base=16
+sfr = "PIOA_OWSR", "Memory", 0xfffff4a8, 4, base=16
+; ========== Register definition for CKGR peripheral ==========
+sfr = "CKGR_MOR", "Memory", 0xfffffc20, 4, base=16
+sfr = "CKGR_MOR.MOSCEN", "Memory", 0xfffffc20, 4, base=16, bitRange=0
+sfr = "CKGR_MOR.OSCBYPASS", "Memory", 0xfffffc20, 4, base=16, bitRange=1
+sfr = "CKGR_MOR.OSCOUNT", "Memory", 0xfffffc20, 4, base=16, bitRange=8-15
+sfr = "CKGR_MCFR", "Memory", 0xfffffc24, 4, base=16
+sfr = "CKGR_MCFR.MAINF", "Memory", 0xfffffc24, 4, base=16, bitRange=0-15
+sfr = "CKGR_MCFR.MAINRDY", "Memory", 0xfffffc24, 4, base=16, bitRange=16
+sfr = "CKGR_PLLR", "Memory", 0xfffffc2c, 4, base=16
+sfr = "CKGR_PLLR.DIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=0-7
+sfr = "CKGR_PLLR.PLLCOUNT", "Memory", 0xfffffc2c, 4, base=16, bitRange=8-13
+sfr = "CKGR_PLLR.OUT", "Memory", 0xfffffc2c, 4, base=16, bitRange=14-15
+sfr = "CKGR_PLLR.MUL", "Memory", 0xfffffc2c, 4, base=16, bitRange=16-26
+sfr = "CKGR_PLLR.USBDIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=28-29
+; ========== Register definition for PMC peripheral ==========
+sfr = "PMC_SCER", "Memory", 0xfffffc00, 4, base=16
+sfr = "PMC_SCER.PCK", "Memory", 0xfffffc00, 4, base=16, bitRange=0
+sfr = "PMC_SCER.UDP", "Memory", 0xfffffc00, 4, base=16, bitRange=7
+sfr = "PMC_SCER.PCK0", "Memory", 0xfffffc00, 4, base=16, bitRange=8
+sfr = "PMC_SCER.PCK1", "Memory", 0xfffffc00, 4, base=16, bitRange=9
+sfr = "PMC_SCER.PCK2", "Memory", 0xfffffc00, 4, base=16, bitRange=10
+sfr = "PMC_SCDR", "Memory", 0xfffffc04, 4, base=16
+sfr = "PMC_SCDR.PCK", "Memory", 0xfffffc04, 4, base=16, bitRange=0
+sfr = "PMC_SCDR.UDP", "Memory", 0xfffffc04, 4, base=16, bitRange=7
+sfr = "PMC_SCDR.PCK0", "Memory", 0xfffffc04, 4, base=16, bitRange=8
+sfr = "PMC_SCDR.PCK1", "Memory", 0xfffffc04, 4, base=16, bitRange=9
+sfr = "PMC_SCDR.PCK2", "Memory", 0xfffffc04, 4, base=16, bitRange=10
+sfr = "PMC_SCSR", "Memory", 0xfffffc08, 4, base=16
+sfr = "PMC_SCSR.PCK", "Memory", 0xfffffc08, 4, base=16, bitRange=0
+sfr = "PMC_SCSR.UDP", "Memory", 0xfffffc08, 4, base=16, bitRange=7
+sfr = "PMC_SCSR.PCK0", "Memory", 0xfffffc08, 4, base=16, bitRange=8
+sfr = "PMC_SCSR.PCK1", "Memory", 0xfffffc08, 4, base=16, bitRange=9
+sfr = "PMC_SCSR.PCK2", "Memory", 0xfffffc08, 4, base=16, bitRange=10
+sfr = "PMC_PCER", "Memory", 0xfffffc10, 4, base=16
+sfr = "PMC_PCDR", "Memory", 0xfffffc14, 4, base=16
+sfr = "PMC_PCSR", "Memory", 0xfffffc18, 4, base=16
+sfr = "PMC_MOR", "Memory", 0xfffffc20, 4, base=16
+sfr = "PMC_MOR.MOSCEN", "Memory", 0xfffffc20, 4, base=16, bitRange=0
+sfr = "PMC_MOR.OSCBYPASS", "Memory", 0xfffffc20, 4, base=16, bitRange=1
+sfr = "PMC_MOR.OSCOUNT", "Memory", 0xfffffc20, 4, base=16, bitRange=8-15
+sfr = "PMC_MCFR", "Memory", 0xfffffc24, 4, base=16
+sfr = "PMC_MCFR.MAINF", "Memory", 0xfffffc24, 4, base=16, bitRange=0-15
+sfr = "PMC_MCFR.MAINRDY", "Memory", 0xfffffc24, 4, base=16, bitRange=16
+sfr = "PMC_PLLR", "Memory", 0xfffffc2c, 4, base=16
+sfr = "PMC_PLLR.DIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=0-7
+sfr = "PMC_PLLR.PLLCOUNT", "Memory", 0xfffffc2c, 4, base=16, bitRange=8-13
+sfr = "PMC_PLLR.OUT", "Memory", 0xfffffc2c, 4, base=16, bitRange=14-15
+sfr = "PMC_PLLR.MUL", "Memory", 0xfffffc2c, 4, base=16, bitRange=16-26
+sfr = "PMC_PLLR.USBDIV", "Memory", 0xfffffc2c, 4, base=16, bitRange=28-29
+sfr = "PMC_MCKR", "Memory", 0xfffffc30, 4, base=16
+sfr = "PMC_MCKR.CSS", "Memory", 0xfffffc30, 4, base=16, bitRange=0-1
+sfr = "PMC_MCKR.PRES", "Memory", 0xfffffc30, 4, base=16, bitRange=2-4
+sfr = "PMC_PCKR", "Memory", 0xfffffc40, 4, base=16
+sfr = "PMC_PCKR.CSS", "Memory", 0xfffffc40, 4, base=16, bitRange=0-1
+sfr = "PMC_PCKR.PRES", "Memory", 0xfffffc40, 4, base=16, bitRange=2-4
+sfr = "PMC_IER", "Memory", 0xfffffc60, 4, base=16
+sfr = "PMC_IER.MOSCS", "Memory", 0xfffffc60, 4, base=16, bitRange=0
+sfr = "PMC_IER.LOCK", "Memory", 0xfffffc60, 4, base=16, bitRange=2
+sfr = "PMC_IER.MCKRDY", "Memory", 0xfffffc60, 4, base=16, bitRange=3
+sfr = "PMC_IER.PCK0RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=8
+sfr = "PMC_IER.PCK1RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=9
+sfr = "PMC_IER.PCK2RDY", "Memory", 0xfffffc60, 4, base=16, bitRange=10
+sfr = "PMC_IDR", "Memory", 0xfffffc64, 4, base=16
+sfr = "PMC_IDR.MOSCS", "Memory", 0xfffffc64, 4, base=16, bitRange=0
+sfr = "PMC_IDR.LOCK", "Memory", 0xfffffc64, 4, base=16, bitRange=2
+sfr = "PMC_IDR.MCKRDY", "Memory", 0xfffffc64, 4, base=16, bitRange=3
+sfr = "PMC_IDR.PCK0RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=8
+sfr = "PMC_IDR.PCK1RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=9
+sfr = "PMC_IDR.PCK2RDY", "Memory", 0xfffffc64, 4, base=16, bitRange=10
+sfr = "PMC_SR", "Memory", 0xfffffc68, 4, base=16
+sfr = "PMC_SR.MOSCS", "Memory", 0xfffffc68, 4, base=16, bitRange=0
+sfr = "PMC_SR.LOCK", "Memory", 0xfffffc68, 4, base=16, bitRange=2
+sfr = "PMC_SR.MCKRDY", "Memory", 0xfffffc68, 4, base=16, bitRange=3
+sfr = "PMC_SR.PCK0RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=8
+sfr = "PMC_SR.PCK1RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=9
+sfr = "PMC_SR.PCK2RDY", "Memory", 0xfffffc68, 4, base=16, bitRange=10
+sfr = "PMC_IMR", "Memory", 0xfffffc6c, 4, base=16
+sfr = "PMC_IMR.MOSCS", "Memory", 0xfffffc6c, 4, base=16, bitRange=0
+sfr = "PMC_IMR.LOCK", "Memory", 0xfffffc6c, 4, base=16, bitRange=2
+sfr = "PMC_IMR.MCKRDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=3
+sfr = "PMC_IMR.PCK0RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=8
+sfr = "PMC_IMR.PCK1RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=9
+sfr = "PMC_IMR.PCK2RDY", "Memory", 0xfffffc6c, 4, base=16, bitRange=10
+; ========== Register definition for RSTC peripheral ==========
+sfr = "RSTC_RCR", "Memory", 0xfffffd00, 4, base=16
+sfr = "RSTC_RCR.PROCRST", "Memory", 0xfffffd00, 4, base=16, bitRange=0
+sfr = "RSTC_RCR.PERRST", "Memory", 0xfffffd00, 4, base=16, bitRange=2
+sfr = "RSTC_RCR.EXTRST", "Memory", 0xfffffd00, 4, base=16, bitRange=3
+sfr = "RSTC_RCR.KEY", "Memory", 0xfffffd00, 4, base=16, bitRange=24-31
+sfr = "RSTC_RSR", "Memory", 0xfffffd04, 4, base=16
+sfr = "RSTC_RSR.URSTS", "Memory", 0xfffffd04, 4, base=16, bitRange=0
+sfr = "RSTC_RSR.BODSTS", "Memory", 0xfffffd04, 4, base=16, bitRange=1
+sfr = "RSTC_RSR.RSTTYP", "Memory", 0xfffffd04, 4, base=16, bitRange=8-10
+sfr = "RSTC_RSR.NRSTL", "Memory", 0xfffffd04, 4, base=16, bitRange=16
+sfr = "RSTC_RSR.SRCMP", "Memory", 0xfffffd04, 4, base=16, bitRange=17
+sfr = "RSTC_RMR", "Memory", 0xfffffd08, 4, base=16
+sfr = "RSTC_RMR.URSTEN", "Memory", 0xfffffd08, 4, base=16, bitRange=0
+sfr = "RSTC_RMR.URSTIEN", "Memory", 0xfffffd08, 4, base=16, bitRange=4
+sfr = "RSTC_RMR.ERSTL", "Memory", 0xfffffd08, 4, base=16, bitRange=8-11
+sfr = "RSTC_RMR.BODIEN", "Memory", 0xfffffd08, 4, base=16, bitRange=16
+sfr = "RSTC_RMR.KEY", "Memory", 0xfffffd08, 4, base=16, bitRange=24-31
+; ========== Register definition for RTTC peripheral ==========
+sfr = "RTTC_RTMR", "Memory", 0xfffffd20, 4, base=16
+sfr = "RTTC_RTMR.RTPRES", "Memory", 0xfffffd20, 4, base=16, bitRange=0-15
+sfr = "RTTC_RTMR.ALMIEN", "Memory", 0xfffffd20, 4, base=16, bitRange=16
+sfr = "RTTC_RTMR.RTTINCIEN", "Memory", 0xfffffd20, 4, base=16, bitRange=17
+sfr = "RTTC_RTMR.RTTRST", "Memory", 0xfffffd20, 4, base=16, bitRange=18
+sfr = "RTTC_RTAR", "Memory", 0xfffffd24, 4, base=16
+sfr = "RTTC_RTAR.ALMV", "Memory", 0xfffffd24, 4, base=16, bitRange=0-31
+sfr = "RTTC_RTVR", "Memory", 0xfffffd28, 4, base=16
+sfr = "RTTC_RTVR.CRTV", "Memory", 0xfffffd28, 4, base=16, bitRange=0-31
+sfr = "RTTC_RTSR", "Memory", 0xfffffd2c, 4, base=16
+sfr = "RTTC_RTSR.ALMS", "Memory", 0xfffffd2c, 4, base=16, bitRange=0
+sfr = "RTTC_RTSR.RTTINC", "Memory", 0xfffffd2c, 4, base=16, bitRange=1
+; ========== Register definition for PITC peripheral ==========
+sfr = "PITC_PIMR", "Memory", 0xfffffd30, 4, base=16
+sfr = "PITC_PIMR.PIV", "Memory", 0xfffffd30, 4, base=16, bitRange=0-19
+sfr = "PITC_PIMR.PITEN", "Memory", 0xfffffd30, 4, base=16, bitRange=24
+sfr = "PITC_PIMR.PITIEN", "Memory", 0xfffffd30, 4, base=16, bitRange=25
+sfr = "PITC_PISR", "Memory", 0xfffffd34, 4, base=16
+sfr = "PITC_PISR.PITS", "Memory", 0xfffffd34, 4, base=16, bitRange=0
+sfr = "PITC_PIVR", "Memory", 0xfffffd38, 4, base=16
+sfr = "PITC_PIVR.CPIV", "Memory", 0xfffffd38, 4, base=16, bitRange=0-19
+sfr = "PITC_PIVR.PICNT", "Memory", 0xfffffd38, 4, base=16, bitRange=20-31
+sfr = "PITC_PIIR", "Memory", 0xfffffd3c, 4, base=16
+sfr = "PITC_PIIR.CPIV", "Memory", 0xfffffd3c, 4, base=16, bitRange=0-19
+sfr = "PITC_PIIR.PICNT", "Memory", 0xfffffd3c, 4, base=16, bitRange=20-31
+; ========== Register definition for WDTC peripheral ==========
+sfr = "WDTC_WDCR", "Memory", 0xfffffd40, 4, base=16
+sfr = "WDTC_WDCR.WDRSTT", "Memory", 0xfffffd40, 4, base=16, bitRange=0
+sfr = "WDTC_WDCR.KEY", "Memory", 0xfffffd40, 4, base=16, bitRange=24-31
+sfr = "WDTC_WDMR", "Memory", 0xfffffd44, 4, base=16
+sfr = "WDTC_WDMR.WDV", "Memory", 0xfffffd44, 4, base=16, bitRange=0-11
+sfr = "WDTC_WDMR.WDFIEN", "Memory", 0xfffffd44, 4, base=16, bitRange=12
+sfr = "WDTC_WDMR.WDRSTEN", "Memory", 0xfffffd44, 4, base=16, bitRange=13
+sfr = "WDTC_WDMR.WDRPROC", "Memory", 0xfffffd44, 4, base=16, bitRange=14
+sfr = "WDTC_WDMR.WDDIS", "Memory", 0xfffffd44, 4, base=16, bitRange=15
+sfr = "WDTC_WDMR.WDD", "Memory", 0xfffffd44, 4, base=16, bitRange=16-27
+sfr = "WDTC_WDMR.WDDBGHLT", "Memory", 0xfffffd44, 4, base=16, bitRange=28
+sfr = "WDTC_WDMR.WDIDLEHLT", "Memory", 0xfffffd44, 4, base=16, bitRange=29
+sfr = "WDTC_WDSR", "Memory", 0xfffffd48, 4, base=16
+sfr = "WDTC_WDSR.WDUNF", "Memory", 0xfffffd48, 4, base=16, bitRange=0
+sfr = "WDTC_WDSR.WDERR", "Memory", 0xfffffd48, 4, base=16, bitRange=1
+; ========== Register definition for VREG peripheral ==========
+sfr = "VREG_MR", "Memory", 0xfffffd60, 4, base=16
+sfr = "VREG_MR.PSTDBY", "Memory", 0xfffffd60, 4, base=16, bitRange=0
+; ========== Register definition for MC peripheral ==========
+sfr = "MC_RCR", "Memory", 0xffffff00, 4, base=16
+sfr = "MC_RCR.RCB", "Memory", 0xffffff00, 4, base=16, bitRange=0
+sfr = "MC_ASR", "Memory", 0xffffff04, 4, base=16
+sfr = "MC_ASR.UNDADD", "Memory", 0xffffff04, 4, base=16, bitRange=0
+sfr = "MC_ASR.MISADD", "Memory", 0xffffff04, 4, base=16, bitRange=1
+sfr = "MC_ASR.ABTSZ", "Memory", 0xffffff04, 4, base=16, bitRange=8-9
+sfr = "MC_ASR.ABTTYP", "Memory", 0xffffff04, 4, base=16, bitRange=10-11
+sfr = "MC_ASR.MST0", "Memory", 0xffffff04, 4, base=16, bitRange=16
+sfr = "MC_ASR.MST1", "Memory", 0xffffff04, 4, base=16, bitRange=17
+sfr = "MC_ASR.SVMST0", "Memory", 0xffffff04, 4, base=16, bitRange=24
+sfr = "MC_ASR.SVMST1", "Memory", 0xffffff04, 4, base=16, bitRange=25
+sfr = "MC_AASR", "Memory", 0xffffff08, 4, base=16
+sfr = "MC_FMR", "Memory", 0xffffff60, 4, base=16
+sfr = "MC_FMR.FRDY", "Memory", 0xffffff60, 4, base=16, bitRange=0
+sfr = "MC_FMR.LOCKE", "Memory", 0xffffff60, 4, base=16, bitRange=2
+sfr = "MC_FMR.PROGE", "Memory", 0xffffff60, 4, base=16, bitRange=3
+sfr = "MC_FMR.NEBP", "Memory", 0xffffff60, 4, base=16, bitRange=7
+sfr = "MC_FMR.FWS", "Memory", 0xffffff60, 4, base=16, bitRange=8-9
+sfr = "MC_FMR.FMCN", "Memory", 0xffffff60, 4, base=16, bitRange=16-23
+sfr = "MC_FCR", "Memory", 0xffffff64, 4, base=16
+sfr = "MC_FCR.FCMD", "Memory", 0xffffff64, 4, base=16, bitRange=0-3
+sfr = "MC_FCR.PAGEN", "Memory", 0xffffff64, 4, base=16, bitRange=8-17
+sfr = "MC_FCR.KEY", "Memory", 0xffffff64, 4, base=16, bitRange=24-31
+sfr = "MC_FSR", "Memory", 0xffffff68, 4, base=16
+sfr = "MC_FSR.FRDY", "Memory", 0xffffff68, 4, base=16, bitRange=0
+sfr = "MC_FSR.LOCKE", "Memory", 0xffffff68, 4, base=16, bitRange=2
+sfr = "MC_FSR.PROGE", "Memory", 0xffffff68, 4, base=16, bitRange=3
+sfr = "MC_FSR.SECURITY", "Memory", 0xffffff68, 4, base=16, bitRange=4
+sfr = "MC_FSR.GPNVM0", "Memory", 0xffffff68, 4, base=16, bitRange=8
+sfr = "MC_FSR.GPNVM1", "Memory", 0xffffff68, 4, base=16, bitRange=9
+sfr = "MC_FSR.GPNVM2", "Memory", 0xffffff68, 4, base=16, bitRange=10
+sfr = "MC_FSR.GPNVM3", "Memory", 0xffffff68, 4, base=16, bitRange=11
+sfr = "MC_FSR.GPNVM4", "Memory", 0xffffff68, 4, base=16, bitRange=12
+sfr = "MC_FSR.GPNVM5", "Memory", 0xffffff68, 4, base=16, bitRange=13
+sfr = "MC_FSR.GPNVM6", "Memory", 0xffffff68, 4, base=16, bitRange=14
+sfr = "MC_FSR.GPNVM7", "Memory", 0xffffff68, 4, base=16, bitRange=15
+sfr = "MC_FSR.LOCKS0", "Memory", 0xffffff68, 4, base=16, bitRange=16
+sfr = "MC_FSR.LOCKS1", "Memory", 0xffffff68, 4, base=16, bitRange=17
+sfr = "MC_FSR.LOCKS2", "Memory", 0xffffff68, 4, base=16, bitRange=18
+sfr = "MC_FSR.LOCKS3", "Memory", 0xffffff68, 4, base=16, bitRange=19
+sfr = "MC_FSR.LOCKS4", "Memory", 0xffffff68, 4, base=16, bitRange=20
+sfr = "MC_FSR.LOCKS5", "Memory", 0xffffff68, 4, base=16, bitRange=21
+sfr = "MC_FSR.LOCKS6", "Memory", 0xffffff68, 4, base=16, bitRange=22
+sfr = "MC_FSR.LOCKS7", "Memory", 0xffffff68, 4, base=16, bitRange=23
+sfr = "MC_FSR.LOCKS8", "Memory", 0xffffff68, 4, base=16, bitRange=24
+sfr = "MC_FSR.LOCKS9", "Memory", 0xffffff68, 4, base=16, bitRange=25
+sfr = "MC_FSR.LOCKS10", "Memory", 0xffffff68, 4, base=16, bitRange=26
+sfr = "MC_FSR.LOCKS11", "Memory", 0xffffff68, 4, base=16, bitRange=27
+sfr = "MC_FSR.LOCKS12", "Memory", 0xffffff68, 4, base=16, bitRange=28
+sfr = "MC_FSR.LOCKS13", "Memory", 0xffffff68, 4, base=16, bitRange=29
+sfr = "MC_FSR.LOCKS14", "Memory", 0xffffff68, 4, base=16, bitRange=30
+sfr = "MC_FSR.LOCKS15", "Memory", 0xffffff68, 4, base=16, bitRange=31
+; ========== Register definition for PDC_SPI peripheral ==========
+sfr = "SPI_RPR", "Memory", 0xfffe0100, 4, base=16
+sfr = "SPI_RCR", "Memory", 0xfffe0104, 4, base=16
+sfr = "SPI_TPR", "Memory", 0xfffe0108, 4, base=16
+sfr = "SPI_TCR", "Memory", 0xfffe010c, 4, base=16
+sfr = "SPI_RNPR", "Memory", 0xfffe0110, 4, base=16
+sfr = "SPI_RNCR", "Memory", 0xfffe0114, 4, base=16
+sfr = "SPI_TNPR", "Memory", 0xfffe0118, 4, base=16
+sfr = "SPI_TNCR", "Memory", 0xfffe011c, 4, base=16
+sfr = "SPI_PTCR", "Memory", 0xfffe0120, 4, base=16
+sfr = "SPI_PTCR.RXTEN", "Memory", 0xfffe0120, 4, base=16, bitRange=0
+sfr = "SPI_PTCR.RXTDIS", "Memory", 0xfffe0120, 4, base=16, bitRange=1
+sfr = "SPI_PTCR.TXTEN", "Memory", 0xfffe0120, 4, base=16, bitRange=8
+sfr = "SPI_PTCR.TXTDIS", "Memory", 0xfffe0120, 4, base=16, bitRange=9
+sfr = "SPI_PTSR", "Memory", 0xfffe0124, 4, base=16
+sfr = "SPI_PTSR.RXTEN", "Memory", 0xfffe0124, 4, base=16, bitRange=0
+sfr = "SPI_PTSR.TXTEN", "Memory", 0xfffe0124, 4, base=16, bitRange=8
+; ========== Register definition for SPI peripheral ==========
+sfr = "SPI_CR", "Memory", 0xfffe0000, 4, base=16
+sfr = "SPI_CR.SPIEN", "Memory", 0xfffe0000, 4, base=16, bitRange=0
+sfr = "SPI_CR.SPIDIS", "Memory", 0xfffe0000, 4, base=16, bitRange=1
+sfr = "SPI_CR.SWRST", "Memory", 0xfffe0000, 4, base=16, bitRange=7
+sfr = "SPI_CR.LASTXFER", "Memory", 0xfffe0000, 4, base=16, bitRange=24
+sfr = "SPI_MR", "Memory", 0xfffe0004, 4, base=16
+sfr = "SPI_MR.MSTR", "Memory", 0xfffe0004, 4, base=16, bitRange=0
+sfr = "SPI_MR.PS", "Memory", 0xfffe0004, 4, base=16, bitRange=1
+sfr = "SPI_MR.PCSDEC", "Memory", 0xfffe0004, 4, base=16, bitRange=2
+sfr = "SPI_MR.FDIV", "Memory", 0xfffe0004, 4, base=16, bitRange=3
+sfr = "SPI_MR.MODFDIS", "Memory", 0xfffe0004, 4, base=16, bitRange=4
+sfr = "SPI_MR.LLB", "Memory", 0xfffe0004, 4, base=16, bitRange=7
+sfr = "SPI_MR.PCS", "Memory", 0xfffe0004, 4, base=16, bitRange=16-19
+sfr = "SPI_MR.DLYBCS", "Memory", 0xfffe0004, 4, base=16, bitRange=24-31
+sfr = "SPI_RDR", "Memory", 0xfffe0008, 4, base=16
+sfr = "SPI_RDR.RD", "Memory", 0xfffe0008, 4, base=16, bitRange=0-15
+sfr = "SPI_RDR.RPCS", "Memory", 0xfffe0008, 4, base=16, bitRange=16-19
+sfr = "SPI_TDR", "Memory", 0xfffe000c, 4, base=16
+sfr = "SPI_TDR.TD", "Memory", 0xfffe000c, 4, base=16, bitRange=0-15
+sfr = "SPI_TDR.TPCS", "Memory", 0xfffe000c, 4, base=16, bitRange=16-19
+sfr = "SPI_TDR.LASTXFER", "Memory", 0xfffe000c, 4, base=16, bitRange=24
+sfr = "SPI_SR", "Memory", 0xfffe0010, 4, base=16
+sfr = "SPI_SR.RDRF", "Memory", 0xfffe0010, 4, base=16, bitRange=0
+sfr = "SPI_SR.TDRE", "Memory", 0xfffe0010, 4, base=16, bitRange=1
+sfr = "SPI_SR.MODF", "Memory", 0xfffe0010, 4, base=16, bitRange=2
+sfr = "SPI_SR.OVRES", "Memory", 0xfffe0010, 4, base=16, bitRange=3
+sfr = "SPI_SR.ENDRX", "Memory", 0xfffe0010, 4, base=16, bitRange=4
+sfr = "SPI_SR.ENDTX", "Memory", 0xfffe0010, 4, base=16, bitRange=5
+sfr = "SPI_SR.RXBUFF", "Memory", 0xfffe0010, 4, base=16, bitRange=6
+sfr = "SPI_SR.TXBUFE", "Memory", 0xfffe0010, 4, base=16, bitRange=7
+sfr = "SPI_SR.NSSR", "Memory", 0xfffe0010, 4, base=16, bitRange=8
+sfr = "SPI_SR.TXEMPTY", "Memory", 0xfffe0010, 4, base=16, bitRange=9
+sfr = "SPI_SR.SPIENS", "Memory", 0xfffe0010, 4, base=16, bitRange=16
+sfr = "SPI_IER", "Memory", 0xfffe0014, 4, base=16
+sfr = "SPI_IER.RDRF", "Memory", 0xfffe0014, 4, base=16, bitRange=0
+sfr = "SPI_IER.TDRE", "Memory", 0xfffe0014, 4, base=16, bitRange=1
+sfr = "SPI_IER.MODF", "Memory", 0xfffe0014, 4, base=16, bitRange=2
+sfr = "SPI_IER.OVRES", "Memory", 0xfffe0014, 4, base=16, bitRange=3
+sfr = "SPI_IER.ENDRX", "Memory", 0xfffe0014, 4, base=16, bitRange=4
+sfr = "SPI_IER.ENDTX", "Memory", 0xfffe0014, 4, base=16, bitRange=5
+sfr = "SPI_IER.RXBUFF", "Memory", 0xfffe0014, 4, base=16, bitRange=6
+sfr = "SPI_IER.TXBUFE", "Memory", 0xfffe0014, 4, base=16, bitRange=7
+sfr = "SPI_IER.NSSR", "Memory", 0xfffe0014, 4, base=16, bitRange=8
+sfr = "SPI_IER.TXEMPTY", "Memory", 0xfffe0014, 4, base=16, bitRange=9
+sfr = "SPI_IDR", "Memory", 0xfffe0018, 4, base=16
+sfr = "SPI_IDR.RDRF", "Memory", 0xfffe0018, 4, base=16, bitRange=0
+sfr = "SPI_IDR.TDRE", "Memory", 0xfffe0018, 4, base=16, bitRange=1
+sfr = "SPI_IDR.MODF", "Memory", 0xfffe0018, 4, base=16, bitRange=2
+sfr = "SPI_IDR.OVRES", "Memory", 0xfffe0018, 4, base=16, bitRange=3
+sfr = "SPI_IDR.ENDRX", "Memory", 0xfffe0018, 4, base=16, bitRange=4
+sfr = "SPI_IDR.ENDTX", "Memory", 0xfffe0018, 4, base=16, bitRange=5
+sfr = "SPI_IDR.RXBUFF", "Memory", 0xfffe0018, 4, base=16, bitRange=6
+sfr = "SPI_IDR.TXBUFE", "Memory", 0xfffe0018, 4, base=16, bitRange=7
+sfr = "SPI_IDR.NSSR", "Memory", 0xfffe0018, 4, base=16, bitRange=8
+sfr = "SPI_IDR.TXEMPTY", "Memory", 0xfffe0018, 4, base=16, bitRange=9
+sfr = "SPI_IMR", "Memory", 0xfffe001c, 4, base=16
+sfr = "SPI_IMR.RDRF", "Memory", 0xfffe001c, 4, base=16, bitRange=0
+sfr = "SPI_IMR.TDRE", "Memory", 0xfffe001c, 4, base=16, bitRange=1
+sfr = "SPI_IMR.MODF", "Memory", 0xfffe001c, 4, base=16, bitRange=2
+sfr = "SPI_IMR.OVRES", "Memory", 0xfffe001c, 4, base=16, bitRange=3
+sfr = "SPI_IMR.ENDRX", "Memory", 0xfffe001c, 4, base=16, bitRange=4
+sfr = "SPI_IMR.ENDTX", "Memory", 0xfffe001c, 4, base=16, bitRange=5
+sfr = "SPI_IMR.RXBUFF", "Memory", 0xfffe001c, 4, base=16, bitRange=6
+sfr = "SPI_IMR.TXBUFE", "Memory", 0xfffe001c, 4, base=16, bitRange=7
+sfr = "SPI_IMR.NSSR", "Memory", 0xfffe001c, 4, base=16, bitRange=8
+sfr = "SPI_IMR.TXEMPTY", "Memory", 0xfffe001c, 4, base=16, bitRange=9
+sfr = "SPI_CSR", "Memory", 0xfffe0030, 4, base=16
+sfr = "SPI_CSR.CPOL", "Memory", 0xfffe0030, 4, base=16, bitRange=0
+sfr = "SPI_CSR.NCPHA", "Memory", 0xfffe0030, 4, base=16, bitRange=1
+sfr = "SPI_CSR.CSAAT", "Memory", 0xfffe0030, 4, base=16, bitRange=3
+sfr = "SPI_CSR.BITS", "Memory", 0xfffe0030, 4, base=16, bitRange=4-7
+sfr = "SPI_CSR.SCBR", "Memory", 0xfffe0030, 4, base=16, bitRange=8-15
+sfr = "SPI_CSR.DLYBS", "Memory", 0xfffe0030, 4, base=16, bitRange=16-23
+sfr = "SPI_CSR.DLYBCT", "Memory", 0xfffe0030, 4, base=16, bitRange=24-31
+; ========== Register definition for PDC_ADC peripheral ==========
+sfr = "ADC_RPR", "Memory", 0xfffd8100, 4, base=16
+sfr = "ADC_RCR", "Memory", 0xfffd8104, 4, base=16
+sfr = "ADC_TPR", "Memory", 0xfffd8108, 4, base=16
+sfr = "ADC_TCR", "Memory", 0xfffd810c, 4, base=16
+sfr = "ADC_RNPR", "Memory", 0xfffd8110, 4, base=16
+sfr = "ADC_RNCR", "Memory", 0xfffd8114, 4, base=16
+sfr = "ADC_TNPR", "Memory", 0xfffd8118, 4, base=16
+sfr = "ADC_TNCR", "Memory", 0xfffd811c, 4, base=16
+sfr = "ADC_PTCR", "Memory", 0xfffd8120, 4, base=16
+sfr = "ADC_PTCR.RXTEN", "Memory", 0xfffd8120, 4, base=16, bitRange=0
+sfr = "ADC_PTCR.RXTDIS", "Memory", 0xfffd8120, 4, base=16, bitRange=1
+sfr = "ADC_PTCR.TXTEN", "Memory", 0xfffd8120, 4, base=16, bitRange=8
+sfr = "ADC_PTCR.TXTDIS", "Memory", 0xfffd8120, 4, base=16, bitRange=9
+sfr = "ADC_PTSR", "Memory", 0xfffd8124, 4, base=16
+sfr = "ADC_PTSR.RXTEN", "Memory", 0xfffd8124, 4, base=16, bitRange=0
+sfr = "ADC_PTSR.TXTEN", "Memory", 0xfffd8124, 4, base=16, bitRange=8
+; ========== Register definition for ADC peripheral ==========
+sfr = "ADC_CR", "Memory", 0xfffd8000, 4, base=16
+sfr = "ADC_CR.SWRST", "Memory", 0xfffd8000, 4, base=16, bitRange=0
+sfr = "ADC_CR.START", "Memory", 0xfffd8000, 4, base=16, bitRange=1
+sfr = "ADC_MR", "Memory", 0xfffd8004, 4, base=16
+sfr = "ADC_MR.TRGEN", "Memory", 0xfffd8004, 4, base=16, bitRange=0
+sfr = "ADC_MR.TRGSEL", "Memory", 0xfffd8004, 4, base=16, bitRange=1-3
+sfr = "ADC_MR.LOWRES", "Memory", 0xfffd8004, 4, base=16, bitRange=4
+sfr = "ADC_MR.SLEEP", "Memory", 0xfffd8004, 4, base=16, bitRange=5
+sfr = "ADC_MR.PRESCAL", "Memory", 0xfffd8004, 4, base=16, bitRange=8-13
+sfr = "ADC_MR.STARTUP", "Memory", 0xfffd8004, 4, base=16, bitRange=16-20
+sfr = "ADC_MR.SHTIM", "Memory", 0xfffd8004, 4, base=16, bitRange=24-27
+sfr = "ADC_CHER", "Memory", 0xfffd8010, 4, base=16
+sfr = "ADC_CHER.CH0", "Memory", 0xfffd8010, 4, base=16, bitRange=0
+sfr = "ADC_CHER.CH1", "Memory", 0xfffd8010, 4, base=16, bitRange=1
+sfr = "ADC_CHER.CH2", "Memory", 0xfffd8010, 4, base=16, bitRange=2
+sfr = "ADC_CHER.CH3", "Memory", 0xfffd8010, 4, base=16, bitRange=3
+sfr = "ADC_CHER.CH4", "Memory", 0xfffd8010, 4, base=16, bitRange=4
+sfr = "ADC_CHER.CH5", "Memory", 0xfffd8010, 4, base=16, bitRange=5
+sfr = "ADC_CHER.CH6", "Memory", 0xfffd8010, 4, base=16, bitRange=6
+sfr = "ADC_CHER.CH7", "Memory", 0xfffd8010, 4, base=16, bitRange=7
+sfr = "ADC_CHDR", "Memory", 0xfffd8014, 4, base=16
+sfr = "ADC_CHDR.CH0", "Memory", 0xfffd8014, 4, base=16, bitRange=0
+sfr = "ADC_CHDR.CH1", "Memory", 0xfffd8014, 4, base=16, bitRange=1
+sfr = "ADC_CHDR.CH2", "Memory", 0xfffd8014, 4, base=16, bitRange=2
+sfr = "ADC_CHDR.CH3", "Memory", 0xfffd8014, 4, base=16, bitRange=3
+sfr = "ADC_CHDR.CH4", "Memory", 0xfffd8014, 4, base=16, bitRange=4
+sfr = "ADC_CHDR.CH5", "Memory", 0xfffd8014, 4, base=16, bitRange=5
+sfr = "ADC_CHDR.CH6", "Memory", 0xfffd8014, 4, base=16, bitRange=6
+sfr = "ADC_CHDR.CH7", "Memory", 0xfffd8014, 4, base=16, bitRange=7
+sfr = "ADC_CHSR", "Memory", 0xfffd8018, 4, base=16
+sfr = "ADC_CHSR.CH0", "Memory", 0xfffd8018, 4, base=16, bitRange=0
+sfr = "ADC_CHSR.CH1", "Memory", 0xfffd8018, 4, base=16, bitRange=1
+sfr = "ADC_CHSR.CH2", "Memory", 0xfffd8018, 4, base=16, bitRange=2
+sfr = "ADC_CHSR.CH3", "Memory", 0xfffd8018, 4, base=16, bitRange=3
+sfr = "ADC_CHSR.CH4", "Memory", 0xfffd8018, 4, base=16, bitRange=4
+sfr = "ADC_CHSR.CH5", "Memory", 0xfffd8018, 4, base=16, bitRange=5
+sfr = "ADC_CHSR.CH6", "Memory", 0xfffd8018, 4, base=16, bitRange=6
+sfr = "ADC_CHSR.CH7", "Memory", 0xfffd8018, 4, base=16, bitRange=7
+sfr = "ADC_SR", "Memory", 0xfffd801c, 4, base=16
+sfr = "ADC_SR.EOC0", "Memory", 0xfffd801c, 4, base=16, bitRange=0
+sfr = "ADC_SR.EOC1", "Memory", 0xfffd801c, 4, base=16, bitRange=1
+sfr = "ADC_SR.EOC2", "Memory", 0xfffd801c, 4, base=16, bitRange=2
+sfr = "ADC_SR.EOC3", "Memory", 0xfffd801c, 4, base=16, bitRange=3
+sfr = "ADC_SR.EOC4", "Memory", 0xfffd801c, 4, base=16, bitRange=4
+sfr = "ADC_SR.EOC5", "Memory", 0xfffd801c, 4, base=16, bitRange=5
+sfr = "ADC_SR.EOC6", "Memory", 0xfffd801c, 4, base=16, bitRange=6
+sfr = "ADC_SR.EOC7", "Memory", 0xfffd801c, 4, base=16, bitRange=7
+sfr = "ADC_SR.OVRE0", "Memory", 0xfffd801c, 4, base=16, bitRange=8
+sfr = "ADC_SR.OVRE1", "Memory", 0xfffd801c, 4, base=16, bitRange=9
+sfr = "ADC_SR.OVRE2", "Memory", 0xfffd801c, 4, base=16, bitRange=10
+sfr = "ADC_SR.OVRE3", "Memory", 0xfffd801c, 4, base=16, bitRange=11
+sfr = "ADC_SR.OVRE4", "Memory", 0xfffd801c, 4, base=16, bitRange=12
+sfr = "ADC_SR.OVRE5", "Memory", 0xfffd801c, 4, base=16, bitRange=13
+sfr = "ADC_SR.OVRE6", "Memory", 0xfffd801c, 4, base=16, bitRange=14
+sfr = "ADC_SR.OVRE7", "Memory", 0xfffd801c, 4, base=16, bitRange=15
+sfr = "ADC_SR.DRDY", "Memory", 0xfffd801c, 4, base=16, bitRange=16
+sfr = "ADC_SR.GOVRE", "Memory", 0xfffd801c, 4, base=16, bitRange=17
+sfr = "ADC_SR.ENDRX", "Memory", 0xfffd801c, 4, base=16, bitRange=18
+sfr = "ADC_SR.RXBUFF", "Memory", 0xfffd801c, 4, base=16, bitRange=19
+sfr = "ADC_LCDR", "Memory", 0xfffd8020, 4, base=16
+sfr = "ADC_LCDR.LDATA", "Memory", 0xfffd8020, 4, base=16, bitRange=0-9
+sfr = "ADC_IER", "Memory", 0xfffd8024, 4, base=16
+sfr = "ADC_IER.EOC0", "Memory", 0xfffd8024, 4, base=16, bitRange=0
+sfr = "ADC_IER.EOC1", "Memory", 0xfffd8024, 4, base=16, bitRange=1
+sfr = "ADC_IER.EOC2", "Memory", 0xfffd8024, 4, base=16, bitRange=2
+sfr = "ADC_IER.EOC3", "Memory", 0xfffd8024, 4, base=16, bitRange=3
+sfr = "ADC_IER.EOC4", "Memory", 0xfffd8024, 4, base=16, bitRange=4
+sfr = "ADC_IER.EOC5", "Memory", 0xfffd8024, 4, base=16, bitRange=5
+sfr = "ADC_IER.EOC6", "Memory", 0xfffd8024, 4, base=16, bitRange=6
+sfr = "ADC_IER.EOC7", "Memory", 0xfffd8024, 4, base=16, bitRange=7
+sfr = "ADC_IER.OVRE0", "Memory", 0xfffd8024, 4, base=16, bitRange=8
+sfr = "ADC_IER.OVRE1", "Memory", 0xfffd8024, 4, base=16, bitRange=9
+sfr = "ADC_IER.OVRE2", "Memory", 0xfffd8024, 4, base=16, bitRange=10
+sfr = "ADC_IER.OVRE3", "Memory", 0xfffd8024, 4, base=16, bitRange=11
+sfr = "ADC_IER.OVRE4", "Memory", 0xfffd8024, 4, base=16, bitRange=12
+sfr = "ADC_IER.OVRE5", "Memory", 0xfffd8024, 4, base=16, bitRange=13
+sfr = "ADC_IER.OVRE6", "Memory", 0xfffd8024, 4, base=16, bitRange=14
+sfr = "ADC_IER.OVRE7", "Memory", 0xfffd8024, 4, base=16, bitRange=15
+sfr = "ADC_IER.DRDY", "Memory", 0xfffd8024, 4, base=16, bitRange=16
+sfr = "ADC_IER.GOVRE", "Memory", 0xfffd8024, 4, base=16, bitRange=17
+sfr = "ADC_IER.ENDRX", "Memory", 0xfffd8024, 4, base=16, bitRange=18
+sfr = "ADC_IER.RXBUFF", "Memory", 0xfffd8024, 4, base=16, bitRange=19
+sfr = "ADC_IDR", "Memory", 0xfffd8028, 4, base=16
+sfr = "ADC_IDR.EOC0", "Memory", 0xfffd8028, 4, base=16, bitRange=0
+sfr = "ADC_IDR.EOC1", "Memory", 0xfffd8028, 4, base=16, bitRange=1
+sfr = "ADC_IDR.EOC2", "Memory", 0xfffd8028, 4, base=16, bitRange=2
+sfr = "ADC_IDR.EOC3", "Memory", 0xfffd8028, 4, base=16, bitRange=3
+sfr = "ADC_IDR.EOC4", "Memory", 0xfffd8028, 4, base=16, bitRange=4
+sfr = "ADC_IDR.EOC5", "Memory", 0xfffd8028, 4, base=16, bitRange=5
+sfr = "ADC_IDR.EOC6", "Memory", 0xfffd8028, 4, base=16, bitRange=6
+sfr = "ADC_IDR.EOC7", "Memory", 0xfffd8028, 4, base=16, bitRange=7
+sfr = "ADC_IDR.OVRE0", "Memory", 0xfffd8028, 4, base=16, bitRange=8
+sfr = "ADC_IDR.OVRE1", "Memory", 0xfffd8028, 4, base=16, bitRange=9
+sfr = "ADC_IDR.OVRE2", "Memory", 0xfffd8028, 4, base=16, bitRange=10
+sfr = "ADC_IDR.OVRE3", "Memory", 0xfffd8028, 4, base=16, bitRange=11
+sfr = "ADC_IDR.OVRE4", "Memory", 0xfffd8028, 4, base=16, bitRange=12
+sfr = "ADC_IDR.OVRE5", "Memory", 0xfffd8028, 4, base=16, bitRange=13
+sfr = "ADC_IDR.OVRE6", "Memory", 0xfffd8028, 4, base=16, bitRange=14
+sfr = "ADC_IDR.OVRE7", "Memory", 0xfffd8028, 4, base=16, bitRange=15
+sfr = "ADC_IDR.DRDY", "Memory", 0xfffd8028, 4, base=16, bitRange=16
+sfr = "ADC_IDR.GOVRE", "Memory", 0xfffd8028, 4, base=16, bitRange=17
+sfr = "ADC_IDR.ENDRX", "Memory", 0xfffd8028, 4, base=16, bitRange=18
+sfr = "ADC_IDR.RXBUFF", "Memory", 0xfffd8028, 4, base=16, bitRange=19
+sfr = "ADC_IMR", "Memory", 0xfffd802c, 4, base=16
+sfr = "ADC_IMR.EOC0", "Memory", 0xfffd802c, 4, base=16, bitRange=0
+sfr = "ADC_IMR.EOC1", "Memory", 0xfffd802c, 4, base=16, bitRange=1
+sfr = "ADC_IMR.EOC2", "Memory", 0xfffd802c, 4, base=16, bitRange=2
+sfr = "ADC_IMR.EOC3", "Memory", 0xfffd802c, 4, base=16, bitRange=3
+sfr = "ADC_IMR.EOC4", "Memory", 0xfffd802c, 4, base=16, bitRange=4
+sfr = "ADC_IMR.EOC5", "Memory", 0xfffd802c, 4, base=16, bitRange=5
+sfr = "ADC_IMR.EOC6", "Memory", 0xfffd802c, 4, base=16, bitRange=6
+sfr = "ADC_IMR.EOC7", "Memory", 0xfffd802c, 4, base=16, bitRange=7
+sfr = "ADC_IMR.OVRE0", "Memory", 0xfffd802c, 4, base=16, bitRange=8
+sfr = "ADC_IMR.OVRE1", "Memory", 0xfffd802c, 4, base=16, bitRange=9
+sfr = "ADC_IMR.OVRE2", "Memory", 0xfffd802c, 4, base=16, bitRange=10
+sfr = "ADC_IMR.OVRE3", "Memory", 0xfffd802c, 4, base=16, bitRange=11
+sfr = "ADC_IMR.OVRE4", "Memory", 0xfffd802c, 4, base=16, bitRange=12
+sfr = "ADC_IMR.OVRE5", "Memory", 0xfffd802c, 4, base=16, bitRange=13
+sfr = "ADC_IMR.OVRE6", "Memory", 0xfffd802c, 4, base=16, bitRange=14
+sfr = "ADC_IMR.OVRE7", "Memory", 0xfffd802c, 4, base=16, bitRange=15
+sfr = "ADC_IMR.DRDY", "Memory", 0xfffd802c, 4, base=16, bitRange=16
+sfr = "ADC_IMR.GOVRE", "Memory", 0xfffd802c, 4, base=16, bitRange=17
+sfr = "ADC_IMR.ENDRX", "Memory", 0xfffd802c, 4, base=16, bitRange=18
+sfr = "ADC_IMR.RXBUFF", "Memory", 0xfffd802c, 4, base=16, bitRange=19
+sfr = "ADC_CDR0", "Memory", 0xfffd8030, 4, base=16
+sfr = "ADC_CDR0.DATA", "Memory", 0xfffd8030, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR1", "Memory", 0xfffd8034, 4, base=16
+sfr = "ADC_CDR1.DATA", "Memory", 0xfffd8034, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR2", "Memory", 0xfffd8038, 4, base=16
+sfr = "ADC_CDR2.DATA", "Memory", 0xfffd8038, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR3", "Memory", 0xfffd803c, 4, base=16
+sfr = "ADC_CDR3.DATA", "Memory", 0xfffd803c, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR4", "Memory", 0xfffd8040, 4, base=16
+sfr = "ADC_CDR4.DATA", "Memory", 0xfffd8040, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR5", "Memory", 0xfffd8044, 4, base=16
+sfr = "ADC_CDR5.DATA", "Memory", 0xfffd8044, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR6", "Memory", 0xfffd8048, 4, base=16
+sfr = "ADC_CDR6.DATA", "Memory", 0xfffd8048, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR7", "Memory", 0xfffd804c, 4, base=16
+sfr = "ADC_CDR7.DATA", "Memory", 0xfffd804c, 4, base=16, bitRange=0-9
+; ========== Register definition for PDC_SSC peripheral ==========
+sfr = "SSC_RPR", "Memory", 0xfffd4100, 4, base=16
+sfr = "SSC_RCR", "Memory", 0xfffd4104, 4, base=16
+sfr = "SSC_TPR", "Memory", 0xfffd4108, 4, base=16
+sfr = "SSC_TCR", "Memory", 0xfffd410c, 4, base=16
+sfr = "SSC_RNPR", "Memory", 0xfffd4110, 4, base=16
+sfr = "SSC_RNCR", "Memory", 0xfffd4114, 4, base=16
+sfr = "SSC_TNPR", "Memory", 0xfffd4118, 4, base=16
+sfr = "SSC_TNCR", "Memory", 0xfffd411c, 4, base=16
+sfr = "SSC_PTCR", "Memory", 0xfffd4120, 4, base=16
+sfr = "SSC_PTCR.RXTEN", "Memory", 0xfffd4120, 4, base=16, bitRange=0
+sfr = "SSC_PTCR.RXTDIS", "Memory", 0xfffd4120, 4, base=16, bitRange=1
+sfr = "SSC_PTCR.TXTEN", "Memory", 0xfffd4120, 4, base=16, bitRange=8
+sfr = "SSC_PTCR.TXTDIS", "Memory", 0xfffd4120, 4, base=16, bitRange=9
+sfr = "SSC_PTSR", "Memory", 0xfffd4124, 4, base=16
+sfr = "SSC_PTSR.RXTEN", "Memory", 0xfffd4124, 4, base=16, bitRange=0
+sfr = "SSC_PTSR.TXTEN", "Memory", 0xfffd4124, 4, base=16, bitRange=8
+; ========== Register definition for SSC peripheral ==========
+sfr = "SSC_CR", "Memory", 0xfffd4000, 4, base=16
+sfr = "SSC_CR.RXEN", "Memory", 0xfffd4000, 4, base=16, bitRange=0
+sfr = "SSC_CR.RXDIS", "Memory", 0xfffd4000, 4, base=16, bitRange=1
+sfr = "SSC_CR.TXEN", "Memory", 0xfffd4000, 4, base=16, bitRange=8
+sfr = "SSC_CR.TXDIS", "Memory", 0xfffd4000, 4, base=16, bitRange=9
+sfr = "SSC_CR.SWRST", "Memory", 0xfffd4000, 4, base=16, bitRange=15
+sfr = "SSC_CMR", "Memory", 0xfffd4004, 4, base=16
+sfr = "SSC_RCMR", "Memory", 0xfffd4010, 4, base=16
+sfr = "SSC_RCMR.CKS", "Memory", 0xfffd4010, 4, base=16, bitRange=0-1
+sfr = "SSC_RCMR.CKO", "Memory", 0xfffd4010, 4, base=16, bitRange=2-4
+sfr = "SSC_RCMR.CKI", "Memory", 0xfffd4010, 4, base=16, bitRange=5
+sfr = "SSC_RCMR.START", "Memory", 0xfffd4010, 4, base=16, bitRange=8-11
+sfr = "SSC_RCMR.STTDLY", "Memory", 0xfffd4010, 4, base=16, bitRange=16-23
+sfr = "SSC_RCMR.PERIOD", "Memory", 0xfffd4010, 4, base=16, bitRange=24-31
+sfr = "SSC_RFMR", "Memory", 0xfffd4014, 4, base=16
+sfr = "SSC_RFMR.DATLEN", "Memory", 0xfffd4014, 4, base=16, bitRange=0-4
+sfr = "SSC_RFMR.LOOP", "Memory", 0xfffd4014, 4, base=16, bitRange=5
+sfr = "SSC_RFMR.MSBF", "Memory", 0xfffd4014, 4, base=16, bitRange=7
+sfr = "SSC_RFMR.DATNB", "Memory", 0xfffd4014, 4, base=16, bitRange=8-11
+sfr = "SSC_RFMR.FSLEN", "Memory", 0xfffd4014, 4, base=16, bitRange=16-19
+sfr = "SSC_RFMR.FSOS", "Memory", 0xfffd4014, 4, base=16, bitRange=20-22
+sfr = "SSC_RFMR.FSEDGE", "Memory", 0xfffd4014, 4, base=16, bitRange=24
+sfr = "SSC_TCMR", "Memory", 0xfffd4018, 4, base=16
+sfr = "SSC_TCMR.CKS", "Memory", 0xfffd4018, 4, base=16, bitRange=0-1
+sfr = "SSC_TCMR.CKO", "Memory", 0xfffd4018, 4, base=16, bitRange=2-4
+sfr = "SSC_TCMR.CKI", "Memory", 0xfffd4018, 4, base=16, bitRange=5
+sfr = "SSC_TCMR.START", "Memory", 0xfffd4018, 4, base=16, bitRange=8-11
+sfr = "SSC_TCMR.STTDLY", "Memory", 0xfffd4018, 4, base=16, bitRange=16-23
+sfr = "SSC_TCMR.PERIOD", "Memory", 0xfffd4018, 4, base=16, bitRange=24-31
+sfr = "SSC_TFMR", "Memory", 0xfffd401c, 4, base=16
+sfr = "SSC_TFMR.DATLEN", "Memory", 0xfffd401c, 4, base=16, bitRange=0-4
+sfr = "SSC_TFMR.DATDEF", "Memory", 0xfffd401c, 4, base=16, bitRange=5
+sfr = "SSC_TFMR.MSBF", "Memory", 0xfffd401c, 4, base=16, bitRange=7
+sfr = "SSC_TFMR.DATNB", "Memory", 0xfffd401c, 4, base=16, bitRange=8-11
+sfr = "SSC_TFMR.FSLEN", "Memory", 0xfffd401c, 4, base=16, bitRange=16-19
+sfr = "SSC_TFMR.FSOS", "Memory", 0xfffd401c, 4, base=16, bitRange=20-22
+sfr = "SSC_TFMR.FSDEN", "Memory", 0xfffd401c, 4, base=16, bitRange=23
+sfr = "SSC_TFMR.FSEDGE", "Memory", 0xfffd401c, 4, base=16, bitRange=24
+sfr = "SSC_RHR", "Memory", 0xfffd4020, 4, base=16
+sfr = "SSC_THR", "Memory", 0xfffd4024, 4, base=16
+sfr = "SSC_RSHR", "Memory", 0xfffd4030, 4, base=16
+sfr = "SSC_TSHR", "Memory", 0xfffd4034, 4, base=16
+sfr = "SSC_SR", "Memory", 0xfffd4040, 4, base=16
+sfr = "SSC_SR.TXRDY", "Memory", 0xfffd4040, 4, base=16, bitRange=0
+sfr = "SSC_SR.TXEMPTY", "Memory", 0xfffd4040, 4, base=16, bitRange=1
+sfr = "SSC_SR.ENDTX", "Memory", 0xfffd4040, 4, base=16, bitRange=2
+sfr = "SSC_SR.TXBUFE", "Memory", 0xfffd4040, 4, base=16, bitRange=3
+sfr = "SSC_SR.RXRDY", "Memory", 0xfffd4040, 4, base=16, bitRange=4
+sfr = "SSC_SR.OVRUN", "Memory", 0xfffd4040, 4, base=16, bitRange=5
+sfr = "SSC_SR.ENDRX", "Memory", 0xfffd4040, 4, base=16, bitRange=6
+sfr = "SSC_SR.RXBUFF", "Memory", 0xfffd4040, 4, base=16, bitRange=7
+sfr = "SSC_SR.TXSYN", "Memory", 0xfffd4040, 4, base=16, bitRange=10
+sfr = "SSC_SR.RXSYN", "Memory", 0xfffd4040, 4, base=16, bitRange=11
+sfr = "SSC_SR.TXENA", "Memory", 0xfffd4040, 4, base=16, bitRange=16
+sfr = "SSC_SR.RXENA", "Memory", 0xfffd4040, 4, base=16, bitRange=17
+sfr = "SSC_IER", "Memory", 0xfffd4044, 4, base=16
+sfr = "SSC_IER.TXRDY", "Memory", 0xfffd4044, 4, base=16, bitRange=0
+sfr = "SSC_IER.TXEMPTY", "Memory", 0xfffd4044, 4, base=16, bitRange=1
+sfr = "SSC_IER.ENDTX", "Memory", 0xfffd4044, 4, base=16, bitRange=2
+sfr = "SSC_IER.TXBUFE", "Memory", 0xfffd4044, 4, base=16, bitRange=3
+sfr = "SSC_IER.RXRDY", "Memory", 0xfffd4044, 4, base=16, bitRange=4
+sfr = "SSC_IER.OVRUN", "Memory", 0xfffd4044, 4, base=16, bitRange=5
+sfr = "SSC_IER.ENDRX", "Memory", 0xfffd4044, 4, base=16, bitRange=6
+sfr = "SSC_IER.RXBUFF", "Memory", 0xfffd4044, 4, base=16, bitRange=7
+sfr = "SSC_IER.TXSYN", "Memory", 0xfffd4044, 4, base=16, bitRange=10
+sfr = "SSC_IER.RXSYN", "Memory", 0xfffd4044, 4, base=16, bitRange=11
+sfr = "SSC_IDR", "Memory", 0xfffd4048, 4, base=16
+sfr = "SSC_IDR.TXRDY", "Memory", 0xfffd4048, 4, base=16, bitRange=0
+sfr = "SSC_IDR.TXEMPTY", "Memory", 0xfffd4048, 4, base=16, bitRange=1
+sfr = "SSC_IDR.ENDTX", "Memory", 0xfffd4048, 4, base=16, bitRange=2
+sfr = "SSC_IDR.TXBUFE", "Memory", 0xfffd4048, 4, base=16, bitRange=3
+sfr = "SSC_IDR.RXRDY", "Memory", 0xfffd4048, 4, base=16, bitRange=4
+sfr = "SSC_IDR.OVRUN", "Memory", 0xfffd4048, 4, base=16, bitRange=5
+sfr = "SSC_IDR.ENDRX", "Memory", 0xfffd4048, 4, base=16, bitRange=6
+sfr = "SSC_IDR.RXBUFF", "Memory", 0xfffd4048, 4, base=16, bitRange=7
+sfr = "SSC_IDR.TXSYN", "Memory", 0xfffd4048, 4, base=16, bitRange=10
+sfr = "SSC_IDR.RXSYN", "Memory", 0xfffd4048, 4, base=16, bitRange=11
+sfr = "SSC_IMR", "Memory", 0xfffd404c, 4, base=16
+sfr = "SSC_IMR.TXRDY", "Memory", 0xfffd404c, 4, base=16, bitRange=0
+sfr = "SSC_IMR.TXEMPTY", "Memory", 0xfffd404c, 4, base=16, bitRange=1
+sfr = "SSC_IMR.ENDTX", "Memory", 0xfffd404c, 4, base=16, bitRange=2
+sfr = "SSC_IMR.TXBUFE", "Memory", 0xfffd404c, 4, base=16, bitRange=3
+sfr = "SSC_IMR.RXRDY", "Memory", 0xfffd404c, 4, base=16, bitRange=4
+sfr = "SSC_IMR.OVRUN", "Memory", 0xfffd404c, 4, base=16, bitRange=5
+sfr = "SSC_IMR.ENDRX", "Memory", 0xfffd404c, 4, base=16, bitRange=6
+sfr = "SSC_IMR.RXBUFF", "Memory", 0xfffd404c, 4, base=16, bitRange=7
+sfr = "SSC_IMR.TXSYN", "Memory", 0xfffd404c, 4, base=16, bitRange=10
+sfr = "SSC_IMR.RXSYN", "Memory", 0xfffd404c, 4, base=16, bitRange=11
+; ========== Register definition for PDC_US1 peripheral ==========
+sfr = "US1_RPR", "Memory", 0xfffc4100, 4, base=16
+sfr = "US1_RCR", "Memory", 0xfffc4104, 4, base=16
+sfr = "US1_TPR", "Memory", 0xfffc4108, 4, base=16
+sfr = "US1_TCR", "Memory", 0xfffc410c, 4, base=16
+sfr = "US1_RNPR", "Memory", 0xfffc4110, 4, base=16
+sfr = "US1_RNCR", "Memory", 0xfffc4114, 4, base=16
+sfr = "US1_TNPR", "Memory", 0xfffc4118, 4, base=16
+sfr = "US1_TNCR", "Memory", 0xfffc411c, 4, base=16
+sfr = "US1_PTCR", "Memory", 0xfffc4120, 4, base=16
+sfr = "US1_PTCR.RXTEN", "Memory", 0xfffc4120, 4, base=16, bitRange=0
+sfr = "US1_PTCR.RXTDIS", "Memory", 0xfffc4120, 4, base=16, bitRange=1
+sfr = "US1_PTCR.TXTEN", "Memory", 0xfffc4120, 4, base=16, bitRange=8
+sfr = "US1_PTCR.TXTDIS", "Memory", 0xfffc4120, 4, base=16, bitRange=9
+sfr = "US1_PTSR", "Memory", 0xfffc4124, 4, base=16
+sfr = "US1_PTSR.RXTEN", "Memory", 0xfffc4124, 4, base=16, bitRange=0
+sfr = "US1_PTSR.TXTEN", "Memory", 0xfffc4124, 4, base=16, bitRange=8
+; ========== Register definition for US1 peripheral ==========
+sfr = "US1_CR", "Memory", 0xfffc4000, 4, base=16
+sfr = "US1_CR.RSTRX", "Memory", 0xfffc4000, 4, base=16, bitRange=2
+sfr = "US1_CR.RSTTX", "Memory", 0xfffc4000, 4, base=16, bitRange=3
+sfr = "US1_CR.RXEN", "Memory", 0xfffc4000, 4, base=16, bitRange=4
+sfr = "US1_CR.RXDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=5
+sfr = "US1_CR.TXEN", "Memory", 0xfffc4000, 4, base=16, bitRange=6
+sfr = "US1_CR.TXDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=7
+sfr = "US1_CR.RSTSTA", "Memory", 0xfffc4000, 4, base=16, bitRange=8
+sfr = "US1_CR.STTBRK", "Memory", 0xfffc4000, 4, base=16, bitRange=9
+sfr = "US1_CR.STPBRK", "Memory", 0xfffc4000, 4, base=16, bitRange=10
+sfr = "US1_CR.STTTO", "Memory", 0xfffc4000, 4, base=16, bitRange=11
+sfr = "US1_CR.SENDA", "Memory", 0xfffc4000, 4, base=16, bitRange=12
+sfr = "US1_CR.RSTIT", "Memory", 0xfffc4000, 4, base=16, bitRange=13
+sfr = "US1_CR.RSTNACK", "Memory", 0xfffc4000, 4, base=16, bitRange=14
+sfr = "US1_CR.RETTO", "Memory", 0xfffc4000, 4, base=16, bitRange=15
+sfr = "US1_CR.DTREN", "Memory", 0xfffc4000, 4, base=16, bitRange=16
+sfr = "US1_CR.DTRDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=17
+sfr = "US1_CR.RTSEN", "Memory", 0xfffc4000, 4, base=16, bitRange=18
+sfr = "US1_CR.RTSDIS", "Memory", 0xfffc4000, 4, base=16, bitRange=19
+sfr = "US1_MR", "Memory", 0xfffc4004, 4, base=16
+sfr = "US1_MR.USMODE", "Memory", 0xfffc4004, 4, base=16, bitRange=0-3
+sfr = "US1_MR.CLKS", "Memory", 0xfffc4004, 4, base=16, bitRange=4-5
+sfr = "US1_MR.CHRL", "Memory", 0xfffc4004, 4, base=16, bitRange=6-7
+sfr = "US1_MR.SYNC", "Memory", 0xfffc4004, 4, base=16, bitRange=8
+sfr = "US1_MR.PAR", "Memory", 0xfffc4004, 4, base=16, bitRange=9-11
+sfr = "US1_MR.NBSTOP", "Memory", 0xfffc4004, 4, base=16, bitRange=12-13
+sfr = "US1_MR.CHMODE", "Memory", 0xfffc4004, 4, base=16, bitRange=14-15
+sfr = "US1_MR.MSBF", "Memory", 0xfffc4004, 4, base=16, bitRange=16
+sfr = "US1_MR.MODE9", "Memory", 0xfffc4004, 4, base=16, bitRange=17
+sfr = "US1_MR.CKLO", "Memory", 0xfffc4004, 4, base=16, bitRange=18
+sfr = "US1_MR.OVER", "Memory", 0xfffc4004, 4, base=16, bitRange=19
+sfr = "US1_MR.INACK", "Memory", 0xfffc4004, 4, base=16, bitRange=20
+sfr = "US1_MR.DSNACK", "Memory", 0xfffc4004, 4, base=16, bitRange=21
+sfr = "US1_MR.ITER", "Memory", 0xfffc4004, 4, base=16, bitRange=24
+sfr = "US1_MR.FILTER", "Memory", 0xfffc4004, 4, base=16, bitRange=28
+sfr = "US1_IER", "Memory", 0xfffc4008, 4, base=16
+sfr = "US1_IER.RXRDY", "Memory", 0xfffc4008, 4, base=16, bitRange=0
+sfr = "US1_IER.TXRDY", "Memory", 0xfffc4008, 4, base=16, bitRange=1
+sfr = "US1_IER.RXBRK", "Memory", 0xfffc4008, 4, base=16, bitRange=2
+sfr = "US1_IER.ENDRX", "Memory", 0xfffc4008, 4, base=16, bitRange=3
+sfr = "US1_IER.ENDTX", "Memory", 0xfffc4008, 4, base=16, bitRange=4
+sfr = "US1_IER.OVRE", "Memory", 0xfffc4008, 4, base=16, bitRange=5
+sfr = "US1_IER.FRAME", "Memory", 0xfffc4008, 4, base=16, bitRange=6
+sfr = "US1_IER.PARE", "Memory", 0xfffc4008, 4, base=16, bitRange=7
+sfr = "US1_IER.TIMEOUT", "Memory", 0xfffc4008, 4, base=16, bitRange=8
+sfr = "US1_IER.TXEMPTY", "Memory", 0xfffc4008, 4, base=16, bitRange=9
+sfr = "US1_IER.ITERATION", "Memory", 0xfffc4008, 4, base=16, bitRange=10
+sfr = "US1_IER.TXBUFE", "Memory", 0xfffc4008, 4, base=16, bitRange=11
+sfr = "US1_IER.RXBUFF", "Memory", 0xfffc4008, 4, base=16, bitRange=12
+sfr = "US1_IER.NACK", "Memory", 0xfffc4008, 4, base=16, bitRange=13
+sfr = "US1_IER.RIIC", "Memory", 0xfffc4008, 4, base=16, bitRange=16
+sfr = "US1_IER.DSRIC", "Memory", 0xfffc4008, 4, base=16, bitRange=17
+sfr = "US1_IER.DCDIC", "Memory", 0xfffc4008, 4, base=16, bitRange=18
+sfr = "US1_IER.CTSIC", "Memory", 0xfffc4008, 4, base=16, bitRange=19
+sfr = "US1_IDR", "Memory", 0xfffc400c, 4, base=16
+sfr = "US1_IDR.RXRDY", "Memory", 0xfffc400c, 4, base=16, bitRange=0
+sfr = "US1_IDR.TXRDY", "Memory", 0xfffc400c, 4, base=16, bitRange=1
+sfr = "US1_IDR.RXBRK", "Memory", 0xfffc400c, 4, base=16, bitRange=2
+sfr = "US1_IDR.ENDRX", "Memory", 0xfffc400c, 4, base=16, bitRange=3
+sfr = "US1_IDR.ENDTX", "Memory", 0xfffc400c, 4, base=16, bitRange=4
+sfr = "US1_IDR.OVRE", "Memory", 0xfffc400c, 4, base=16, bitRange=5
+sfr = "US1_IDR.FRAME", "Memory", 0xfffc400c, 4, base=16, bitRange=6
+sfr = "US1_IDR.PARE", "Memory", 0xfffc400c, 4, base=16, bitRange=7
+sfr = "US1_IDR.TIMEOUT", "Memory", 0xfffc400c, 4, base=16, bitRange=8
+sfr = "US1_IDR.TXEMPTY", "Memory", 0xfffc400c, 4, base=16, bitRange=9
+sfr = "US1_IDR.ITERATION", "Memory", 0xfffc400c, 4, base=16, bitRange=10
+sfr = "US1_IDR.TXBUFE", "Memory", 0xfffc400c, 4, base=16, bitRange=11
+sfr = "US1_IDR.RXBUFF", "Memory", 0xfffc400c, 4, base=16, bitRange=12
+sfr = "US1_IDR.NACK", "Memory", 0xfffc400c, 4, base=16, bitRange=13
+sfr = "US1_IDR.RIIC", "Memory", 0xfffc400c, 4, base=16, bitRange=16
+sfr = "US1_IDR.DSRIC", "Memory", 0xfffc400c, 4, base=16, bitRange=17
+sfr = "US1_IDR.DCDIC", "Memory", 0xfffc400c, 4, base=16, bitRange=18
+sfr = "US1_IDR.CTSIC", "Memory", 0xfffc400c, 4, base=16, bitRange=19
+sfr = "US1_IMR", "Memory", 0xfffc4010, 4, base=16
+sfr = "US1_IMR.RXRDY", "Memory", 0xfffc4010, 4, base=16, bitRange=0
+sfr = "US1_IMR.TXRDY", "Memory", 0xfffc4010, 4, base=16, bitRange=1
+sfr = "US1_IMR.RXBRK", "Memory", 0xfffc4010, 4, base=16, bitRange=2
+sfr = "US1_IMR.ENDRX", "Memory", 0xfffc4010, 4, base=16, bitRange=3
+sfr = "US1_IMR.ENDTX", "Memory", 0xfffc4010, 4, base=16, bitRange=4
+sfr = "US1_IMR.OVRE", "Memory", 0xfffc4010, 4, base=16, bitRange=5
+sfr = "US1_IMR.FRAME", "Memory", 0xfffc4010, 4, base=16, bitRange=6
+sfr = "US1_IMR.PARE", "Memory", 0xfffc4010, 4, base=16, bitRange=7
+sfr = "US1_IMR.TIMEOUT", "Memory", 0xfffc4010, 4, base=16, bitRange=8
+sfr = "US1_IMR.TXEMPTY", "Memory", 0xfffc4010, 4, base=16, bitRange=9
+sfr = "US1_IMR.ITERATION", "Memory", 0xfffc4010, 4, base=16, bitRange=10
+sfr = "US1_IMR.TXBUFE", "Memory", 0xfffc4010, 4, base=16, bitRange=11
+sfr = "US1_IMR.RXBUFF", "Memory", 0xfffc4010, 4, base=16, bitRange=12
+sfr = "US1_IMR.NACK", "Memory", 0xfffc4010, 4, base=16, bitRange=13
+sfr = "US1_IMR.RIIC", "Memory", 0xfffc4010, 4, base=16, bitRange=16
+sfr = "US1_IMR.DSRIC", "Memory", 0xfffc4010, 4, base=16, bitRange=17
+sfr = "US1_IMR.DCDIC", "Memory", 0xfffc4010, 4, base=16, bitRange=18
+sfr = "US1_IMR.CTSIC", "Memory", 0xfffc4010, 4, base=16, bitRange=19
+sfr = "US1_CSR", "Memory", 0xfffc4014, 4, base=16
+sfr = "US1_CSR.RXRDY", "Memory", 0xfffc4014, 4, base=16, bitRange=0
+sfr = "US1_CSR.TXRDY", "Memory", 0xfffc4014, 4, base=16, bitRange=1
+sfr = "US1_CSR.RXBRK", "Memory", 0xfffc4014, 4, base=16, bitRange=2
+sfr = "US1_CSR.ENDRX", "Memory", 0xfffc4014, 4, base=16, bitRange=3
+sfr = "US1_CSR.ENDTX", "Memory", 0xfffc4014, 4, base=16, bitRange=4
+sfr = "US1_CSR.OVRE", "Memory", 0xfffc4014, 4, base=16, bitRange=5
+sfr = "US1_CSR.FRAME", "Memory", 0xfffc4014, 4, base=16, bitRange=6
+sfr = "US1_CSR.PARE", "Memory", 0xfffc4014, 4, base=16, bitRange=7
+sfr = "US1_CSR.TIMEOUT", "Memory", 0xfffc4014, 4, base=16, bitRange=8
+sfr = "US1_CSR.TXEMPTY", "Memory", 0xfffc4014, 4, base=16, bitRange=9
+sfr = "US1_CSR.ITERATION", "Memory", 0xfffc4014, 4, base=16, bitRange=10
+sfr = "US1_CSR.TXBUFE", "Memory", 0xfffc4014, 4, base=16, bitRange=11
+sfr = "US1_CSR.RXBUFF", "Memory", 0xfffc4014, 4, base=16, bitRange=12
+sfr = "US1_CSR.NACK", "Memory", 0xfffc4014, 4, base=16, bitRange=13
+sfr = "US1_CSR.RIIC", "Memory", 0xfffc4014, 4, base=16, bitRange=16
+sfr = "US1_CSR.DSRIC", "Memory", 0xfffc4014, 4, base=16, bitRange=17
+sfr = "US1_CSR.DCDIC", "Memory", 0xfffc4014, 4, base=16, bitRange=18
+sfr = "US1_CSR.CTSIC", "Memory", 0xfffc4014, 4, base=16, bitRange=19
+sfr = "US1_CSR.RI", "Memory", 0xfffc4014, 4, base=16, bitRange=20
+sfr = "US1_CSR.DSR", "Memory", 0xfffc4014, 4, base=16, bitRange=21
+sfr = "US1_CSR.DCD", "Memory", 0xfffc4014, 4, base=16, bitRange=22
+sfr = "US1_CSR.CTS", "Memory", 0xfffc4014, 4, base=16, bitRange=23
+sfr = "US1_RHR", "Memory", 0xfffc4018, 4, base=16
+sfr = "US1_THR", "Memory", 0xfffc401c, 4, base=16
+sfr = "US1_BRGR", "Memory", 0xfffc4020, 4, base=16
+sfr = "US1_RTOR", "Memory", 0xfffc4024, 4, base=16
+sfr = "US1_TTGR", "Memory", 0xfffc4028, 4, base=16
+sfr = "US1_FIDI", "Memory", 0xfffc4040, 4, base=16
+sfr = "US1_NER", "Memory", 0xfffc4044, 4, base=16
+sfr = "US1_IF", "Memory", 0xfffc404c, 4, base=16
+; ========== Register definition for PDC_US0 peripheral ==========
+sfr = "US0_RPR", "Memory", 0xfffc0100, 4, base=16
+sfr = "US0_RCR", "Memory", 0xfffc0104, 4, base=16
+sfr = "US0_TPR", "Memory", 0xfffc0108, 4, base=16
+sfr = "US0_TCR", "Memory", 0xfffc010c, 4, base=16
+sfr = "US0_RNPR", "Memory", 0xfffc0110, 4, base=16
+sfr = "US0_RNCR", "Memory", 0xfffc0114, 4, base=16
+sfr = "US0_TNPR", "Memory", 0xfffc0118, 4, base=16
+sfr = "US0_TNCR", "Memory", 0xfffc011c, 4, base=16
+sfr = "US0_PTCR", "Memory", 0xfffc0120, 4, base=16
+sfr = "US0_PTCR.RXTEN", "Memory", 0xfffc0120, 4, base=16, bitRange=0
+sfr = "US0_PTCR.RXTDIS", "Memory", 0xfffc0120, 4, base=16, bitRange=1
+sfr = "US0_PTCR.TXTEN", "Memory", 0xfffc0120, 4, base=16, bitRange=8
+sfr = "US0_PTCR.TXTDIS", "Memory", 0xfffc0120, 4, base=16, bitRange=9
+sfr = "US0_PTSR", "Memory", 0xfffc0124, 4, base=16
+sfr = "US0_PTSR.RXTEN", "Memory", 0xfffc0124, 4, base=16, bitRange=0
+sfr = "US0_PTSR.TXTEN", "Memory", 0xfffc0124, 4, base=16, bitRange=8
+; ========== Register definition for US0 peripheral ==========
+sfr = "US0_CR", "Memory", 0xfffc0000, 4, base=16
+sfr = "US0_CR.RSTRX", "Memory", 0xfffc0000, 4, base=16, bitRange=2
+sfr = "US0_CR.RSTTX", "Memory", 0xfffc0000, 4, base=16, bitRange=3
+sfr = "US0_CR.RXEN", "Memory", 0xfffc0000, 4, base=16, bitRange=4
+sfr = "US0_CR.RXDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=5
+sfr = "US0_CR.TXEN", "Memory", 0xfffc0000, 4, base=16, bitRange=6
+sfr = "US0_CR.TXDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=7
+sfr = "US0_CR.RSTSTA", "Memory", 0xfffc0000, 4, base=16, bitRange=8
+sfr = "US0_CR.STTBRK", "Memory", 0xfffc0000, 4, base=16, bitRange=9
+sfr = "US0_CR.STPBRK", "Memory", 0xfffc0000, 4, base=16, bitRange=10
+sfr = "US0_CR.STTTO", "Memory", 0xfffc0000, 4, base=16, bitRange=11
+sfr = "US0_CR.SENDA", "Memory", 0xfffc0000, 4, base=16, bitRange=12
+sfr = "US0_CR.RSTIT", "Memory", 0xfffc0000, 4, base=16, bitRange=13
+sfr = "US0_CR.RSTNACK", "Memory", 0xfffc0000, 4, base=16, bitRange=14
+sfr = "US0_CR.RETTO", "Memory", 0xfffc0000, 4, base=16, bitRange=15
+sfr = "US0_CR.DTREN", "Memory", 0xfffc0000, 4, base=16, bitRange=16
+sfr = "US0_CR.DTRDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=17
+sfr = "US0_CR.RTSEN", "Memory", 0xfffc0000, 4, base=16, bitRange=18
+sfr = "US0_CR.RTSDIS", "Memory", 0xfffc0000, 4, base=16, bitRange=19
+sfr = "US0_MR", "Memory", 0xfffc0004, 4, base=16
+sfr = "US0_MR.USMODE", "Memory", 0xfffc0004, 4, base=16, bitRange=0-3
+sfr = "US0_MR.CLKS", "Memory", 0xfffc0004, 4, base=16, bitRange=4-5
+sfr = "US0_MR.CHRL", "Memory", 0xfffc0004, 4, base=16, bitRange=6-7
+sfr = "US0_MR.SYNC", "Memory", 0xfffc0004, 4, base=16, bitRange=8
+sfr = "US0_MR.PAR", "Memory", 0xfffc0004, 4, base=16, bitRange=9-11
+sfr = "US0_MR.NBSTOP", "Memory", 0xfffc0004, 4, base=16, bitRange=12-13
+sfr = "US0_MR.CHMODE", "Memory", 0xfffc0004, 4, base=16, bitRange=14-15
+sfr = "US0_MR.MSBF", "Memory", 0xfffc0004, 4, base=16, bitRange=16
+sfr = "US0_MR.MODE9", "Memory", 0xfffc0004, 4, base=16, bitRange=17
+sfr = "US0_MR.CKLO", "Memory", 0xfffc0004, 4, base=16, bitRange=18
+sfr = "US0_MR.OVER", "Memory", 0xfffc0004, 4, base=16, bitRange=19
+sfr = "US0_MR.INACK", "Memory", 0xfffc0004, 4, base=16, bitRange=20
+sfr = "US0_MR.DSNACK", "Memory", 0xfffc0004, 4, base=16, bitRange=21
+sfr = "US0_MR.ITER", "Memory", 0xfffc0004, 4, base=16, bitRange=24
+sfr = "US0_MR.FILTER", "Memory", 0xfffc0004, 4, base=16, bitRange=28
+sfr = "US0_IER", "Memory", 0xfffc0008, 4, base=16
+sfr = "US0_IER.RXRDY", "Memory", 0xfffc0008, 4, base=16, bitRange=0
+sfr = "US0_IER.TXRDY", "Memory", 0xfffc0008, 4, base=16, bitRange=1
+sfr = "US0_IER.RXBRK", "Memory", 0xfffc0008, 4, base=16, bitRange=2
+sfr = "US0_IER.ENDRX", "Memory", 0xfffc0008, 4, base=16, bitRange=3
+sfr = "US0_IER.ENDTX", "Memory", 0xfffc0008, 4, base=16, bitRange=4
+sfr = "US0_IER.OVRE", "Memory", 0xfffc0008, 4, base=16, bitRange=5
+sfr = "US0_IER.FRAME", "Memory", 0xfffc0008, 4, base=16, bitRange=6
+sfr = "US0_IER.PARE", "Memory", 0xfffc0008, 4, base=16, bitRange=7
+sfr = "US0_IER.TIMEOUT", "Memory", 0xfffc0008, 4, base=16, bitRange=8
+sfr = "US0_IER.TXEMPTY", "Memory", 0xfffc0008, 4, base=16, bitRange=9
+sfr = "US0_IER.ITERATION", "Memory", 0xfffc0008, 4, base=16, bitRange=10
+sfr = "US0_IER.TXBUFE", "Memory", 0xfffc0008, 4, base=16, bitRange=11
+sfr = "US0_IER.RXBUFF", "Memory", 0xfffc0008, 4, base=16, bitRange=12
+sfr = "US0_IER.NACK", "Memory", 0xfffc0008, 4, base=16, bitRange=13
+sfr = "US0_IER.RIIC", "Memory", 0xfffc0008, 4, base=16, bitRange=16
+sfr = "US0_IER.DSRIC", "Memory", 0xfffc0008, 4, base=16, bitRange=17
+sfr = "US0_IER.DCDIC", "Memory", 0xfffc0008, 4, base=16, bitRange=18
+sfr = "US0_IER.CTSIC", "Memory", 0xfffc0008, 4, base=16, bitRange=19
+sfr = "US0_IDR", "Memory", 0xfffc000c, 4, base=16
+sfr = "US0_IDR.RXRDY", "Memory", 0xfffc000c, 4, base=16, bitRange=0
+sfr = "US0_IDR.TXRDY", "Memory", 0xfffc000c, 4, base=16, bitRange=1
+sfr = "US0_IDR.RXBRK", "Memory", 0xfffc000c, 4, base=16, bitRange=2
+sfr = "US0_IDR.ENDRX", "Memory", 0xfffc000c, 4, base=16, bitRange=3
+sfr = "US0_IDR.ENDTX", "Memory", 0xfffc000c, 4, base=16, bitRange=4
+sfr = "US0_IDR.OVRE", "Memory", 0xfffc000c, 4, base=16, bitRange=5
+sfr = "US0_IDR.FRAME", "Memory", 0xfffc000c, 4, base=16, bitRange=6
+sfr = "US0_IDR.PARE", "Memory", 0xfffc000c, 4, base=16, bitRange=7
+sfr = "US0_IDR.TIMEOUT", "Memory", 0xfffc000c, 4, base=16, bitRange=8
+sfr = "US0_IDR.TXEMPTY", "Memory", 0xfffc000c, 4, base=16, bitRange=9
+sfr = "US0_IDR.ITERATION", "Memory", 0xfffc000c, 4, base=16, bitRange=10
+sfr = "US0_IDR.TXBUFE", "Memory", 0xfffc000c, 4, base=16, bitRange=11
+sfr = "US0_IDR.RXBUFF", "Memory", 0xfffc000c, 4, base=16, bitRange=12
+sfr = "US0_IDR.NACK", "Memory", 0xfffc000c, 4, base=16, bitRange=13
+sfr = "US0_IDR.RIIC", "Memory", 0xfffc000c, 4, base=16, bitRange=16
+sfr = "US0_IDR.DSRIC", "Memory", 0xfffc000c, 4, base=16, bitRange=17
+sfr = "US0_IDR.DCDIC", "Memory", 0xfffc000c, 4, base=16, bitRange=18
+sfr = "US0_IDR.CTSIC", "Memory", 0xfffc000c, 4, base=16, bitRange=19
+sfr = "US0_IMR", "Memory", 0xfffc0010, 4, base=16
+sfr = "US0_IMR.RXRDY", "Memory", 0xfffc0010, 4, base=16, bitRange=0
+sfr = "US0_IMR.TXRDY", "Memory", 0xfffc0010, 4, base=16, bitRange=1
+sfr = "US0_IMR.RXBRK", "Memory", 0xfffc0010, 4, base=16, bitRange=2
+sfr = "US0_IMR.ENDRX", "Memory", 0xfffc0010, 4, base=16, bitRange=3
+sfr = "US0_IMR.ENDTX", "Memory", 0xfffc0010, 4, base=16, bitRange=4
+sfr = "US0_IMR.OVRE", "Memory", 0xfffc0010, 4, base=16, bitRange=5
+sfr = "US0_IMR.FRAME", "Memory", 0xfffc0010, 4, base=16, bitRange=6
+sfr = "US0_IMR.PARE", "Memory", 0xfffc0010, 4, base=16, bitRange=7
+sfr = "US0_IMR.TIMEOUT", "Memory", 0xfffc0010, 4, base=16, bitRange=8
+sfr = "US0_IMR.TXEMPTY", "Memory", 0xfffc0010, 4, base=16, bitRange=9
+sfr = "US0_IMR.ITERATION", "Memory", 0xfffc0010, 4, base=16, bitRange=10
+sfr = "US0_IMR.TXBUFE", "Memory", 0xfffc0010, 4, base=16, bitRange=11
+sfr = "US0_IMR.RXBUFF", "Memory", 0xfffc0010, 4, base=16, bitRange=12
+sfr = "US0_IMR.NACK", "Memory", 0xfffc0010, 4, base=16, bitRange=13
+sfr = "US0_IMR.RIIC", "Memory", 0xfffc0010, 4, base=16, bitRange=16
+sfr = "US0_IMR.DSRIC", "Memory", 0xfffc0010, 4, base=16, bitRange=17
+sfr = "US0_IMR.DCDIC", "Memory", 0xfffc0010, 4, base=16, bitRange=18
+sfr = "US0_IMR.CTSIC", "Memory", 0xfffc0010, 4, base=16, bitRange=19
+sfr = "US0_CSR", "Memory", 0xfffc0014, 4, base=16
+sfr = "US0_CSR.RXRDY", "Memory", 0xfffc0014, 4, base=16, bitRange=0
+sfr = "US0_CSR.TXRDY", "Memory", 0xfffc0014, 4, base=16, bitRange=1
+sfr = "US0_CSR.RXBRK", "Memory", 0xfffc0014, 4, base=16, bitRange=2
+sfr = "US0_CSR.ENDRX", "Memory", 0xfffc0014, 4, base=16, bitRange=3
+sfr = "US0_CSR.ENDTX", "Memory", 0xfffc0014, 4, base=16, bitRange=4
+sfr = "US0_CSR.OVRE", "Memory", 0xfffc0014, 4, base=16, bitRange=5
+sfr = "US0_CSR.FRAME", "Memory", 0xfffc0014, 4, base=16, bitRange=6
+sfr = "US0_CSR.PARE", "Memory", 0xfffc0014, 4, base=16, bitRange=7
+sfr = "US0_CSR.TIMEOUT", "Memory", 0xfffc0014, 4, base=16, bitRange=8
+sfr = "US0_CSR.TXEMPTY", "Memory", 0xfffc0014, 4, base=16, bitRange=9
+sfr = "US0_CSR.ITERATION", "Memory", 0xfffc0014, 4, base=16, bitRange=10
+sfr = "US0_CSR.TXBUFE", "Memory", 0xfffc0014, 4, base=16, bitRange=11
+sfr = "US0_CSR.RXBUFF", "Memory", 0xfffc0014, 4, base=16, bitRange=12
+sfr = "US0_CSR.NACK", "Memory", 0xfffc0014, 4, base=16, bitRange=13
+sfr = "US0_CSR.RIIC", "Memory", 0xfffc0014, 4, base=16, bitRange=16
+sfr = "US0_CSR.DSRIC", "Memory", 0xfffc0014, 4, base=16, bitRange=17
+sfr = "US0_CSR.DCDIC", "Memory", 0xfffc0014, 4, base=16, bitRange=18
+sfr = "US0_CSR.CTSIC", "Memory", 0xfffc0014, 4, base=16, bitRange=19
+sfr = "US0_CSR.RI", "Memory", 0xfffc0014, 4, base=16, bitRange=20
+sfr = "US0_CSR.DSR", "Memory", 0xfffc0014, 4, base=16, bitRange=21
+sfr = "US0_CSR.DCD", "Memory", 0xfffc0014, 4, base=16, bitRange=22
+sfr = "US0_CSR.CTS", "Memory", 0xfffc0014, 4, base=16, bitRange=23
+sfr = "US0_RHR", "Memory", 0xfffc0018, 4, base=16
+sfr = "US0_THR", "Memory", 0xfffc001c, 4, base=16
+sfr = "US0_BRGR", "Memory", 0xfffc0020, 4, base=16
+sfr = "US0_RTOR", "Memory", 0xfffc0024, 4, base=16
+sfr = "US0_TTGR", "Memory", 0xfffc0028, 4, base=16
+sfr = "US0_FIDI", "Memory", 0xfffc0040, 4, base=16
+sfr = "US0_NER", "Memory", 0xfffc0044, 4, base=16
+sfr = "US0_IF", "Memory", 0xfffc004c, 4, base=16
+; ========== Register definition for TWI peripheral ==========
+sfr = "TWI_CR", "Memory", 0xfffb8000, 4, base=16
+sfr = "TWI_CR.START", "Memory", 0xfffb8000, 4, base=16, bitRange=0
+sfr = "TWI_CR.STOP", "Memory", 0xfffb8000, 4, base=16, bitRange=1
+sfr = "TWI_CR.MSEN", "Memory", 0xfffb8000, 4, base=16, bitRange=2
+sfr = "TWI_CR.MSDIS", "Memory", 0xfffb8000, 4, base=16, bitRange=3
+sfr = "TWI_CR.SWRST", "Memory", 0xfffb8000, 4, base=16, bitRange=7
+sfr = "TWI_MMR", "Memory", 0xfffb8004, 4, base=16
+sfr = "TWI_MMR.IADRSZ", "Memory", 0xfffb8004, 4, base=16, bitRange=8-9
+sfr = "TWI_MMR.MREAD", "Memory", 0xfffb8004, 4, base=16, bitRange=12
+sfr = "TWI_MMR.DADR", "Memory", 0xfffb8004, 4, base=16, bitRange=16-22
+sfr = "TWI_IADR", "Memory", 0xfffb800c, 4, base=16
+sfr = "TWI_CWGR", "Memory", 0xfffb8010, 4, base=16
+sfr = "TWI_CWGR.CLDIV", "Memory", 0xfffb8010, 4, base=16, bitRange=0-7
+sfr = "TWI_CWGR.CHDIV", "Memory", 0xfffb8010, 4, base=16, bitRange=8-15
+sfr = "TWI_CWGR.CKDIV", "Memory", 0xfffb8010, 4, base=16, bitRange=16-18
+sfr = "TWI_SR", "Memory", 0xfffb8020, 4, base=16
+sfr = "TWI_SR.TXCOMP", "Memory", 0xfffb8020, 4, base=16, bitRange=0
+sfr = "TWI_SR.RXRDY", "Memory", 0xfffb8020, 4, base=16, bitRange=1
+sfr = "TWI_SR.TXRDY", "Memory", 0xfffb8020, 4, base=16, bitRange=2
+sfr = "TWI_SR.OVRE", "Memory", 0xfffb8020, 4, base=16, bitRange=6
+sfr = "TWI_SR.UNRE", "Memory", 0xfffb8020, 4, base=16, bitRange=7
+sfr = "TWI_SR.NACK", "Memory", 0xfffb8020, 4, base=16, bitRange=8
+sfr = "TWI_IER", "Memory", 0xfffb8024, 4, base=16
+sfr = "TWI_IER.TXCOMP", "Memory", 0xfffb8024, 4, base=16, bitRange=0
+sfr = "TWI_IER.RXRDY", "Memory", 0xfffb8024, 4, base=16, bitRange=1
+sfr = "TWI_IER.TXRDY", "Memory", 0xfffb8024, 4, base=16, bitRange=2
+sfr = "TWI_IER.OVRE", "Memory", 0xfffb8024, 4, base=16, bitRange=6
+sfr = "TWI_IER.UNRE", "Memory", 0xfffb8024, 4, base=16, bitRange=7
+sfr = "TWI_IER.NACK", "Memory", 0xfffb8024, 4, base=16, bitRange=8
+sfr = "TWI_IDR", "Memory", 0xfffb8028, 4, base=16
+sfr = "TWI_IDR.TXCOMP", "Memory", 0xfffb8028, 4, base=16, bitRange=0
+sfr = "TWI_IDR.RXRDY", "Memory", 0xfffb8028, 4, base=16, bitRange=1
+sfr = "TWI_IDR.TXRDY", "Memory", 0xfffb8028, 4, base=16, bitRange=2
+sfr = "TWI_IDR.OVRE", "Memory", 0xfffb8028, 4, base=16, bitRange=6
+sfr = "TWI_IDR.UNRE", "Memory", 0xfffb8028, 4, base=16, bitRange=7
+sfr = "TWI_IDR.NACK", "Memory", 0xfffb8028, 4, base=16, bitRange=8
+sfr = "TWI_IMR", "Memory", 0xfffb802c, 4, base=16
+sfr = "TWI_IMR.TXCOMP", "Memory", 0xfffb802c, 4, base=16, bitRange=0
+sfr = "TWI_IMR.RXRDY", "Memory", 0xfffb802c, 4, base=16, bitRange=1
+sfr = "TWI_IMR.TXRDY", "Memory", 0xfffb802c, 4, base=16, bitRange=2
+sfr = "TWI_IMR.OVRE", "Memory", 0xfffb802c, 4, base=16, bitRange=6
+sfr = "TWI_IMR.UNRE", "Memory", 0xfffb802c, 4, base=16, bitRange=7
+sfr = "TWI_IMR.NACK", "Memory", 0xfffb802c, 4, base=16, bitRange=8
+sfr = "TWI_RHR", "Memory", 0xfffb8030, 4, base=16
+sfr = "TWI_THR", "Memory", 0xfffb8034, 4, base=16
+; ========== Register definition for TC0 peripheral ==========
+sfr = "TC0_CCR", "Memory", 0xfffa0000, 4, base=16
+sfr = "TC0_CCR.CLKEN", "Memory", 0xfffa0000, 4, base=16, bitRange=0
+sfr = "TC0_CCR.CLKDIS", "Memory", 0xfffa0000, 4, base=16, bitRange=1
+sfr = "TC0_CCR.SWTRG", "Memory", 0xfffa0000, 4, base=16, bitRange=2
+sfr = "TC0_CMR", "Memory", 0xfffa0004, 4, base=16
+sfr = "TC0_CMR.CLKS", "Memory", 0xfffa0004, 4, base=16, bitRange=0-2
+sfr = "TC0_CMR.CLKI", "Memory", 0xfffa0004, 4, base=16, bitRange=3
+sfr = "TC0_CMR.BURST", "Memory", 0xfffa0004, 4, base=16, bitRange=4-5
+sfr = "TC0_CMR.CPCSTOP", "Memory", 0xfffa0004, 4, base=16, bitRange=6
+sfr = "TC0_CMR.LDBSTOP", "Memory", 0xfffa0004, 4, base=16, bitRange=6
+sfr = "TC0_CMR.CPCDIS", "Memory", 0xfffa0004, 4, base=16, bitRange=7
+sfr = "TC0_CMR.LDBDIS", "Memory", 0xfffa0004, 4, base=16, bitRange=7
+sfr = "TC0_CMR.ETRGEDG", "Memory", 0xfffa0004, 4, base=16, bitRange=8-9
+sfr = "TC0_CMR.EEVTEDG", "Memory", 0xfffa0004, 4, base=16, bitRange=8-9
+sfr = "TC0_CMR.EEVT", "Memory", 0xfffa0004, 4, base=16, bitRange=10-11
+sfr = "TC0_CMR.ABETRG", "Memory", 0xfffa0004, 4, base=16, bitRange=10
+sfr = "TC0_CMR.ENETRG", "Memory", 0xfffa0004, 4, base=16, bitRange=12
+sfr = "TC0_CMR.WAVESEL", "Memory", 0xfffa0004, 4, base=16, bitRange=13-14
+sfr = "TC0_CMR.CPCTRG", "Memory", 0xfffa0004, 4, base=16, bitRange=14
+sfr = "TC0_CMR.WAVE", "Memory", 0xfffa0004, 4, base=16, bitRange=15
+sfr = "TC0_CMR.ACPA", "Memory", 0xfffa0004, 4, base=16, bitRange=16-17
+sfr = "TC0_CMR.LDRA", "Memory", 0xfffa0004, 4, base=16, bitRange=16-17
+sfr = "TC0_CMR.ACPC", "Memory", 0xfffa0004, 4, base=16, bitRange=18-19
+sfr = "TC0_CMR.LDRB", "Memory", 0xfffa0004, 4, base=16, bitRange=18-19
+sfr = "TC0_CMR.AEEVT", "Memory", 0xfffa0004, 4, base=16, bitRange=20-21
+sfr = "TC0_CMR.ASWTRG", "Memory", 0xfffa0004, 4, base=16, bitRange=22-23
+sfr = "TC0_CMR.BCPB", "Memory", 0xfffa0004, 4, base=16, bitRange=24-25
+sfr = "TC0_CMR.BCPC", "Memory", 0xfffa0004, 4, base=16, bitRange=26-27
+sfr = "TC0_CMR.BEEVT", "Memory", 0xfffa0004, 4, base=16, bitRange=28-29
+sfr = "TC0_CMR.BSWTRG", "Memory", 0xfffa0004, 4, base=16, bitRange=30-31
+sfr = "TC0_CV", "Memory", 0xfffa0010, 4, base=16
+sfr = "TC0_RA", "Memory", 0xfffa0014, 4, base=16
+sfr = "TC0_RB", "Memory", 0xfffa0018, 4, base=16
+sfr = "TC0_RC", "Memory", 0xfffa001c, 4, base=16
+sfr = "TC0_SR", "Memory", 0xfffa0020, 4, base=16
+sfr = "TC0_SR.COVFS", "Memory", 0xfffa0020, 4, base=16, bitRange=0
+sfr = "TC0_SR.LOVRS", "Memory", 0xfffa0020, 4, base=16, bitRange=1
+sfr = "TC0_SR.CPAS", "Memory", 0xfffa0020, 4, base=16, bitRange=2
+sfr = "TC0_SR.CPBS", "Memory", 0xfffa0020, 4, base=16, bitRange=3
+sfr = "TC0_SR.CPCS", "Memory", 0xfffa0020, 4, base=16, bitRange=4
+sfr = "TC0_SR.LDRAS", "Memory", 0xfffa0020, 4, base=16, bitRange=5
+sfr = "TC0_SR.LDRBS", "Memory", 0xfffa0020, 4, base=16, bitRange=6
+sfr = "TC0_SR.ETRGS", "Memory", 0xfffa0020, 4, base=16, bitRange=7
+sfr = "TC0_SR.CLKSTA", "Memory", 0xfffa0020, 4, base=16, bitRange=16
+sfr = "TC0_SR.MTIOA", "Memory", 0xfffa0020, 4, base=16, bitRange=17
+sfr = "TC0_SR.MTIOB", "Memory", 0xfffa0020, 4, base=16, bitRange=18
+sfr = "TC0_IER", "Memory", 0xfffa0024, 4, base=16
+sfr = "TC0_IER.COVFS", "Memory", 0xfffa0024, 4, base=16, bitRange=0
+sfr = "TC0_IER.LOVRS", "Memory", 0xfffa0024, 4, base=16, bitRange=1
+sfr = "TC0_IER.CPAS", "Memory", 0xfffa0024, 4, base=16, bitRange=2
+sfr = "TC0_IER.CPBS", "Memory", 0xfffa0024, 4, base=16, bitRange=3
+sfr = "TC0_IER.CPCS", "Memory", 0xfffa0024, 4, base=16, bitRange=4
+sfr = "TC0_IER.LDRAS", "Memory", 0xfffa0024, 4, base=16, bitRange=5
+sfr = "TC0_IER.LDRBS", "Memory", 0xfffa0024, 4, base=16, bitRange=6
+sfr = "TC0_IER.ETRGS", "Memory", 0xfffa0024, 4, base=16, bitRange=7
+sfr = "TC0_IDR", "Memory", 0xfffa0028, 4, base=16
+sfr = "TC0_IDR.COVFS", "Memory", 0xfffa0028, 4, base=16, bitRange=0
+sfr = "TC0_IDR.LOVRS", "Memory", 0xfffa0028, 4, base=16, bitRange=1
+sfr = "TC0_IDR.CPAS", "Memory", 0xfffa0028, 4, base=16, bitRange=2
+sfr = "TC0_IDR.CPBS", "Memory", 0xfffa0028, 4, base=16, bitRange=3
+sfr = "TC0_IDR.CPCS", "Memory", 0xfffa0028, 4, base=16, bitRange=4
+sfr = "TC0_IDR.LDRAS", "Memory", 0xfffa0028, 4, base=16, bitRange=5
+sfr = "TC0_IDR.LDRBS", "Memory", 0xfffa0028, 4, base=16, bitRange=6
+sfr = "TC0_IDR.ETRGS", "Memory", 0xfffa0028, 4, base=16, bitRange=7
+sfr = "TC0_IMR", "Memory", 0xfffa002c, 4, base=16
+sfr = "TC0_IMR.COVFS", "Memory", 0xfffa002c, 4, base=16, bitRange=0
+sfr = "TC0_IMR.LOVRS", "Memory", 0xfffa002c, 4, base=16, bitRange=1
+sfr = "TC0_IMR.CPAS", "Memory", 0xfffa002c, 4, base=16, bitRange=2
+sfr = "TC0_IMR.CPBS", "Memory", 0xfffa002c, 4, base=16, bitRange=3
+sfr = "TC0_IMR.CPCS", "Memory", 0xfffa002c, 4, base=16, bitRange=4
+sfr = "TC0_IMR.LDRAS", "Memory", 0xfffa002c, 4, base=16, bitRange=5
+sfr = "TC0_IMR.LDRBS", "Memory", 0xfffa002c, 4, base=16, bitRange=6
+sfr = "TC0_IMR.ETRGS", "Memory", 0xfffa002c, 4, base=16, bitRange=7
+; ========== Register definition for TC1 peripheral ==========
+sfr = "TC1_CCR", "Memory", 0xfffa0040, 4, base=16
+sfr = "TC1_CCR.CLKEN", "Memory", 0xfffa0040, 4, base=16, bitRange=0
+sfr = "TC1_CCR.CLKDIS", "Memory", 0xfffa0040, 4, base=16, bitRange=1
+sfr = "TC1_CCR.SWTRG", "Memory", 0xfffa0040, 4, base=16, bitRange=2
+sfr = "TC1_CMR", "Memory", 0xfffa0044, 4, base=16
+sfr = "TC1_CMR.CLKS", "Memory", 0xfffa0044, 4, base=16, bitRange=0-2
+sfr = "TC1_CMR.CLKI", "Memory", 0xfffa0044, 4, base=16, bitRange=3
+sfr = "TC1_CMR.BURST", "Memory", 0xfffa0044, 4, base=16, bitRange=4-5
+sfr = "TC1_CMR.CPCSTOP", "Memory", 0xfffa0044, 4, base=16, bitRange=6
+sfr = "TC1_CMR.LDBSTOP", "Memory", 0xfffa0044, 4, base=16, bitRange=6
+sfr = "TC1_CMR.CPCDIS", "Memory", 0xfffa0044, 4, base=16, bitRange=7
+sfr = "TC1_CMR.LDBDIS", "Memory", 0xfffa0044, 4, base=16, bitRange=7
+sfr = "TC1_CMR.ETRGEDG", "Memory", 0xfffa0044, 4, base=16, bitRange=8-9
+sfr = "TC1_CMR.EEVTEDG", "Memory", 0xfffa0044, 4, base=16, bitRange=8-9
+sfr = "TC1_CMR.EEVT", "Memory", 0xfffa0044, 4, base=16, bitRange=10-11
+sfr = "TC1_CMR.ABETRG", "Memory", 0xfffa0044, 4, base=16, bitRange=10
+sfr = "TC1_CMR.ENETRG", "Memory", 0xfffa0044, 4, base=16, bitRange=12
+sfr = "TC1_CMR.WAVESEL", "Memory", 0xfffa0044, 4, base=16, bitRange=13-14
+sfr = "TC1_CMR.CPCTRG", "Memory", 0xfffa0044, 4, base=16, bitRange=14
+sfr = "TC1_CMR.WAVE", "Memory", 0xfffa0044, 4, base=16, bitRange=15
+sfr = "TC1_CMR.ACPA", "Memory", 0xfffa0044, 4, base=16, bitRange=16-17
+sfr = "TC1_CMR.LDRA", "Memory", 0xfffa0044, 4, base=16, bitRange=16-17
+sfr = "TC1_CMR.ACPC", "Memory", 0xfffa0044, 4, base=16, bitRange=18-19
+sfr = "TC1_CMR.LDRB", "Memory", 0xfffa0044, 4, base=16, bitRange=18-19
+sfr = "TC1_CMR.AEEVT", "Memory", 0xfffa0044, 4, base=16, bitRange=20-21
+sfr = "TC1_CMR.ASWTRG", "Memory", 0xfffa0044, 4, base=16, bitRange=22-23
+sfr = "TC1_CMR.BCPB", "Memory", 0xfffa0044, 4, base=16, bitRange=24-25
+sfr = "TC1_CMR.BCPC", "Memory", 0xfffa0044, 4, base=16, bitRange=26-27
+sfr = "TC1_CMR.BEEVT", "Memory", 0xfffa0044, 4, base=16, bitRange=28-29
+sfr = "TC1_CMR.BSWTRG", "Memory", 0xfffa0044, 4, base=16, bitRange=30-31
+sfr = "TC1_CV", "Memory", 0xfffa0050, 4, base=16
+sfr = "TC1_RA", "Memory", 0xfffa0054, 4, base=16
+sfr = "TC1_RB", "Memory", 0xfffa0058, 4, base=16
+sfr = "TC1_RC", "Memory", 0xfffa005c, 4, base=16
+sfr = "TC1_SR", "Memory", 0xfffa0060, 4, base=16
+sfr = "TC1_SR.COVFS", "Memory", 0xfffa0060, 4, base=16, bitRange=0
+sfr = "TC1_SR.LOVRS", "Memory", 0xfffa0060, 4, base=16, bitRange=1
+sfr = "TC1_SR.CPAS", "Memory", 0xfffa0060, 4, base=16, bitRange=2
+sfr = "TC1_SR.CPBS", "Memory", 0xfffa0060, 4, base=16, bitRange=3
+sfr = "TC1_SR.CPCS", "Memory", 0xfffa0060, 4, base=16, bitRange=4
+sfr = "TC1_SR.LDRAS", "Memory", 0xfffa0060, 4, base=16, bitRange=5
+sfr = "TC1_SR.LDRBS", "Memory", 0xfffa0060, 4, base=16, bitRange=6
+sfr = "TC1_SR.ETRGS", "Memory", 0xfffa0060, 4, base=16, bitRange=7
+sfr = "TC1_SR.CLKSTA", "Memory", 0xfffa0060, 4, base=16, bitRange=16
+sfr = "TC1_SR.MTIOA", "Memory", 0xfffa0060, 4, base=16, bitRange=17
+sfr = "TC1_SR.MTIOB", "Memory", 0xfffa0060, 4, base=16, bitRange=18
+sfr = "TC1_IER", "Memory", 0xfffa0064, 4, base=16
+sfr = "TC1_IER.COVFS", "Memory", 0xfffa0064, 4, base=16, bitRange=0
+sfr = "TC1_IER.LOVRS", "Memory", 0xfffa0064, 4, base=16, bitRange=1
+sfr = "TC1_IER.CPAS", "Memory", 0xfffa0064, 4, base=16, bitRange=2
+sfr = "TC1_IER.CPBS", "Memory", 0xfffa0064, 4, base=16, bitRange=3
+sfr = "TC1_IER.CPCS", "Memory", 0xfffa0064, 4, base=16, bitRange=4
+sfr = "TC1_IER.LDRAS", "Memory", 0xfffa0064, 4, base=16, bitRange=5
+sfr = "TC1_IER.LDRBS", "Memory", 0xfffa0064, 4, base=16, bitRange=6
+sfr = "TC1_IER.ETRGS", "Memory", 0xfffa0064, 4, base=16, bitRange=7
+sfr = "TC1_IDR", "Memory", 0xfffa0068, 4, base=16
+sfr = "TC1_IDR.COVFS", "Memory", 0xfffa0068, 4, base=16, bitRange=0
+sfr = "TC1_IDR.LOVRS", "Memory", 0xfffa0068, 4, base=16, bitRange=1
+sfr = "TC1_IDR.CPAS", "Memory", 0xfffa0068, 4, base=16, bitRange=2
+sfr = "TC1_IDR.CPBS", "Memory", 0xfffa0068, 4, base=16, bitRange=3
+sfr = "TC1_IDR.CPCS", "Memory", 0xfffa0068, 4, base=16, bitRange=4
+sfr = "TC1_IDR.LDRAS", "Memory", 0xfffa0068, 4, base=16, bitRange=5
+sfr = "TC1_IDR.LDRBS", "Memory", 0xfffa0068, 4, base=16, bitRange=6
+sfr = "TC1_IDR.ETRGS", "Memory", 0xfffa0068, 4, base=16, bitRange=7
+sfr = "TC1_IMR", "Memory", 0xfffa006c, 4, base=16
+sfr = "TC1_IMR.COVFS", "Memory", 0xfffa006c, 4, base=16, bitRange=0
+sfr = "TC1_IMR.LOVRS", "Memory", 0xfffa006c, 4, base=16, bitRange=1
+sfr = "TC1_IMR.CPAS", "Memory", 0xfffa006c, 4, base=16, bitRange=2
+sfr = "TC1_IMR.CPBS", "Memory", 0xfffa006c, 4, base=16, bitRange=3
+sfr = "TC1_IMR.CPCS", "Memory", 0xfffa006c, 4, base=16, bitRange=4
+sfr = "TC1_IMR.LDRAS", "Memory", 0xfffa006c, 4, base=16, bitRange=5
+sfr = "TC1_IMR.LDRBS", "Memory", 0xfffa006c, 4, base=16, bitRange=6
+sfr = "TC1_IMR.ETRGS", "Memory", 0xfffa006c, 4, base=16, bitRange=7
+; ========== Register definition for TC2 peripheral ==========
+sfr = "TC2_CCR", "Memory", 0xfffa0080, 4, base=16
+sfr = "TC2_CCR.CLKEN", "Memory", 0xfffa0080, 4, base=16, bitRange=0
+sfr = "TC2_CCR.CLKDIS", "Memory", 0xfffa0080, 4, base=16, bitRange=1
+sfr = "TC2_CCR.SWTRG", "Memory", 0xfffa0080, 4, base=16, bitRange=2
+sfr = "TC2_CMR", "Memory", 0xfffa0084, 4, base=16
+sfr = "TC2_CMR.CLKS", "Memory", 0xfffa0084, 4, base=16, bitRange=0-2
+sfr = "TC2_CMR.CLKI", "Memory", 0xfffa0084, 4, base=16, bitRange=3
+sfr = "TC2_CMR.BURST", "Memory", 0xfffa0084, 4, base=16, bitRange=4-5
+sfr = "TC2_CMR.CPCSTOP", "Memory", 0xfffa0084, 4, base=16, bitRange=6
+sfr = "TC2_CMR.LDBSTOP", "Memory", 0xfffa0084, 4, base=16, bitRange=6
+sfr = "TC2_CMR.CPCDIS", "Memory", 0xfffa0084, 4, base=16, bitRange=7
+sfr = "TC2_CMR.LDBDIS", "Memory", 0xfffa0084, 4, base=16, bitRange=7
+sfr = "TC2_CMR.ETRGEDG", "Memory", 0xfffa0084, 4, base=16, bitRange=8-9
+sfr = "TC2_CMR.EEVTEDG", "Memory", 0xfffa0084, 4, base=16, bitRange=8-9
+sfr = "TC2_CMR.EEVT", "Memory", 0xfffa0084, 4, base=16, bitRange=10-11
+sfr = "TC2_CMR.ABETRG", "Memory", 0xfffa0084, 4, base=16, bitRange=10
+sfr = "TC2_CMR.ENETRG", "Memory", 0xfffa0084, 4, base=16, bitRange=12
+sfr = "TC2_CMR.WAVESEL", "Memory", 0xfffa0084, 4, base=16, bitRange=13-14
+sfr = "TC2_CMR.CPCTRG", "Memory", 0xfffa0084, 4, base=16, bitRange=14
+sfr = "TC2_CMR.WAVE", "Memory", 0xfffa0084, 4, base=16, bitRange=15
+sfr = "TC2_CMR.ACPA", "Memory", 0xfffa0084, 4, base=16, bitRange=16-17
+sfr = "TC2_CMR.LDRA", "Memory", 0xfffa0084, 4, base=16, bitRange=16-17
+sfr = "TC2_CMR.ACPC", "Memory", 0xfffa0084, 4, base=16, bitRange=18-19
+sfr = "TC2_CMR.LDRB", "Memory", 0xfffa0084, 4, base=16, bitRange=18-19
+sfr = "TC2_CMR.AEEVT", "Memory", 0xfffa0084, 4, base=16, bitRange=20-21
+sfr = "TC2_CMR.ASWTRG", "Memory", 0xfffa0084, 4, base=16, bitRange=22-23
+sfr = "TC2_CMR.BCPB", "Memory", 0xfffa0084, 4, base=16, bitRange=24-25
+sfr = "TC2_CMR.BCPC", "Memory", 0xfffa0084, 4, base=16, bitRange=26-27
+sfr = "TC2_CMR.BEEVT", "Memory", 0xfffa0084, 4, base=16, bitRange=28-29
+sfr = "TC2_CMR.BSWTRG", "Memory", 0xfffa0084, 4, base=16, bitRange=30-31
+sfr = "TC2_CV", "Memory", 0xfffa0090, 4, base=16
+sfr = "TC2_RA", "Memory", 0xfffa0094, 4, base=16
+sfr = "TC2_RB", "Memory", 0xfffa0098, 4, base=16
+sfr = "TC2_RC", "Memory", 0xfffa009c, 4, base=16
+sfr = "TC2_SR", "Memory", 0xfffa00a0, 4, base=16
+sfr = "TC2_SR.COVFS", "Memory", 0xfffa00a0, 4, base=16, bitRange=0
+sfr = "TC2_SR.LOVRS", "Memory", 0xfffa00a0, 4, base=16, bitRange=1
+sfr = "TC2_SR.CPAS", "Memory", 0xfffa00a0, 4, base=16, bitRange=2
+sfr = "TC2_SR.CPBS", "Memory", 0xfffa00a0, 4, base=16, bitRange=3
+sfr = "TC2_SR.CPCS", "Memory", 0xfffa00a0, 4, base=16, bitRange=4
+sfr = "TC2_SR.LDRAS", "Memory", 0xfffa00a0, 4, base=16, bitRange=5
+sfr = "TC2_SR.LDRBS", "Memory", 0xfffa00a0, 4, base=16, bitRange=6
+sfr = "TC2_SR.ETRGS", "Memory", 0xfffa00a0, 4, base=16, bitRange=7
+sfr = "TC2_SR.CLKSTA", "Memory", 0xfffa00a0, 4, base=16, bitRange=16
+sfr = "TC2_SR.MTIOA", "Memory", 0xfffa00a0, 4, base=16, bitRange=17
+sfr = "TC2_SR.MTIOB", "Memory", 0xfffa00a0, 4, base=16, bitRange=18
+sfr = "TC2_IER", "Memory", 0xfffa00a4, 4, base=16
+sfr = "TC2_IER.COVFS", "Memory", 0xfffa00a4, 4, base=16, bitRange=0
+sfr = "TC2_IER.LOVRS", "Memory", 0xfffa00a4, 4, base=16, bitRange=1
+sfr = "TC2_IER.CPAS", "Memory", 0xfffa00a4, 4, base=16, bitRange=2
+sfr = "TC2_IER.CPBS", "Memory", 0xfffa00a4, 4, base=16, bitRange=3
+sfr = "TC2_IER.CPCS", "Memory", 0xfffa00a4, 4, base=16, bitRange=4
+sfr = "TC2_IER.LDRAS", "Memory", 0xfffa00a4, 4, base=16, bitRange=5
+sfr = "TC2_IER.LDRBS", "Memory", 0xfffa00a4, 4, base=16, bitRange=6
+sfr = "TC2_IER.ETRGS", "Memory", 0xfffa00a4, 4, base=16, bitRange=7
+sfr = "TC2_IDR", "Memory", 0xfffa00a8, 4, base=16
+sfr = "TC2_IDR.COVFS", "Memory", 0xfffa00a8, 4, base=16, bitRange=0
+sfr = "TC2_IDR.LOVRS", "Memory", 0xfffa00a8, 4, base=16, bitRange=1
+sfr = "TC2_IDR.CPAS", "Memory", 0xfffa00a8, 4, base=16, bitRange=2
+sfr = "TC2_IDR.CPBS", "Memory", 0xfffa00a8, 4, base=16, bitRange=3
+sfr = "TC2_IDR.CPCS", "Memory", 0xfffa00a8, 4, base=16, bitRange=4
+sfr = "TC2_IDR.LDRAS", "Memory", 0xfffa00a8, 4, base=16, bitRange=5
+sfr = "TC2_IDR.LDRBS", "Memory", 0xfffa00a8, 4, base=16, bitRange=6
+sfr = "TC2_IDR.ETRGS", "Memory", 0xfffa00a8, 4, base=16, bitRange=7
+sfr = "TC2_IMR", "Memory", 0xfffa00ac, 4, base=16
+sfr = "TC2_IMR.COVFS", "Memory", 0xfffa00ac, 4, base=16, bitRange=0
+sfr = "TC2_IMR.LOVRS", "Memory", 0xfffa00ac, 4, base=16, bitRange=1
+sfr = "TC2_IMR.CPAS", "Memory", 0xfffa00ac, 4, base=16, bitRange=2
+sfr = "TC2_IMR.CPBS", "Memory", 0xfffa00ac, 4, base=16, bitRange=3
+sfr = "TC2_IMR.CPCS", "Memory", 0xfffa00ac, 4, base=16, bitRange=4
+sfr = "TC2_IMR.LDRAS", "Memory", 0xfffa00ac, 4, base=16, bitRange=5
+sfr = "TC2_IMR.LDRBS", "Memory", 0xfffa00ac, 4, base=16, bitRange=6
+sfr = "TC2_IMR.ETRGS", "Memory", 0xfffa00ac, 4, base=16, bitRange=7
+; ========== Register definition for TCB peripheral ==========
+sfr = "TCB_BCR", "Memory", 0xfffa00c0, 4, base=16
+sfr = "TCB_BCR.SYNC", "Memory", 0xfffa00c0, 4, base=16, bitRange=0
+sfr = "TCB_BMR", "Memory", 0xfffa00c4, 4, base=16
+sfr = "TCB_BMR.TC0XC0S", "Memory", 0xfffa00c4, 4, base=16, bitRange=0-1
+sfr = "TCB_BMR.TC1XC1S", "Memory", 0xfffa00c4, 4, base=16, bitRange=2-3
+sfr = "TCB_BMR.TC2XC2S", "Memory", 0xfffa00c4, 4, base=16, bitRange=4-5
+; ========== Register definition for PWMC_CH3 peripheral ==========
+sfr = "PWMC_CH3_CMR", "Memory", 0xfffcc260, 4, base=16
+sfr = "PWMC_CH3_CMR.CPRE", "Memory", 0xfffcc260, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH3_CMR.CALG", "Memory", 0xfffcc260, 4, base=16, bitRange=8
+sfr = "PWMC_CH3_CMR.CPOL", "Memory", 0xfffcc260, 4, base=16, bitRange=9
+sfr = "PWMC_CH3_CMR.CPD", "Memory", 0xfffcc260, 4, base=16, bitRange=10
+sfr = "PWMC_CH3_CDTYR", "Memory", 0xfffcc264, 4, base=16
+sfr = "PWMC_CH3_CDTYR.CDTY", "Memory", 0xfffcc264, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_CPRDR", "Memory", 0xfffcc268, 4, base=16
+sfr = "PWMC_CH3_CPRDR.CPRD", "Memory", 0xfffcc268, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_CCNTR", "Memory", 0xfffcc26c, 4, base=16
+sfr = "PWMC_CH3_CCNTR.CCNT", "Memory", 0xfffcc26c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_CUPDR", "Memory", 0xfffcc270, 4, base=16
+sfr = "PWMC_CH3_CUPDR.CUPD", "Memory", 0xfffcc270, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_Reserved", "Memory", 0xfffcc274, 4, base=16
+; ========== Register definition for PWMC_CH2 peripheral ==========
+sfr = "PWMC_CH2_CMR", "Memory", 0xfffcc240, 4, base=16
+sfr = "PWMC_CH2_CMR.CPRE", "Memory", 0xfffcc240, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH2_CMR.CALG", "Memory", 0xfffcc240, 4, base=16, bitRange=8
+sfr = "PWMC_CH2_CMR.CPOL", "Memory", 0xfffcc240, 4, base=16, bitRange=9
+sfr = "PWMC_CH2_CMR.CPD", "Memory", 0xfffcc240, 4, base=16, bitRange=10
+sfr = "PWMC_CH2_CDTYR", "Memory", 0xfffcc244, 4, base=16
+sfr = "PWMC_CH2_CDTYR.CDTY", "Memory", 0xfffcc244, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_CPRDR", "Memory", 0xfffcc248, 4, base=16
+sfr = "PWMC_CH2_CPRDR.CPRD", "Memory", 0xfffcc248, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_CCNTR", "Memory", 0xfffcc24c, 4, base=16
+sfr = "PWMC_CH2_CCNTR.CCNT", "Memory", 0xfffcc24c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_CUPDR", "Memory", 0xfffcc250, 4, base=16
+sfr = "PWMC_CH2_CUPDR.CUPD", "Memory", 0xfffcc250, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_Reserved", "Memory", 0xfffcc254, 4, base=16
+; ========== Register definition for PWMC_CH1 peripheral ==========
+sfr = "PWMC_CH1_CMR", "Memory", 0xfffcc220, 4, base=16
+sfr = "PWMC_CH1_CMR.CPRE", "Memory", 0xfffcc220, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH1_CMR.CALG", "Memory", 0xfffcc220, 4, base=16, bitRange=8
+sfr = "PWMC_CH1_CMR.CPOL", "Memory", 0xfffcc220, 4, base=16, bitRange=9
+sfr = "PWMC_CH1_CMR.CPD", "Memory", 0xfffcc220, 4, base=16, bitRange=10
+sfr = "PWMC_CH1_CDTYR", "Memory", 0xfffcc224, 4, base=16
+sfr = "PWMC_CH1_CDTYR.CDTY", "Memory", 0xfffcc224, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_CPRDR", "Memory", 0xfffcc228, 4, base=16
+sfr = "PWMC_CH1_CPRDR.CPRD", "Memory", 0xfffcc228, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_CCNTR", "Memory", 0xfffcc22c, 4, base=16
+sfr = "PWMC_CH1_CCNTR.CCNT", "Memory", 0xfffcc22c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_CUPDR", "Memory", 0xfffcc230, 4, base=16
+sfr = "PWMC_CH1_CUPDR.CUPD", "Memory", 0xfffcc230, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_Reserved", "Memory", 0xfffcc234, 4, base=16
+; ========== Register definition for PWMC_CH0 peripheral ==========
+sfr = "PWMC_CH0_CMR", "Memory", 0xfffcc200, 4, base=16
+sfr = "PWMC_CH0_CMR.CPRE", "Memory", 0xfffcc200, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH0_CMR.CALG", "Memory", 0xfffcc200, 4, base=16, bitRange=8
+sfr = "PWMC_CH0_CMR.CPOL", "Memory", 0xfffcc200, 4, base=16, bitRange=9
+sfr = "PWMC_CH0_CMR.CPD", "Memory", 0xfffcc200, 4, base=16, bitRange=10
+sfr = "PWMC_CH0_CDTYR", "Memory", 0xfffcc204, 4, base=16
+sfr = "PWMC_CH0_CDTYR.CDTY", "Memory", 0xfffcc204, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_CPRDR", "Memory", 0xfffcc208, 4, base=16
+sfr = "PWMC_CH0_CPRDR.CPRD", "Memory", 0xfffcc208, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_CCNTR", "Memory", 0xfffcc20c, 4, base=16
+sfr = "PWMC_CH0_CCNTR.CCNT", "Memory", 0xfffcc20c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_CUPDR", "Memory", 0xfffcc210, 4, base=16
+sfr = "PWMC_CH0_CUPDR.CUPD", "Memory", 0xfffcc210, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_Reserved", "Memory", 0xfffcc214, 4, base=16
+; ========== Register definition for PWMC peripheral ==========
+sfr = "PWMC_MR", "Memory", 0xfffcc000, 4, base=16
+sfr = "PWMC_MR.DIVA", "Memory", 0xfffcc000, 4, base=16, bitRange=0-7
+sfr = "PWMC_MR.PREA", "Memory", 0xfffcc000, 4, base=16, bitRange=8-11
+sfr = "PWMC_MR.DIVB", "Memory", 0xfffcc000, 4, base=16, bitRange=16-23
+sfr = "PWMC_MR.PREB", "Memory", 0xfffcc000, 4, base=16, bitRange=24-27
+sfr = "PWMC_ENA", "Memory", 0xfffcc004, 4, base=16
+sfr = "PWMC_ENA.CHID0", "Memory", 0xfffcc004, 4, base=16, bitRange=0
+sfr = "PWMC_ENA.CHID1", "Memory", 0xfffcc004, 4, base=16, bitRange=1
+sfr = "PWMC_ENA.CHID2", "Memory", 0xfffcc004, 4, base=16, bitRange=2
+sfr = "PWMC_ENA.CHID3", "Memory", 0xfffcc004, 4, base=16, bitRange=3
+sfr = "PWMC_ENA.CHID4", "Memory", 0xfffcc004, 4, base=16, bitRange=4
+sfr = "PWMC_ENA.CHID5", "Memory", 0xfffcc004, 4, base=16, bitRange=5
+sfr = "PWMC_ENA.CHID6", "Memory", 0xfffcc004, 4, base=16, bitRange=6
+sfr = "PWMC_ENA.CHID7", "Memory", 0xfffcc004, 4, base=16, bitRange=7
+sfr = "PWMC_DIS", "Memory", 0xfffcc008, 4, base=16
+sfr = "PWMC_DIS.CHID0", "Memory", 0xfffcc008, 4, base=16, bitRange=0
+sfr = "PWMC_DIS.CHID1", "Memory", 0xfffcc008, 4, base=16, bitRange=1
+sfr = "PWMC_DIS.CHID2", "Memory", 0xfffcc008, 4, base=16, bitRange=2
+sfr = "PWMC_DIS.CHID3", "Memory", 0xfffcc008, 4, base=16, bitRange=3
+sfr = "PWMC_DIS.CHID4", "Memory", 0xfffcc008, 4, base=16, bitRange=4
+sfr = "PWMC_DIS.CHID5", "Memory", 0xfffcc008, 4, base=16, bitRange=5
+sfr = "PWMC_DIS.CHID6", "Memory", 0xfffcc008, 4, base=16, bitRange=6
+sfr = "PWMC_DIS.CHID7", "Memory", 0xfffcc008, 4, base=16, bitRange=7
+sfr = "PWMC_SR", "Memory", 0xfffcc00c, 4, base=16
+sfr = "PWMC_SR.CHID0", "Memory", 0xfffcc00c, 4, base=16, bitRange=0
+sfr = "PWMC_SR.CHID1", "Memory", 0xfffcc00c, 4, base=16, bitRange=1
+sfr = "PWMC_SR.CHID2", "Memory", 0xfffcc00c, 4, base=16, bitRange=2
+sfr = "PWMC_SR.CHID3", "Memory", 0xfffcc00c, 4, base=16, bitRange=3
+sfr = "PWMC_SR.CHID4", "Memory", 0xfffcc00c, 4, base=16, bitRange=4
+sfr = "PWMC_SR.CHID5", "Memory", 0xfffcc00c, 4, base=16, bitRange=5
+sfr = "PWMC_SR.CHID6", "Memory", 0xfffcc00c, 4, base=16, bitRange=6
+sfr = "PWMC_SR.CHID7", "Memory", 0xfffcc00c, 4, base=16, bitRange=7
+sfr = "PWMC_IER", "Memory", 0xfffcc010, 4, base=16
+sfr = "PWMC_IER.CHID0", "Memory", 0xfffcc010, 4, base=16, bitRange=0
+sfr = "PWMC_IER.CHID1", "Memory", 0xfffcc010, 4, base=16, bitRange=1
+sfr = "PWMC_IER.CHID2", "Memory", 0xfffcc010, 4, base=16, bitRange=2
+sfr = "PWMC_IER.CHID3", "Memory", 0xfffcc010, 4, base=16, bitRange=3
+sfr = "PWMC_IER.CHID4", "Memory", 0xfffcc010, 4, base=16, bitRange=4
+sfr = "PWMC_IER.CHID5", "Memory", 0xfffcc010, 4, base=16, bitRange=5
+sfr = "PWMC_IER.CHID6", "Memory", 0xfffcc010, 4, base=16, bitRange=6
+sfr = "PWMC_IER.CHID7", "Memory", 0xfffcc010, 4, base=16, bitRange=7
+sfr = "PWMC_IDR", "Memory", 0xfffcc014, 4, base=16
+sfr = "PWMC_IDR.CHID0", "Memory", 0xfffcc014, 4, base=16, bitRange=0
+sfr = "PWMC_IDR.CHID1", "Memory", 0xfffcc014, 4, base=16, bitRange=1
+sfr = "PWMC_IDR.CHID2", "Memory", 0xfffcc014, 4, base=16, bitRange=2
+sfr = "PWMC_IDR.CHID3", "Memory", 0xfffcc014, 4, base=16, bitRange=3
+sfr = "PWMC_IDR.CHID4", "Memory", 0xfffcc014, 4, base=16, bitRange=4
+sfr = "PWMC_IDR.CHID5", "Memory", 0xfffcc014, 4, base=16, bitRange=5
+sfr = "PWMC_IDR.CHID6", "Memory", 0xfffcc014, 4, base=16, bitRange=6
+sfr = "PWMC_IDR.CHID7", "Memory", 0xfffcc014, 4, base=16, bitRange=7
+sfr = "PWMC_IMR", "Memory", 0xfffcc018, 4, base=16
+sfr = "PWMC_IMR.CHID0", "Memory", 0xfffcc018, 4, base=16, bitRange=0
+sfr = "PWMC_IMR.CHID1", "Memory", 0xfffcc018, 4, base=16, bitRange=1
+sfr = "PWMC_IMR.CHID2", "Memory", 0xfffcc018, 4, base=16, bitRange=2
+sfr = "PWMC_IMR.CHID3", "Memory", 0xfffcc018, 4, base=16, bitRange=3
+sfr = "PWMC_IMR.CHID4", "Memory", 0xfffcc018, 4, base=16, bitRange=4
+sfr = "PWMC_IMR.CHID5", "Memory", 0xfffcc018, 4, base=16, bitRange=5
+sfr = "PWMC_IMR.CHID6", "Memory", 0xfffcc018, 4, base=16, bitRange=6
+sfr = "PWMC_IMR.CHID7", "Memory", 0xfffcc018, 4, base=16, bitRange=7
+sfr = "PWMC_ISR", "Memory", 0xfffcc01c, 4, base=16
+sfr = "PWMC_ISR.CHID0", "Memory", 0xfffcc01c, 4, base=16, bitRange=0
+sfr = "PWMC_ISR.CHID1", "Memory", 0xfffcc01c, 4, base=16, bitRange=1
+sfr = "PWMC_ISR.CHID2", "Memory", 0xfffcc01c, 4, base=16, bitRange=2
+sfr = "PWMC_ISR.CHID3", "Memory", 0xfffcc01c, 4, base=16, bitRange=3
+sfr = "PWMC_ISR.CHID4", "Memory", 0xfffcc01c, 4, base=16, bitRange=4
+sfr = "PWMC_ISR.CHID5", "Memory", 0xfffcc01c, 4, base=16, bitRange=5
+sfr = "PWMC_ISR.CHID6", "Memory", 0xfffcc01c, 4, base=16, bitRange=6
+sfr = "PWMC_ISR.CHID7", "Memory", 0xfffcc01c, 4, base=16, bitRange=7
+sfr = "PWMC_VR", "Memory", 0xfffcc0fc, 4, base=16
+; ========== Register definition for UDP peripheral ==========
+sfr = "UDP_NUM", "Memory", 0xfffb0000, 4, base=16
+sfr = "UDP_NUM.NUM", "Memory", 0xfffb0000, 4, base=16, bitRange=0-10
+sfr = "UDP_NUM.ERR", "Memory", 0xfffb0000, 4, base=16, bitRange=16
+sfr = "UDP_NUM.OK", "Memory", 0xfffb0000, 4, base=16, bitRange=17
+sfr = "UDP_GLBSTATE", "Memory", 0xfffb0004, 4, base=16
+sfr = "UDP_GLBSTATE.FADDEN", "Memory", 0xfffb0004, 4, base=16, bitRange=0
+sfr = "UDP_GLBSTATE.CONFG", "Memory", 0xfffb0004, 4, base=16, bitRange=1
+sfr = "UDP_GLBSTATE.ESR", "Memory", 0xfffb0004, 4, base=16, bitRange=2
+sfr = "UDP_GLBSTATE.RSMINPR", "Memory", 0xfffb0004, 4, base=16, bitRange=3
+sfr = "UDP_GLBSTATE.RMWUPE", "Memory", 0xfffb0004, 4, base=16, bitRange=4
+sfr = "UDP_FADDR", "Memory", 0xfffb0008, 4, base=16
+sfr = "UDP_FADDR.FADD", "Memory", 0xfffb0008, 4, base=16, bitRange=0-7
+sfr = "UDP_FADDR.FEN", "Memory", 0xfffb0008, 4, base=16, bitRange=8
+sfr = "UDP_IER", "Memory", 0xfffb0010, 4, base=16
+sfr = "UDP_IER.EPINT0", "Memory", 0xfffb0010, 4, base=16, bitRange=0
+sfr = "UDP_IER.EPINT1", "Memory", 0xfffb0010, 4, base=16, bitRange=1
+sfr = "UDP_IER.EPINT2", "Memory", 0xfffb0010, 4, base=16, bitRange=2
+sfr = "UDP_IER.EPINT3", "Memory", 0xfffb0010, 4, base=16, bitRange=3
+sfr = "UDP_IER.EPINT4", "Memory", 0xfffb0010, 4, base=16, bitRange=4
+sfr = "UDP_IER.EPINT5", "Memory", 0xfffb0010, 4, base=16, bitRange=5
+sfr = "UDP_IER.EPINT6", "Memory", 0xfffb0010, 4, base=16, bitRange=6
+sfr = "UDP_IER.EPINT7", "Memory", 0xfffb0010, 4, base=16, bitRange=7
+sfr = "UDP_IER.RXSUSP", "Memory", 0xfffb0010, 4, base=16, bitRange=8
+sfr = "UDP_IER.RXRSM", "Memory", 0xfffb0010, 4, base=16, bitRange=9
+sfr = "UDP_IER.EXTRSM", "Memory", 0xfffb0010, 4, base=16, bitRange=10
+sfr = "UDP_IER.SOFINT", "Memory", 0xfffb0010, 4, base=16, bitRange=11
+sfr = "UDP_IER.WAKEUP", "Memory", 0xfffb0010, 4, base=16, bitRange=13
+sfr = "UDP_IDR", "Memory", 0xfffb0014, 4, base=16
+sfr = "UDP_IDR.EPINT0", "Memory", 0xfffb0014, 4, base=16, bitRange=0
+sfr = "UDP_IDR.EPINT1", "Memory", 0xfffb0014, 4, base=16, bitRange=1
+sfr = "UDP_IDR.EPINT2", "Memory", 0xfffb0014, 4, base=16, bitRange=2
+sfr = "UDP_IDR.EPINT3", "Memory", 0xfffb0014, 4, base=16, bitRange=3
+sfr = "UDP_IDR.EPINT4", "Memory", 0xfffb0014, 4, base=16, bitRange=4
+sfr = "UDP_IDR.EPINT5", "Memory", 0xfffb0014, 4, base=16, bitRange=5
+sfr = "UDP_IDR.EPINT6", "Memory", 0xfffb0014, 4, base=16, bitRange=6
+sfr = "UDP_IDR.EPINT7", "Memory", 0xfffb0014, 4, base=16, bitRange=7
+sfr = "UDP_IDR.RXSUSP", "Memory", 0xfffb0014, 4, base=16, bitRange=8
+sfr = "UDP_IDR.RXRSM", "Memory", 0xfffb0014, 4, base=16, bitRange=9
+sfr = "UDP_IDR.EXTRSM", "Memory", 0xfffb0014, 4, base=16, bitRange=10
+sfr = "UDP_IDR.SOFINT", "Memory", 0xfffb0014, 4, base=16, bitRange=11
+sfr = "UDP_IDR.WAKEUP", "Memory", 0xfffb0014, 4, base=16, bitRange=13
+sfr = "UDP_IMR", "Memory", 0xfffb0018, 4, base=16
+sfr = "UDP_IMR.EPINT0", "Memory", 0xfffb0018, 4, base=16, bitRange=0
+sfr = "UDP_IMR.EPINT1", "Memory", 0xfffb0018, 4, base=16, bitRange=1
+sfr = "UDP_IMR.EPINT2", "Memory", 0xfffb0018, 4, base=16, bitRange=2
+sfr = "UDP_IMR.EPINT3", "Memory", 0xfffb0018, 4, base=16, bitRange=3
+sfr = "UDP_IMR.EPINT4", "Memory", 0xfffb0018, 4, base=16, bitRange=4
+sfr = "UDP_IMR.EPINT5", "Memory", 0xfffb0018, 4, base=16, bitRange=5
+sfr = "UDP_IMR.EPINT6", "Memory", 0xfffb0018, 4, base=16, bitRange=6
+sfr = "UDP_IMR.EPINT7", "Memory", 0xfffb0018, 4, base=16, bitRange=7
+sfr = "UDP_IMR.RXSUSP", "Memory", 0xfffb0018, 4, base=16, bitRange=8
+sfr = "UDP_IMR.RXRSM", "Memory", 0xfffb0018, 4, base=16, bitRange=9
+sfr = "UDP_IMR.EXTRSM", "Memory", 0xfffb0018, 4, base=16, bitRange=10
+sfr = "UDP_IMR.SOFINT", "Memory", 0xfffb0018, 4, base=16, bitRange=11
+sfr = "UDP_IMR.WAKEUP", "Memory", 0xfffb0018, 4, base=16, bitRange=13
+sfr = "UDP_ISR", "Memory", 0xfffb001c, 4, base=16
+sfr = "UDP_ISR.EPINT0", "Memory", 0xfffb001c, 4, base=16, bitRange=0
+sfr = "UDP_ISR.EPINT1", "Memory", 0xfffb001c, 4, base=16, bitRange=1
+sfr = "UDP_ISR.EPINT2", "Memory", 0xfffb001c, 4, base=16, bitRange=2
+sfr = "UDP_ISR.EPINT3", "Memory", 0xfffb001c, 4, base=16, bitRange=3
+sfr = "UDP_ISR.EPINT4", "Memory", 0xfffb001c, 4, base=16, bitRange=4
+sfr = "UDP_ISR.EPINT5", "Memory", 0xfffb001c, 4, base=16, bitRange=5
+sfr = "UDP_ISR.EPINT6", "Memory", 0xfffb001c, 4, base=16, bitRange=6
+sfr = "UDP_ISR.EPINT7", "Memory", 0xfffb001c, 4, base=16, bitRange=7
+sfr = "UDP_ISR.RXSUSP", "Memory", 0xfffb001c, 4, base=16, bitRange=8
+sfr = "UDP_ISR.RXRSM", "Memory", 0xfffb001c, 4, base=16, bitRange=9
+sfr = "UDP_ISR.EXTRSM", "Memory", 0xfffb001c, 4, base=16, bitRange=10
+sfr = "UDP_ISR.SOFINT", "Memory", 0xfffb001c, 4, base=16, bitRange=11
+sfr = "UDP_ISR.ENDBUSRES", "Memory", 0xfffb001c, 4, base=16, bitRange=12
+sfr = "UDP_ISR.WAKEUP", "Memory", 0xfffb001c, 4, base=16, bitRange=13
+sfr = "UDP_ICR", "Memory", 0xfffb0020, 4, base=16
+sfr = "UDP_ICR.EPINT0", "Memory", 0xfffb0020, 4, base=16, bitRange=0
+sfr = "UDP_ICR.EPINT1", "Memory", 0xfffb0020, 4, base=16, bitRange=1
+sfr = "UDP_ICR.EPINT2", "Memory", 0xfffb0020, 4, base=16, bitRange=2
+sfr = "UDP_ICR.EPINT3", "Memory", 0xfffb0020, 4, base=16, bitRange=3
+sfr = "UDP_ICR.EPINT4", "Memory", 0xfffb0020, 4, base=16, bitRange=4
+sfr = "UDP_ICR.EPINT5", "Memory", 0xfffb0020, 4, base=16, bitRange=5
+sfr = "UDP_ICR.EPINT6", "Memory", 0xfffb0020, 4, base=16, bitRange=6
+sfr = "UDP_ICR.EPINT7", "Memory", 0xfffb0020, 4, base=16, bitRange=7
+sfr = "UDP_ICR.RXSUSP", "Memory", 0xfffb0020, 4, base=16, bitRange=8
+sfr = "UDP_ICR.RXRSM", "Memory", 0xfffb0020, 4, base=16, bitRange=9
+sfr = "UDP_ICR.EXTRSM", "Memory", 0xfffb0020, 4, base=16, bitRange=10
+sfr = "UDP_ICR.SOFINT", "Memory", 0xfffb0020, 4, base=16, bitRange=11
+sfr = "UDP_ICR.WAKEUP", "Memory", 0xfffb0020, 4, base=16, bitRange=13
+sfr = "UDP_RSTEP", "Memory", 0xfffb0028, 4, base=16
+sfr = "UDP_RSTEP.EP0", "Memory", 0xfffb0028, 4, base=16, bitRange=0
+sfr = "UDP_RSTEP.EP1", "Memory", 0xfffb0028, 4, base=16, bitRange=1
+sfr = "UDP_RSTEP.EP2", "Memory", 0xfffb0028, 4, base=16, bitRange=2
+sfr = "UDP_RSTEP.EP3", "Memory", 0xfffb0028, 4, base=16, bitRange=3
+sfr = "UDP_RSTEP.EP4", "Memory", 0xfffb0028, 4, base=16, bitRange=4
+sfr = "UDP_RSTEP.EP5", "Memory", 0xfffb0028, 4, base=16, bitRange=5
+sfr = "UDP_RSTEP.EP6", "Memory", 0xfffb0028, 4, base=16, bitRange=6
+sfr = "UDP_RSTEP.EP7", "Memory", 0xfffb0028, 4, base=16, bitRange=7
+sfr = "UDP_CSR", "Memory", 0xfffb0030, 4, base=16
+sfr = "UDP_CSR.TXCOMP", "Memory", 0xfffb0030, 4, base=16, bitRange=0
+sfr = "UDP_CSR.BK0", "Memory", 0xfffb0030, 4, base=16, bitRange=1
+sfr = "UDP_CSR.RXSETUP", "Memory", 0xfffb0030, 4, base=16, bitRange=2
+sfr = "UDP_CSR.ISOERROR", "Memory", 0xfffb0030, 4, base=16, bitRange=3
+sfr = "UDP_CSR.TXPKTRDY", "Memory", 0xfffb0030, 4, base=16, bitRange=4
+sfr = "UDP_CSR.FORCESTALL", "Memory", 0xfffb0030, 4, base=16, bitRange=5
+sfr = "UDP_CSR.BK1", "Memory", 0xfffb0030, 4, base=16, bitRange=6
+sfr = "UDP_CSR.DIR", "Memory", 0xfffb0030, 4, base=16, bitRange=7
+sfr = "UDP_CSR.EPTYPE", "Memory", 0xfffb0030, 4, base=16, bitRange=8-10
+sfr = "UDP_CSR.DTGLE", "Memory", 0xfffb0030, 4, base=16, bitRange=11
+sfr = "UDP_CSR.EPEDS", "Memory", 0xfffb0030, 4, base=16, bitRange=15
+sfr = "UDP_CSR.RXBYTECNT", "Memory", 0xfffb0030, 4, base=16, bitRange=16-26
+sfr = "UDP_FDR", "Memory", 0xfffb0050, 4, base=16
+sfr = "UDP_TXVC", "Memory", 0xfffb0074, 4, base=16
+sfr = "UDP_TXVC.TXVDIS", "Memory", 0xfffb0074, 4, base=16, bitRange=8
+sfr = "UDP_TXVC.PUON", "Memory", 0xfffb0074, 4, base=16, bitRange=9
+
+
+[SfrGroupInfo]
+group = "TC0", "TC0_CCR", "TC0_CMR", "TC0_CV", "TC0_RA", "TC0_RB", "TC0_RC", "TC0_SR", "TC0_IER", "TC0_IDR", "TC0_IMR"
+group = "TCB", "TCB_BCR", "TCB_BMR"
+group = "TC1", "TC1_CCR", "TC1_CMR", "TC1_CV", "TC1_RA", "TC1_RB", "TC1_RC", "TC1_SR", "TC1_IER", "TC1_IDR", "TC1_IMR"
+group = "TC2", "TC2_CCR", "TC2_CMR", "TC2_CV", "TC2_RA", "TC2_RB", "TC2_RC", "TC2_SR", "TC2_IER", "TC2_IDR", "TC2_IMR"
+group = "UDP", "UDP_NUM", "UDP_GLBSTATE", "UDP_FADDR", "UDP_IER", "UDP_IDR", "UDP_IMR", "UDP_ISR", "UDP_ICR", "UDP_RSTEP", "UDP_CSR", "UDP_FDR", "UDP_TXVC"
+group = "TWI", "TWI_CR", "TWI_MMR", "TWI_IADR", "TWI_CWGR", "TWI_SR", "TWI_IER", "TWI_IDR", "TWI_IMR", "TWI_RHR", "TWI_THR"
+group = "US0", "US0_CR", "US0_MR", "US0_IER", "US0_IDR", "US0_IMR", "US0_CSR", "US0_RHR", "US0_THR", "US0_BRGR", "US0_RTOR", "US0_TTGR", "US0_FIDI", "US0_NER", "US0_IF"
+group = "PDC_US0", "US0_RPR", "US0_RCR", "US0_TPR", "US0_TCR", "US0_RNPR", "US0_RNCR", "US0_TNPR", "US0_TNCR", "US0_PTCR", "US0_PTSR"
+group = "US1", "US1_CR", "US1_MR", "US1_IER", "US1_IDR", "US1_IMR", "US1_CSR", "US1_RHR", "US1_THR", "US1_BRGR", "US1_RTOR", "US1_TTGR", "US1_FIDI", "US1_NER", "US1_IF"
+group = "PDC_US1", "US1_RPR", "US1_RCR", "US1_TPR", "US1_TCR", "US1_RNPR", "US1_RNCR", "US1_TNPR", "US1_TNCR", "US1_PTCR", "US1_PTSR"
+group = "PWMC", "PWMC_MR", "PWMC_ENA", "PWMC_DIS", "PWMC_SR", "PWMC_IER", "PWMC_IDR", "PWMC_IMR", "PWMC_ISR", "PWMC_VR"
+group = "PWMC_CH0", "PWMC_CH0_CMR", "PWMC_CH0_CDTYR", "PWMC_CH0_CPRDR", "PWMC_CH0_CCNTR", "PWMC_CH0_CUPDR", "PWMC_CH0_Reserved"
+group = "PWMC_CH1", "PWMC_CH1_CMR", "PWMC_CH1_CDTYR", "PWMC_CH1_CPRDR", "PWMC_CH1_CCNTR", "PWMC_CH1_CUPDR", "PWMC_CH1_Reserved"
+group = "PWMC_CH2", "PWMC_CH2_CMR", "PWMC_CH2_CDTYR", "PWMC_CH2_CPRDR", "PWMC_CH2_CCNTR", "PWMC_CH2_CUPDR", "PWMC_CH2_Reserved"
+group = "PWMC_CH3", "PWMC_CH3_CMR", "PWMC_CH3_CDTYR", "PWMC_CH3_CPRDR", "PWMC_CH3_CCNTR", "PWMC_CH3_CUPDR", "PWMC_CH3_Reserved"
+group = "SSC", "SSC_CR", "SSC_CMR", "SSC_RCMR", "SSC_RFMR", "SSC_TCMR", "SSC_TFMR", "SSC_RHR", "SSC_THR", "SSC_RSHR", "SSC_TSHR", "SSC_SR", "SSC_IER", "SSC_IDR", "SSC_IMR"
+group = "PDC_SSC", "SSC_RPR", "SSC_RCR", "SSC_TPR", "SSC_TCR", "SSC_RNPR", "SSC_RNCR", "SSC_TNPR", "SSC_TNCR", "SSC_PTCR", "SSC_PTSR"
+group = "ADC", "ADC_CR", "ADC_MR", "ADC_CHER", "ADC_CHDR", "ADC_CHSR", "ADC_SR", "ADC_LCDR", "ADC_IER", "ADC_IDR", "ADC_IMR", "ADC_CDR0", "ADC_CDR1", "ADC_CDR2", "ADC_CDR3", "ADC_CDR4", "ADC_CDR5", "ADC_CDR6", "ADC_CDR7"
+group = "PDC_ADC", "ADC_RPR", "ADC_RCR", "ADC_TPR", "ADC_TCR", "ADC_RNPR", "ADC_RNCR", "ADC_TNPR", "ADC_TNCR", "ADC_PTCR", "ADC_PTSR"
+group = "SPI", "SPI_CR", "SPI_MR", "SPI_RDR", "SPI_TDR", "SPI_SR", "SPI_IER", "SPI_IDR", "SPI_IMR", "SPI_CSR"
+group = "PDC_SPI", "SPI_RPR", "SPI_RCR", "SPI_TPR", "SPI_TCR", "SPI_RNPR", "SPI_RNCR", "SPI_TNPR", "SPI_TNCR", "SPI_PTCR", "SPI_PTSR"
+group = "SYS"
+group = "AIC", "AIC_SMR", "AIC_SVR", "AIC_IVR", "AIC_FVR", "AIC_ISR", "AIC_IPR", "AIC_IMR", "AIC_CISR", "AIC_IECR", "AIC_IDCR", "AIC_ICCR", "AIC_ISCR", "AIC_EOICR", "AIC_SPU", "AIC_DCR", "AIC_FFER", "AIC_FFDR", "AIC_FFSR"
+group = "DBGU", "DBGU_CR", "DBGU_MR", "DBGU_IER", "DBGU_IDR", "DBGU_IMR", "DBGU_CSR", "DBGU_RHR", "DBGU_THR", "DBGU_BRGR", "DBGU_CIDR", "DBGU_EXID", "DBGU_FNTR"
+group = "PDC_DBGU", "DBGU_RPR", "DBGU_RCR", "DBGU_TPR", "DBGU_TCR", "DBGU_RNPR", "DBGU_RNCR", "DBGU_TNPR", "DBGU_TNCR", "DBGU_PTCR", "DBGU_PTSR"
+group = "PIOA", "PIOA_PER", "PIOA_PDR", "PIOA_PSR", "PIOA_OER", "PIOA_ODR", "PIOA_OSR", "PIOA_IFER", "PIOA_IFDR", "PIOA_IFSR", "PIOA_SODR", "PIOA_CODR", "PIOA_ODSR", "PIOA_PDSR", "PIOA_IER", "PIOA_IDR", "PIOA_IMR", "PIOA_ISR", "PIOA_MDER", "PIOA_MDDR", "PIOA_MDSR", "PIOA_PPUDR", "PIOA_PPUER", "PIOA_PPUSR", "PIOA_ASR", "PIOA_BSR", "PIOA_ABSR", "PIOA_OWER", "PIOA_OWDR", "PIOA_OWSR"
+group = "PMC", "PMC_SCER", "PMC_SCDR", "PMC_SCSR", "PMC_PCER", "PMC_PCDR", "PMC_PCSR", "PMC_MOR", "PMC_MCFR", "PMC_PLLR", "PMC_MCKR", "PMC_PCKR", "PMC_IER", "PMC_IDR", "PMC_SR", "PMC_IMR"
+group = "CKGR", "CKGR_MOR", "CKGR_MCFR", "CKGR_PLLR"
+group = "RSTC", "RSTC_RCR", "RSTC_RSR", "RSTC_RMR"
+group = "RTTC", "RTTC_RTMR", "RTTC_RTAR", "RTTC_RTVR", "RTTC_RTSR"
+group = "PITC", "PITC_PIMR", "PITC_PISR", "PITC_PIVR", "PITC_PIIR"
+group = "WDTC", "WDTC_WDCR", "WDTC_WDMR", "WDTC_WDSR"
+group = "VREG", "VREG_MR"
+group = "MC", "MC_RCR", "MC_ASR", "MC_AASR", "MC_FMR", "MC_FCR", "MC_FSR"
diff --git a/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dbgdt b/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dbgdt
new file mode 100644
index 0000000..092fee7
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dbgdt
@@ -0,0 +1,54 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<Project>
+ <Desktop>
+ <Static>
+ <Workspace>
+ <ColumnWidths>
+
+
+
+ <Column0>152</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
+ </Workspace>
+ <Disassembly>
+
+
+
+ <PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>
+ <Debug-Log><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows><Window><Factory>Build</Factory></Window></Windows></PreferedWindows></Debug-Log>
+ <Build><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ColumnWidth0>22</ColumnWidth0><ColumnWidth1>914</ColumnWidth1><ColumnWidth2>243</ColumnWidth2><ColumnWidth3>60</ColumnWidth3></Build>
+ <QWatch><Column0>100</Column0><Column1>100</Column1><Column2>100</Column2><Column3>100</Column3></QWatch><Watch><Format><struct_types/><watch_formats/></Format><PreferedWindows><Position>4</Position><ScreenPosX>55</ScreenPosX><ScreenPosY>27</ScreenPosY><Windows/></PreferedWindows><Column0>127</Column0><Column1>225</Column1><Column2>100</Column2><Column3>100</Column3></Watch><Register><PreferedWindows><Position>2</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Register><Memory><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory><Breakpoints><PreferedWindows><Position>3</Position><ScreenPosX>0</ScreenPosX><ScreenPosY>0</ScreenPosY><Windows/></PreferedWindows></Breakpoints></Static>
+ <Windows>
+
+
+
+ <Wnd1>
+ <Tabs>
+ <Tab>
+ <Identity>TabID-16470-5520</Identity>
+ <TabName>Workspace</TabName>
+ <Factory>Workspace</Factory>
+ <Session>
+
+ <NodeDict><ExpandedNode>LMS_ARM</ExpandedNode></NodeDict></Session>
+ </Tab>
+ </Tabs>
+
+ <SelectedTab>0</SelectedTab></Wnd1><Wnd3><Tabs><Tab><Identity>TabID-17326-28629</Identity><TabName>Register</TabName><Factory>Register</Factory><Session><REG1>0</REG1><REG2>0</REG2><Group>0</Group><States>0</States></Session></Tab><Tab><Identity>TabID-9192-28577</Identity><TabName>Disassembly</TabName><Factory>Disassembly</Factory><Session/></Tab><Tab><Identity>TabID-2396-28705</Identity><TabName>Watch</TabName><Factory>Watch</Factory><Session><Expressions/><TabId>1</TabId><Column0>127</Column0><Column1>225</Column1><Column2>100</Column2><Column3>100</Column3></Session></Tab></Tabs><SelectedTab>1</SelectedTab></Wnd3></Windows>
+ <Editor>
+
+
+
+
+ <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_timer.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\SAM7S256\include\lib_at91sam7s64.h</Filename><XPos>0</XPos><YPos>28</YPos><SelStart>2564</SelStart><SelEnd>2564</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_display.r</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>591</SelStart><SelEnd>591</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_display.c</Filename><XPos>0</XPos><YPos>15</YPos><SelStart>677</SelStart><SelEnd>677</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_hispeed.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>594</SelStart><SelEnd>594</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_hispeed.r</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>591</SelStart><SelEnd>591</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_hispeed.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>618</SelStart><SelEnd>618</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_sound.c</Filename><XPos>0</XPos><YPos>6</YPos><SelStart>515</SelStart><SelEnd>515</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_sound.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>596</SelStart><SelEnd>596</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_sound.r</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>587</SelStart><SelEnd>587</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_sound.c</Filename><XPos>0</XPos><YPos>30</YPos><SelStart>665</SelStart><SelEnd>665</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_sound.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>493</SelStart><SelEnd>493</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_timer.r</Filename><XPos>0</XPos><YPos>20</YPos><SelStart>615</SelStart><SelEnd>615</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_button.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>619</SelStart><SelEnd>619</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\SAM7S256\include\ioat91sam7s64.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\SAM7S256\include\sam7s256.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>584</SelStart><SelEnd>584</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_ioctrl.r</Filename><XPos>0</XPos><YPos>67</YPos><SelStart>3821</SelStart><SelEnd>3821</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\SAM7S256\Include\Cstartup_SAM7.c</Filename><XPos>0</XPos><YPos>51</YPos><SelStart>3336</SelStart><SelEnd>3336</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_output.iom</Filename><XPos>0</XPos><YPos>28</YPos><SelStart>1175</SelStart><SelEnd>1175</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\SAM7S256\Include\Cstartup.s79</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>1017</SelStart><SelEnd>1017</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_loader.r</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>700</SelStart><SelEnd>700</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_loader.c</Filename><XPos>0</XPos><YPos>7</YPos><SelStart>3176</SelStart><SelEnd>3176</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_timer.c</Filename><XPos>0</XPos><YPos>17</YPos><SelStart>679</SelStart><SelEnd>679</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_lowspeed.c</Filename><XPos>0</XPos><YPos>81</YPos><SelStart>1563</SelStart><SelEnd>1563</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_loader.iom</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_loader.h</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>0</SelStart><SelEnd>0</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\m_sched.h</Filename><XPos>0</XPos><YPos>88</YPos><SelStart>1152</SelStart><SelEnd>1152</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_comm.c</Filename><XPos>0</XPos><YPos>75</YPos><SelStart>2609</SelStart><SelEnd>2609</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_usb.c</Filename><XPos>0</XPos><YPos>680</YPos><SelStart>23517</SelStart><SelEnd>23517</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_button.c</Filename><XPos>0</XPos><YPos>50</YPos><SelStart>1152</SelStart><SelEnd>1152</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_display.c</Filename><XPos>0</XPos><YPos>477</YPos><SelStart>10510</SelStart><SelEnd>10510</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_ioctrl.c</Filename><XPos>0</XPos><YPos>34</YPos><SelStart>1025</SelStart><SelEnd>1025</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\d_ioctrl.c</Filename><XPos>0</XPos><YPos>15</YPos><SelStart>782</SelStart><SelEnd>782</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\m_sched.c</Filename><XPos>0</XPos><YPos>44</YPos><SelStart>1196</SelStart><SelEnd>1196</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_cmd.c</Filename><XPos>0</XPos><YPos>1117</YPos><SelStart>31574</SelStart><SelEnd>31574</SelEnd></Tab><ActiveTab>34</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_output.c</Filename><XPos>0</XPos><YPos>32</YPos><SelStart>1082</SelStart><SelEnd>1082</SelEnd></Tab><Tab><Factory>TextEditor</Factory><Filename>C:\Projects\LMS2006\Sys01\Main\Firmware\Source\c_loader.c</Filename><XPos>0</XPos><YPos>33</YPos><SelStart>1602</SelStart><SelEnd>1602</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
+ <Positions>
+
+
+
+
+
+ <Top><Row0><Sizes><Toolbar-003ae3f0><key>iaridepm1</key></Toolbar-003ae3f0></Sizes></Row0><Row1><Sizes><Toolbar-02aa0a60><key>debuggergui1</key></Toolbar-02aa0a60></Sizes></Row1></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>624</Bottom><Right>226</Right><x>-2</x><y>-2</y><xscreen>5</xscreen><yscreen>5</yscreen><sizeHorzCX>4882</sizeHorzCX><sizeHorzCY>7225</sizeHorzCY><sizeVertCX>222656</sizeVertCX><sizeVertCY>904624</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>624</Bottom><Right>245</Right><x>-2</x><y>-2</y><xscreen>159</xscreen><yscreen>140</yscreen><sizeHorzCX>155273</sizeHorzCX><sizeHorzCY>202312</sizeHorzCY><sizeVertCX>241210</sizeVertCX><sizeVertCY>904624</sizeVertCY></Rect></Wnd3></Sizes></Row0></Right><Bottom><Row0><Sizes/></Row0></Bottom><Float><Sizes/></Float></Positions>
+ </Desktop>
+</Project>
+
+
diff --git a/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dni b/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dni
new file mode 100644
index 0000000..409b4b4
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.dni
@@ -0,0 +1,19 @@
+[JLinkDriver]
+WatchVectorCatch=_ 0
+WatchCond=_ 0
+Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
+Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0
+[DisAssemblyWindow]
+NumStates=_ 1
+State 1=_ 1
+[Log file]
+LoggingEnabled=_ 0
+LogFile=_ ""
+Category=_ 0
+[TermIOLog]
+LoggingEnabled=_ 0
+LogFile=_ ""
+[Disassemble mode]
+mode=0
+[Breakpoints]
+Count=0
diff --git a/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.wsdt b/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.wsdt
new file mode 100644
index 0000000..7183c3d
--- /dev/null
+++ b/AT91SAM7S256/SAM7S256/Tools/settings/LMS_ARM.wsdt
@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<Workspace>
+ <ConfigDictionary>
+
+ <CurrentConfigs><Project>LMS_ARM/Flash Debug</Project></CurrentConfigs></ConfigDictionary>
+ <Desktop>
+ <Static>
+ <Workspace>
+ <ColumnWidths>
+
+
+
+ <Column0>150</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>
+ </Workspace>
+ <Build><ColumnWidth0>18</ColumnWidth0><ColumnWidth1>917</ColumnWidth1><ColumnWidth2>244</ColumnWidth2><ColumnWidth3>61</ColumnWidth3></Build>
+ <TerminalIO/>
+ <Profiling/>
+ <Watch>
+ <Format>
+ <struct_types/>
+ <watch_formats/>
+ </Format>
+ <PreferedWindows><Position>4</Position><ScreenPosX>55</ScreenPosX><ScreenPosY>27</ScreenPosY><Windows/></PreferedWindows></Watch>
+ <Debug-Log/>
+ <Disassembly>
+
+
+
+ <MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow><PreferedWindows><Position>4</Position><ScreenPosX>1424</ScreenPosX><ScreenPosY>44</ScreenPosY><Windows/></PreferedWindows></Disassembly>
+ <Memory><ZoneNumber>0</ZoneNumber><FindDirection>1</FindDirection><FindAsHex>0</FindAsHex></Memory><Find-in-Files><ColumnWidth0>440</ColumnWidth0><ColumnWidth1>62</ColumnWidth1><ColumnWidth2>754</ColumnWidth2></Find-in-Files></Static>
+ <Windows>
+
+
+ <Wnd0>
+ <Tabs>
+ <Tab>
+ <Identity>TabID-7290-5487</Identity>
+ <TabName>Build</TabName>
+ <Factory>Build</Factory>
+ <Session/>
+ </Tab>
+ <Tab>
+ <Identity>TabID-5721-5516</Identity>
+ <TabName>Debug Log</TabName>
+ <Factory>Debug-Log</Factory>
+ <Session/>
+ </Tab>
+ <Tab><Identity>TabID-447-5816</Identity><TabName>Find in Files</TabName><Factory>Find-in-Files</Factory><Session/></Tab></Tabs>
+
+ <SelectedTab>1</SelectedTab></Wnd0><Wnd1>
+ <Tabs>
+ <Tab>
+ <Identity>TabID-32446-5425</Identity>
+ <TabName>Workspace</TabName>
+ <Factory>Workspace</Factory>
+ <Session>
+
+ <NodeDict><ExpandedNode>LMS_ARM</ExpandedNode><ExpandedNode>LMS_ARM/c_led.c</ExpandedNode></NodeDict></Session>
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