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authorTat-Chee Wan (USM)2011-07-06 08:25:06 +0800
committerTat-Chee Wan (USM)2011-07-06 08:25:06 +0800
commitb2f8982f8293ed6b875f2251b4a01011d1786428 (patch)
tree9f81c1d3a6f3c9e492152ffb5bc060d244668cd2 /Debugger
parent0a17d7ae48b32cce9e9c7e7de80610ae429c7e26 (diff)
fix bug in b and bl offset calculation, code cleanup.
B/BL Instruction Parsing routine was not calculating the correct offset. Cleanup debugger stack frame access logic
Diffstat (limited to 'Debugger')
-rw-r--r--Debugger/debug_opcodes.S10
-rw-r--r--Debugger/debug_stub.S7
2 files changed, 8 insertions, 9 deletions
diff --git a/Debugger/debug_opcodes.S b/Debugger/debug_opcodes.S
index e460e83..6f203fd 100644
--- a/Debugger/debug_opcodes.S
+++ b/Debugger/debug_opcodes.S
@@ -683,9 +683,9 @@ _dbg_get_aborted_instr:
* If not, then the following instruction is at the address following the address of the opcode in R4 (Default Following Instruction Address in R6).
*/
2:
- teq r0, #0 /* Check if it is ARM or Thumb instruction */
- beq _following_instr_is_arm
-_following_instr_is_thumb:
+ teq r0, #0 /* Check if current instruction is ARM or Thumb instruction */
+ beq _following_instr_addr_for_arm
+_following_instr_addr_for_thumb:
add r6, r6, #2 /* Store default following Thumb instruction address to R6 */
orr r6, r6, #BKPT_STATE_THUMB_FLAG /* Set b0 to indicate Thumb instruction */
/* R4: Candidate Instruction Opcode
@@ -696,7 +696,7 @@ _following_instr_is_thumb:
/* We must set this the Thumb bit only within the instruction handler since BX would switch modes */
b _exit_dbg_following_instruction_addr
-_following_instr_is_arm:
+_following_instr_addr_for_arm:
add r6, r6, #4 /* Store default following ARM instruction address to R6 */
/* R4: Candidate Instruction Opcode
* R5[3:0]: CPSR condition codes
@@ -1233,7 +1233,7 @@ _arm_b_bl_blx_handler:
_arm_b_bl_blx_get_offset:
and r0, r4, #(BYTE2|BYTE1|BYTE0) /* Encoded Branch offset in R4[23:0] */
lsl r0, r0, #(32-24) /* Shift to R0[31:8] */
- asr r0, r0, #(32-25) /* Actual Signed offset = Encode Offset x 2 in R0[25:0] */
+ asr r0, r0, #(32-26) /* Actual Signed offset = Encode Offset x 4 in R0[25:0] */
add r1, r6, #4 /* R1: (PC+4) + 4 */
add r0, r0, r1 /* Calculate Branch Target Address R0: (PC+8) + signed offset */
diff --git a/Debugger/debug_stub.S b/Debugger/debug_stub.S
index a0797c6..2152f7f 100644
--- a/Debugger/debug_stub.S
+++ b/Debugger/debug_stub.S
@@ -1090,8 +1090,7 @@ _dbg__cmd_Continue:
_dbg__cont_fromAddr:
bl ascii2hex_varlen_be /* convert ASCII address to Hex (in R0), R1 has address of next buffer char */
/* Continue from Specified Address */
- mov r2, #DBGSTACK_NEXTINSTR_INDEX /* The Next Instruction Pointer for Resume is in index 0 of the Debug Stack */
- _setdbgregisterfromindex r2, r0, r1 /* Set Register contents in R0, using index in R2, and scratch register R1 */
+ _setdbgregister DBGSTACK_NEXTINSTR_INDEX, r0, r1 /* Set Next Instruction Pointer for Resume using contents of R0, and scratch register R1 */
bl __dbg__procAckOnly /* send Ack to keep GDB server happy */
b _dbg__cont_is_manual_bkpt_or_address_specified
@@ -1102,6 +1101,7 @@ _dbg__cont_check_breakpoint_type:
teq r0, #DBG_MANUAL_BKPT_THUMB
beq _dbg__cont_is_manual_bkpt_or_address_specified
+@ FIXME: Need to validate the following code
_dbg__cont_is_normal_breakpoint:
_getdbgregister DBGSTACK_USERPC_INDEX, r0 /* Retrieve Aborted Instruction PC from the Debug Stack into R0 */
_setdbgregister DBGSTACK_NEXTINSTR_INDEX, r0, r1 /* Set Next Instruction Pointer for Resume using contents of R0, and scratch register R1 */
@@ -1143,8 +1143,7 @@ _dbg__cmd_Step:
_dbg__step_fromAddr:
bl ascii2hex_varlen_be /* convert ASCII address to Hex (in R0), R1 has address of next buffer char */
/* Step from Specified Address */
- mov r2, #DBGSTACK_NEXTINSTR_INDEX /* The Next Instruction Pointer for Resume is in index 0 of the Debug Stack */
- _setdbgregisterfromindex r2, r0, r1 /* Set Register contents in R0, using index in R2, and scratch register R1 */
+ _setdbgregister DBGSTACK_NEXTINSTR_INDEX, r0, r1 /* Set Next Instruction Pointer for Resume using contents of R0, and scratch register R1 */
b _dbg__step_is_manual_bkpt_or_address_specified
_dbg__step_check_breakpoint_type: