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authorTC Wan2010-12-16 17:03:50 +0800
committerTC Wan2010-12-16 17:03:50 +0800
commit2e32cda30ad266069ecb9b8c93229b0269ba1547 (patch)
treef2e42e49f32cb1b748a5952b6dd59ae00f454798 /AT91SAM7S256/armdebug
parent941a22c0adadb5098f8f33335a864fc7d0356bf5 (diff)
parent35c9bf7fc8e5f5a8176c9365566df6a9c9555494 (diff)
Merge branch 'master' of ssh://svc.cs.usm.my/~/gitrepo-bare/armdebug
Diffstat (limited to 'AT91SAM7S256/armdebug')
-rw-r--r--AT91SAM7S256/armdebug/Debugger/debug_stub.h15
-rw-r--r--AT91SAM7S256/armdebug/Debugger/undef_handler.S4
2 files changed, 16 insertions, 3 deletions
diff --git a/AT91SAM7S256/armdebug/Debugger/debug_stub.h b/AT91SAM7S256/armdebug/Debugger/debug_stub.h
index ada5858..0b1fee4 100644
--- a/AT91SAM7S256/armdebug/Debugger/debug_stub.h
+++ b/AT91SAM7S256/armdebug/Debugger/debug_stub.h
@@ -99,7 +99,16 @@
* ARM and Thumb Breakpoint Instructions.
*/
/*@{*/
-#define BKPT32_INSTR 0xE1200070 /* ARM BKPT instruction */
+
+#define __ARM6OR7__
+
+#ifdef __ARM6OR7__
+#define BKPT32_INSTR 0xE7200070 /* ARM6 and ARM7 does not trap unused opcodes (BKPT overlap with control instructions), \
+ CPU has unpredictable behavior. Ref: Steve Furber, ARM SoC Architecture 2nd Ed, pg. 143 */
+#else
+#define BKPT32_INSTR 0xE1200070 /* ARM BKPT instruction, will work in ARMv5T and above */
+#endif
+
#define BKPT32_ENUM_MASK 0x000FFF0F /* ARM BKPT Enum Mask */
#define BKPT32_AUTO_BKPT 0x00080000 /* ARM BKPT Auto-Step Flag (for CONT support) */
#define BKPT32_MANUAL_BKPT 0x0007FF0F /* Manually inserted ARM Breakpoint */
@@ -159,7 +168,11 @@ FUNCDEF void dbg__bkpt_handler(void);
* Equivalent to GDB breakpoint() routine for ARM code
*/
FUNCDEF void dbg_breakpoint_arm(void);
+#ifdef __ARM6OR7__
+inline void dbg_breakpoint_arm(void) { asm volatile (".word 0xE727FF7F" /* (BKPT32_INSTR | BKPT32_MANUAL_BKPT) */ ); }
+#else
inline void dbg_breakpoint_arm(void) { asm volatile (".word 0xE127FF7F" /* (BKPT32_INSTR | BKPT32_MANUAL_BKPT) */ ); }
+#endif
/** dbg_breakpoint_thumb.
* Equivalent to GDB breakpoint() routine for Thumb code
diff --git a/AT91SAM7S256/armdebug/Debugger/undef_handler.S b/AT91SAM7S256/armdebug/Debugger/undef_handler.S
index 385bf0c..61b8a5d 100644
--- a/AT91SAM7S256/armdebug/Debugger/undef_handler.S
+++ b/AT91SAM7S256/armdebug/Debugger/undef_handler.S
@@ -41,7 +41,7 @@ undef_handler:
tst r1, #CPSR_THUMB /* Check for Thumb Mode */
beq _is_arm /* Clear, so it's ARM mode */
_is_thumb:
- sub r0, lr, #-2 /* LR points to instruction after UNDEF instruction */
+ sub r0, lr, #2 /* LR points to instruction after UNDEF instruction */
stmfd sp!, {r0,r1} /* Save UNDEF instruction addr and previous mode's CPSR to stack */
ldrh r0, [r0] /* load UNDEF instruction into r0 */
ldr r1, =BKPT16_ENUM_MASK /* Thumb BKPT enum mask */
@@ -55,7 +55,7 @@ _is_thumb:
ldr lr, =dbg__thumb_bkpt_handler /* handle BKPT, BKPT index in r0 */
mov pc, lr /* Invoke Debugger State (Supervisor Mode) */
_is_arm:
- sub r0, lr, #-4 /* LR points to instruction after UNDEF instruction */
+ sub r0, lr, #4 /* LR points to instruction after UNDEF instruction */
stmfd sp!, {r0,r1} /* Save UNDEF instruction addr and previous mode's CPSR to stack */
ldr r0, [r0] /* load UNDEF instruction into r0 */
ldr r1, =BKPT32_ENUM_MASK /* ARM BKPT enum mask */