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authorTat-Chee Wan (USM)2011-06-15 15:37:28 +0800
committerTat-Chee Wan (USM)2011-06-15 15:37:28 +0800
commitb809e51ec64151923772477644b1e4997eb5d8b8 (patch)
tree053df21c5b26206549991d089718c470583510a3
parent3ea54a710b9c1ed68461284b62e7b0db4163e04c (diff)
renamed routines due to refactoring
-rw-r--r--Debugger/debug_runlooptasks.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/Debugger/debug_runlooptasks.S b/Debugger/debug_runlooptasks.S
index 2b2ae19..9ca0c7d 100644
--- a/Debugger/debug_runlooptasks.S
+++ b/Debugger/debug_runlooptasks.S
@@ -113,8 +113,8 @@ dbg__runloopTasks:
.code 32
.align 4
- .extern _dbg__install_singlestep
- .extern _dbg__activate_singlestep
+ .extern dbg__install_singlestep
+ .extern dbg__activate_singlestep
.extern irq_stack_frame_address
.global nxos__handleDebug
/* nxos__handleDebug
@@ -161,8 +161,8 @@ _nxos_switch2debug:
tst r4, #CPSR_THUMB /* Check for Thumb Mode */
mov r1, r5 /* R5 has interrupted instruction address, setup Single Step Breakpoint for it */
orrne r1, r1, #1 /* Configure for Thumb Single Step Breakpoint */
- bl _dbg__install_singlestep /* Setup Single Step, next instruction address returned in r1 */
- bl _dbg__activate_singlestep
+ bl dbg__install_singlestep /* Setup Single Step, next instruction address returned in r1 */
+ bl dbg__activate_singlestep
mov r0, #TRUE /* We're going to switch to Debug Mode (via Single Step Breakpoint) */
exit_nxos__handleDebug:
pop {r4, r5, lr}