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authorTat-Chee Wan (USM)2011-06-06 11:02:31 +0800
committerTat-Chee Wan (USM)2011-06-06 11:02:31 +0800
commit174f4827d5f3f0ad51435efa3c13304c5b47924d (patch)
treea28a077878eafa34baba6232666cbe1997690f42
parent72f5fe6f092a168d836510a12c5cc9161db867ab (diff)
work in progress, cleanup nxos support code
Zero copy fantom message handling, don't reset fantom_message buffer until message has been examined.
-rw-r--r--Debugger/debug_comm.S12
-rw-r--r--Debugger/debug_stub.S30
2 files changed, 26 insertions, 16 deletions
diff --git a/Debugger/debug_comm.S b/Debugger/debug_comm.S
index 298155b..d96fa22 100644
--- a/Debugger/debug_comm.S
+++ b/Debugger/debug_comm.S
@@ -577,24 +577,26 @@ dbg__comm_init:
str r0, [r1, #NXTCOMMCHANNEL_OFFSET] /* Clear NXT Channel on INIT */
ldmfd sp!, {pc}
-_dbg__comm_readbuf_reset:
#ifdef __NXOS__
+_dbg__comm_readbuf_reset:
stmfd sp!, {lr}
ldr r0, =debug_InCommBuf
mov r1, #USB_BUFSIZE
ldr r2, =fantom_init
mov lr, pc
bx r2
+#if 0
ldr r1, =debug_nxtMsgLength
mov r0, #0
str r0, [r1] /* Clear NxOS Received Message Length */
+#endif
ldmfd sp!, {pc}
#else
+_dbg__comm_readbuf_reset:
ldr r1, =debug_nxtMsgLength
mov r0, #0
str r0, [r1] /* Clear NXT Received Message Length */
bx lr
-#endif
.global dbg__copyNxtDebugMsg
/* dbg__copyNxtDebugMsg
@@ -616,6 +618,7 @@ dbg__copyNxtDebugMsg:
*/
_dbg_memcpy r1, r0, r2, r3 /* r3: scratch register */
bx lr
+#endif
/* _dbg_reset_msgTxBuf_AppendPtr
* Internal variable to reset pointers.
@@ -638,7 +641,7 @@ _dbg_reset_msgTxBuf_AppendPtr:
_dbg__commHasMsg:
stmfd sp!, {lr}
#ifdef __NXOS__
- ldr r2, =nx_usb_data_read
+ ldr r2, =nx_usb_fantom_data_read
mov lr,pc
bx r2 /* Number of bytes read in R0 */
/* Note: The return value in R0 is the Comm Buffer Size, includes NXT Direct Command Header */
@@ -662,7 +665,8 @@ _dbg__commHasMsg:
b _exit_dbg__commHasMsg
invalid_CommMsg:
- mov r0, #0
+ bl _dbg__comm_readbuf_reset /* Next Comm telegram transaction */
+ mov r0, #0
_exit_dbg__commHasMsg:
ldmfd sp!, {pc}
diff --git a/Debugger/debug_stub.S b/Debugger/debug_stub.S
index 3b1ada9..b102dc1 100644
--- a/Debugger/debug_stub.S
+++ b/Debugger/debug_stub.S
@@ -483,8 +483,15 @@ debug_armComplexCCTable:
* int nxos__handleDebug(unsigned char *msg, comm_chan_t channel, long len);
*
* This routine is called from NxOS Fantom library to setup
- * Single Step Breakpoint and copy Incoming Message to
- * Debugger Message Buffers in preparation for Debugger invocation.
+ * Single Step Breakpoint in preparation for Debugger invocation if we're in
+ * normal execution mode.
+ *
+ * It returns to complete the IRQ handling normally, after which the single
+ * step breakpoint will be triggered, and the incoming GDB message will then
+ * be processed in the dbg__bkpt_waitCMD() loop.
+ *
+ * If we're in Debugger Mode already, then just return and let the
+ * dbg__bkpt_waitCMD() loop handle it normally.
*
* If we're operating in normal NxOS mode, return True (!0)
* If we're already in Debugger Mode, return False (0)
@@ -492,40 +499,39 @@ debug_armComplexCCTable:
nxos__handleDebug:
push {r4, r5, lr}
/* When called, NxOS is in Supervisor mode (MODE_SVC), called from nx__irq_handler()
+ * via fantom_filter_packet().
+ *
* The IRQ Stack contains the LR and SPSR from the topmost interrupted task
* (NxOS supports nested IRQs)
*/
/* R0-R2 has received message related parameters */
-@@@@@@
+
/* Switch to IRQ mode get SPSR to find out how we were called */
- msr cpsr_c, #(MODE_IRQ | IRQ_FIQ_MASK)
+ msr cpsr_c, #(MODE_IRQ | CPSR_FIQ | CPSR_IRQ)
mrs r3, spsr /* Copy SPSR to r3 */
-@@@@@ FIXME: is this safe?
- msr cpsr_c, #(MODE_SVC) /* Return to SVC mode, restore interrupts */
+ msr cpsr_c, #(MODE_SVC) /* Return to SVC mode, restore interrupts */
and r3, r3, #CPSR_MODE /* Get previous mode */
teq r3, #MODE_ABT /* Are we in Abort (Debug) mode? */
moveq r0, #FALSE
beq exit_nxos__handleDebug /* Yes, return False */
_nxos_switch2debug:
- bl dbg__copyNxtDebugMsg /* setup Debugger Message Buffers, validate input, CPSR returned in R0 */
-
/* Retrieve ISR Return Address */
ldr r3, =__irq_stack__
- ldmedb r3, {r4,r5} /* R4: SPSR, R5: LR */
+ ldmdb r3, {r4,r5} /* R4: SPSR, R5: LR */
tst r4, #CPSR_THUMB /* Check for Thumb Mode */
mov r1, r5 /* R5 has interrupted instruction address, setup Single Step Breakpoint for it */
orrne r1, r1, #1 /* Configure for Thumb Single Step Breakpoint */
bl _dbg__install_singlestep /* Setup Single Step, next instruction address returned in r1 */
bl _dbg__activate_singlestep
- mov r0, #TRUE /* We're going to switch to Debug Mode */
+ mov r0, #TRUE /* We're going to switch to Debug Mode (via Single Step Breakpoint) */
exit_nxos__handleDebug:
pop {r4, r5, lr}
mov r1, lr /* Safe code: Thumb mode can't access lr */
bx r1 /* In case we have Interworking from different caller mode */
-#endif
-#ifndef __NXOS__
+#else
+
/****************************************************************************
*
* GDB Debugger Invocation Routine for NXT Firmware