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authorTC Wan2010-12-14 12:22:40 +0800
committerTC Wan2010-12-14 12:22:40 +0800
commit6707b07963315e3afad721c6f0fe30f0ba2f19bc (patch)
treea076cefc8470696fd5ff6b029e5cafb08be108c4
parentbc6e53a15ec74e9f1c9e54227a21064cb8565954 (diff)
fixed compilation errors in nxos, added condition code parser table
Fixed compilation error in nxos Work in Progress: added condition code parser table, instruction parser table
-rw-r--r--Debugger/debug_stub.S15
-rw-r--r--Debugger/debug_stub.h16
2 files changed, 27 insertions, 4 deletions
diff --git a/Debugger/debug_stub.S b/Debugger/debug_stub.S
index cc901ef..8e3e337 100644
--- a/Debugger/debug_stub.S
+++ b/Debugger/debug_stub.S
@@ -182,7 +182,7 @@ debug_armDecodeTable:
.word 0x0000f000, 0x0c00f000, _arm_data_instr_handler /* Data Processing instr with Rd = R15 */
.word 0x012fff10, 0x0ffffff0, _arm_bx_blx_handler /* BX or BLX */
.word 0x0410f000, 0x0410f000, _arm_ldr_pc_handler /* LDR with Rd = PC */
-/* .word 0x06000010, 0x0e000010, _arm_undef_handler */ /* Undefined instr: shouldn't occur, as it would've been trapped already */
+/* .word 0x06000010, 0x0e000010, _arm_undef_handler */ /* Undefined instr: shouldn't occur, as it would've been trapped already. See _dbg_next_instruction_addr */
.word 0x08108000, 0x0e108000, _arm_ldm_pc_handler /* LDM {pc} */
.word 0x0a000000, 0x0e000000, _arm_b_bl_handler /* B or BL. Note v4t does not have BLX instr */
.word 0x0c000000, 0x0c000000, _arm_coproc_swi_handler /* Coprocessor instr or SWI */
@@ -206,6 +206,19 @@ debug_thumbDecodeTable:
.hword 0x0,0x0
.word 0x0 /* Null Entry */
+/* ARM Condition Code Mapping Table
+ * Converts Instruction encoding to
+ * SPSR Flags.
+ * b31 b30 b29 b28
+ * N Z C V
+ * Indexed according to Instruction Encoding order (pg 30, Table 6, ATMEL ARM7TDMI Data Sheet)
+ * Condition Code stored in MSN(set), LSN(clear) order
+ * Note1: 0x00 = AL
+ * Note2: 0xFF indicates that the condition checks needs to be handled separately (complex checks)
+ */
+debug_armCondCodetable:
+ /* EQ, NE, HS/CS, LO/CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV */
+ .byte 0x40, 0x04, 0x20, 0x02, 0x80, 0x08, 0x10, 0x01, 0x24, 0x42, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
.code 32
.text
diff --git a/Debugger/debug_stub.h b/Debugger/debug_stub.h
index 897c2b8..2aa6669 100644
--- a/Debugger/debug_stub.h
+++ b/Debugger/debug_stub.h
@@ -29,7 +29,17 @@
* Debug Message Values
*/
/*@{*/
-#define MSGBUF_SIZE 256 /* Debug Message Buffer Size */
+
+/*
+ * USB Buffer Sizes: Ctrl Intr Iso Bulk
+ * Full Speed Device 64 64 1023 64
+ * High Speed Device 64 1024 1024 512
+ */
+
+#define USB_BUFSIZE 64
+#define USB_NUMDATAPKTS 3 /* For packet transfers */
+
+#define MSGBUF_SIZE (USB_BUFSIZE*USB_NUMDATAPKTS) /* Debug Message Buffer Size, 64 x 3 = 192 chars = ~90 bytes */
#define MSGBUF_STARTCHAR '$'
#define MSGBUF_ACKCHAR '+'
#define MSGBUF_NAKCHAR '-'
@@ -148,12 +158,12 @@ FUNCDEF void dbg__bkpt_handler(void);
/** dbg_breakpoint_arm.
* Equivalent to GDB breakpoint() routine for ARM code
*/
-FUNCDEF inline void dbg_breakpoint_arm(void) { asm volatile (".word BKPT32_INSTR | BKPT32_MANUAL_BKPT") }
+/* FUNCDEF */ inline void dbg_breakpoint_arm(void) { asm volatile (".word BKPT32_INSTR | BKPT32_MANUAL_BKPT") }
/** dbg_breakpoint_thumb.
* Equivalent to GDB breakpoint() routine for Thumb code
*/
-FUNCDEF inline void dbg_breakpoint_thumb(void) { asm volatile (".hword BKPT16_INSTR | BKPT16_MANUAL_BKPT") }
+/* FUNCDEF */ inline void dbg_breakpoint_thumb(void) { asm volatile (".hword BKPT16_INSTR | BKPT16_MANUAL_BKPT") }
/*@}*/