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authorTat-Chee Wan (USM)2011-07-12 09:00:29 +0800
committerTat-Chee Wan (USM)2011-07-12 09:00:29 +0800
commitdb794b0fb270d533b97d54094b855c2da1377a16 (patch)
treeff8f18234d072b0e17f6a89d49d717f4f370451d
parent58574d9e237773a18dc2c430f6b674e9e267eb15 (diff)
fix loop logic in arm test routine
-rw-r--r--Debugger/debug_test.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/Debugger/debug_test.S b/Debugger/debug_test.S
index a4082a5..10afc57 100644
--- a/Debugger/debug_test.S
+++ b/Debugger/debug_test.S
@@ -55,9 +55,9 @@ test_arm_1:
test_arm_2:
sub r0, r0, #1
cmp r0, #5
- bgt test_arm_1
- ldrle pc, =test_arm_2
- ldr pc, =test_arm_1
+ bgt test_arm_3
+ ldrle pc, =test_arm_1
+ ldr pc, =exit_dbg__test_arm_instrstep
test_arm_3:
sub r0, r0, #1