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path: root/cesar/tools/sniffer_phy/src/lowlevel.c
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/* Cesar project {{{
 *
 * Copyright (C) 2010 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    src/lowlevel.c
 * \brief   Low level sniffer functions.
 * \ingroup sniffer_phy
 *
 * Handle FC and PB reception in ISR context and unlist them in DSR context.
 *
 * Received data is forwarded to MME layer to be sent to sniffer client.
 */
#include "common/std.h"

#include "hal/phy/phy.h"
#include "hal/arch/arch.h"
#include "lib/slist.h"
#include "mac/pbproc/inc/fc.h"
#include "mac/common/timings.h"
#include "mac/common/defs.h"

#include "inc/context.h"

/** MPDU informations. */
struct lowlevel_mpdu_t
{
    /** Number of PB. */
    uint pb_nb;
    /** Number of symbols. */
    uint symbol_nb;
    /** PB size. */
    phy_pb_size_t pb_size;
    /** Tonemap. */
    tonemap_t *tm;
};
typedef struct lowlevel_mpdu_t lowlevel_mpdu_t;

static void ARCH_ILRAM
lowlevel_fc_analyse (sniffer_phy_t *ctx, const u32 *fc_av,
                     lowlevel_mpdu_t *mpdu)
{
    static const uint symbol_tck[] ARCH_DLRAM_DATA = {
        MAC_DX417_TCK, MAC_DX567_TCK, MAC_DX3534_TCK };
    pbproc_fc_t *fc = (pbproc_fc_t *) fc_av;
    mpdu->pb_nb = 0;
    /* CRC OK, payload requested and enough pool? */
    if (fc_av && ctx->lowlevel.rx_pb && ctx->lowlevel.pool_size > 1)
    {
        /* Decode FC. */
        switch (fc->generic.dt_av)
        {
        case PBPROC_FC_DT_BEACON:
            mpdu->pb_nb = 1;
            mpdu->pb_size = PHY_PB_SIZE_136;
            mpdu->tm =
                &ctx->lowlevel.tonemask_info->tonemap_robo[PHY_MOD_MINI_ROBO];
            break;
        case PBPROC_FC_DT_SOF:
            /* Only decode SOF with unencrypted ROBO payload. */
            if (fc->sof.eks != MAC_EKS_CLEAR
                || fc->sof.num_sym == 0
                || fc->sof.tmi_av >= PHY_MOD_ROBO_NB)
                break;
            mpdu->pb_size = fc->sof.pbsz ? PHY_PB_SIZE_136 : PHY_PB_SIZE_520;
            mpdu->tm =
                &ctx->lowlevel.tonemask_info->tonemap_robo[fc->sof.tmi_av];
            /* Only one PB136 allowed per frame. */
            if (mpdu->pb_size == PHY_PB_SIZE_136)
            {
                mpdu->pb_nb = 1;
            }
            else
            {
                /* Compute number of symbols. */
                uint fl_tck = MAC_FL_TO_TCK (fc->sof.fl_av);
                uint rifs_tck = MAC_RIFS_DEFAULT_TCK;
                if (fc->sof.mpdu_cnt)
                    rifs_tck = MAC_BIFS_TCK;
                uint symb_nb;
                if (fc->sof.num_sym == 1)
                    symb_nb = 1;
                else if (fc->sof.num_sym == 2)
                    symb_nb = 2;
                else
                    symb_nb = (fl_tck > rifs_tck + 2 * MAC_DX567_TCK)?
                            ((fl_tck - rifs_tck - 2 * MAC_DX567_TCK)
                                / symbol_tck[mpdu->tm->gil] + 2):0;
                /* Compute number of PB. */
                uint bits_per_pb = mpdu->tm->bits_per_pb[PHY_PB_SIZE_520];
                uint bits_per_symbol = mpdu->tm->bits_per_symbol;
                if (bits_per_pb >= bits_per_symbol)
                    mpdu->pb_nb = symb_nb * bits_per_symbol / bits_per_pb;
                else
                    mpdu->pb_nb = ((symb_nb - 1) * bits_per_symbol
                                   + bits_per_pb) / bits_per_pb;
            }
            break;
        default:
            break;
        }
        /* Adjust PB and symbol number. */
        mpdu->pb_nb = MIN (mpdu->pb_nb, ctx->lowlevel.pool_size - 1);
        if (mpdu->pb_nb)
        {
            uint bits_per_pb = mpdu->tm->bits_per_pb[mpdu->pb_size];
            uint bits_per_symbol = mpdu->tm->bits_per_symbol;
            mpdu->symbol_nb = (mpdu->pb_nb * bits_per_pb
                               + bits_per_symbol - 1) / bits_per_symbol;
        }
    }
}

static bool ARCH_ILRAM
lowlevel_rx_fc_cb (void *user, u32 rx_date, const u32 *fc_av)
{
    sniffer_phy_t *ctx = user;
    lowlevel_mpdu_t mpdu;
    dbg_assert (ctx);
    /* Analyse preamble. */
    lowlevel_fc_analyse (ctx, fc_av, &mpdu);
    /* Prepare hardware. */
    if (mpdu.pb_nb == 0)
        phy_rx_prepare_short (ctx->lowlevel.phy);
    else
        phy_rx_prepare (ctx->lowlevel.phy, mpdu.pb_nb,
                        mpdu.tm->phy_combo_params[mpdu.pb_size], mpdu.tm->gil,
                        mpdu.symbol_nb, mpdu.tm->tcc_halfit);
    /* Take a block to record the FC. */
    if (ctx->lowlevel.pool_size)
    {
        blk_t *blk = slist_pop_front (ctx->lowlevel.pool_, paste_size);
        lowlevel_rx_desc_t *desc = PARENT_OF (lowlevel_rx_desc_t, blk, blk);
        lowlevel_rx_t *rx = desc->rx;
        /* Fill FC information. */
        rx->date = rx_date;
        rx->fc10 = phy_rx_fc10 (ctx->lowlevel.phy);
        rx->fc10_bad_crc = rx->fc10 == (u32) -1;
        if (fc_av)
        {
            rx->fc[0] = fc_av[0];
            rx->fc[1] = fc_av[1];
            rx->fc[2] = fc_av[2];
            rx->fc[3] = fc_av[3];
            rx->fc_bad_crc = false;
        }
        else
        {
            rx->fc[0] = (u32) -1;
            rx->fc[1] = (u32) -1;
            rx->fc[2] = (u32) -1;
            rx->fc[3] = (u32) -1;
            rx->fc_bad_crc = true;
        }
        /* Enlist RX descriptor if finished or wait until DMA end. */
        if (mpdu.pb_nb == 0)
        {
            rx->pb_head = NULL;
            slist_push_back (ctx->lowlevel.rx_, desc);
        }
        else
        {
            pb_t *head = PARENT_OF (pb_t, blk, ctx->lowlevel.pool_head);
            rx->pb_head = head;
            ctx->lowlevel.rxing = desc;
            phy_pbdma_start (ctx->lowlevel.phy, true, NULL, mpdu.pb_nb,
                             mpdu.pb_nb, &head->phy_pb, NULL, true);
        }
        rx->pb_nb = mpdu.pb_nb;
        rx->pb_size = mpdu.pb_size;
        dbg_invalid_ptr (rx->pb_tail);
    }
    /* Next. */
    if (mpdu.pb_nb == 0)
    {
        /* Restart RX now. */
        phy_rx_activate (ctx->lowlevel.phy, true, 0, true);
        /* Ask a DSR. */
        return true;
    }
    else
    {
        /* No DSR, wait for PBDMA interrupt. */
        return false;
    }
}

static bool
lowlevel_access_cb (void *user)
{
    /* This interrupt is not used in sniffer. */
    dbg_assert_default ();
    return false;
}

static bool
lowlevel_access_conf_cb (void *user)
{
    /* This interrupt is not used in sniffer. */
    dbg_assert_default ();
    return false;
}

static bool ARCH_ILRAM
lowlevel_pbdma_cb (void *user, u32 status_word)
{
    sniffer_phy_t *ctx = user;
    dbg_assert (ctx);
    lowlevel_rx_t *rx = ctx->lowlevel.rxing->rx;
    dbg_assert (rx);
    /* Find end of list and update pool and MPDU info. */
    phy_pb_t *tail = phy_pbdma_get_tail (ctx->lowlevel.phy);
    slist_slice (ctx->lowlevel.pool_, &tail->blk, rx->pb_nb, paste_size);
    rx->pb_tail = PARENT_OF (pb_t, phy_pb, tail);
    /* Enlist RX descriptor. */
    slist_push_back (ctx->lowlevel.rx_, ctx->lowlevel.rxing);
    ctx->lowlevel.rxing = NULL;
    /* Restart RX now. */
    phy_rx_activate (ctx->lowlevel.phy, true, 0, true);
    /* Ask a DSR. */
    return true;
}

static bool
lowlevel_tx_false_alarm_cb (void *user)
{
    /* This interrupt is not implemented in hardware! */
    dbg_assert_default ();
    return false;
}

static void
lowlevel_deferred_cb (void *user)
{
    sniffer_phy_t *ctx = user;
    dbg_assert (ctx);
    /* Unlist RX MPDU descriptors. */
    while (!slist_empty (ctx->lowlevel.rx_, paste))
    {
        /* Extract MPDU. */
        uint flags = arch_isr_lock ();
        lowlevel_rx_desc_t *desc = slist_pop_front (ctx->lowlevel.rx_);
        arch_isr_unlock (flags);
        /* Give to MME layer. */
        mme_report_mpdu (ctx, desc->rx);
        /* Release. */
        if (desc->rx->pb_nb)
            slist_push_back_range (ctx->lowlevel.pool_,
                                   &desc->rx->pb_head->blk,
                                   &desc->rx->pb_tail->blk, desc->rx->pb_nb,
                                   paste_size);
        slist_push_back (ctx->lowlevel.pool_, &desc->blk, paste_size);
    }
}

void
lowlevel_init (sniffer_phy_t *ctx)
{
    static tonemask_info_t tonemask_info;
    dbg_assert (ctx);
    /* Initialise context. */
    ctx->lowlevel.rx_pb = false;
    slist_init (ctx->lowlevel.pool_, paste_size);
    slist_init (ctx->lowlevel.rx_, paste);
    ctx->lowlevel.rxing = NULL;
    /* Initialise tonemask information. */
    ctx->lowlevel.tonemask_info = &tonemask_info;
    tonemask_default (ctx->lowlevel.tonemask_info->tonemask);
    tonemask_update (ctx->lowlevel.tonemask_info);
    /* Initialise Phy. */
    ctx->lowlevel.phy = phy_init (ctx,
                                  CALLBACK (lowlevel_rx_fc_cb),
                                  CALLBACK (lowlevel_access_cb),
                                  CALLBACK (lowlevel_access_conf_cb),
                                  CALLBACK (lowlevel_pbdma_cb),
                                  CALLBACK (lowlevel_tx_false_alarm_cb),
                                  CALLBACK (lowlevel_deferred_cb));
    /* Allocate pool. */
    blk_t *first, *last;
    first = blk_alloc_desc_range (LOWLEVEL_POOL_SIZE, &last);
    slist_push_back_range (ctx->lowlevel.pool_, first, last,
                           LOWLEVEL_POOL_SIZE, paste_size);
}

void
lowlevel_activate (sniffer_phy_t *ctx, bool state)
{
    dbg_assert (ctx);
    if (state)
    {
        /* Program tonemask. */
        phy_set_tonemask (
            ctx->lowlevel.phy,
            ARCH_CPU_TO_DMA (ctx->lowlevel.tonemask_info->tonemask),
            ctx->lowlevel.tonemask_info->carrier_nb);
        /* Set RX mode. */
#if CONFIG_MAC_PBPROC_EOC_FC
        phy_rx_param (ctx->lowlevel.phy, PHY_FC_MODE_AV_1);
#else
        phy_rx_param (ctx->lowlevel.phy, PHY_FC_MODE_HYBRID_1);
#endif
    }
    /* Change RX state. */
    phy_rx_activate (ctx->lowlevel.phy, true, 0, state);
}

void
lowlevel_rx_pb (sniffer_phy_t *ctx, bool rx_pb)
{
    dbg_assert (ctx);
    /* Keep setting. */
    ctx->lowlevel.rx_pb = rx_pb;
}