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path: root/cesar/mac/pbproc/src/pbproc.c
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/* Cesar project {{{
 *
 * Copyright (C) 2007 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    mac/pbproc/src/pbproc.c
 * \brief   General PB Processing functions.
 * \ingroup pbproc
 */
#include "common/std.h"
#include "mac/pbproc/inc/context.h"

#include "lib/stats.h"
#include "hal/gpio/gpio.h"
#include "hal/watchdog/watchdog.h"
#include "mac/common/timings.h"

#include "mac/pbproc/inc/fsm_top.h"
#include "mac/pbproc/inc/fsm_handle_fc.h"
#include "mac/pbproc/inc/fsm_rx_data.h"
#include "mac/pbproc/inc/fsm_rx_beacon.h"
#include "mac/pbproc/inc/fsm_rx_sound.h"
#include "mac/pbproc/inc/fsm_tx_rts_cts.h"
#include "mac/pbproc/inc/fsm_tx_data.h"
#include "mac/pbproc/inc/fsm_tx_sound.h"

#include <string.h>

/** Maximum budget for beacon reception. */
#define PBPROC_BUDGET_RX_BEACON_TCK MAC_MS_TO_TCK (3)

/** Maximum budget for MPDU reception. */
#define PBPROC_BUDGET_RX_TCK MAC_MS_TO_TCK (10)

static pbproc_t ARCH_DLRAM_BSS pbproc_global;

/**
 * Update SPOC, triggered by extra interrupt.
 * \param  user  user data, pbproc context
 * \return  true to request a DSR
 */
static bool
pbproc_spoc_update_cb (void *user);

/**
 * Update SPOC, triggered by extra interrupt.
 * \param  user  user data, pbproc context
 * \return  true to request a DSR
 */
static bool
pbproc_spoc_update_cb (void *user);

/**
 * Deferred handler, commit beacons and MPDU to upper layers.
 * \param  ctx  pbproc context
 */
static void ARCH_ILRAM
pbproc_deferred (pbproc_t *ctx)
{
    uint flags;
    dbg_claim (ctx);
    u32 budget_date, current_date;

    if (!slist_empty (ctx->commit.release_))
    {
        /* Extract to be released PB. */
        flags = arch_isr_lock ();
        pb_t *head = ctx->commit.release_head;
        pb_t *tail = ctx->commit.release_tail;
        slist_init (ctx->commit.release_);
        arch_isr_unlock (flags);
        /* Release PB. */
        blk_release_desc_range (&head->blk, &tail->blk);
    }
    current_date = phy_date ();
    budget_date = current_date + PBPROC_BUDGET_RX_BEACON_TCK;
    while (!slist_empty (ctx->commit.rx_beacon_)
            && less_mod2p32 (current_date, budget_date))
    {
        /* Extract beacon. */
        flags = arch_isr_lock ();
        pb_beacon_t *rx_beacon = slist_pop_front (ctx->commit.rx_beacon_);
        arch_isr_unlock (flags);
        pbproc_rx_beacon_params_t *params =
            (pbproc_rx_beacon_params_t *) (rx_beacon->data + MAC_PB136_BYTES);
        /* Give the received beacon to upper layer. */
        PBPROC_TRACE (RX_BEACON_CB);
        dbg_claim (ctx->rx_beacon_cb);
        ctx->rx_beacon_cb (ctx->user_data, rx_beacon, params);
        current_date = phy_date ();
    }
    budget_date = current_date + PBPROC_BUDGET_RX_TCK;
    while (!slist_empty (ctx->commit.rx_)
            && less_mod2p32 (current_date, budget_date))
    {
        /* Extract MPDU. */
        flags = arch_isr_lock ();
        pbproc_rx_desc_t *rx_desc = slist_pop_front (ctx->commit.rx_);
        arch_isr_unlock (flags);
        /* Give received frame to upper layer. */
        PBPROC_TRACE (RX_CB, rx_desc->rx->pb_nb);
        dbg_claim (ctx->rx_cb);
        ctx->rx_cb (ctx->user_data, rx_desc);
        current_date = phy_date ();
    }

    if (!slist_empty (ctx->commit.rx_)
         || !slist_empty (ctx->commit.rx_beacon_))
        phy_deferred_schedule (ctx->phy);
}

static void
pbproc_times_init (mac_config_t *config, pbproc_times_t times[2])
{
    uint pre_fcs_tck;
    dbg_assert_ptr (config);
    dbg_assert (1 <= config->fc_symbols_nb && config->fc_symbols_nb <= 2);
    /* AV only timings. */
    pre_fcs_tck = MAC_PREAMBLE_TCK + config->fc_symbols_nb * MAC_FC_AV_TCK;
    times[0].pre_fcs_tck = pre_fcs_tck;
    times[0].sack_tck = pre_fcs_tck;
    times[0].rts_rcg_tck = pre_fcs_tck + MAC_RCG_TCK;
    times[0].rts_rcg_cts_cmg_tck = pre_fcs_tck + MAC_RCG_TCK + pre_fcs_tck
        + MAC_CMG_TCK;
    times[0].max_fl_tck = MAC_FL_TO_TCK (MAC_MAX_FL_MIN_FL);
    /* Hybrid timings. */
    pre_fcs_tck = MAC_PREAMBLE_HYBRID_TCK + MAC_FC_10_TCK
        + config->fc_symbols_nb * MAC_FC_AV_TCK;
    times[1].pre_fcs_tck = pre_fcs_tck;
    times[1].sack_tck = pre_fcs_tck;
    times[1].rts_rcg_tck = pre_fcs_tck + MAC_RCG_TCK;
    times[1].rts_rcg_cts_cmg_tck = pre_fcs_tck + MAC_RCG_TCK + pre_fcs_tck
        + MAC_CMG_TCK;
    /* XXX: does not handle two FC AV. */
    times[1].max_fl_tck = MAC_EIFS_10_TCK
        - (MAC_PREAMBLE_HYBRID_TCK + MAC_FC_10_TCK + MAC_FC_AV_TCK) * 2
        - MAC_CIFS_TCK;
    /* Hybrid delimiter timings. */
    times[2].pre_fcs_tck = times[1].pre_fcs_tck;
    times[2].sack_tck = times[1].pre_fcs_tck;
    times[2].rts_rcg_tck = times[1].rts_rcg_tck;
    times[2].rts_rcg_cts_cmg_tck = times[1].rts_rcg_cts_cmg_tck;
    times[2].max_fl_tck = MAC_FL_TO_TCK (MAC_MAX_FL_MIN_FL);
}

/**
 * Initialise PBProc stats.
 * \param  ctx  pbproc context
 */
static void
pbproc_stats_init (pbproc_t *ctx)
{
    /* Clear all stats. */
    memset (&ctx->stats, 0, sizeof (ctx->stats));
#if CONFIG_STATS
# define PBPROC_STAT(s) \
    lib_stats_set_stat_value_notype ("pbproc_" #s, &ctx->stats.s, \
                                     LIB_STATS_ACCESS_READ_ONLY, \
                                     LIB_STATS_DEBUG)
    PBPROC_STAT (prp_lost);
    PBPROC_STAT (cw_lost);
    PBPROC_STAT (aifs);
    PBPROC_STAT (rx_out_of_alloc);
    PBPROC_STAT (rx_rsof_out_of_alloc);
    PBPROC_STAT (rx_pool_shortage);
    PBPROC_STAT (rx_handle_fc);
    PBPROC_STAT (rx_beacon);
    PBPROC_STAT (rx_data);
    PBPROC_STAT (rx_data_wack);
    PBPROC_STAT (rx_data_woack);
    PBPROC_STAT (rx_data_burst_stop);
    PBPROC_STAT (rx_data_error);
    PBPROC_STAT (rx_data_empty);
    PBPROC_STAT (rx_data_bad_symb_nb);
    PBPROC_STAT (rx_sound);
    PBPROC_STAT (rx_sound_complete);
    PBPROC_STAT (rx_sound_drop);
    PBPROC_STAT (rx_rts);
    PBPROC_STAT (rx_nfu);
    PBPROC_STAT (rx_fc_unknown);
    PBPROC_STAT (rx_crc_error);
    PBPROC_STAT (rx_len_err);
    PBPROC_STAT (tx_invalid);
    PBPROC_STAT (tx_late);
    PBPROC_STAT (tx_data);
    PBPROC_STAT (tx_data_cancel);
    PBPROC_STAT (tx_data_burst);
    PBPROC_STAT (tx_data_burst_interrupted);
    PBPROC_STAT (tx_data_wack);
    PBPROC_STAT (tx_data_woack);
    PBPROC_STAT (tx_data_beacon);
    PBPROC_STAT (tx_data_wack_ack);
    PBPROC_STAT (tx_data_wack_noack);
    PBPROC_STAT (tx_data_re_sync);
    PBPROC_STAT (tx_sound);
    PBPROC_STAT (tx_sound_ack);
    PBPROC_STAT (tx_sound_noack);
#if CONFIG_MAC_PBPROC_EOC_FC
    PBPROC_STAT (tx_data_empty);
    PBPROC_STAT (tx_data_pb_total);
#endif
#endif /* CONFIG_STATS */
}

pbproc_t *
pbproc_init (mac_config_t *config, mac_store_t *store)
{
    pbproc_t *ctx;
    dbg_assert (config);
    dbg_assert (store);
    ctx = &pbproc_global;
    /* Initialise context. */
    ctx->config = config;
    ctx->store = store;
    ctx->phy =
        phy_init (ctx, (phy_rx_fc_cb_t) pbproc_fsm_handle_rx_fc_event,
                  (phy_access_cb_t) pbproc_fsm_handle_access_event,
                  (phy_access_conf_cb_t) pbproc_fsm_handle_access_conf_event,
                  (phy_pbdma_cb_t) pbproc_fsm_handle_pbdma_event,
                  (phy_tx_false_alarm_cb_t) pbproc_fsm_handle_tx_false_alarm_event,
                  (phy_deferred_cb_t) pbproc_fsm_handle_deferred);
    phy_extra_timer_init (ctx->phy, ctx, pbproc_spoc_update_cb);
    ctx->ca = ca_init (ctx->phy, config, store, PBPROC_ANTICIP_TCK);
    pbproc_trace_init (ctx);
    ctx->user_data = NULL;
    ctx->rx_cb = NULL;
    ctx->rx_beacon_cb = NULL;
    dbg_invalid_ptr (ctx->recv_mpdu.pb_head);
    dbg_invalid_ptr (ctx->recv_mpdu.pb_tail);
    dbg_invalid_ptr (ctx->recv_mpdu.chandata_head);
    ctx->recv_mpdu.sackd.valid = false;
    slist_init (ctx->commit.rx_);
    slist_init (ctx->commit.rx_beacon_);
    slist_init (ctx->commit.release_);
    ctx->activated = false;
    pbproc_prep_mpdu_init (ctx);
    ctx->detect.beacon_detected = false;
    ctx->spoc_update.step = PHY_PREPARE_TYPE_NB;
    ctx->spoc_update.sync = false;
    ctx->spoc_update.coeff = NULL;
    /* Initialise precomputed times. */
    pbproc_times_init (config, ctx->times_array);
    ctx->symbol_tck[PHY_GIL_417] = MAC_DX417_TCK;
    ctx->symbol_tck[PHY_GIL_567] = MAC_DX567_TCK;
    ctx->symbol_tck[PHY_GIL_3534] = MAC_DX3534_TCK;
    /* Reset stats. */
    pbproc_stats_init (ctx);
    /* RX PB pool. */
    slist_init (ctx->rx_pool_, paste_size);
    /* Channel data. */
    ctx->chandata_nb = 0;
    ctx->chandata_data = false;
    /* Initialise FSM. */
    pbproc_fsm_init (ctx, pbproc_deferred);
    pbproc_ftop_init (ctx);
    pbproc_fhfc_init (ctx);
    pbproc_frda_init (ctx);
    pbproc_frbe_init (ctx);
    pbproc_frso_init (ctx);
    //pbproc_ftrc_init (ctx);
    pbproc_ftda_init (ctx);
    pbproc_ftso_init (ctx);
    /* Setup traffic indicator. */
    GPIO_SETUP (LED_TRAFFIC, GPIO_DIRECTION_OUT);
    GPIO_SET (LED_TRAFFIC, 0);
    /* Setup live indicator. */
    GPIO_SETUP (LED_PBPROC_ALIVE, GPIO_DIRECTION_OUT);
    GPIO_SET (LED_PBPROC_ALIVE, 1);
    GPIO_SETUP (LED_PBPROC_WORKING, GPIO_DIRECTION_OUT);
    GPIO_SET (LED_PBPROC_WORKING, 0);
    /* All done! */
    PBPROC_TRACE (INIT);
    return ctx;
}

void
pbproc_init_cb (pbproc_t *ctx, void *user_data, pbproc_rx_cb_t rx_cb,
                pbproc_rx_beacon_cb_t rx_beacon_cb)
{
    dbg_assert (ctx);
    dbg_assert (rx_cb);
    dbg_assert (rx_beacon_cb);
    ctx->user_data = user_data;
    ctx->rx_cb = rx_cb;
    ctx->rx_beacon_cb = rx_beacon_cb;
}

void
pbproc_uninit (pbproc_t *ctx)
{
    dbg_assert (ctx);
    PBPROC_TRACE (UNINIT);
    if (ctx->rx_pool_head)
    {
        blk_release_desc_range (&ctx->rx_pool_head->blk,
                                &ctx->rx_pool_tail->blk);
        slist_init (ctx->rx_pool_, paste_size);
    }
    dbg_assert (slist_empty (ctx->commit.rx_));
    dbg_assert (slist_empty (ctx->commit.rx_beacon_));
    dbg_assert (slist_empty (ctx->commit.release_));
    pbproc_trace_uninit (ctx);
    ca_uninit (ctx->ca);
    phy_uninit (ctx->phy);
}

phy_t *
pbproc_get_phy (pbproc_t *ctx)
{
    return ctx->phy;
}

ca_t *
pbproc_get_ca (pbproc_t *ctx)
{
    return ctx->ca;
}

static void
pbproc_deactivate_idle_task (pbproc_t *ctx)
{
    dbg_assert (ctx->fsm.current_state == PBPROC_FSM_STATE_IDLE);
    phy_rx_activate (ctx->phy, true, 0, false);
    ca_access_deactivate (ctx->ca);
}

void
pbproc_activate (pbproc_t *ctx, bool flag)
{
    PBPROC_TRACE (ACTIVATE, phy_date (), flag);
    ctx->activated = flag;
    if (flag)
    {
        /* Program tonemask. */
        phy_set_tonemask (
            ctx->phy,
            ARCH_CPU_TO_DMA (ctx->config->tonemask_info.tonemask),
            ctx->config->tonemask_info.carrier_nb);
        /* Activate. */
        ctx->alloc = *ca_access_activate (ctx->ca, phy_date ());
        ctx->times = ctx->times_array[
            PBPROC_TIMES_ARRAY_INDEX (ctx->alloc.hybrid,
                                      ctx->alloc.coexistence_mode)];
        phy_rx_param (ctx->phy, PHY_FC_MODE (ctx->alloc.hybrid,
                                             ctx->config->fc_symbols_nb));
        phy_rx_activate (ctx->phy, true, 0, true);
    }
    else
    {
        /* Deactivate. */
        pbproc_fsm_idle_task (ctx, pbproc_deactivate_idle_task);
    }
    /* Participate or not in watchdog reset. */
    hal_watchdog_activate (HAL_WATCHDOG_EVENT_PBPROC, flag);
}

void
pbproc_beacon_detected (pbproc_t *ctx, u32 detect_expiration_date)
{
    dbg_assert_ptr (ctx);
    ctx->detect.beacon_detected = true;
    ctx->detect.beacon_detect_expiration_date = detect_expiration_date;
}

void
pbproc_rx_segment_refill (pbproc_t *ctx, pb_t *first, pb_t *last, uint nb)
{
    dbg_assert_ptr (ctx);
    dbg_assert_ptr (last);
    dbg_assert (nb > 0);
    if (CONFIG_DEBUG_CLAIM)
    {
        uint i;
        pb_t *p, *plast;
        for (i = 0, p = first; i < nb; i++, p = p->next)
        {
            dbg_assert_ptr (p);
            plast = p;
        }
        dbg_assert (plast == last);
    }
    PBPROC_TRACE (RX_SEG_REFILL, nb);
    /* Now, the real "work", ISR locked. */
    uint flags = arch_isr_lock ();
    slist_push_back_range (ctx->rx_pool_, first, last, nb, paste_size);
    arch_isr_unlock (flags);
}

void
pbproc_set_chandata_conf (pbproc_t *ctx, phy_chandata_conf_t *conf, uint nb,
                          bool data)
{
    uint i;
    dbg_assert (ctx);
    dbg_assert ((nb && conf) || !nb);
    dbg_assert (nb <= PBPROC_CHANDATA_NB);
    /* Copy to context, set to zero in case it is used during the copy. */
    ctx->chandata_nb = 0;
    arch_reorder_barrier ();
    for (i = 0; i < nb; i++)
        ctx->chandata_conf[i] = conf[i];
    arch_reorder_barrier ();
    ctx->chandata_nb = nb;
    ctx->chandata_data = data;
}

void
pbproc_spoc_coeff_set (pbproc_t *ctx, bool sync, phy_spoc_coeff_t *coeff)
{
    dbg_assert (ctx);
    dbg_assert (coeff);
    PBPROC_TRACE (SPOC_COEFF_SET, sync, coeff->rho_q30);
    /* Update pending SPOC coefficients. */
    uint flags = arch_isr_lock ();
    if (ctx->spoc_update.coeff)
    {
        blk_release (ctx->spoc_update.coeff->part2);
        blk_release (ctx->spoc_update.coeff);
    }
    ctx->spoc_update.step = PHY_PREPARE_TYPE_PREAMBLE;
    ctx->spoc_update.sync = sync;
    ctx->spoc_update.coeff = coeff;
    arch_isr_unlock (flags);
}

static bool
pbproc_spoc_update_cb (void *user)
{
    pbproc_t *ctx = user;
    dbg_assert (ctx);
    PBPROC_TRACE (SPOC_UPDATE, phy_date (), ctx->spoc_update.step);
    if (ctx->spoc_update.step < PHY_PREPARE_TYPE_NB)
    {
        /* Update TX coefficients. */
        if (ctx->spoc_update.step == PHY_PREPARE_TYPE_PREAMBLE)
        {
            dbg_assert (ctx->spoc_update.coeff);
            phy_spoc_tx_set (ctx->phy, ctx->spoc_update.coeff);
        }
        /* Create preamble or PRS. */
        phy_prepare (ctx->phy, ctx->spoc_update.step, false);
        /* Update RX coefficients and delta used, and release. */
        if (ctx->spoc_update.step == PHY_PREPARE_TYPE_PREAMBLE)
        {
            phy_spoc_rx_set (ctx->phy, ctx->spoc_update.coeff);
            phy_freq_error_set (ctx->phy, ctx->spoc_update.sync,
                                ctx->spoc_update.coeff->rho_q30);
            blk_release (ctx->spoc_update.coeff->part2);
            blk_release (ctx->spoc_update.coeff);
            ctx->spoc_update.coeff = NULL;
        }
        /* Next step. */
        ctx->spoc_update.step++;
    }
    return false;
}

void ARCH_ILRAM
pbproc_spoc_schedule_update (pbproc_t *ctx, u32 date)
{
    dbg_claim (ctx);
    if (ctx->spoc_update.step < PHY_PREPARE_TYPE_NB)
        phy_extra_timer_program (ctx->phy, date);
}

void ARCH_ILRAM
pbproc_backoff_lost (pbproc_t *ctx)
{
    dbg_claim (ctx);
    /* Defer or cancel backoff depending of the PRP result. */
    if (!ctx->access.prp || phy_access_backoff_prp_won (ctx->phy))
    {
        ca_backoff_deferred (ctx->ca,
                             phy_access_backoff_slot_count (ctx->phy) - 2);
        ctx->stats.cw_lost++;
    }
    else
    {
        ca_backoff_cancel (ctx->ca);
        ctx->stats.prp_lost++;
    }
}
#if CONFIG_MAC_PBPROC_EOC_FC
void
pbproc_parameters_adjust (pbproc_t *ctx, bool adjust)
{
    dbg_assert (ctx);
    /* adjust only non-hybrid time */
    if (adjust)
    {
        ctx->times_array[0].max_fl_tck =
        ctx->times_array[2].max_fl_tck = MAC_MS_TO_TCK (4);
    }
}
#endif