#ifndef PLATFORM_TINA_H #define PLATFORM_TINA_H /* *=========================================================================== * Number of Ethernet buffer descriptors *=========================================================================== */ #define TX_RING_SIZE 32 #define RX_RING_SIZE 224 #define ETH_DMA_TX_ZONE_SIZE (TX_RING_SIZE*40) /* TODO : Set the good size*/ #define ETH_DMA_RX_ZONE_SIZE (RX_RING_SIZE*40) /* TODO : Set the good size*/ #define ETH_DMA_ZONE_SIZE (ETH_DMA_TX_ZONE_SIZE+ETH_DMA_RX_ZONE_SIZE) // Real Size align on 64K (boundary must be respect) #define ETH_DMA_ZONE_REAL_SIZE (((ETH_DMA_ZONE_SIZE + 0x10000 - 1) / 0x10000) * 0x10000) #define DMA_ZONE_USED_SIZE (PLC_DMA_ZONE_SIZE + ETH_DMA_ZONE_REAL_SIZE) #define DMA_ZONE_SIZE (((DMA_ZONE_USED_SIZE + 0x100000 - 1) / 0x100000) * 0x100000) //DMAs Base Addresses #define PLC_DMA_RX_BASE (DMA_zone_base+ETH_DMA_ZONE_REAL_SIZE) #define PLC_DMA_TX_BASE (PLC_DMA_RX_BASE+DMA_RX_POOL_SIZE) #define PB_POOL_BASE (PLC_DMA_TX_BASE+DMA_TX_POOL_SIZE) #define SKB_RESERVE (2+32) #endif /* PLATFORM_TINA_H */