From 368bf940a257b942ebbe4f0b0141b179ed032127 Mon Sep 17 00:00:00 2001 From: Cyril Jourdan Date: Tue, 21 Aug 2012 15:46:57 +0200 Subject: {cleo, common}: change eth prefix in NVRAM fields into eth1, refs #2961 --- cleopatre/u-boot-1.1.6/board/sdk300/sdk300.c | 4 +-- cleopatre/u-boot-1.1.6/cpu/spc300/eth_init.S | 4 +-- cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c | 50 +++++++++++++------------- cleopatre/u-boot-1.1.6/net/spidupd.c | 4 +-- 4 files changed, 31 insertions(+), 31 deletions(-) (limited to 'cleopatre/u-boot-1.1.6') diff --git a/cleopatre/u-boot-1.1.6/board/sdk300/sdk300.c b/cleopatre/u-boot-1.1.6/board/sdk300/sdk300.c index 5c888253e5..b3b79ea5f7 100644 --- a/cleopatre/u-boot-1.1.6/board/sdk300/sdk300.c +++ b/cleopatre/u-boot-1.1.6/board/sdk300/sdk300.c @@ -81,8 +81,8 @@ static void set_eth_mac_addr(bd_t *bd) nvram = (spidcom_nvram_t *)(bd->bi_nvram_addr); /* SPI direct can access to flash only through 32bits */ - eth_lsb = *((uint32_t*)nvram->eth_address); - eth_msb = *(((uint32_t*)nvram->eth_address)+1); + eth_lsb = *((uint32_t*)nvram->eth1_address); + eth_msb = *(((uint32_t*)nvram->eth1_address)+1); eth_msb &= 0x0000FFFF; /* Put this MAC address directly in IP Registers */ diff --git a/cleopatre/u-boot-1.1.6/cpu/spc300/eth_init.S b/cleopatre/u-boot-1.1.6/cpu/spc300/eth_init.S index a337174206..e27e16c09a 100644 --- a/cleopatre/u-boot-1.1.6/cpu/spc300/eth_init.S +++ b/cleopatre/u-boot-1.1.6/cpu/spc300/eth_init.S @@ -93,8 +93,8 @@ ethernet_config: * default mode is GMII */ ldr r3, [r10, #NVRAM_PKG_CFG_OFFSET] /* find pkg_cfg */ - lsr r3, r3, #NVRAM_ETH_MODE_SHIFT - and r3, r3, #NVRAM_ETH_MODE_MASK /* r3 = eth_mode */ + lsr r3, r3, #NVRAM_ETH1_MODE_SHIFT + and r3, r3, #NVRAM_ETH1_MODE_MASK /* r3 = eth_mode */ cmp r3, #NVRAM_ETH_MODE_MII beq 10f /* eth_mode = MII */ cmp r3, #NVRAM_ETH_MODE_RMII diff --git a/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c b/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c index 8e7cac9292..0e3951b6dd 100644 --- a/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c +++ b/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c @@ -83,7 +83,7 @@ static volatile spcmac_dma_des *dma_tx; static volatile spcmac_dma_des *dma_rx; static int cur_rx; static int cur_tx; -static int eth_phy_addr; +static int eth1_phy_addr; static unsigned int eth_phy_id = 0; #define MAX_ETH_FRAME_SIZE 1536 @@ -291,7 +291,7 @@ int spcmac_phy_reset (int phy_addr, unsigned long phy_id) DECLARE_GLOBAL_DATA_PTR; spidcom_nvram_t *nvram = (spidcom_nvram_t *)(gd->bd->bi_nvram_addr); - if((NVRAM_BFEXT(ETH_MODE, nvram->pkg_cfg) == NVRAM_ETH_MODE_GMII) && + if((NVRAM_BFEXT(ETH1_MODE, nvram->pkg_cfg) == NVRAM_ETH_MODE_GMII) && (PHYSID_GET_OUI (phy_id) == ICPLUS_OUI) && (PHYSID_GET_MODEL (phy_id) == ICPLUS_IP1001)) spcmac_mii_write(phy_addr, 16, spcmac_mii_read(phy_addr, 16) & ~(2)); @@ -309,7 +309,7 @@ static unsigned int spcmac_phy_get_addr (void) //Get PHY address directly from NVRAM nvram = (spidcom_nvram_t *)(gd->bd->bi_nvram_addr); - return (nvram->eth_phy_addr > 31 ? 0 : nvram->eth_phy_addr); + return (nvram->eth1_phy_addr > 31 ? 0 : nvram->eth1_phy_addr); #else int i, phyaddr; @@ -360,25 +360,25 @@ static int spcmac_phy_init (void) uint status = 0; ulong now = 0; - eth_phy_addr = spcmac_phy_get_addr(); - printf ("PHY address is 0x%02x\n", eth_phy_addr); + eth1_phy_addr = spcmac_phy_get_addr(); + printf ("PHY address is 0x%02x\n", eth1_phy_addr); - if(eth_phy_addr < 0) + if(eth1_phy_addr < 0) return -1; - eth_phy_id = spcmac_phy_get_id(eth_phy_addr); + eth_phy_id = spcmac_phy_get_id(eth1_phy_addr); /* before reseting PHY, check if Link Partner is autoneg able * i.e. will we maybe kick autoneg by reseting PHY */ - value = (unsigned int) spcmac_mii_read(eth_phy_addr, MII_EXPANSION); + value = (unsigned int) spcmac_mii_read(eth1_phy_addr, MII_EXPANSION); lp_an_able = value & ANEXP_LP_AUTONEG_ABLE; - spcmac_phy_reset(eth_phy_addr, eth_phy_id); + spcmac_phy_reset(eth1_phy_addr, eth_phy_id); #ifndef FORCE_10_HD if ((ICPLUS_OUI == PHYSID_GET_OUI(eth_phy_id)) && (ICPLUS_IP175 == PHYSID_GET_MODEL(eth_phy_id)) && - (eth_phy_addr == 5)) + (eth1_phy_addr == 5)) { /* we are using a switch IP175 on MAC 5, leave with default reset values * and force MAC5 link to 100Mbs FD */ @@ -397,10 +397,10 @@ static int spcmac_phy_init (void) #endif /* Read the ANE Advertisement register */ - advertised_caps = spcmac_mii_read(eth_phy_addr, MII_ADVERTISE); + advertised_caps = spcmac_mii_read(eth1_phy_addr, MII_ADVERTISE); /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ - value = spcmac_mii_read(eth_phy_addr, MII_BMSR); + value = spcmac_mii_read(eth1_phy_addr, MII_BMSR); /* Set the advertised capabilities */ if(value & BMSR_100BASE4) @@ -421,19 +421,19 @@ static int spcmac_phy_init (void) #endif /* Update our Auto-Neg Advertisement Register */ - spcmac_mii_write(eth_phy_addr, MII_ADVERTISE, advertised_caps); + spcmac_mii_write(eth1_phy_addr, MII_ADVERTISE, advertised_caps); /* Check Giga bits capabilities */ if(value & BMSR_EXT) { - advertised_caps = spcmac_mii_read(eth_phy_addr, MII_MCR_1000); + advertised_caps = spcmac_mii_read(eth1_phy_addr, MII_MCR_1000); #ifdef CONFIG_CHIP_FEATURE_SYNOP3504_NO_GIGABIT /* The Dini prototype does not support 1000-BaseT. */ advertised_caps &= ~ADVERTISE_1000FULL; advertised_caps &= ~ADVERTISE_1000HALF; #else - uint extvalue = spcmac_mii_read(eth_phy_addr, MII_EMSR); + uint extvalue = spcmac_mii_read(eth1_phy_addr, MII_EMSR); if(extvalue & EMSR_1000FULL) advertised_caps |= ADVERTISE_1000FULL; @@ -441,7 +441,7 @@ static int spcmac_phy_init (void) advertised_caps |= ADVERTISE_1000HALF; #endif - spcmac_mii_write(eth_phy_addr, MII_MCR_1000, advertised_caps); + spcmac_mii_write(eth1_phy_addr, MII_MCR_1000, advertised_caps); } #ifdef FORCE_10_HD @@ -456,7 +456,7 @@ static int spcmac_phy_init (void) now = get_timer (0); while (get_timer (now) < CONFIG_SPCMAC_AUTONEG_TIMEOUT) { - status = spcmac_mii_read (eth_phy_addr, MII_BMSR); + status = spcmac_mii_read (eth1_phy_addr, MII_BMSR); if (status & BMSR_ANEGCOMPLETE) { break; @@ -475,28 +475,28 @@ static int spcmac_phy_init (void) // Disable AUTONEGOTIATION printf("Disabling Autonegotiation...\n"); - value = (unsigned int) spcmac_mii_read(eth_phy_addr, MII_BMCR); + value = (unsigned int) spcmac_mii_read(eth1_phy_addr, MII_BMCR); value &= ~BMCR_ANENABLE; - spcmac_mii_write(eth_phy_addr, MII_BMCR, value); + spcmac_mii_write(eth1_phy_addr, MII_BMCR, value); // Force 10Mbs Half Duplex - value = (unsigned int) spcmac_mii_read(eth_phy_addr, MII_BMCR); + value = (unsigned int) spcmac_mii_read(eth1_phy_addr, MII_BMCR); value &= ~(BMCR_FULLDPLX | BMCR_SPEED100); - spcmac_mii_write(eth_phy_addr, MII_BMCR, value); + spcmac_mii_write(eth1_phy_addr, MII_BMCR, value); printf("PHY forced to 10MB HALF DUPLEX\n"); // set cap, force 10Mbs HALF DUPLEX spcmac_set_mac_mii_cap(0, 10); // 10 Mbs HD #else /* do autonegotiation */ - spcmac_phy_negotiate(eth_phy_addr); - spcmac_phy_check_speed(eth_phy_addr); + spcmac_phy_negotiate(eth1_phy_addr); + spcmac_phy_check_speed(eth1_phy_addr); #endif /* FORCE_10_HD */ /* Wait for LINK UP */ now = get_timer (0); while (get_timer (now) < LINK_TIMEOUT) { - status = spcmac_mii_read (eth_phy_addr, MII_BMSR); + status = spcmac_mii_read (eth1_phy_addr, MII_BMSR); if (status & BMSR_LSTATUS) { break; @@ -673,7 +673,7 @@ static void spcmac_set_rb_mii_cap (unsigned int speed) unsigned int rmii_clk; DECLARE_GLOBAL_DATA_PTR; spidcom_nvram_t *nvram = (spidcom_nvram_t *)(gd->bd->bi_nvram_addr); - unsigned int mode = NVRAM_BFEXT(ETH_MODE, nvram->pkg_cfg); + unsigned int mode = NVRAM_BFEXT(ETH1_MODE, nvram->pkg_cfg); if(mode == NVRAM_ETH_MODE_GMII) /* GMII */ { diff --git a/cleopatre/u-boot-1.1.6/net/spidupd.c b/cleopatre/u-boot-1.1.6/net/spidupd.c index e0b933ce9e..bfcabe7b13 100644 --- a/cleopatre/u-boot-1.1.6/net/spidupd.c +++ b/cleopatre/u-boot-1.1.6/net/spidupd.c @@ -278,8 +278,8 @@ static __inline__ void find_mac_addresses(bd_t* bd, unsigned char eth[6], unsign spidcom_nvram_t *nvram = (spidcom_nvram_t *)(bd->bi_nvram_addr); /* SPI direct can access to flash only through 32bits */ - lsb = *((uint32_t*)nvram->eth_address); - msb = *(((uint32_t*)nvram->eth_address)+1); + lsb = *((uint32_t*)nvram->eth1_address); + msb = *(((uint32_t*)nvram->eth1_address)+1); msb &= 0x0000FFFF; /* Store this MAC address */ -- cgit v1.2.3