summaryrefslogtreecommitdiff
path: root/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c
blob: 0dfda94e094ec502a50451e038eacc1db03f825b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
/**************************************************************************//**
  \file  halEeprom.c

  \brief  Implementation of the hardware dependent the EEPROM module.

  \author
      Atmel Corporation: http://www.atmel.com \n
      Support email: avr@atmel.com

    Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
    Licensed under Atmel's Limited License Agreement (BitCloudTM).

  \internal
    History:
      5/12/07 A. Khromykh - Created
 ******************************************************************************/
/******************************************************************************
 *   WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK.  *
 *   EXPERT USERS SHOULD PROCEED WITH CAUTION.                                *
 ******************************************************************************/

/******************************************************************************
                   Includes section
******************************************************************************/
#include <atomic.h>
#include <halEeprom.h>
#include <halDbg.h>
#include <halDiagnostic.h>
/******************************************************************************
                   Implementations section
******************************************************************************/
/******************************************************************************
Writes a byte to EEPROM.
Parameters:
  EECRMask - mask that define capability of interrupt after byte writing.
  address - address of byte
  data - data.
Returns:
  none.
******************************************************************************/
void halEepromWrite(uint8_t EECRMask, uint16_t address, uint8_t data)
{
  while (EECR & (1 << EEPE)); // wait for completion of previous eeprom write
  while (SPMCSR & (1 << SPMEN)); // wait for completion of previous program memory write
  EEAR = address;
  EEDR = data;
  ATOMIC_SECTION_ENTER
  BEGIN_MEASURE
    EECR  = EECRMask;
    EECR |= (1 << EEPE);
  END_MEASURE(HALISR_EEPROM_WRITE_TIME_LIMIT)
  ATOMIC_SECTION_LEAVE
}

/******************************************************************************
Interrupt handler.
******************************************************************************/
ISR(EE_READY_vect)
{
  BEGIN_MEASURE
  EECR &= ~(1 << EERIE); //disable interrupt
  halSigEepromReadyInterrupt();
  END_MEASURE(HALISR_EEPROM_READY_TIME_LIMIT)
}

// eof helEeprom.c