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hdlcounter - Incremental encoder counter on programmable logic.

Microcontrolers often have counter inputs, but they do not have any dedicated
inputs for incremental encoders which are therefore tendious to decode without
any external logic.

The hdlcounter implements this decoder in a CPLD or FPGA chip, allowing
integration of several counter in one chip depending on the number of flip
flop available.


Copyright (C) 2007 Nicolas Schodet

Robot APB Team 2008.
       Web: http://apbteam.org/
     Email: team AT apbteam DOT org

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.