From b24866225a6301d3a663f874725e83c012dc25d3 Mon Sep 17 00:00:00 2001 From: Florent Duchon Date: Wed, 26 Dec 2012 17:36:00 +0100 Subject: digital/beacon: add bitcloud stack into common directory digital/zigbit --- .../bitcloud/stack/Components/HAL/Configuration | 103 ++ .../zigbit/bitcloud/stack/Components/HAL/Makefile | 103 ++ .../zigbit/bitcloud/stack/Components/HAL/Makerules | 807 +++++++++++++++ .../bitcloud/stack/Components/HAL/avr/Makefile | 274 +++++ .../HAL/avr/atmega1281/common/include/gpio.h | 147 +++ .../HAL/avr/atmega1281/common/include/halAdc.h | 68 ++ .../avr/atmega1281/common/include/halAppClock.h | 101 ++ .../HAL/avr/atmega1281/common/include/halAssert.h | 108 ++ .../HAL/avr/atmega1281/common/include/halAtomic.h | 57 ++ .../HAL/avr/atmega1281/common/include/halClkCtrl.h | 70 ++ .../HAL/avr/atmega1281/common/include/halDbg.h | 95 ++ .../avr/atmega1281/common/include/halDiagnostic.h | 51 + .../HAL/avr/atmega1281/common/include/halEeprom.h | 87 ++ .../HAL/avr/atmega1281/common/include/halFCPU.h | 36 + .../HAL/avr/atmega1281/common/include/halInit.h | 31 + .../avr/atmega1281/common/include/halInterrupt.h | 36 + .../HAL/avr/atmega1281/common/include/halIrq.h | 99 ++ .../HAL/avr/atmega1281/common/include/halPwm.h | 199 ++++ .../HAL/avr/atmega1281/common/include/halSleep.h | 73 ++ .../atmega1281/common/include/halSleepTimerClock.h | 146 +++ .../HAL/avr/atmega1281/common/include/halSpi.h | 180 ++++ .../HAL/avr/atmega1281/common/include/halUsart.h | 327 ++++++ .../HAL/avr/atmega1281/common/include/halW1.h | 93 ++ .../HAL/avr/atmega1281/common/include/halWdt.h | 53 + .../HAL/avr/atmega1281/common/include/i2c.h | 185 ++++ .../HAL/avr/atmega1281/common/include/macros.m90 | 152 +++ .../HAL/avr/atmega1281/common/src/calibration.c | 141 +++ .../HAL/avr/atmega1281/common/src/cstartup.s90 | 250 +++++ .../HAL/avr/atmega1281/common/src/halAdc.c | 163 +++ .../HAL/avr/atmega1281/common/src/halAppClock.c | 124 +++ .../HAL/avr/atmega1281/common/src/halCalibration.s | 79 ++ .../avr/atmega1281/common/src/halCalibration.s90 | 80 ++ .../HAL/avr/atmega1281/common/src/halClkCtrl.c | 122 +++ .../HAL/avr/atmega1281/common/src/halEeprom.c | 66 ++ .../HAL/avr/atmega1281/common/src/halInit.c | 71 ++ .../HAL/avr/atmega1281/common/src/halIrq.c | 119 +++ .../HAL/avr/atmega1281/common/src/halPwm.c | 161 +++ .../HAL/avr/atmega1281/common/src/halSleep.c | 297 ++++++ .../avr/atmega1281/common/src/halSleepTimerClock.c | 304 ++++++ .../HAL/avr/atmega1281/common/src/halSpi.c | 142 +++ .../HAL/avr/atmega1281/common/src/halUsart.c | 190 ++++ .../HAL/avr/atmega1281/common/src/halW1.s | 210 ++++ .../HAL/avr/atmega1281/common/src/halW1.s90 | 211 ++++ .../HAL/avr/atmega1281/common/src/halWdtInit.c | 175 ++++ .../Components/HAL/avr/atmega1281/common/src/i2c.c | 90 ++ .../Components/HAL/avr/atmega1281/common/src/wdt.c | 79 ++ .../HAL/avr/atmega1281/rcb230/include/halMacIsr.h | 77 ++ .../HAL/avr/atmega1281/rcb230/include/halRfCtrl.h | 127 +++ .../HAL/avr/atmega1281/rcb230/include/halRfPio.h | 43 + .../HAL/avr/atmega1281/rcb230/include/halRfSpi.h | 80 ++ .../HAL/avr/atmega1281/rcb230/src/halMacIsr.c | 152 +++ .../HAL/avr/atmega1281/rcb230/src/halRfCtrl.c | 214 ++++ .../HAL/avr/atmega1281/rcb230/src/halRfSpi.c | 90 ++ .../HAL/avr/atmega1281/rcb230/src/halUid.c | 87 ++ .../avr/atmega1281/rcb231_212/include/halMacIsr.h | 77 ++ .../avr/atmega1281/rcb231_212/include/halRfCtrl.h | 142 +++ .../avr/atmega1281/rcb231_212/include/halRfPio.h | 41 + .../avr/atmega1281/rcb231_212/include/halRfSpi.h | 79 ++ .../HAL/avr/atmega1281/rcb231_212/src/halMacIsr.c | 152 +++ .../HAL/avr/atmega1281/rcb231_212/src/halRfCtrl.c | 257 +++++ .../HAL/avr/atmega1281/rcb231_212/src/halRfSpi.c | 90 ++ .../HAL/avr/atmega1281/rcb231_212/src/halUid.c | 87 ++ .../avr/atmega1281/zigBit/include/halAtmelUid.h | 68 ++ .../HAL/avr/atmega1281/zigBit/include/halMacIsr.h | 77 ++ .../HAL/avr/atmega1281/zigBit/include/halRfCtrl.h | 142 +++ .../HAL/avr/atmega1281/zigBit/include/halRfPio.h | 41 + .../HAL/avr/atmega1281/zigBit/include/halRfSpi.h | 79 ++ .../HAL/avr/atmega1281/zigBit/src/halAtmelUid.c | 248 +++++ .../HAL/avr/atmega1281/zigBit/src/halMacIsr.c | 152 +++ .../HAL/avr/atmega1281/zigBit/src/halRfCtrl.c | 281 ++++++ .../HAL/avr/atmega1281/zigBit/src/halRfSpi.c | 87 ++ .../HAL/avr/atmega1281/zigBit/src/halUid.c | 72 ++ .../stack/Components/HAL/avr/common/src/adc.c | 133 +++ .../stack/Components/HAL/avr/common/src/appTimer.c | 169 ++++ .../stack/Components/HAL/avr/common/src/eeprom.c | 156 +++ .../Components/HAL/avr/common/src/halTaskManager.c | 305 ++++++ .../Components/HAL/avr/common/src/i2cPacket.c | 371 +++++++ .../stack/Components/HAL/avr/common/src/irq.c | 143 +++ .../stack/Components/HAL/avr/common/src/pwm.c | 165 +++ .../Components/HAL/avr/common/src/resetReason.c | 59 ++ .../stack/Components/HAL/avr/common/src/sleep.c | 79 ++ .../Components/HAL/avr/common/src/sleepTimer.c | 126 +++ .../stack/Components/HAL/avr/common/src/spi.c | 602 +++++++++++ .../stack/Components/HAL/avr/common/src/timer.c | 114 +++ .../stack/Components/HAL/avr/common/src/usart.c | 1061 ++++++++++++++++++++ .../stack/Components/HAL/avr/common/src/usb.c | 435 ++++++++ .../stack/Components/HAL/avr/common/src/w1.c | 382 +++++++ .../HAL/drivers/ISD/src/isdImageStorage.c | 626 ++++++++++++ .../stack/Components/HAL/drivers/OFD/Makefile | 107 ++ .../HAL/drivers/OFD/include/ofdMemoryDriver.h | 310 ++++++ .../Components/HAL/drivers/OFD/src/ofdAt25Driver.c | 742 ++++++++++++++ .../HAL/drivers/OFD/src/ofdAt45dbDriver.c | 758 ++++++++++++++ .../Components/HAL/drivers/OFD/src/ofdCommand.c | 243 +++++ .../Components/HAL/drivers/OFD/src/ofdCrcService.c | 66 ++ .../Components/HAL/drivers/OFD/src/ofdFakeDriver.c | 218 ++++ .../HAL/drivers/OFD/src/ofdIntFlashRead.s | 40 + .../HAL/drivers/OFD/src/ofdIntFlashRead.s90 | 40 + .../HAL/drivers/OFD/src/ofdSpiSerializer.c | 91 ++ .../drivers/USBClasses/DFU/include/dfuProtocol.h | 81 ++ .../HAL/drivers/USBClasses/DFU/src/dfuProtocol.c | 135 +++ .../USBClasses/MSD/include/abstractMemory.h | 83 ++ .../HAL/drivers/USBClasses/MSD/include/mem.h | 106 ++ .../drivers/USBClasses/MSD/include/mscProtocol.h | 79 ++ .../drivers/USBClasses/MSD/include/scsiProtocol.h | 114 +++ .../drivers/USBClasses/MSD/src/abstractMemory.c | 225 +++++ .../drivers/USBClasses/MSD/src/massStorageDevice.c | 327 ++++++ .../HAL/drivers/USBClasses/MSD/src/mmc.c | 618 ++++++++++++ .../HAL/drivers/USBClasses/MSD/src/mscProtocol.c | 53 + .../HAL/drivers/USBClasses/MSD/src/scsiProtocol.c | 398 ++++++++ .../Components/HAL/drivers/USBClasses/VCP/Makefile | 71 ++ .../USBClasses/VCP/include/vcpCdcProtocol.h | 119 +++ .../drivers/USBClasses/VCP/src/vcpCdcProtocol.c | 226 +++++ .../drivers/USBClasses/VCP/src/vcpVirtualUsart.c | 498 +++++++++ .../USBClasses/common/include/usbDescriptors.h | 184 ++++ .../USBClasses/common/include/usbEnumeration.h | 53 + .../USBClasses/common/include/usbSetupProcess.h | 51 + .../drivers/USBClasses/common/src/usbDescriptors.c | 424 ++++++++ .../drivers/USBClasses/common/src/usbEnumeration.c | 231 +++++ .../USBClasses/common/src/usbSetupProcess.c | 90 ++ .../drivers/USBFIFO/include/usbFifoVirtualUsart.h | 69 ++ .../HAL/drivers/USBFIFO/src/usbFifoFT245RL.c | 290 ++++++ .../HAL/drivers/USBFIFO/src/usbFifoVirtualUsart.c | 250 +++++ .../HAL/drivers/include/isdImageStorage.h | 89 ++ .../HAL/drivers/include/massStorageDevice.h | 71 ++ .../Components/HAL/drivers/include/ofdExtMemory.h | 175 ++++ .../Components/HAL/drivers/include/usbFifoUsart.h | 109 ++ .../HAL/drivers/include/vcpVirtualUsart.h | 111 ++ .../bitcloud/stack/Components/HAL/include/adc.h | 229 +++++ .../stack/Components/HAL/include/appTimer.h | 81 ++ .../bitcloud/stack/Components/HAL/include/atomic.h | 72 ++ .../stack/Components/HAL/include/bcTimer.h | 98 ++ .../stack/Components/HAL/include/calibration.h | 31 + .../bitcloud/stack/Components/HAL/include/dbgu.h | 41 + .../bitcloud/stack/Components/HAL/include/eeprom.h | 113 +++ .../stack/Components/HAL/include/halInit.h | 31 + .../stack/Components/HAL/include/halTaskManager.h | 335 ++++++ .../bitcloud/stack/Components/HAL/include/hsmci.h | 142 +++ .../stack/Components/HAL/include/i2cPacket.h | 165 +++ .../bitcloud/stack/Components/HAL/include/irq.h | 203 ++++ .../bitcloud/stack/Components/HAL/include/pwm.h | 193 ++++ .../stack/Components/HAL/include/reducePower.h | 33 + .../stack/Components/HAL/include/resetReason.h | 153 +++ .../bitcloud/stack/Components/HAL/include/sleep.h | 71 ++ .../stack/Components/HAL/include/sleepTimer.h | 69 ++ .../bitcloud/stack/Components/HAL/include/spi.h | 173 ++++ .../bitcloud/stack/Components/HAL/include/uart.h | 118 +++ .../bitcloud/stack/Components/HAL/include/uid.h | 48 + .../bitcloud/stack/Components/HAL/include/usart.h | 289 ++++++ .../bitcloud/stack/Components/HAL/include/usb.h | 245 +++++ .../bitcloud/stack/Components/HAL/include/w1.h | 109 ++ .../stack/Components/HAL/include/wdtCtrl.h | 122 +++ 151 files changed, 25832 insertions(+) create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/Configuration create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/Makefile create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/Makerules create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/Makefile create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/macros.m90 create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90 create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90 create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90 create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halMacIsr.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfCtrl.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfPio.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfSpi.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halMacIsr.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfCtrl.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfSpi.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halUid.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halMacIsr.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfCtrl.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfPio.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfSpi.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halMacIsr.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfCtrl.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfSpi.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halUid.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halAtmelUid.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halMacIsr.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfCtrl.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfPio.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfSpi.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halAtmelUid.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halMacIsr.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfCtrl.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfSpi.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halUid.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/adc.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/appTimer.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/eeprom.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/halTaskManager.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/i2cPacket.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/irq.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/pwm.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/resetReason.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleep.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleepTimer.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/spi.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/timer.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usart.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usb.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/w1.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/ISD/src/isdImageStorage.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/Makefile create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/include/ofdMemoryDriver.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt25Driver.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt45dbDriver.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCommand.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCrcService.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdFakeDriver.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s90 create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdSpiSerializer.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/include/dfuProtocol.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/src/dfuProtocol.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/abstractMemory.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mem.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mscProtocol.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/scsiProtocol.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/abstractMemory.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/massStorageDevice.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mmc.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mscProtocol.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/scsiProtocol.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/Makefile create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/include/vcpCdcProtocol.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpCdcProtocol.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpVirtualUsart.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbDescriptors.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbEnumeration.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbSetupProcess.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbDescriptors.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbEnumeration.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbSetupProcess.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/include/usbFifoVirtualUsart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoFT245RL.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoVirtualUsart.c create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/isdImageStorage.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/massStorageDevice.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/ofdExtMemory.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/usbFifoUsart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/vcpVirtualUsart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h (limited to 'digital/zigbit/bitcloud/stack/Components/HAL') diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/Configuration b/digital/zigbit/bitcloud/stack/Components/HAL/Configuration new file mode 100644 index 00000000..699bc97c --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/Configuration @@ -0,0 +1,103 @@ +#------------------------------------------------------------------------------- +# \file Configuration +# +# \brief Declares build options for the HAL. +# +# \author +# Atmel Corporation: http://www.atmel.com \n +# Support email: avr@atmel.com +# +# Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. +# Licensed under Atmel's Limited License Agreement (BitCloudTM). +# +#------------------------------------------------------------------------------- + +#------------------------------------------------------------------------------- +# Build configuration: +# For "DEBUG" configuration system asserts, logging and debug info are switched on. +# For "RELEASE" configuration system asserts, logging and debug info are switched off. +#------------------------------------------------------------------------------- +BUILD_CONFIGURATION = RELEASE +#BUILD_CONFIGURATION = DEBUG + +#------------------------------------------------------------------------------- +# Build configuration: +# If QUIET is TRUE then short build message format is used, otherwise - normal. +#------------------------------------------------------------------------------- +QUIET = TRUE +#QUIET = FALSE + +#------------------------------------------------------------------------------- +# Compiler type: +#------------------------------------------------------------------------------- +COMPILER_TYPE = GCC +#COMPILER_TYPE = IAR + +#------------------------------------------------------------------------------- +# Platforms selection: +#------------------------------------------------------------------------------- +PLATFORM = PLATFORM_ZIGBIT +#PLATFORM = PLATFORM_RCB + +#------------------------------------------------------------------------------- +# ZIGBIT platform specific options: +#------------------------------------------------------------------------------- +ifeq ($(PLATFORM), PLATFORM_ZIGBIT) + # Microcontroller's type declaration. The following variants are possible: + HAL = ATMEGA1281 + + # Controller reference frequency. + #HAL_FREQUENCY = HAL_4MHz + HAL_FREQUENCY = HAL_8MHz + + # Device to read UID from: TinyA13 MCU or DS2411. + #HAL_TINY_UID = TRUE + HAL_TINY_UID = FALSE + + # Defines whether HAL controls amplifier or not. + #HAL_USE_AMPLIFIER = FALSE + HAL_USE_AMPLIFIER = TRUE + +endif # PLATFORM_ZIGBIT + +#------------------------------------------------------------------------------- +# PLATFORM_RCB platform specific options: +#------------------------------------------------------------------------------- +ifeq ($(PLATFORM), PLATFORM_RCB) + # Platform revisions + #PLATFORM_REV = RCB230_V31 + #PLATFORM_REV = RCB230_V32 + PLATFORM_REV = RCB230_V331 + #PLATFORM_REV = RCB231_V402 + #PLATFORM_REV = RCB231_V411 + #PLATFORM_REV = RCB212_V532 + + # Controller reference frequency. + #HAL_FREQUENCY = HAL_4MHz + HAL_FREQUENCY = HAL_8MHz +endif # PLATFORM_RCB + +#------------------------------------------------------------------------------- +# OS selection. Parameters is only for ARM: +#------------------------------------------------------------------------------- +OS = NONE_OS +#OS = FREE_RTOS + +# Gives a possibility to enable USART error callbacks. +HAL_USE_USART_ERROR_EVENT = FALSE +#HAL_USE_USART_ERROR_EVENT = TRUE + +#RF_RX_TX_INDICATOR +HAL_RF_RX_TX_INDICATOR = TRUE +#HAL_RF_RX_TX_INDICATOR = FALSE + +#Selected automatically to FALSE for ZIGBIT platform. +ifeq ($(PLATFORM), PLATFORM_ZIGBIT) + HAL_RF_RX_TX_INDICATOR = FALSE +endif # PLATFORM_ZIGBIT + +# Antenna diversity feature +HAL_ANT_DIVERSITY = FALSE +#HAL_ANT_DIVERSITY = TRUE + +# eof Configuration diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/Makefile b/digital/zigbit/bitcloud/stack/Components/HAL/Makefile new file mode 100644 index 00000000..0207ac35 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/Makefile @@ -0,0 +1,103 @@ +#------------------------------------------------------------------------------------- +# Paths. +HAL_PATH = . + +#------------------------------------------------------------------------------------- +# Includes. +include $(HAL_PATH)/Makerules + +ifeq ($(HAL), ATMEGA1281) + TARGET=AVR +endif + +ifeq ($(HAL), ATMEGA2561) + TARGET=AVR +endif + +ifeq ($(HAL), ATMEGA1284) + TARGET=AVR +endif + +ifeq ($(HAL), AT90USB1287) + TARGET=AVR +endif + +ifeq ($(HAL), ATMEGA128RFA1) + TARGET=AVR +endif + +ifeq ($(HAL), ATXMEGA128A1) + TARGET=XMEGA +endif + +ifeq ($(HAL), ATXMEGA256A3) + TARGET=XMEGA +endif + +ifeq ($(HAL), ATXMEGA256D3) + TARGET=XMEGA +endif + +ifeq ($(HAL), AT91SAM7X256) + TARGET=ARM7 +endif + +ifeq ($(HAL), AT91SAM3S4C) + TARGET=CORTEX +endif + +ifeq ($(HAL), AT32UC3A0512) + TARGET=AVR32 +endif + +ifeq ($(HAL), SIMULATOR) + TARGET=SIMULATOR +endif + +ifeq ($(TARGET), AVR) +all: + make all -C $(COMPONENTS_PATH)/HAL/avr + +clean: + make clean -C $(COMPONENTS_PATH)/HAL/avr +endif + +ifeq ($(TARGET), XMEGA) +all: + make all -C $(COMPONENTS_PATH)/HAL/xmega + +clean: + make clean -C $(COMPONENTS_PATH)/HAL/xmega +endif + +ifeq ($(TARGET), ARM7) +all: + make all -C $(COMPONENTS_PATH)/HAL/arm7tdmi + +clean: + make clean -C $(COMPONENTS_PATH)/HAL/arm7tdmi +endif + +ifeq ($(TARGET), CORTEX) +all: + make all -C $(COMPONENTS_PATH)/HAL/cortexm3 + +clean: + make clean -C $(COMPONENTS_PATH)/HAL/cortexm3 +endif + +ifeq ($(TARGET), AVR32) +all: + make all -C $(COMPONENTS_PATH)/HAL/avr32 + +clean: + make clean -C $(COMPONENTS_PATH)/HAL/avr32 +endif + +ifeq ($(TARGET), SIMULATOR) +all: + make all -C $(COMPONENTS_PATH)/HAL/simulator + +clean: + make clean -C $(COMPONENTS_PATH)/HAL/simulator +endif diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/Makerules b/digital/zigbit/bitcloud/stack/Components/HAL/Makerules new file mode 100644 index 00000000..8f133d44 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/Makerules @@ -0,0 +1,807 @@ +COMPONENTS_PATH = $(HAL_PATH)/.. +STACK_PATH = $(COMPONENTS_PATH)/.. +STACK_LIB_PATH = $(STACK_PATH)/lib +LIST_PATH = ./list + +include $(COMPONENTS_PATH)/HAL/Configuration + +#------------------------------------------------------------------------------- +# Platform specific compiler flags definition and settins checking: +#------------------------------------------------------------------------------- +ifndef PLATFORM + $(error ERROR in file Makerules: $(PLATFORM) Unknown type of platform) +endif +ifeq ($(PLATFORM), PLATFORM_ZIGBIT) ######### ZigBit platform ##### + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_8MHz HAL_4MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif + + ifeq (, $(findstring $(HAL), ATMEGA1281 ATMEGA2561)) + $(error ERROR in file Makerules: $(HAL) Unknown type of HAL for $(PLATFORM) platform) + endif + # For platform with 32.768 kHz only. + SYSTEM_TIME_ON = SLEEP_TIMER +endif # ZIGBIT + +ifeq ($(PLATFORM), PLATFORM_RAVEN) ######### Raven platform ##### + # Checking parameters which were set by user. + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_8MHz HAL_4MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif + # Setting platform parameters which can not be changed by user. + HAL = ATMEGA1284 + # For platform with 32.768 kHz only. + SYSTEM_TIME_ON = SLEEP_TIMER +endif # RAVEN + +ifeq ($(PLATFORM), PLATFORM_ATML_USB_DONGLE) ######### ATML_USB_DONGLE platform ##### + # Setting platform parameters which can not be changed by user. + HAL = AT90USB1287 + HAL_FREQUENCY = HAL_8MHz +endif # ATML_USB_DONGLE + +ifeq ($(PLATFORM), PLATFORM_STK600) ####### ATML_STK600 platform #### + RF_EXTENDER = REB231 + + ifneq (, $(findstring $(HAL), ATXMEGA128A1 ATXMEGA256A3 ATXMEGA256D3)) + ifeq (, $(findstring $(HAL_CLOCK_SOURCE), CRYSTAL_16MHz RC_INTERNAL_32MHz RC_INTERNAL_2MHz)) + $(error ERROR in file Makerules: $(HAL_CLOCK_SOURCE) Unknown type of clock source for $(PLATFORM) platform) + endif + + ifeq (, $(findstring $(HAL_ASYNC_CLOCK_SOURCE), RC_ULP RC_32K CRYSTAL_32K)) + $(error ERROR in file Makerules: $(HAL_ASYNC_CLOCK_SOURCE) Unknown type of asynchronous clock source for $(PLATFORM) platform) + endif + + # Set asynchronous clock as system time for platform with 32.768 kHz (RC or crystal). + ifneq (, $(findstring $(HAL_ASYNC_CLOCK_SOURCE), RC_32K CRYSTAL_32K)) + SYSTEM_TIME_ON = SLEEP_TIMER + endif + + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_4MHz HAL_8MHz HAL_12MHz HAL_16MHz HAL_32MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif + + else ifneq (, $(findstring $(HAL), ATMEGA128RFA1 ATMEGA256RFR2)) + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_16MHz HAL_8MHz HAL_4MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif + + # For platform with 32.768 kHz only. + SYSTEM_TIME_ON = SLEEP_TIMER + + else + $(error ERROR in file Makerules: $(HAL) Unknown type of HAL for $(PLATFORM) platform) + endif +endif # PLATFORM_STK600 + +ifeq ($(PLATFORM), PLATFORM_STK500_RF2XX) ####### ATML_STK500 + RF2XX radio platform #### + # Checking parameters. + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_8MHz HAL_4MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif + + ifeq (, $(findstring $(RF_EXTENDER), REB230 REB231 REB212)) + $(error ERROR in file Makerules: $(RF_EXTENDER) Unknown type of the radio extension board for $(PLATFORM) platform) + endif + + ifeq (, $(findstring $(HAL), ATMEGA1281 ATMEGA2561)) + $(error ERROR in file Makerules: $(HAL) Unknown type of HAL for $(PLATFORM) platform) + endif + + # For platform with 32.768 kHz only. + SYSTEM_TIME_ON = SLEEP_TIMER +endif # PLATFORM_STK500_RF2XX + + +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_TURBO) #### ZIGBIT_TURBO platform #### + # Setting platform parameters which can not be changed by user. + HAL = AT91SAM7X256 + HAL_FREQUENCY = HAL_48MHz + + # Checking parameters which were set by user. + ifeq (, $(findstring $(HAL_CLOCK_SOURCE), CRYSTAL_18d432MHz RF)) + $(error ERROR in file Makerules: $(HAL_CLOCK_SOURCE) Unknown clock HAL source for $(PLATFORM) platform) + endif +endif # PLATFORM_ZIGBIT_TURBO + + +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_LAN) ###### ZIGBIT_LAN platform #### + # Setting platform parameters which can not be changed by user. + HAL = AT91SAM7X256 + HAL_FREQUENCY = HAL_48MHz + + # Checking parameters which were set by user. + ifeq (, $(findstring $(HAL_CLOCK_SOURCE), CRYSTAL_18d432MHz RF)) + $(error ERROR in file Makerules: $(HAL_CLOCK_SOURCE) Unknown clock HAL source for $(PLATFORM) platform) + endif +endif # PLATFORM_ZIGBIT_LAN + + +ifeq ($(PLATFORM), PLATFORM_SAM7X_EK_RF2XX) ##### PLATFORM_SAM7X_EK_RF2XX platform #### + HAL = AT91SAM7X256 + HAL_CLOCK_SOURCE = CRYSTAL_18d432MHz + HAL_FREQUENCY = HAL_48MHz +endif # PLATFORM_SAM7X_EK_RF2XX + + +ifeq ($(PLATFORM), PLATFORM_CUSTOM_1) ########### PLATFORM_CUSTOM_1 platform #### + HAL = AT91SAM7X256 + HAL_CLOCK_SOURCE = CRYSTAL_8MHz + HAL_FREQUENCY = HAL_48MHz +endif # PLATFORM_CUSTOM_1 + +ifeq ($(PLATFORM), PLATFORM_CUSTOM_2) #### PLATFORM_CUSTOM_2 platform #### + HAL = AT91SAM7X256 + HAL_CLOCK_SOURCE = CRYSTAL_8MHz + HAL_FREQUENCY = HAL_48MHz +endif # PLATFORM_CUSTOM_2 + +ifeq ($(PLATFORM), PLATFORM_RF231USBRD) ##### PLATFORM_RF231USBRD platform #### + HAL = AT91SAM3S4C + HAL_CLOCK_SOURCE = CRYSTAL_18d432MHz + HAL_ASYNC_CLOCK_SOURCE = RC_ASYNC + HAL_FREQUENCY = HAL_64MHz +endif # PLATFORM_RF231USBRD + +ifeq ($(PLATFORM), PLATFORM_SAM3S_EK_RF2XX) ##### PLATFORM_SAM3S_EK_RF2XX platform #### + HAL = AT91SAM3S4C + # For platform with 32.768 kHz only. + SYSTEM_TIME_ON = SLEEP_TIMER +endif # PLATFORM_SAM3S_EK_RF2XX + +ifeq ($(PLATFORM), PLATFORM_SAM3S_PIRRD) ##### PLATFORM_SAM3S_PIRRD platform #### + HAL = AT91SAM3S4C +endif # PLATFORM_SAM3S_PIRRD + +ifeq ($(PLATFORM), PLATFORM_CUSTOM_3) + # AT91SAM3S4B in fact, but changes are negligible + HAL = AT91SAM3S4C + HAL_FREQUENCY = HAL_64MHz + HAL_CLOCK_SOURCE = CRYSTAL_16MHz + HAL_ASYNC_CLOCK_SOURCE = RC_ASYNC +endif # PLATFORM_CUSTOM_3 + +ifeq ($(PLATFORM), PLATFORM_RCB) ######### RCB platform ##### + ifeq (, $(findstring $(PLATFORM_REV), RCB_ATMEGA128RFA1 RCB_ATMEGA256RFR2 RCB230_V31 RCB230_V32 RCB230_V331 RCB231_V402 RCB231_V411 RCB212_V532)) + $(error ERROR in file Makerules: $(PLATFORM_REV) Unknown platform revision for PLATFORM_RCB) + endif + + ifeq ($(PLATFORM_REV), RCB_ATMEGA128RFA1) + HAL = ATMEGA128RFA1 + else ifeq ($(PLATFORM_REV), RCB_ATMEGA256RFR2) + HAL = ATMEGA256RFR2 + else + HAL = ATMEGA1281 + endif # PLATFORM_REV + + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_16MHz HAL_8MHz HAL_4MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif + + # For platform with 32.768 kHz only. + SYSTEM_TIME_ON = SLEEP_TIMER +endif # PLATFORM_RCB + +ifeq ($(PLATFORM), PLATFORM_AVR32_EVK1105) ##### PLATFORM_AVR32_EVK1105 platform #### + HAL = AT32UC3A0512 + HAL_FREQUENCY = HAL_48MHz +endif # PLATFORM_AVR32_EVK1105 + +ifeq ($(PLATFORM), PLATFORM_XPLAIN) ####### XPLAIN platform #### + HAL = ATXMEGA128A1 + + # Checking parameters. + ifeq (, $(findstring $(HAL_CLOCK_SOURCE), CRYSTAL_16MHz RC_INTERNAL_32MHz RC_INTERNAL_2MHz)) + $(error ERROR in file Makerules: $(HAL_CLOCK_SOURCE) Unknown type of clock source for $(PLATFORM) platform) + endif + + # Checking parameters. + ifeq (, $(findstring $(HAL_ASYNC_CLOCK_SOURCE), RC_ULP RC_32K CRYSTAL_32K)) + $(error ERROR in file Makerules: $(HAL_ASYNC_CLOCK_SOURCE) Unknown type of asynchronous clock source for $(PLATFORM) platform) + endif + + # Set asynchronous clock as system time for platform with 32.768 kHz (RC or crystal). + ifneq (, $(findstring $(HAL_ASYNC_CLOCK_SOURCE), RC_32K CRYSTAL_32K)) + SYSTEM_TIME_ON = SLEEP_TIMER + endif + + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_4MHz HAL_8MHz HAL_12MHz HAL_16MHz HAL_32MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif +endif # PLATFORM_XPLAIN + +ifeq ($(PLATFORM), PLATFORM_REB_CBB) ####### REB CBB platform #### + HAL = ATXMEGA256A3 + + # Checking parameters. + ifeq (, $(findstring $(RF_EXTENDER), REB230 REB231 REB212)) + $(error ERROR in file Makerules: $(HAL_CLOCK_SOURCE) Unknown type of the radio extension board for $(PLATFORM) platform) + endif + + # Checking parameters. + ifeq (, $(findstring $(HAL_CLOCK_SOURCE), RC_INTERNAL_32MHz RC_INTERNAL_2MHz)) + $(error ERROR in file Makerules: $(HAL_CLOCK_SOURCE) Unknown type of clock source for $(PLATFORM) platform) + endif + + # Checking parameters. + ifeq (, $(findstring $(HAL_ASYNC_CLOCK_SOURCE), RC_ULP RC_32K CRYSTAL_32K)) + $(error ERROR in file Makerules: $(HAL_ASYNC_CLOCK_SOURCE) Unknown type of asynchronous clock source for $(PLATFORM) platform) + endif + + # Set asynchronous clock as system time for platform with 32.768 kHz (RC or crystal). + ifneq (, $(findstring $(HAL_ASYNC_CLOCK_SOURCE), RC_32K CRYSTAL_32K)) + SYSTEM_TIME_ON = SLEEP_TIMER + endif + + ifeq (, $(findstring $(HAL_FREQUENCY), HAL_4MHz HAL_8MHz HAL_12MHz HAL_16MHz HAL_32MHz)) + $(error ERROR in file Makerules: $(HAL_FREQUENCY) Unknown type of HAL frequency for $(PLATFORM) platform) + endif +endif # PLATFORM_REB_CBB + +ifeq ($(PLATFORM), PLATFORM_SIMULATOR) ######### Simulator platform ##### + HAL = SIMULATOR + HAL_FREQUENCY = HAL_0MHz +endif # PLATFORM_SIMULATOR + +#------------------------------------------------------------------------------- +# CPU selection: +#------------------------------------------------------------------------------- +ifeq ($(HAL), ATMEGA1281) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atmega1281 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = m1281 + endif +endif +ifeq ($(HAL), ATMEGA2561) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atmega2561 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = m2561 + endif +endif +ifeq ($(HAL), ATMEGA1284) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atmega1284p + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = m1284p + endif +endif +ifeq ($(HAL), AT90USB1287) + ifeq ($(COMPILER_TYPE), GCC) + CPU = at90usb1287 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = m1287 + endif +endif +ifeq ($(HAL), ATXMEGA128A1) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atxmega128a1 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = xm128a1 + endif +endif +ifeq ($(HAL), ATXMEGA256A3) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atxmega256a3 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = xm256a3 + endif +endif +ifeq ($(HAL), ATXMEGA256D3) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atxmega256d3 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = xm256d3 + endif +endif +ifeq ($(HAL), AT91SAM7X256) + CPU = arm7tdmi +endif +ifeq ($(HAL), AT91SAM3S4C) + CPU = cortex-m3 +endif +ifeq ($(HAL), ATMEGA128RFA1) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atmega128rfa1 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = m128rfa1 + endif +endif +ifeq ($(HAL), ATMEGA256RFR2) + ifeq ($(COMPILER_TYPE), GCC) + CPU = atmega256rfr2 + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = m256rfr2 + endif +endif +ifeq ($(HAL), AT32UC3A0512) + ifeq ($(COMPILER_TYPE), GCC) + CPU = ??? + endif + ifeq ($(COMPILER_TYPE), IAR) + CPU = at32uc3a0512 + endif +endif +ifeq ($(HAL), SIMULATOR) + CPU = simulator +endif +ifndef HAL + $(error ERROR in file Makerules: $(CPU) Unknown type of CPU) +endif + + +#------------------------------------------------------------------------------- +# Cross-platform compiler type declaration: +#------------------------------------------------------------------------------- +ifndef COMPILER_TYPE + $(error ERROR in file Makerules: $(COMPILER_TYPE) - unknow type of compiler) +endif +ifneq (, $(findstring $(HAL), AT91SAM7X256 AT91SAM3S4C)) + ifeq ($(COMPILER_TYPE), IAR) + CROSS_COMPILER = arm + endif + ifeq ($(COMPILER_TYPE), GCC) + CROSS_COMPILER = arm-none-eabi + endif +endif +ifneq (, $(findstring $(HAL), ATMEGA1281 ATMEGA2561 ATMEGA1284 AT90USB1287 ATXMEGA128A1 ATXMEGA256A3 ATXMEGA256D3 ATMEGA128RFA1 ATMEGA256RFR2)) + CROSS_COMPILER = avr +endif +ifeq ($(HAL), AT32UC3A0512) + CROSS_COMPILER = avr32 +endif +ifndef CROSS_COMPILER + #$(error ERROR in file Makerules: Cross-platform compiler type is not detected) +endif + +#------------------------------------------------------------------------------- +# Output options definitions: +#------------------------------------------------------------------------------- +ifeq ($(QUIET), TRUE) + Q = @ + SILENT = -s + + AS_MSG = @echo "$(AS)" $? + LD_MSG = @echo "$(LD)" $@ + CC_MSG = @echo "$(CC)" $? + CPP_MSG = @echo "$(CPP)" $? + AR_MSG = @echo "$(AR)" $@ + NM_MSG = @echo "$(NM)" $@ + STRIP_MSG = @echo "$(STRIP)" $@ + OBJCOPY_MSG = @echo "$(OBJCOPY)" $@ + OBJDUMP_MSG = @echo "$(OBJDUMP)" $@ + SHOW_SIZE = @echo +else + SHOW_SIZE = $(SIZE) +endif + + +#------------------------------------------------------------------------------- +# Components paths. In each component COMPONENTS_PATH should be defined: +#------------------------------------------------------------------------------- +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_TURBO) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/common + HAL_MAC_API_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/zigBitArm +endif +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_LAN) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/common + HAL_MAC_API_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/zigBitArm +endif +ifeq ($(PLATFORM), PLATFORM_SAM7X_EK_RF2XX) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/common + HAL_MAC_API_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/atmlEvalKit +endif +ifeq ($(PLATFORM), PLATFORM_CUSTOM_1) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/common + HAL_MAC_API_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/custom1 +endif +ifeq ($(PLATFORM), PLATFORM_CUSTOM_2) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/common + HAL_MAC_API_PATH = $(HAL_PATH)/arm7tdmi/at91sam7x256/custom2 +endif +ifeq ($(PLATFORM), PLATFORM_SAM3S_EK_RF2XX) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/common + HAL_MAC_API_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/sam3sEK +endif +ifeq ($(PLATFORM), PLATFORM_RF231USBRD) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/common + HAL_MAC_API_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/Rf231UsbRd +endif +ifeq ($(PLATFORM), PLATFORM_SAM3S_PIRRD) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/common + HAL_MAC_API_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/sam3sPIRRD +endif +ifeq ($(PLATFORM), PLATFORM_CUSTOM_3) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/common + HAL_MAC_API_PATH = $(HAL_PATH)/cortexm3/at91sam3s4c/custom3 +endif +ifeq ($(PLATFORM), PLATFORM_ZIGBIT) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega1281/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega1281/zigBit +endif +ifeq ($(PLATFORM), PLATFORM_RAVEN) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega1284/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega1284/raven +endif +ifeq ($(PLATFORM), PLATFORM_STK600) + ifeq ($(HAL), ATMEGA128RFA1) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega128rfa1/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega128rfa1/common + endif + ifeq ($(HAL), ATMEGA256RFR2) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega128rfa1/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega128rfa1/common + endif + ifeq ($(HAL), ATXMEGA128A1) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/xmega/atxmega128a1/common + HAL_MAC_API_PATH = $(HAL_PATH)/xmega/atxmega128a1/stk600 + endif # ATXMEGA128A1 + ifeq ($(HAL), ATXMEGA256A3) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/xmega/atxmega256a3/common + HAL_MAC_API_PATH = $(HAL_PATH)/xmega/atxmega256a3/stk600 + endif # ATXMEGA256A3 + ifeq ($(HAL), ATXMEGA256D3) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/xmega/atxmega256d3/common + HAL_MAC_API_PATH = $(HAL_PATH)/xmega/atxmega256d3/stk600 + endif # ATXMEGA256D3 +endif # PLATFORM_STK600 +ifeq ($(PLATFORM), PLATFORM_STK500_RF2XX) + ifneq (, $(findstring $(RF_EXTENDER), REB230)) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega1281/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega1281/rcb230 + endif + ifneq (, $(findstring $(RF_EXTENDER), REB231 REB212)) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega1281/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega1281/rcb231_212 + endif +endif +ifeq ($(PLATFORM), PLATFORM_ATML_USB_DONGLE) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/at90usb1287/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/at90usb1287/usbDongle +endif +ifeq ($(PLATFORM), PLATFORM_RCB) + ifneq (, $(findstring $(PLATFORM_REV), RCB_ATMEGA128RFA1 RCB_ATMEGA256RFR2)) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega128rfa1/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega128rfa1/common + endif + ifneq (, $(findstring $(PLATFORM_REV), RCB230_V31 RCB230_V32 RCB230_V331)) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega1281/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega1281/rcb230 + endif + ifneq (, $(findstring $(PLATFORM_REV), RCB231_V402 RCB231_V411 RCB212_V532)) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr/atmega1281/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr/atmega1281/rcb231_212 + endif +endif +ifeq ($(PLATFORM), PLATFORM_AVR32_EVK1105) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/avr32/uc32a0512/common + HAL_MAC_API_PATH = $(HAL_PATH)/avr32/uc32a0512/evk1105 +endif +ifeq ($(PLATFORM), PLATFORM_XPLAIN) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/xmega/atxmega128a1/common + HAL_MAC_API_PATH = $(HAL_PATH)/xmega/atxmega128a1/xplain +endif # PLATFORM_XPLAIN +ifeq ($(PLATFORM), PLATFORM_REB_CBB) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/xmega/atxmega256a3/common + HAL_MAC_API_PATH = $(HAL_PATH)/xmega/atxmega256a3/stk600 +endif # PLATFORM_REB_CBB +ifeq ($(PLATFORM), PLATFORM_SIMULATOR) + HAL_HWD_COMMON_PATH = $(HAL_PATH)/simulator + HAL_MAC_API_PATH = $(HAL_PATH)/simulator +endif +ifndef HAL_HWD_COMMON_PATH + $(error ERROR in file Makerules: unknown or unsupported platform) +endif +ifndef HAL_MAC_API_PATH + $(error ERROR in file Makerules: unknown or unsupported platform) +endif + +#------------------------------------------------------------------------------------- +# Stack library name definition. +#------------------------------------------------------------------------------------- +ifeq ($(COMPILER_TYPE), IAR) + LIB_NAME_COMPILER = _Iar +endif +ifeq ($(COMPILER_TYPE), GCC) + LIB_NAME_COMPILER = _Gcc +endif + +ifeq ($(HAL_FREQUENCY), HAL_0MHz) + LIB_NAME_HAL_FREQ = _0Mhz +else ifeq ($(HAL_FREQUENCY), HAL_4MHz) + LIB_NAME_HAL_FREQ = _4Mhz +else ifeq ($(HAL_FREQUENCY), HAL_8MHz) + LIB_NAME_HAL_FREQ = _8Mhz +else ifeq ($(HAL_FREQUENCY), HAL_12MHz) + LIB_NAME_HAL_FREQ = _12Mhz +else ifeq ($(HAL_FREQUENCY), HAL_16MHz) + LIB_NAME_HAL_FREQ = _16Mhz +else ifeq ($(HAL_FREQUENCY), HAL_18d432MHz) + LIB_NAME_HAL_FREQ = _18_432MHz +else ifeq ($(HAL_FREQUENCY), HAL_32MHz) + LIB_NAME_HAL_FREQ = _32Mhz +else ifeq ($(HAL_FREQUENCY), HAL_48MHz) + LIB_NAME_HAL_FREQ = _48Mhz +else ifeq ($(HAL_FREQUENCY), HAL_64MHz) + LIB_NAME_HAL_FREQ = _64Mhz +endif + + +ifeq ($(PLATFORM), PLATFORM_ZIGBIT) + HAL_LIB_NAME_PLATFORM = _ZigBit +endif +ifeq ($(PLATFORM), PLATFORM_RAVEN) + HAL_LIB_NAME_PLATFORM = _Raven +endif +ifeq ($(PLATFORM), PLATFORM_ATML_USB_DONGLE) + HAL_LIB_NAME_PLATFORM = _AtmlUsbDongle +endif +ifeq ($(PLATFORM), PLATFORM_STK600) + HAL_LIB_NAME_PLATFORM = _AtmlStk600 +endif +ifeq ($(PLATFORM), PLATFORM_STK500_RF2XX) + HAL_LIB_NAME_PLATFORM = _AtmlStk500Rf2xx +endif +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_TURBO) + HAL_LIB_NAME_PLATFORM = _ZigBitTurbo +endif +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_LAN) + HAL_LIB_NAME_PLATFORM = _ZigBitLan +endif +ifeq ($(PLATFORM), PLATFORM_SAM7X_EK_RF2XX) + HAL_LIB_NAME_PLATFORM = _Sam7xEkRf2xx +endif +ifeq ($(PLATFORM), PLATFORM_CUSTOM_1) + HAL_LIB_NAME_PLATFORM = _Custom1 +endif +ifeq ($(PLATFORM), PLATFORM_CUSTOM_2) + HAL_LIB_NAME_PLATFORM = _Custom2 +endif +ifeq ($(PLATFORM), PLATFORM_SAM3S_EK_RF2XX) + HAL_LIB_NAME_PLATFORM = _Sam3sEkRf2xx +endif +ifeq ($(PLATFORM), PLATFORM_RF231USBRD) + HAL_LIB_NAME_PLATFORM = _Rf231UsbRd +endif +ifeq ($(PLATFORM), PLATFORM_SAM3S_PIRRD) + HAL_LIB_NAME_PLATFORM = _Sam3sPirrd +endif +ifeq ($(PLATFORM), PLATFORM_CUSTOM_3) + HAL_LIB_NAME_PLATFORM = _Custom3 +endif +ifeq ($(PLATFORM), PLATFORM_RCB) + ifeq ($(PLATFORM_REV), RCB_ATMEGA128RFA1) + HAL_LIB_NAME_PLATFORM = _RcbAtm128rfa1 + else ifeq ($(PLATFORM_REV), RCB_ATMEGA256RFR2) + HAL_LIB_NAME_PLATFORM = _RcbAtm256rfr2 + else + ifneq (, $(findstring $(PLATFORM_REV), RCB230_V31 RCB230_V32 RCB230_V331)) + HAL_LIB_NAME_PLATFORM = _Rcb230 + endif + ifneq (, $(findstring $(PLATFORM_REV), RCB231_V402 RCB231_V411 RCB212_V532)) + HAL_LIB_NAME_PLATFORM = _Rcb231_212 + endif + endif # PLATFORM_REV +endif +ifeq ($(PLATFORM), PLATFORM_AVR32_EVK1105) + HAL_LIB_NAME_PLATFORM = _Avr32Evk1105 +endif +ifeq ($(PLATFORM), PLATFORM_XPLAIN) + HAL_LIB_NAME_PLATFORM = _Xplain +endif +ifeq ($(PLATFORM), PLATFORM_REB_CBB) + ifneq (, $(findstring $(RF_EXTENDER), REB230)) + HAL_LIB_NAME_PLATFORM = _RebCbb230 + endif + ifneq (, $(findstring $(RF_EXTENDER), REB231 REB212)) + HAL_LIB_NAME_PLATFORM = _RebCbb231_212 + endif +endif +ifeq ($(PLATFORM), PLATFORM_SIMULATOR) + HAL_LIB_NAME_PLATFORM = _Sim +endif + +ifeq ($(HAL), ATMEGA1281) + LIB_NAME_MICRO = _Atmega1281 +endif +ifeq ($(HAL), ATMEGA2561) + LIB_NAME_MICRO = _Atmega2561 +endif +ifeq ($(HAL), ATMEGA1284) + LIB_NAME_MICRO = _Atmega1284 +endif +ifeq ($(HAL), AT90USB1287) + LIB_NAME_MICRO = _At90usb1287 +endif +ifeq ($(HAL), ATXMEGA128A1) + LIB_NAME_MICRO = _Atxmega128a1 +endif +ifeq ($(HAL), ATXMEGA256A3) + LIB_NAME_MICRO = _Atxmega256a3 +endif +ifeq ($(HAL), ATXMEGA256D3) + LIB_NAME_MICRO = _Atxmega256d3 +endif +ifeq ($(HAL), ATMEGA128RFA1) + LIB_NAME_MICRO = _Atmega128rfa1 +endif +ifeq ($(HAL), ATMEGA256RFR2) + LIB_NAME_MICRO = _Atmega256rfr2 +endif +ifeq ($(HAL), AT91SAM7X256) + LIB_NAME_MICRO = _At91sam7x256 +endif +ifeq ($(HAL), AT91SAM3S4C) + LIB_NAME_MICRO = _At91sam3s4c +endif +ifeq ($(HAL), AT32UC3A0512) + LIB_NAME_MICRO = _At32uc3a0512 +endif +ifeq ($(HAL), SIMULATOR) + LIB_NAME_MICRO = _Sim +endif + +ifeq ($(HAL_USE_AMPLIFIER), TRUE) + LIB_NAME_AMP = _Amp +endif + + +STACK_LIB = $(LIB_NAME_MICRO)$(LIB_NAME_COMPILER) + +ifndef STACK_LIB + $(error ERROR: Build target is not defined) +endif + +include $(STACK_LIB_PATH)/Makerules$(STACK_LIB) + +HAL_LIB = HAL$(HAL_LIB_NAME_PLATFORM)$(LIB_NAME_MICRO)$(LIB_NAME_HAL_FREQ)$(LIB_NAME_COMPILER)$(LIB_NAME_AMP) + +#------------------------------------------------------------------------------- +# Compiler flags: +#------------------------------------------------------------------------------- +CFLAGS += -D$(HAL) +CFLAGS += -D$(PLATFORM) +CFLAGS += -D$(OS) +ifdef HAL_FREQUENCY + CFLAGS += -D$(HAL_FREQUENCY) +endif +ifdef HAL_CLOCK_SOURCE ####### For platforms with different main clock sources #### + CFLAGS += -D$(HAL_CLOCK_SOURCE) +endif +ifdef HAL_ASYNC_CLOCK_SOURCE ####### For platforms with different asyncronous clock sources #### + CFLAGS += -D$(HAL_ASYNC_CLOCK_SOURCE) +endif +ifeq ($(PLATFORM), PLATFORM_RCB) ####### RCB platform #### + CFLAGS += -D$(PLATFORM_REV) +endif +ifdef RF_EXTENDER ####### RF extension boards type for REB CBB & STK600 #### + CFLAGS += -D$(RF_EXTENDER) +endif +ifeq ($(HAL_USE_AMPLIFIER), TRUE) #### enable amplifier for zigbit platform #### + CFLAGS += -D_HAL_USE_AMPLIFIER_ +endif +ifeq ($(HAL_USE_USART_ERROR_EVENT), TRUE) #### enable usart error handler #### + CFLAGS += -D_USE_USART_ERROR_EVENT_ +endif +ifeq ($(HAL_RF_RX_TX_INDICATOR), TRUE) #### enable RF_RX_TX_INDICATOR #### + CFLAGS += -D_HAL_RF_RX_TX_INDICATOR_ +endif +ifeq ($(HAL_ANT_DIVERSITY), TRUE) #### enable Antenna diversity #### + CFLAGS += -D_HAL_ANT_DIVERSITY_ +endif +ifeq ($(HAL_USE_PIRRD_SPECIAL_SLEEP), TRUE) #### Special sleep mode for WPIRDemo application + CFLAGS += -D_HAL_USE_PIRRD_SPECIAL_SLEEP_ +endif + +#------------------------------------------------------------------------------- +# UART HW support compiler flags. +# AVR platforms support only UART channel 1 hardware control. +# ARM platforms support both UART channels hardware control. +#------------------------------------------------------------------------------- +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_LAN) + CFLAGS += -D_UART_0_HW_CONTROL_ +endif +ifeq ($(PLATFORM), PLATFORM_SAM7X_EK_RF2XX) + CFLAGS += -D_UART_0_HW_CONTROL_ +endif +ifeq ($(PLATFORM), PLATFORM_ZIGBIT_TURBO) + CFLAGS += -D_UART_0_HW_CONTROL_ +endif + +#------------------------------------------------------------------------------- +# Compiler flags for debug info: +#------------------------------------------------------------------------------- +ifeq ($(BUILD_CONFIGURATION), DEBUG) + ifeq ($(COMPILER_TYPE), IAR) + CFLAGS += --debug + endif + ifeq ($(COMPILER_TYPE), GCC) + CFLAGS += -g + endif +endif # DEBUG + +#------------------------------------------------------------------------------- +# Check compiler version: +#------------------------------------------------------------------------------- +ifeq ($(COMPILER_TYPE), GCC) + COMPILER_VERSION = $(strip $(shell $(CC) -v 2>&1 | grep 'gcc version')) +endif +ifeq ($(COMPILER_TYPE), IAR) + COMPILER_VERSION = $(strip $(shell $(CC) | grep 'C/C++ Compiler V')) +endif + +ifeq ($(COMPILER_AND_MICRO_TYPE), GCC_AVR) + EXP_VERSION = gcc version 4.3.3 (WinAVR 20100110) +else ifeq ($(COMPILER_AND_MICRO_TYPE), IAR_AVR) + EXP_VERSION = IAR C/C++ Compiler V5.51.5.50367/W32 for Atmel AVR +else ifeq ($(COMPILER_AND_MICRO_TYPE), GCC_ARM) + EXP_VERSION = gcc version 4.5.1 (GCC) +else ifeq ($(COMPILER_AND_MICRO_TYPE), IAR_ARM) + EXP_VERSION = IAR ANSI C/C++ Compiler V6.21.1.52794/W32 for ARM +else ifeq ($(COMPILER_AND_MICRO_TYPE), IAR_AVR32) + EXP_VERSION = IAR C/C++ Compiler V3.30.1.40051/W32 for Atmel AVR32 +else ifeq ($(COMPILER_AND_MICRO_TYPE), GCC_X86) + UNAME := $(shell uname) + ifeq ($(UNAME), Linux) + EXP_VERSION = gcc version 4.6.1 (Ubuntu/Linaro 4.6.1-9ubuntu3) + else + EXP_VERSION = gcc version 4.5.2 (GCC) + endif +else + $(error unsupported COMPILER_AND_MICRO_TYPE) +endif + +ifeq ($(COMPILER_TYPE), IAR) + COMPILER_TYPE_LOWER_CASE = _Iar +else + COMPILER_TYPE_LOWER_CASE = _Gcc +endif # COMPILER_TYPE + +ifeq ($(HAL), ATMEGA1281) + WDT_INIT_OBJ=WdtInitatmega1281$(COMPILER_TYPE_LOWER_CASE).o +endif +ifeq ($(HAL), ATMEGA2561) + WDT_INIT_OBJ=WdtInitatmega2561$(COMPILER_TYPE_LOWER_CASE).o +endif +ifeq ($(HAL), ATMEGA1284) + WDT_INIT_OBJ=WdtInitatmega1284$(COMPILER_TYPE_LOWER_CASE).o +endif +ifeq ($(HAL), AT90USB1287) + WDT_INIT_OBJ=WdtInitat90usb1287$(COMPILER_TYPE_LOWER_CASE).o +endif +ifeq ($(HAL), ATMEGA128RFA1) + WDT_INIT_OBJ=WdtInitatmega128rfa1$(COMPILER_TYPE_LOWER_CASE).o +endif +ifeq ($(HAL), ATMEGA256RFR2) + WDT_INIT_OBJ=WdtInitatmega256rfr2$(COMPILER_TYPE_LOWER_CASE).o +endif +ifeq ($(HAL), AT91SAM7X256) + ifeq ($(OS), FREE_RTOS) + FREE_RTOS_LIB=FreeRTOSat91sam7x256 + endif + ifeq ($(COMPILER_TYPE), GCC) + ifeq ($(OS), FREE_RTOS) + BOOT_OBJ = $(LIBDIR)/FreertosBoot$(COMPILER_TYPE_LOWER_CASE).o + endif + ifeq ($(OS), NONE_OS) + BOOT_OBJ = $(LIBDIR)/FirmwareBoot$(COMPILER_TYPE_LOWER_CASE).o + endif + endif + ifeq ($(COMPILER_TYPE), IAR) + ifeq ($(OS), FREE_RTOS) + endif + ifeq ($(OS), NONE_OS) + BOOT_OBJ = $(LIBDIR)/FirmwareBoot$(COMPILER_TYPE_LOWER_CASE).o + endif + endif +endif \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/Makefile b/digital/zigbit/bitcloud/stack/Components/HAL/avr/Makefile new file mode 100644 index 00000000..450e054d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/Makefile @@ -0,0 +1,274 @@ +HAL_PATH = .. +include $(HAL_PATH)/Makerules + +###### +LIBDIR = $(STACK_LIB_PATH) +LIB = $(LIBDIR)/lib$(HAL_LIB).a + +ifeq ($(HAL), ATMEGA1281) + BUILDDIR = $(HAL_PATH)/avr/atmega1281 +endif + +ifeq ($(HAL), ATMEGA2561) + BUILDDIR = $(HAL_PATH)/avr/atmega1281 +endif + +ifeq ($(HAL), ATMEGA1284) + BUILDDIR = $(HAL_PATH)/avr/atmega1284 +endif + +ifeq ($(HAL), AT90USB1287) + BUILDDIR = $(HAL_PATH)/avr/at90usb1287 +endif + +ifeq ($(HAL), ATMEGA128RFA1) + BUILDDIR = $(HAL_PATH)/avr/atmega128rfa1 +endif + +#### DEFINES FLAGS ####### +CFLAGS += -DHAL_USE_ADC +CFLAGS += -DHAL_USE_EE_READY +# CFLAGS += -DHAL_USE_TWI +CFLAGS += -DHAL_USE_TIMER4_COMPA +CFLAGS += -DHAL_USE_EXT_HANDLER +ifneq ($(HAL), AT90USB1287) + CFLAGS += -DHAL_USE_SLEEP + CFLAGS += -DHAL_USE_TIMER2_COMPA + CFLAGS += -DHAL_USE_WAKEUP +endif +ifneq ($(HAL), ATMEGA1284) + CFLAGS += -DHAL_USE_PWM +endif #ATMEGA1284 +ifeq ($(HAL), AT90USB1287) + CFLAGS += -DHAL_USE_USB +endif +ifeq ($(HAL), ATMEGA128RFA1) + CFLAGS += -D_HAL_HW_AES_ + CFLAGS += -DHAL_USE_SPI +endif +CFLAGS += -DSLEEP_PRESCALER_1024 +ifeq ($(HAL), ATMEGA1281) + ifeq ($(HAL_TINY_UID), TRUE) + CFLAGS += -D_HAL_TINY_UID_ + endif +endif + + +##### DECLARES USART CHANNELS TO BE USED ########## +CFLAGS += -DHAL_USE_USART +ifneq ($(HAL), AT90USB1287) + CFLAGS += -DNUM_USART_CHANNELS=2 +else + CFLAGS += -DNUM_USART_CHANNELS=1 +endif # AT90USB1287 + +ifneq ($(HAL), AT90USB1287) + CFLAGS += -DHAL_USE_USART_CHANNEL_0 +endif # AT90USB1287 + +CFLAGS += -DHAL_USE_USART_CHANNEL_1 + +# Defines which USART uses hardware control pins - only one port at +# the same time can be hardware controlled. If the macros is not declared - +# hw control is not used. +ifeq (, $(findstring $(HAL), ATMEGA1284 AT90USB1287 ATMEGA128RFA1)) + #CFLAGS += -DHARDWARE_CONTROL_PINS_PORT_ASSIGNMENT=USART_CHANNEL_0 + CFLAGS += -DHW_CONTROL_PINS_PORT_ASSIGNMENT=USART_CHANNEL_1 +endif + +ifeq ($(SYSTEM_TIME_ON), SLEEP_TIMER) + CFLAGS += -D_SYSTEM_TIME_ON_SLEEP_TIMER_ +endif + +##### PATHS FLAGS OF INCLUDES ######### +CFLAGS += -I$(HAL_HWD_COMMON_PATH)/include +CFLAGS += -I$(HAL_MAC_API_PATH)/include +CFLAGS += -I$(BUILDDIR)/../../include +CFLAGS += -I$(SE_PATH)/include + +#### ASM DEFINES FLAGS ####### +ASMFLAGS = -I$(HAL_HWD_COMMON_PATH)/include +ifeq ($(COMPILER_TYPE), GCC) + ASMFLAGS += -mmcu=$(CPU) + ASM_FILE_EXT = s +endif +ifeq ($(COMPILER_TYPE), IAR) + ASMFLAGS += -s+ # Enables case sensitivity. + ASMFLAGS += -w+ # Enables warnings. + ASMFLAGS += -D$(HAL_FREQUENCY) + ASMFLAGS += -M'<>'# Change asm.macro argument quote chars. + ASMFLAGS += -L$(HAL_PATH)/avr/list # Generate a list on: / <.lst> + ASMFLAGS += -t8 # Set tab spacing. + ASMFLAGS += -u_enhancedCore + ASMFLAGS += -D__HAS_ENHANCED_CORE__=1 + ASMFLAGS += -D__HAS_MUL__=1 + ASMFLAGS += -D__MEMORY_MODEL__=2 + ifneq (, $(findstring $(HAL), ATMEGA1281 ATMEGA1284 AT90USB1287 ATMEGA128RFA1)) + ASMFLAGS += -v3 # Select processor option: Relative jumps do not wrap. + ifeq ($(HAL), ATMEGA1281) + ASMFLAGS += -D__ATmega1281__=1 + endif + endif + ifneq (, $(findstring $(HAL), ATMEGA2561)) + ASMFLAGS += -v5 # Select processor option: Relative jumps do not wrap. + ASMFLAGS += -D__ATmega2561__=1 + endif + ASMFLAGS += -D__HAS_ELPM__=1 + ASMFLAGS += -S + ASM_FILE_EXT = s90 +endif + +# Main clock of CPU in Hz. +ifeq ($(HAL_FREQUENCY), HAL_4MHz) + F_CPU=4000000 +endif +ifeq ($(HAL_FREQUENCY), HAL_8MHz) + F_CPU=8000000 +endif + +###### LIB ########## +LIBS = $(LIB) $(LIBDIR)/$(WDT_INIT_OBJ) + +ifneq ($(HAL), ATMEGA1284) + common_hwd += halPwm +endif +ifneq ($(HAL), AT90USB1287) + common_hwd += halSleepTimerClock +endif +ifeq ($(HAL), AT90USB1287) + common_hwd += halUsb +endif +ifeq ($(HAL), ATMEGA128RFA1) + common_hwd += halSecurityModule + common_hwd += halDelay +endif +common_hwd += halAppClock +common_hwd += halClkCtrl +common_hwd += halUsart +common_hwd += halIrq +# common_hwd += i2c +common_hwd += halEeprom +common_hwd += wdt +common_hwd += halSleep +common_hwd += halAdc +common_hwd += halSpi +common_hwd += calibration +common_hwd += halInit + +ifneq ($(HAL), ATMEGA128RFA1) + personal_hwd += halRfSpi +endif + +personal_hwd += halRfCtrl +personal_hwd += halUid +personal_hwd += halMacIsr + +ifeq ($(HAL), ATMEGA1281) + ifeq ($(HAL_TINY_UID), TRUE) + personal_hwd += halAtmelUid + endif +endif + +asm_hwd += halW1 +asm_hwd += halCalibration +ifeq ($(COMPILER_TYPE), IAR) + asm_hwd += cstartup +endif + +ifneq ($(HAL), ATMEGA1284) + hwi += pwm +endif +ifneq ($(HAL), AT90USB1287) + hwi += sleepTimer +endif +ifeq ($(HAL), AT90USB1287) + hwi += usb +endif +hwi += appTimer +hwi += halTaskManager +hwi += usart +hwi += w1 +hwi += irq +hwi += resetReason +# hwi += i2cPacket +hwi += eeprom +hwi += timer +hwi += adc +hwi += spi +hwi += sleep + +objects_hwd = $(addsuffix .o,$(addprefix $(HAL_HWD_COMMON_PATH)/objs/,$(common_hwd))) +objects_hwd += $(addsuffix .o,$(addprefix $(HAL_MAC_API_PATH)/objs/,$(personal_hwd))) +sources_hwd = $(addsuffix .c,$(addprefix $(HAL_HWD_COMMON_PATH)/src/,$(common_hwd))) +sources_hwd += $(addsuffix .c,$(addprefix $(HAL_MAC_API_PATH)/src/,$(personal_hwd))) +objects_asm_hwd = $(addsuffix .o,$(addprefix $(HAL_HWD_COMMON_PATH)/objs/,$(asm_hwd))) +sources_asm_hwd = $(addsuffix .$(ASM_FILE_EXT),$(addprefix $(HAL_HWD_COMMON_PATH)/src/,$(asm_hwd))) +objects_hwi = $(addsuffix .o,$(addprefix $(BUILDDIR)/../common/objs/,$(hwi))) +sources_hwi = $(addsuffix .c,$(addprefix $(BUILDDIR)/../common/src/,$(hwi))) + +###### TARGETS ################ +all: component_label WdtInit $(LIB) + +component_label: + @echo + @echo ---------------------------------------------------- + @echo HAL library creation. + @echo ---------------------------------------------------- + +################ common part ############################## +$(HAL_HWD_COMMON_PATH)/objs/%.o: $(HAL_HWD_COMMON_PATH)/src/%.c + $(CC_MSG) + $(Q)$(CC) $(CFLAGS) $^ -o $@ +################ common part ############################## + +################ personal part ############################## +$(HAL_MAC_API_PATH)/objs/%.o: $(HAL_MAC_API_PATH)/src/%.c + $(CC_MSG) + $(Q)$(CC) $(CFLAGS) $^ -o $@ +################ personal part ############################## + +################ common assembler part ###################### +$(HAL_HWD_COMMON_PATH)/objs/%.o: $(HAL_HWD_COMMON_PATH)/src/%.$(ASM_FILE_EXT) + $(AS_MSG) + $(Q)$(AS) $(ASMFLAGS) -o $@ $^ + +ifeq ($(COMPILER_TYPE), IAR) +gen_fcpu_header: + @echo "FCPU EQU $(F_CPU)" > $(HAL_HWD_COMMON_PATH)/include/halIarD.h +endif + +ifeq ($(COMPILER_TYPE), GCC) +gen_fcpu_header: + @echo ".equ FCPU, $(F_CPU)" > $(HAL_HWD_COMMON_PATH)/include/halGccD.h +endif +################ common assembler part ###################### + +################ hwi part ################################### +$(BUILDDIR)/../common/objs/%.o: $(BUILDDIR)/../common/src/%.c + $(CC_MSG) + $(Q)$(CC) $(CFLAGS) $^ -o $@ +################ hwi part ################################### + +################ +WdtInit: $(HAL_HWD_COMMON_PATH)/src/halWdtInit.c + $(CC_MSG) + $(Q)$(CC) $(CFLAGS) $(HAL_HWD_COMMON_PATH)/src/halWdtInit.c -o $(LIBDIR)/$(WDT_INIT_OBJ) +################ +$(LIB): $(objects_hwd) gen_fcpu_header $(objects_asm_hwd) $(objects_hwi) + $(AR_MSG) + $(Q)$(AR) $(AR_KEYS) $(LIB) $(objects_hwd) $(objects_asm_hwd) $(objects_hwi) + $(SIZE_MSG) + $(Q)$(SHOW_SIZE) -td $(LIBDIR)/$(WDT_INIT_OBJ) + $(SIZE_MSG) + $(Q)$(SHOW_SIZE) -td $(LIB) + +# $(foreach lib_iter,$(wildcard $(LIBDIR)/lib*$(STACK_LIB)*.a), $(shell $(AR) $(AR_KEYS) $(lib_iter) $(objects_hwd) $(objects_asm_hwd) $(objects_hwi))) +################ +clean: + @echo + @echo ---------------------------------------------------- + @echo HAL component cleaning. + $(Q)rm -f $(objects_hwd) $(objects_hwi) $(LIBS) $(objects_asm_hwd) + $(Q)rm -f $(HAL_PATH)/lib/*.a $(HAL_PATH)/lib/*.o $(HAL_PATH)/avr/list/*.* + @echo HAL cleaning done! + @echo ---------------------------------------------------- diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h new file mode 100644 index 00000000..421cc4d6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h @@ -0,0 +1,147 @@ +/***************************************************************************//** + \file gpio.h + + \brief Implementation of gpio defines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 4/12/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _GPIO_H +#define _GPIO_H + +/****************************************************************************** + Includes section +******************************************************************************/ +// \cond +#include +// \endcond + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/****************************************************************************** +* void gpioX_set() sets GPIOX pin to logical 1 level. +* void gpioX_clr() clears GPIOX pin to logical 0 level. +* void gpioX_make_in makes GPIOX pin as input. +* void gpioX_make_in makes GPIOX pin as output. +* uint8_t gpioX_read() returns logical level GPIOX pin. +* uint8_t gpioX_state() returns configuration of GPIOX port. +*******************************************************************************/ +#define HAL_ASSIGN_PIN(name, port, bit) \ +INLINE void GPIO_##name##_set() {PORT##port |= (1 << bit);} \ +INLINE void GPIO_##name##_clr() {PORT##port &= ~(1 << bit);} \ +INLINE uint8_t GPIO_##name##_read() {return (PIN##port & (1 << bit)) != 0;} \ +INLINE uint8_t GPIO_##name##_state() {return (DDR##port & (1 << bit)) != 0;} \ +INLINE void GPIO_##name##_make_out() {DDR##port |= (1 << bit);} \ +INLINE void GPIO_##name##_make_in() {DDR##port &= ~(1 << bit); PORT##port &= ~(1 << bit);} \ +INLINE void GPIO_##name##_make_pullup() {PORT##port |= (1 << bit);}\ +INLINE void GPIO_##name##_toggle() {PORT##port ^= (1 << bit);} + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +// the macros for the manipulation by GPIO0 +HAL_ASSIGN_PIN(0, B, 5); +// the macros for the manipulation by GPIO1 +HAL_ASSIGN_PIN(1, B, 6); +// the macros for the manipulation by GPIO2 +HAL_ASSIGN_PIN(2, B, 7); +// the macros for the manipulation by GPIO3 +HAL_ASSIGN_PIN(3, G, 0); +// the macros for the manipulation by GPIO4 +HAL_ASSIGN_PIN(4, G, 1); +// the macros for the manipulation by GPIO5 +HAL_ASSIGN_PIN(5, G, 2); +// the macros for the manipulation by GPIO6 +HAL_ASSIGN_PIN(6, D, 6); +// the macros for the manipulation by GPIO7 +HAL_ASSIGN_PIN(7, D, 7); +// the macros for the manipulation by GPIO8 +HAL_ASSIGN_PIN(8, E, 3); + +// macroses only for STK500 +// the macros for the manipulation by GPIO9 +HAL_ASSIGN_PIN(9, C, 0); +// the macros for the manipulation by GPIO10 +HAL_ASSIGN_PIN(10, C, 1); +// the macros for the manipulation by GPIO11 +HAL_ASSIGN_PIN(11, C, 2); +// the macros for the manipulation by GPIO12 +HAL_ASSIGN_PIN(12, C, 3); +// the macros for the manipulation by GPIO13 +HAL_ASSIGN_PIN(13, C, 4); +// the macros for the manipulation by GPIO14 +HAL_ASSIGN_PIN(14, C, 5); +// the macros for the manipulation by GPIO15 +HAL_ASSIGN_PIN(15, C, 6); +// the macros for the manipulation by GPIO16 +HAL_ASSIGN_PIN(16, C, 7); +// macroses only for STK500 + +// macroses only for Rcb +// the macros for the manipulation by GPIOE2 +HAL_ASSIGN_PIN(E2, E, 2); +// the macros for the manipulation by GPIOE3 +HAL_ASSIGN_PIN(E3, E, 3); +// the macros for the manipulation by GPIOE4 +HAL_ASSIGN_PIN(E4, E, 4); +// the macros for the manipulation by GPIOE5 +HAL_ASSIGN_PIN(E5, E, 5); +// macroses only for Rcb + +// the macros for the manipulation by GPIO_I2C_CLK +HAL_ASSIGN_PIN(I2C_CLK, D, 0); +// the macros for the manipulation by GPIO_I2C_DATA +HAL_ASSIGN_PIN(I2C_DATA, D, 1); +// the macros for the manipulation by GPIO_USART1_TXD +HAL_ASSIGN_PIN(USART1_TXD, D, 2); +// the macros for the manipulation by GPIO_USART1_RXD +HAL_ASSIGN_PIN(USART1_RXD, D, 3); +// the macros for the manipulation by GPIO_USART1_EXTCLK +HAL_ASSIGN_PIN(USART1_EXTCLK, D, 5); +// the macros for the manipulation by GPIO_USART_RTS +HAL_ASSIGN_PIN(USART_RTS, D, 4); +// the macros for the manipulation by GPIO_USART_CTS +HAL_ASSIGN_PIN(USART_CTS, D, 5); +// the macros for the manipulation by GPIO_ADC_INPUT_3 +HAL_ASSIGN_PIN(ADC_INPUT_3, F, 3); +// the macros for the manipulation by GPIO_ADC_INPUT_2 +HAL_ASSIGN_PIN(ADC_INPUT_2, F, 2); +// the macros for the manipulation by GPIO_ADC_INPUT_1 +HAL_ASSIGN_PIN(ADC_INPUT_1, F, 1); +// the macros for the manipulation by GPIO_BAT +HAL_ASSIGN_PIN(BAT, F, 0); +// the macros for the manipulation by GPIO_1WR +HAL_ASSIGN_PIN(1WR, G, 5); +// the macros for the manipulation by GPIO_USART_DTR +HAL_ASSIGN_PIN(USART_DTR, E, 4); +// the macros for the manipulation by GPIO_USART0_TXD +HAL_ASSIGN_PIN(USART0_TXD, E, 0); +// the macros for the manipulation by GPIO_USART0_RXD +HAL_ASSIGN_PIN(USART0_RXD, E, 1); +// the macros for the manipulation by GPIO_USART0_EXTCLK +HAL_ASSIGN_PIN(USART0_EXTCLK, E, 2); +// the macros for the manipulation by GPIO_IRQ_7 +HAL_ASSIGN_PIN(IRQ_7, E, 7); +// the macros for the manipulation by GPIO_IRQ_6 +HAL_ASSIGN_PIN(IRQ_6, E, 6); + +#ifdef _HAL_USE_AMPLIFIER_ + // the macros for the manipulation sleep power amplifier + HAL_ASSIGN_PIN(POW_AMPLF_SLP, C, 1); +#endif + +#endif /* _GPIO_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h new file mode 100644 index 00000000..d64f6bd2 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h @@ -0,0 +1,68 @@ +/**************************************************************************//** + \file halAdc.h + + \brief Declaration of hardware depended ADC interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALADC_H +#define _HALADC_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initializations the ADC. +\param[in] + param - pointer to parameter structure +******************************************************************************/ +void halOpenAdc(HAL_AdcParams_t *param); + +/**************************************************************************//** +\brief starts convertion on the ADC channel. +\param[in] + channel - channel number. +******************************************************************************/ +void halStartAdc(uint8_t channel); + +/**************************************************************************//** +\brief Closes the ADC. +******************************************************************************/ +void halCloseAdc(void); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief SIG_ADC interrupt handler signal implementation +******************************************************************************/ +INLINE void halSigAdcInterrupt(void) +{ + halPostTask3(HAL_ADC); +} + +#endif /* _HALADC_H */ + +// eof halSdc.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h new file mode 100644 index 00000000..47a90fac --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h @@ -0,0 +1,101 @@ +/**************************************************************************//** + \file halAppClock.h + + \brief Declarations of appTimer hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALAPPCLOCK_H +#define _HALAPPCLOCK_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief system timer interval in ms */ +#define HAL_APPTIMERINTERVAL 10ul +/** \brief frequency prescaler for system timer */ +#define TIMER_FREQUENCY_PRESCALER 8 +/** \brief timer counter top value */ +#define TOP_TIMER_COUNTER_VALUE ((F_CPU/1000ul) / TIMER_FREQUENCY_PRESCALER) * HAL_APPTIMERINTERVAL +/** \brief cpu clk / 8 */ +#define HAL_CLOCK_SELECTION_MASK (1 << CS11) + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initialization appTimer clock. +******************************************************************************/ +void halInitAppClock(void); + +/**************************************************************************//** +\brief Synchronization system time which based on application timer. +******************************************************************************/ +void halAppSystemTimeSynchronize(void); + +/**************************************************************************//** +\brief Return time of sleep timer. + +\return + time in ms. +******************************************************************************/ +uint32_t halGetTimeOfAppTimer(void); + +/**************************************************************************//** +\brief Return system time in us + +\param[out] + mem - memory for system time +******************************************************************************/ +void halGetSystemTimeUs(uint64_t *mem); + +/**************************************************************************//** +\brief Takes account of the sleep interval. + +\param[in] + interval - time of sleep +******************************************************************************/ +void halAdjustSleepInterval(uint32_t interval); + +/****************************************************************************** + Inline static functions prototypes section. +******************************************************************************/ +/**************************************************************************//** +\brief Enables appTimer clock. +******************************************************************************/ +INLINE void halStartAppClock(void) +{ + TCCR4B |= HAL_CLOCK_SELECTION_MASK; +} + +/**************************************************************************//** +\brief Disables appTimer clock. +******************************************************************************/ +INLINE void halStopAppClock(void) +{ + TCCR4B &= ~HAL_CLOCK_SELECTION_MASK; // stop the timer +} + +#endif /*_HALAPPCLOCK_H*/ + +// eof halAppClock.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h new file mode 100644 index 00000000..92e0497f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h @@ -0,0 +1,108 @@ +/**************************************************************************//** + \file halAssert.h + + \brief Implementation of avr assert algorithm. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 18/08/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALASSERT_H +#define _HALASSERT_H + +#ifdef __IAR_SYSTEMS_ICC__ +#ifndef _SYSTEM_BUILD +#pragma system_include +#endif +#endif + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define DELAY_VALUE 0x000000ul + +#ifdef _SYS_ASSERT_ON_ + +#if defined(_HAL_ASSERT_INTERFACE_UART0_) + #define UBRRNH UBRR0H + #define UBRRNL UBRR0L + #define UCSRNA UCSR0A + #define UCSRNB UCSR0B + #define UCSRNC UCSR0C + #define UDRN UDR0 +#elif defined(_HAL_ASSERT_INTERFACE_UART1_) + #define UBRRNH UBRR1H + #define UBRRNL UBRR1L + #define UCSRNA UCSR1A + #define UCSRNB UCSR1B + #define UCSRNC UCSR1C + #define UDRN UDR1 +#else + #error " Unknown assert interface " +#endif + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +INLINE void halAssert(uint8_t condition, uint16_t dbgCode) +{ + if (!condition) + { + uint32_t delay; + + HAL_StopWdt(); + asm("cli"); + DDRB |= 0xE0; + /* Init UART */ + UBRRNH = 0; + if (4000000ul == HAL_ReadFreq()) + UBRRNL = 12; + else + UBRRNL = 25; + UCSRNA = (1 << U2X1); + UCSRNB = (1 << TXEN1); + UCSRNC = (3 << UCSZ10); + while(1) + { + PORTB &= ~0xE0; + /* Send high byte of message to UART */ + while (!(UCSRNA & (1 << UDRE1))); + UDRN = (dbgCode >> 8); + /* Send low byte of message to UART */ + while (!(UCSRNA & (1 << UDRE1))); + UDRN = dbgCode; + delay = DELAY_VALUE; + while (delay--); + + PORTB |= 0xE0; + delay = (DELAY_VALUE / 2); + while(delay--); + } + } +} + +#else /* _SYS_ASSERT_ON_ */ + #define halAssert(condition, dbgCode) +#endif /* _SYS_ASSERT_ON_ */ + +#endif /* _HALASSERT_H */ + +// eof halAssert.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h new file mode 100644 index 00000000..245abf6f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h @@ -0,0 +1,57 @@ +/**************************************************************************//** + \file halAtomic.h + + \brief Implementation of atomic sections. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALATOMIC_H +#define _HALATOMIC_H + +#include + +typedef uint8_t atomic_t; + +/****************************************************************************** +Saves global interrupt bit. Disables global interrupt. +Parameters: + none. +Returns: + none. +******************************************************************************/ +INLINE atomic_t halStartAtomic(void) +{ + atomic_t result = SREG; + cli(); + return result; +} + +/****************************************************************************** +Restores global interrupt. +Parameters: + none. +Returns: + none. +******************************************************************************/ +INLINE void halEndAtomic(atomic_t sreg) +{ + SREG = sreg; +} + +#endif /* _HALATOMIC_H */ +// eof atomic.h + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h new file mode 100644 index 00000000..6bc7a11d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h @@ -0,0 +1,70 @@ +/**************************************************************************//** + \file halClkCtrl.h + + \brief Declarations of clock control hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + 16/04/09 A. Khromykh - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALCLKCTRL_H +#define _HALCLKCTRL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/**************************************************************************//** +\brief Possible clock source +******************************************************************************/ +typedef enum +{ + INTERNAL_RC, + OTHER_SOURCE +} ClkSource_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initialization system clock. +******************************************************************************/ +void halInitFreq(void); + +/**************************************************************************//** +\brief Return clock source + +\return + clock source. +******************************************************************************/ +ClkSource_t halGetClockSource(void); + +/**************************************************************************//** +\brief System clock. + +\return + system clock in Hz. +******************************************************************************/ +uint32_t HAL_ReadFreq(void); + +#endif /* _HALCLKCTRL_H */ + +// eof halClkCtrl.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h new file mode 100644 index 00000000..def330ba --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h @@ -0,0 +1,95 @@ +/***************************************************************************//** + \file halDbg.h + + \brief Declarations of hal , bsb mistake interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 09/11/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALDBG_H +#define _HALDBG_H + +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +enum +{ + APPTIMER_MISTAKE = 0x2000, + INCORRECT_EEPROM_ADDRESS = 0x2001, + MEMORY_CANNOT_WRITE = 0x2002, + USARTC_HALUSARTRXBUFFERFILLER_0 = 0x2003, + USARTC_HALSIGUSARTTRANSMISSIONCOMPLETE_0 = 0x2004, + USARTC_HALSIGUSARTRECEPTIONCOMPLETE_0 = 0x2005, + HALUSARTH_HALCLOSEUSART_0 = 0X2006, + HALUSARTH_HALENABLEUSARTDREMINTERRUPT_0 = 0X2007, + HALUSARTH_HALDISABLEUSARTDREMINTERRUPT_0 = 0X2008, + HALUSARTH_HALENABLEUSARTTXCINTERRUPT_0 = 0X2009, + HALUSARTH_HALDISABLEUSARTTXCINTERRUPT_0 = 0X200A, + HALUSARTH_HALENABLEUSARTRXCINTERRUPT_0 = 0X200B, + HALUSARTH_HALDISABLEUSARTRXCINTERRUPT_0 = 0X200C, + HALUSARTH_HALSENDUSARTBYTE_0 = 0X200D, + USARTC_HALUSARTSAVEERRORREASON = 0x200E, + USARTC_HALSIGUSARTERROROCCURED_0 = 0x200F, + USARTC_HALUNKNOWNERRORREASON_0 = 0x2010, + + HAL_USART_TX_EMPTY_LIMIT = 0x2FDB, + HAL_USART_TRANS_COMPLETE_LIMIT = 0x2FDC, + HAL_USART_HW_CONTROLLER_LIMIT = 0x2FDD, + HAL_SLEEP_TIMER_SYNCHRONIZE_LIMIT = 0x2FDE, + HAL_GET_SLEEP_TIME_LIMIT = 0x2FDF, + HALISR_EEPROM_WRITE_TIME_LIMIT = 0x2FE0, + HAL_APP_TIMER_SYNCHRONIZE_LIMIT = 0x2FE1, + HALISR_INT5_VECT_TIME_LIMIT = 0x2FE2, + HALISR_ADC_TIME_LIMIT = 0x2FE3, + HALISR_TIMER4_COMPA_TIME_LIMIT = 0x2FE4, + HALATOM_SETLOWFUSES_TIME_LIMIT = 0x2FE5, + HALATOM_INITFREQ_TIME_LIMIT = 0x2FE6, + HALISR_EEPROM_READY_TIME_LIMIT = 0x2FE7, + HALISR_INT6_VECT_TIME_LIMIT = 0x2FE8, + HALISR_INT7_VECT_TIME_LIMIT = 0x2FE9, + HALISR_TIMER2_COMPA_TIME_LIMIT = 0x2FEA, + HALISR_TIMER2_OVF_TIME_LIMIT = 0x2FEB, + HALISR_USART0_UDR_TIME_LIMIT = 0x2FEC, + HALISR_USART0_TX_TIME_LIMIT = 0x2FED, + HALISR_USART0_RX_TIME_LIMIT = 0x2FEE, + HALISR_USART1_UDRE_TIME_LIMIT = 0x2FEF, + HALISR_USART1_TX_TIME_LIMIT = 0x2FF0, + HALISR_USART1_RX_TIME_LIMIT = 0x2FF1, + HALISR_INT4_TIME_LIMIT = 0x2FF2, + HALISR_TWI_TIME_LIMIT = 0x2FF3, + HALATOM_STARTWDT_TIME_LIMIT = 0x2FF4, + HALISR_WDT_TIME_LIMIT = 0x2FF5, + HALATOM_WRITEBYTE_RFSPI_TIME_LIMIT = 0x2FF6, + HALISR_TIMER3_COMPA_TIME_LIMIT = 0x2FF7, + HALISR_PHYDISPATCH_RFINT_TIME_LIMIT = 0x2FF8, + HALATOM_GETTIME_OF_APPTIMER_1_TIME_LIMIT = 0x2FF9, + HALATOM_GETTIME_OF_APPTIMER_2_TIME_LIMIT = 0x2FFA, + HALATOM_GETTIME_OF_APPTIMER_3_TIME_LIMIT = 0x2FFB, + HALATOM_WRITE_USART_TIME_LIMIT = 0x2FFC, + HALATOM_READ_USART_TIME_LIMIT = 0x2FFD, + HALATOM_USART_RX_COMPLETE_TIME_LIMIT = 0x2FFE, + HALATOM_CLEAR_TIME_CONTROL_TIME_LIMIT = 0x2FFF +}; + +/****************************************************************************** + Prototypes section +******************************************************************************/ + +#endif /* _HALDBG_H */ + +// eof halDbg.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h new file mode 100644 index 00000000..53fb0302 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h @@ -0,0 +1,51 @@ +/**************************************************************************//** + \file halDiagnostic.h + + \brief Implementation of diagnostics defines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 20/05/09 D. Kasyanov - Created + ******************************************************************************/ + +#ifndef _HALDIAGNOSTIC_H +#define _HALDIAGNOSTIC_H + +#include +#include + +#if defined (MEASURE) + #define TCNT5_ACCESS_TIME 8 + #define DEFALUT_TIME_LIMIT 100 + #define TIMER3_COMPA_TIME_LIMIT 150 + #define PHYDISPATCH_RFINT_TIME_LIMIT 210 + + #define BEGIN_MEASURE { \ + uint16_t timeLimit = DEFALUT_TIME_LIMIT; \ + uint16_t start = TCNT5; uint16_t offset; + + #define END_MEASURE(code) offset = (TCNT5 - start - TCNT5_ACCESS_TIME) / (F_CPU/1000000ul); \ + if (HALISR_TIMER3_COMPA_TIME_LIMIT == code) timeLimit = TIMER3_COMPA_TIME_LIMIT; \ + if (HALISR_PHYDISPATCH_RFINT_TIME_LIMIT == code) timeLimit = PHYDISPATCH_RFINT_TIME_LIMIT; \ + if (timeLimit != 0) { \ + if (offset > timeLimit) { \ + TCCR5B = 0; TCNT5 = offset; assert(0,code); \ + } \ + } \ + } + +#else + #define BEGIN_MEASURE + #define END_MEASURE(code) +#endif + + +#endif /* _HALDIAGNOSTIC_H */ + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h new file mode 100644 index 00000000..0ca06bfb --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + \file halEeprom.h + + \brief Provides interface for the access to hardware dependent + EEPROM module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALEEPROM_H +#define _HALEEPROM_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief the mask to rise interrupt when operation on EEPROM was completed */ +#define HAL_EEPROM_WRITE_MASK_INT (1 << EEMPE | 1 << EERIE) +#define HAL_EEPROM_WRITE_MASK (1 << EEMPE) + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Writes a byte to EEPROM. +\param[in] + EECRMask - mask that define capability of interrupt after byte writing. +\param[in] + address - address of byte +\param[in] + data - data. +******************************************************************************/ +void halEepromWrite(uint8_t EECRMask, uint16_t address, uint8_t data); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief Waits completion of previous operation. +******************************************************************************/ +INLINE void halWaitEepromReady(void) +{ + while (EECR & (1 << EEPE)); // wait for completion of previous write +} + +/**************************************************************************//** +\brief Reads byte from EEPROM. +\param[in] + address -address of byte. +\return + a read byte. +******************************************************************************/ +INLINE uint8_t halReadEeprom(uint16_t address) +{ + EEAR = address; + EECR |= (1 << EERE); + return EEDR; +} + +/**************************************************************************//** +\brief Posts the task to taskhandler that "EEPROM ready" + interrupt has occured. +******************************************************************************/ +INLINE void halSigEepromReadyInterrupt(void) +{ + halPostTask3(HAL_EE_READY); +} +#endif /*_HALEEPROM_H*/ +//eof halEeprom.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h new file mode 100644 index 00000000..fe961e60 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h @@ -0,0 +1,36 @@ +/**************************************************************************//** + \file halFCPU.h + + \brief Declaration F_CPU for C code. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 6/10/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/* Main clock of CPU in Hz. */ +#if defined(HAL_3d6864MHz) + #define F_CPU 3686400 +#elif defined(HAL_4MHz) + #define F_CPU 4000000 +#elif defined(HAL_7d3728MHz) + #define F_CPU 7372800 +#elif defined(HAL_8MHz) + #define F_CPU 8000000 +#endif + +// eof halFCPU.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h new file mode 100644 index 00000000..b68aac65 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h @@ -0,0 +1,31 @@ +/**************************************************************************//** + \file halInit.h + + \brief HAL start up module interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALINIT_H +#define _HALINIT_H +/****************************************************************************** + Performs start up HAL initialization. +******************************************************************************/ +void HAL_Init(void); + +#endif /* _HALINIT_H */ + +// eof halInit.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h new file mode 100644 index 00000000..03300064 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h @@ -0,0 +1,36 @@ +/**************************************************************************//** + \file halInterrupt.h + + \brief Macroses to manipulate global interrupts. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALINTERRUPT_H +#define _HALINTERRUPT_H + +/****************************************************************************** +Enables global interrupt. +******************************************************************************/ +#define HAL_EnableInterrupts() sei() + +/****************************************************************************** +Disables global interrupt. +******************************************************************************/ +#define HAL_DisableInterrupts() cli() + +#endif /* _HALINTERRUPT_H */ +// eof halInterrupt.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h new file mode 100644 index 00000000..687447a3 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h @@ -0,0 +1,99 @@ +/***************************************************************************//** + \file halIrq.h + + \brief Declaration of HWD IRQ interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALIRQ_H +#define _HALIRQ_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(PLATFORM_ZIGBIT) + #define MAX_NUM_LINES 2 + #define MIN_VALID_IRQ_NUMBER IRQ_6 +#else + #define MAX_NUM_LINES 3 + #define MIN_VALID_IRQ_NUMBER IRQ_5 +#endif +/** \brief number valid interrupt. */ +#define HAL_NUM_IRQ_LINES MAX_NUM_LINES +/** \brief first valid interrupt. */ +#define HAL_FIRST_VALID_IRQ MIN_VALID_IRQ_NUMBER + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief user's callback type. */ +typedef void (* IrqCallback_t)(void); + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Sets configuration of pins and the registers. +\param[in] + irqNumber - number of interrupt. +\param[in] + irqMode - mode of interrupt. +******************************************************************************/ +void halSetIrqConfig(uint8_t irqNumber, uint8_t irqMode); + +/**************************************************************************//** +\brief Clears configuration of pins and the registers. +\param[in] + irqNumber - number of interrupt. +******************************************************************************/ +void halClrIrqConfig(uint8_t irqNumber); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief Enables external interrupt +\param[in] + irqNumber - number of external interrupt. +******************************************************************************/ +INLINE void halEnableIrqInterrupt(uint8_t irqNumber) +{ + // Enable external interrupt request + EIMSK |= (1 << irqNumber); +} + +/**************************************************************************//** +\brief Disables external interrupt +\param[in] + irqNumber - number of external interrupt. +******************************************************************************/ +INLINE void halDisableIrqInterrupt(uint8_t irqNumber) +{ + // Disable external interrupt request + EIMSK &= ~(1 << irqNumber); +} + +#endif /* _HALIRQ_H */ +//eof halirq.h + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h new file mode 100644 index 00000000..6c026ce0 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h @@ -0,0 +1,199 @@ +/**************************************************************************//** + \file halPwm.h + + \brief Declaration of hardware depended PWM interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/11/08 A. Taradov - Created + 5/04/11 A.Razinkov - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALPWM_H +#define _HALPWM_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Definitions section +******************************************************************************/ +/* Waveform Generation Mode bits position. PWM module independent. */ +#define WGMn0 0 +#define WGMn1 1 +#define WGMn2 3 +#define WGMn3 4 + +/* Force Output Compare bits position. PWM module independent. */ +#define FOCnA 7 +#define FOCnB 6 +#define FOCnC 5 + +/* Clock Select bits position. PWM module independent. */ +#define CSn0 0 +#define CSn1 1 +#define CSn2 2 + +/* Compare Output Mode bits position. PWM module independent. */ +#define COMnA0 6 +#define COMnA1 7 +#define COMnB0 4 +#define COMnB1 5 +#define COMnC0 2 +#define COMnC1 3 + +/* PWN unit base channel pins position. PWM module dependent. */ +#define PWM_UNIT_1_BASE_CHANNEL_PIN PB5 +#define PWM_UNIT_3_BASE_CHANNEL_PIN PE3 + +/* Force Output Compare base bit. PWM module independent. */ +#define FOCNX_BASE_BIT FOCnA +/* Compare Output Mode base bit number. PWM module independent. */ +#define COMNX0_BASE_BIT COMnA0 +/* Compare Output Mode bitfield size. PWM module and channel independent. */ +#define COMNX_BITFIELD_SIZE 2 +/* Compare Output Mode low bit number. PWM module independent. */ +#define COMnx0(descriptor) ((descriptor)->service.COMnx0) +/* Compare Output Mode high bit number. PWM module independent. */ +#define COMnx1(descriptor) ((descriptor)->service.COMnx0 + 1) +/* Output Compare Register. PWM module and channel dependent. */ +#define OCRnx(descriptor) (*((descriptor)->service.OCRnx)) +/* Data Direction Rregister. PWM module dependent. */ +#define DDRn(descriptor) (*((descriptor)->service.DDRn)) + +/****************************************************************************** + Types section +******************************************************************************/ + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initializes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. +******************************************************************************/ +void halOpenPwm(HAL_PwmUnit_t pwmUnit); + +/**************************************************************************//** +\brief Starts PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halStartPwm(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Stops PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halStopPwm(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sets base frequency of module. Common for all module channels. + +\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID. +\param [in] top - value for the TOP register. +\param [in] prescaler - clock prescaler. +******************************************************************************/ +void halSetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler); + +/**************************************************************************//** +\brief Sets compare value for the PWM channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halSetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue); + +/**************************************************************************//** +\brief Closes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. +******************************************************************************/ +void halClosePwm(HAL_PwmUnit_t pwmUnit); + +/**************************************************************************//** +\brief Prepare PWM channel access. Determine control registers, ports, pins etc. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halPreparePwmChannelAccess(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Configure corresponding pin as PWM out. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +static inline void halMakeOutPwmPin(HAL_PwmDescriptor_t *descriptor) +{ + DDRn(descriptor) |= + (1 << (descriptor->service.pwmBaseChannelPin + descriptor->channel)); +} + +/**************************************************************************//** +\brief Configure corresponding PWM output pin as in. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +static inline void halMakeInPwmPin(HAL_PwmDescriptor_t *descriptor) +{ + DDRn(descriptor) &= + ~(1 << (descriptor->service.pwmBaseChannelPin + descriptor->channel)); +} + +/**************************************************************************//** +\brief Perform two-step writing to 16-bit registers with special access rule: + TCNTn, OCRnA/B/C, ICRn. + +\param [in] reg - register address. +\param [in] word - word to move. +******************************************************************************/ +static inline void halMoveWordToRegister(volatile uint16_t *reg, uint16_t word) +{ +ATOMIC_SECTION_ENTER + /* High byte writing */ + *((volatile uint8_t*)(reg) + 1) = (uint8_t)(word >> 8); + /* Low byte writing */ + *(volatile uint8_t*)(reg) = (uint8_t)(word); +ATOMIC_SECTION_LEAVE +} + +/**************************************************************************//** +\brief Perform two-step reading of 16-bit registers with special access rule: + TCNTn, OCRnA/B/C, ICRn. + +\param [in] reg - register address. + +\return register value +******************************************************************************/ +static inline uint16_t halReadWordFromRegister(volatile uint16_t *reg) +{ + uint16_t word; +ATOMIC_SECTION_ENTER + /* Low byte reading */ + word = *(volatile uint8_t*)(reg); + /* High byte reading */ + word |= ((uint16_t)(*((volatile uint8_t*)(reg) + 1)) << 8); +ATOMIC_SECTION_LEAVE + return word; +} + +#endif /* _HALPWM_H */ + +// eof halPwm.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h new file mode 100644 index 00000000..c82c1a09 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h @@ -0,0 +1,73 @@ +/**************************************************************************//** + \file halSleep.h + + \brief Interface to control sleep mode. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/12/09 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALSLEEP_H +#define _HALSLEEP_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define HAL_ACTIVE_MODE 0 +#define HAL_SLEEP_MODE 1 +#define HAL_SLEEP_TIMER_IS_STOPPED 0 +#define HAL_SLEEP_TIMER_IS_STARTED 1 +#define HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE 0 +#define HAL_EXT_IRQ_IS_WAKEUP_SOURCE 1 + +/****************************************************************************** + Types section +******************************************************************************/ +typedef struct +{ + HAL_WakeUpCallback_t callback; + HAL_SleepTimer_t sleepTimer; + uint8_t wakeupStation : 1; + uint8_t wakeupSource : 1; + uint8_t sleepTimerState : 1; +} HalSleepControl_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Switch on system power. + +\param[in] + wakeupSource - wake up source +******************************************************************************/ +void halPowerOn(const uint8_t wakeupSource); + +/******************************************************************************* + Shutdown system. + NOTES: + the application should be sure the poweroff will not be + interrupted after the execution of the sleep(). +*******************************************************************************/ +void halPowerOff(void); + +#endif /* _HALSLEEP_H */ +// eof halSleep.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h new file mode 100644 index 00000000..36ab9849 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h @@ -0,0 +1,146 @@ +/**************************************************************************//** + \file halSleepTimerClock.h + + \brief Definition for count out requested sleep interval. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + 7/04/09 A. Khromykh - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALSLEEPTIMERCLOCK_H +#define _HALSLEEPTIMERCLOCK_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define SLEEPTIMER_CLOCK 32768lu + +#if defined(SLEEP_PRESCALER_1) + #define SLEEPTIMER_DIVIDER 1ul + #define SLEEPTIMER_PRESCALER (1u << CS20) // No prescaling +#elif defined(SLEEP_PRESCALER_8) + #define SLEEPTIMER_DIVIDER 8ul + #define SLEEPTIMER_PRESCALER (1u << CS21) // clk/8 +#elif defined(SLEEP_PRESCALER_32) + #define SLEEPTIMER_DIVIDER 32ul + #define SLEEPTIMER_PRESCALER ((1u << CS20) | (1u << CS21)) // clk/32 +#elif defined(SLEEP_PRESCALER_64) + #define SLEEPTIMER_DIVIDER 64ul + #define SLEEPTIMER_PRESCALER (1u << CS22) // clk/64 +#elif defined(SLEEP_PRESCALER_128) + #define SLEEPTIMER_DIVIDER 128ul + #define SLEEPTIMER_PRESCALER ((1u << CS20) | (1u << CS22)) // clk/128 +#elif defined(SLEEP_PRESCALER_256) + #define SLEEPTIMER_DIVIDER 256ul + #define SLEEPTIMER_PRESCALER ((1u << CS21) | (1u << CS22)) // clk/256 +#elif defined(SLEEP_PRESCALER_1024) + #define SLEEPTIMER_DIVIDER 1024ul + #define SLEEPTIMER_PRESCALER ((1u << CS20) | (1u << CS21) | (1u << CS22)) // clk/1024 +#endif + +#define HAL_ASSR_FLAGS ((1 << TCN2UB) | (1 << OCR2AUB) | (1 << OCR2BUB) | (1 << TCR2AUB) | (1 << TCR2BUB)) +// to write some value for correct work of the asynchronous timer +#define SOME_VALUE_FOR_SYNCHRONIZATION 0x44 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Starts the sleep timer clock. +******************************************************************************/ +void halStartSleepTimerClock(void); + +/****************************************************************************** +Stops the sleep timer clock. +******************************************************************************/ +void halStopSleepTimerClock(void); + +/****************************************************************************** +Sets interval. +Parameters: + value - contains number of ticks which the timer must count out. +Returns: + none. +******************************************************************************/ +void halSetSleepTimerInterval(uint32_t value); + +/****************************************************************************** +Returns the sleep timer frequency in Hz. +Parameters: + none. +Returns: + the sleep timer frequency in Hz. +******************************************************************************/ +uint32_t halSleepTimerFrequency(void); + +/**************************************************************************//** +\brief Clear timer control structure +******************************************************************************/ +void halClearTimeControl(void); + +/**************************************************************************//** +\brief Wake up procedure for all external interrupts +******************************************************************************/ +void halWakeupFromIrq(void); + +/**************************************************************************//** +\brief Get time of sleep timer. + +\return + time in ms. +******************************************************************************/ +uint32_t halGetTimeOfSleepTimer(void); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/****************************************************************************** +Disables the sleep timer interrupt. +Parameters: + none. +Returns: + none. +******************************************************************************/ +INLINE void halDisableSleepTimerInt(void) +{ + // Disables 8-bit Timer/Counter2 compare channel A and overflow interrupt + TIMSK2 &= (~(1 << OCIE2A) & ~(1 << TOIE2)); +} + +/****************************************************************************** + Interrupt handler signal implementation +******************************************************************************/ +INLINE void halInterruptSleepClock(void) +{ + halPostTask0(HAL_ASYNC_TIMER); +} + +/****************************************************************************** + Interrupt handler signal implementation +******************************************************************************/ +INLINE void halSynchronizeSleepTime(void) +{ + halPostTask0(HAL_SYNC_SLEEP_TIME); +} + +#endif /* _HALSLEEPTIMERCLOCK_H */ +// eof halSleepTimerClock.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h new file mode 100644 index 00000000..59ab72c8 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h @@ -0,0 +1,180 @@ +/*****************************************************************************//** +\file halSpi.h + +\brief Declarations of USART SPI mode. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/06/07 E. Ivanov - Created +**********************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +#ifndef _HALSPI_H +#define _HALSPI_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define SPI_CHANNEL_0 USART_CHANNEL_0 // USART0 AtMega1281/2561 start addresss +#define SPI_CHANNEL_1 USART_CHANNEL_1 // USART1 AtMega1281/2561 start addresss + +/****************************************************************************** + Types section +******************************************************************************/ +// spi channel +typedef UsartChannel_t SpiChannel_t; + +// types of the clock mode +typedef enum +{ + // leading edge sample RX bit (rising), trailing edge setup TX bit (falling). + SPI_CLOCK_MODE0, + // leading edge setup TX bit (rising), trailing edge sample RX bit (falling). + SPI_CLOCK_MODE1, + // leading edge sample RX bit (falling), trailing edge setup TX bit (rising). + SPI_CLOCK_MODE2, + // leading edge setup TX bit (falling), trailing edge sample RX bit (rising). + SPI_CLOCK_MODE3 +} SpiClockMode_t; + +// clock rate +typedef enum +{ + SPI_CLOCK_RATE_62 = ((F_CPU / (2 * 62500ul)) - 1), + SPI_CLOCK_RATE_125 = ((F_CPU / (2 * 125000ul)) - 1), + SPI_CLOCK_RATE_250 = ((F_CPU / (2 * 250000ul)) - 1), + SPI_CLOCK_RATE_500 = ((F_CPU / (2 * 500000ul)) - 1), + SPI_CLOCK_RATE_1000 = ((F_CPU / (2 * 1000000ul)) - 1), + SPI_CLOCK_RATE_2000 = ((F_CPU / (2 * 2000000ul)) - 1) +} SpiBaudRate_t; + +// Data order +typedef enum +{ + SPI_DATA_MSB_FIRST, // data with MSB first + SPI_DATA_LSB_FIRST // data with LSB first +} SpiDataOrder_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Disables USART channel. +Parameters: + tty - spi channel. +******************************************************************************/ +void halClearUsartSpi(SpiChannel_t tty); + +/****************************************************************************** +Write a length bytes to the SPI. +Parameters: + tty - spi channel + buffer - pointer to application data buffer; + length - number bytes for transfer; +Returns: + number of written bytes +******************************************************************************/ +uint16_t halSyncUsartSpiWriteData(SpiChannel_t tty, uint8_t *buffer, uint16_t length); + +/****************************************************************************** +Write & read a length bytes to & from the SPI. +Parameters: + tty - spi channel + buffer - pointer to application data buffer; + length - number bytes for transfer; +Returns: + number of written & read bytes +******************************************************************************/ +uint16_t halSyncUsartSpiReadData(SpiChannel_t tty, uint8_t *buffer, uint16_t length); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/****************************************************************************** +Enables data register empty interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halEnableUsartSpiDremInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) |= (1 << UDRIE0); +} + +/****************************************************************************** +Disables data register empty interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halDisableUsartSpiDremInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) &= ~(1 << UDRIE0); +} + +/****************************************************************************** +Enables transmit complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halEnableUsartSpiTxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) |= (1 << TXCIE0); +} + +/****************************************************************************** +Disables transmit complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halDisableUsartSpiTxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) &= ~(1 << TXCIE0); +} + +/***************************************************************************** +Enables receive complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halEnableUsartSpiRxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) |= (1 << RXCIE0); +} + +/***************************************************************************** +Disables receive complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halDisableUsartSpiRxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) &= ~(1 << RXCIE0); +} +#endif +//eof halSpi.h + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h new file mode 100644 index 00000000..ccdd5e8f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h @@ -0,0 +1,327 @@ +/*****************************************************************************//** +\file halUsart.h + +\brief Declarations of usart hardware-dependent module. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/05/07 E. Ivanov - Created +**********************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HAL_USART_H +#define _HAL_USART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/* if USART_DOUBLE_SPEED is 1 the USART uses U2Xn bit (Double speed the usart transmition). + if USART_DOUBLE_SPEED is 0 then U2Xn bit is not been used. + */ +#ifndef USART_DOUBLE_SPEED + #define USART_DOUBLE_SPEED 1ul +#endif + +#define USART_CHANNEL_0 0xC0 // USART0 AtMega1281/2561 start address +#define USART_CHANNEL_1 0xC8 // USART1 AtMega1281/2561 start address + +#if NUM_USART_CHANNELS == 2 + #define HAL_GET_INDEX_BY_CHANNEL(channel) ((channel - USART_CHANNEL_0) >> 3) +#else + #define HAL_GET_INDEX_BY_CHANNEL(channel) (channel - channel) +#endif + +#define UCSRnA(tty) MMIO_BYTE(tty + 0) +#define UCSRnB(tty) MMIO_BYTE(tty + 1) +#define UCSRnC(tty) MMIO_BYTE(tty + 2) +#define UBRRnL(tty) MMIO_BYTE(tty + 4) +#define UBRRnH(tty) MMIO_BYTE(tty + 5) +#define UBRRn(tty) MMIO_WORD(tty + 4) +#define UDRn(tty) MMIO_BYTE(tty + 6) + +/****************************************************************************** + Types section +******************************************************************************/ +// usart channel +typedef uint8_t UsartChannel_t; + +// clock rate of usart +typedef enum +{ + USART_BAUDRATE_1200 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 1200ul) - 1ul), // 1200 baud rate + USART_BAUDRATE_2400 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 2400ul) - 1ul), // 2400 baud rate + USART_BAUDRATE_4800 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 4800ul) - 1ul), // 4800 baud rate + USART_BAUDRATE_9600 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 9600ul) - 1ul), // 9600 baud rate + USART_BAUDRATE_19200 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 19200ul) - 1ul), // 19200 baud rate + USART_BAUDRATE_38400 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 38400ul) - 1ul), // 38400 baud rate + USART_BAUDRATE_115200 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 115200ul)), // 115200 baud rate + USART_SYNC_BAUDRATE_1200 = (uint16_t)((F_CPU / (2ul * 1200ul)) - 1ul), + USART_SYNC_BAUDRATE_2400 = (uint16_t)((F_CPU / (2ul * 2400ul)) - 1ul), + USART_SYNC_BAUDRATE_4800 = (uint16_t)((F_CPU / (2ul * 4800ul)) - 1ul), + USART_SYNC_BAUDRATE_9600 = (uint16_t)((F_CPU / (2ul * 9600ul)) - 1ul), + USART_SYNC_BAUDRATE_38400 = (uint16_t)((F_CPU / (2ul * 38400ul)) - 1ul), + USART_SYNC_BAUDRATE_57600 = (uint16_t)((F_CPU / (2ul * 57600ul)) - 1ul), + USART_SYNC_BAUDRATE_115200 = (uint16_t)((F_CPU / (2ul * 115200ul)) - 1ul) +} UsartBaudRate_t; + +// usart data length +typedef enum +{ + USART_DATA5 = (0 << UCSZ12) | (0 << UCSZ11) | (0 << UCSZ10), // 5 bits data length + USART_DATA6 = (0 << UCSZ12) | (0 << UCSZ11) | (1 << UCSZ10), // 6 bits data length + USART_DATA7 = (0 << UCSZ12) | (1 << UCSZ11) | (0 << UCSZ10), // 7 bits data length + USART_DATA8 = (0 << UCSZ12) | (1 << UCSZ11) | (1 << UCSZ10), // 8 bits data length +} UsartData_t; + +// parity mode +typedef enum +{ + USART_PARITY_NONE = (0 << UPM11) | (0 << UPM10), // Non parity mode + USART_PARITY_EVEN = (1 << UPM11) | (0 << UPM10), // Even parity mode + USART_PARITY_ODD = (1 << UPM11) | (1 << UPM10) // Odd parity mode +} UsartParity_t; + +// number of stop bits +typedef enum +{ + USART_STOPBIT_1 = (0 << USBS1), // 1 stop bits mode + USART_STOPBIT_2 = (1 << USBS1) // 2 stop bits mode +} UsartStopBits_t; + +// USART task IDs. +typedef enum +{ + #if defined(HAL_USE_USART_CHANNEL_0) + HAL_USART_TASK_USART0_DRE, + HAL_USART_TASK_USART0_TXC, + HAL_USART_TASK_USART0_RXC, + #if defined(_USE_USART_ERROR_EVENT_) + HAL_USART_TASK_USART0_ERR, + #endif + #endif + + #if defined(HAL_USE_USART_CHANNEL_1) + HAL_USART_TASK_USART1_DRE, + HAL_USART_TASK_USART1_TXC, + HAL_USART_TASK_USART1_RXC, + #if defined(_USE_USART_ERROR_EVENT_) + HAL_USART_TASK_USART1_ERR, + #endif + #endif + + HAL_USART_TASKS_NUMBER +} HalUsartTaskId_t; + +// Defines edge of clock to sample data. +/* +------------------------------------------------------------------------------------ +| | Transmitted Data Changed (Output | Received Data Sampled (Input on | +| | of TxDn Pin) | RxDn Pin) | +|------------|-----------------------------------|---------------------------------- +|FALLING_EDGE| Rising XCKn Edge | Falling XCKn Edge | +|RISING_EDGE | Falling XCKn Edge | Rising XCKn Edge | +------------------------------------------------------------------------------------ +*/ +typedef enum +{ + USART_EDGE_MODE_FALLING = 0, + USART_EDGE_MODE_RISING = 1 +} UsartEdgeMode_t; + +// USART synchronization mode. +typedef enum +{ + USART_MODE_ASYNC = ((0 << UMSEL01) | (0 << UMSEL00)), + USART_MODE_SYNC = ((0 << UMSEL01) | (1 << UMSEL00)) +} UsartMode_t; + +// clck is output in master mode else input +typedef enum +{ + USART_CLK_MODE_MASTER = 0, + USART_CLK_MODE_SLAVE = 1 +} UsartClkMode_t; + +#if defined(_USE_USART_ERROR_EVENT_) + // usart receiver error reason + typedef enum + { + FRAME_ERROR, + DATA_OVERRUN, + PARITY_ERROR + } UsartErrorReason_t; +#endif + +// usart control +typedef struct +{ + volatile uint16_t txPointOfRead; + volatile uint16_t txPointOfWrite; + volatile uint16_t rxPointOfRead; + volatile uint16_t rxPointOfWrite; + volatile uint16_t rxBytesInBuffer; + uint8_t usartShiftRegisterEmpty; +#if defined(_USE_USART_ERROR_EVENT_) + uint8_t errorReason; +#endif +} HalUsartService_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Puts the byte received to the cyclic buffer. + +\param[in] + tty - channel number. +\param[in] + data - data to put. +******************************************************************************/ +void halUsartRxBufferFiller(UsartChannel_t tty, uint8_t data); + +/**************************************************************************//** +\brief Checks the channel number. + +\param[in] + channel - channel to be verified. + +\return + true if channel is possible, \n + false otherwise. +******************************************************************************/ +bool halIsUsartChannelCorrect(UsartChannel_t channel); + +#if defined(_USE_USART_ERROR_EVENT_) +/**************************************************************************//** +\brief Save status register for analyzing of the error reason. + +\param[in] + tty - channel number. +\param[in] + status - usart status register. +******************************************************************************/ +void halUsartSaveErrorReason(UsartChannel_t tty, uint8_t status); +#endif + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** + \brief Disables USART channel + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halCloseUsart(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALCLOSEUSART_0); + UCSRnB(tty) = 0x00; +} + +/**************************************************************************//** + \brief Enables data register empty interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halEnableUsartDremInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALENABLEUSARTDREMINTERRUPT_0); + UCSRnB(tty) |= (1 << UDRIE1); +} + +/**************************************************************************//** + \brief Disables data register empty interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halDisableUsartDremInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALDISABLEUSARTDREMINTERRUPT_0); + UCSRnB(tty) &= ~(1 << UDRIE1); +} + +/**************************************************************************//** + \brief Enables transmit complete interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halEnableUsartTxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALENABLEUSARTTXCINTERRUPT_0); + UCSRnB(tty) |= (1 << TXCIE1); +} + +/**************************************************************************//** + \brief Disables transmit complete interrupt + + \param tty - number of USART channel. + return none. +******************************************************************************/ +INLINE void halDisableUsartTxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALDISABLEUSARTTXCINTERRUPT_0); + UCSRnB(tty) &= ~(1 << TXCIE1); +} + +/**************************************************************************//** + \brief Enables receive complete interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halEnableUsartRxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALENABLEUSARTRXCINTERRUPT_0); + UCSRnB(tty) |= (1 << RXCIE0); +} + +/**************************************************************************//** + \brief Disables receive complete interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halDisableUsartRxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALDISABLEUSARTRXCINTERRUPT_0); + UCSRnB(tty) &= ~(1 << RXCIE0); +} + +/**************************************************************************//** + \brief Puts byte to data register of USART + + \param tty - number of USART channel. + data - byte to send. + \return none. +******************************************************************************/ +INLINE void halSendUsartByte(UsartChannel_t tty, uint8_t data) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALSENDUSARTBYTE_0); + UCSRnA(tty) |= (1 << TXC1); // clear transmite complete flag + UDRn(tty) = data; +} + +#endif /* _HAL_USART_H */ +//eof halUsart.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h new file mode 100644 index 00000000..46c66fd7 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h @@ -0,0 +1,93 @@ +/***************************************************************************//** + \file halW1.h + + \brief Declarations of 1-wire hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALW1_H +#define _HALW1_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief i2c 1-wire status */ +typedef enum +{ + /** \brief There is no device on the bus */ + W1_NO_DEVICE_STATUS, + /** \brief At least one device is on the bus */ + W1_SUCCESS_STATUS, + /** \brief Invalid CRC was read during the device search operation */ + W1_INVALID_CRC +} W1Status_t; + +/***************************************************************************//** +\brief Reads byte from the bus. + +\return + byte read from the bus. +*******************************************************************************/ +uint8_t halReadW1(void); + +/***************************************************************************//** +\brief Reads bit from the bus. + +\return + Read bit is placed to position of last significant bit. +*******************************************************************************/ +uint8_t halReadW1Bit(void); + +/***************************************************************************//** +\brief Writes bit to the bus. + +\param[in] + value - to write. The bit is placed to position of last significant bit. +*******************************************************************************/ +void halWriteW1bit(uint8_t value); + +/***************************************************************************//** +\brief Writes byte to the bus + +\param[in] + value - byte to write. +*******************************************************************************/ +void halWriteW1(uint8_t value); + +/***************************************************************************//** +\brief Resets all devices connected to the bus. + +\return + 0 - there are some devices at the bus. \n + 1 - there are not any devices at the bus. +*******************************************************************************/ +uint8_t halResetW1(void); + +/**************************************************************************//** +\brief Performs delay in microseconds + +\param[in] + delay - number of microseconds to be delay +******************************************************************************/ +void __delay_us(uint8_t delay); + +#endif /* _HALW1_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h new file mode 100644 index 00000000..bdf3ee27 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h @@ -0,0 +1,53 @@ +/**************************************************************************//** + \file halWdt.h + + \brief Declarations of wdt hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/10/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALWDT_H +#define _HALWDT_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(__ICCAVR__) + +/** Enable the watch dog timer with a specific timeout value */ +#define wdt_enable(timeout) do { \ + uint8_t volatile sreg_temp = SREG; \ + cli(); \ + __watchdog_reset(); \ + WDTCSR |= (1 << WDCE) | (1 << WDE); \ + WDTCSR = (1 << WDE) | timeout; \ + SREG = sreg_temp; \ +} while (0) + +#define wdt_disable() MCUSR = 0; \ + WDTCSR |= (1 << WDCE) | (1 << WDE); \ + WDTCSR = 0x00; + +#endif + +#endif /* _HALWDT_H */ + +//eof halWdt.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h new file mode 100644 index 00000000..79e6b2e6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h @@ -0,0 +1,185 @@ +/***************************************************************************//** + \file i2c.h + + \brief Declarations of i2c interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _I2C_H +#define _I2C_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief TWI status codes. */ +enum +{ + TWS_BUSERROR = 0x00, + TWS_START = 0x08, + TWS_RSTART = 0x10, + TWS_MT_SLA_ACK = 0x18, + TWS_MT_SLA_NACK = 0x20, + TWS_MT_DATA_ACK = 0x28, + TWS_MT_DATA_NACK = 0x30, + TWS_M_ARB_LOST = 0x38, + TWS_MR_SLA_ACK = 0x40, + TWS_MR_SLA_NACK = 0x48, + TWS_MR_DATA_ACK = 0x50, + TWS_MR_DATA_NACK = 0x58 +}; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Inits TWI module. Setup the speed of TWI. +\param[in] + i2cMode - the speed of TWI. +******************************************************************************/ +void halInitI2c(HAL_i2cMode_t *i2cMode); + +/**************************************************************************//** +\brief Notification about the start condition was sent. +******************************************************************************/ +void halSendStartDoneI2c(void); + +/**************************************************************************//** +\brief Notification that byte was written to the TWI. +\param[in] + result - contains result of previous operation. +******************************************************************************/ +void halWriteDoneI2c(void); + +/**************************************************************************//** +\brief Notification that byte was read from the TWI. +\param[in] + data - contains byte that was read. +******************************************************************************/ +void halReadDoneI2c(uint8_t data); + +/**************************************************************************//** +\brief Notification that last byte was read from the TWI. Needs send STOP condition +on bus. +\param[in] + data - contains byte that was read. +******************************************************************************/ +void halReadLastByteDoneI2c(uint8_t data); + +/**************************************************************************//** +\brief Notification that address byte was written to the TWI and was read ACK. +Starts reading data. +******************************************************************************/ +void halMasterReadWriteAddressAckI2c(void); + +/**************************************************************************//** +\brief Resets TWI bus and i2c HAL. +******************************************************************************/ +void halI2cBusReset(void); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief Loop for waiting for end of stop condition on bus. +******************************************************************************/ +INLINE void halWaitEndOfStopStation(void) +{ + loop_until_bit_is_clear(TWCR, TWSTO); +} + +/**************************************************************************//** +\brief Enables interrupt on TWI. +******************************************************************************/ +INLINE void halInterruptEnableI2c(void) +{ + TWCR |= (1 << TWIE); +} + +/**************************************************************************//** +\brief Disables interrupt on TWI. +******************************************************************************/ +INLINE void halInterruptDisableI2c(void) +{ + TWCR &= (~(1 << TWIE)); +} + +/*************************************************************************//** +\brief Returns byte that was read from the TWI. +******************************************************************************/ +INLINE uint8_t halReadByteI2c(void) +{ + return TWDR; +} + +/*************************************************************************//** +\brief Resets the TWI. +******************************************************************************/ +INLINE void halResetI2c(void) +{ + TWCR = ((1 << TWSTO) | (1 << TWINT)); // Reset TWI +} + +/**************************************************************************//** +\brief Begins writing an byte to TWI. +\param[in] + data - an byte for sending. +******************************************************************************/ +INLINE void halWriteI2c(uint8_t data) +{ + TWDR = data; + TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWIE); +} + +/**************************************************************************//** +\brief Begins read an byte from TWI. +\param[in] + ack - defines the need to send ACK after an byte was recieved. +******************************************************************************/ +INLINE void halReadI2c(bool ack) +{ + if (ack) + TWCR |= (1 << TWEA); + else + TWCR &= ~(1 << TWEA); + + TWCR |= ((1 << TWINT) | (1 << TWIE) | (1 << TWEN)); // Trigger the TWI +} + +/**************************************************************************//** +\brief Directs TWI to send stop condition. +******************************************************************************/ +INLINE void halSendStopI2c(void) +{ + TWCR = ((1 << TWSTO) | (1 << TWINT) | (1 << TWEN)); +} + +/**************************************************************************//** +\brief Directs the TWI to send start condition. +******************************************************************************/ +INLINE void halSendStartI2c(void) +{ + TWCR = ((1 << TWSTA) | (1 <> 8) & 0x7F) != 90) +#error This file should only be assembled by aa90 or aavr +#endif + +#define A90_PROC_OPTION ((__TID__ >> 4) & 0x0F) + +/* Long or relative jumps and calls */ +#if (A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 1) +#define XCALL RCALL +#define XJMP RJMP +#else +#define XCALL CALL +#define XJMP JMP +#endif + +/* Length of pointer registers (X/Y/Z) */ +#if (A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 2) +#define A90_POINTER_REG_SIZE 1 +#define A90_TINY_INDEX +#else /*!(A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 2)*/ +#if (A90_PROC_OPTION == 1) || (A90_PROC_OPTION == 3) || (A90_PROC_OPTION ==5) +#define A90_POINTER_REG_SIZE 2 +#else /*!(A90_PROC_OPTION == 1) || (A90_PROC_OPTION == 3) || (A90_PROC_OPTION ==5)*/ +#if (A90_PROC_OPTION == 4) || (A90_PROC_OPTION == 6) +#define A90_POINTER_REG_SIZE 3 +#define A90_EXTENDED_DATA +#else /*!(A90_PROC_OPTION == 4) || (A90_PROC_OPTION == 6)*/ +#error Unknown processor option!! +#endif /*!(A90_PROC_OPTION == 4) || (A90_PROC_OPTION == 6)*/ +#endif /*!(A90_PROC_OPTION == 1) || (A90_PROC_OPTION == 3) || (A90_PROC_OPTION ==5)*/ +#endif /*!(A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 2)*/ + +#if (A90_PROC_OPTION > 4) +#define A90_LARGE_CODE +#endif + +#if (A90_PROC_OPTION > 1) +#define A90_HAS_POSSIBLE_ELPM +#endif + +#ifdef A90_HAS_POSSIBLE_ELPM +#ifdef __HAS_ELPM__ +#define A90_HAS_ELPM +#else +#ifndef SMALL_FLASH +#define A90_HAS_ELPM +#endif +#endif +#endif + +#if A90_PROC_OPTION > 1 +#define A90_24BIT_GENERIC +#endif + +#if A90_PROC_OPTION < 2 +#define A90_16BIT_GENERIC +#endif + +#ifdef __MEMORY_MODEL__ + +#define TINY_MEMORY_MODEL 0 +#define SMALL_MEMORY_MODEL 1 +#define LARGE_MEMORY_MODEL 2 + +#if __MEMORY_MODEL__ == 1 +#undef MEMORY_MODEL +#define MEMORY_MODEL TINY_MEMORY_MODEL +#endif + +#if __MEMORY_MODEL__ == 2 +#undef MEMORY_MODEL +#define MEMORY_MODEL SMALL_MEMORY_MODEL +#endif + +#if __MEMORY_MODEL__ == 3 +#undef MEMORY_MODEL +#define MEMORY_MODEL LARGE_MEMORY_MODEL +#endif + +#else + +#ifdef MEMORY_MODEL +#define t 0 +#define s 1 +#define l 2 + +#define TINY_MEMORY_MODEL 0 +#define SMALL_MEMORY_MODEL 1 +#define LARGE_MEMORY_MODEL 2 + +#if MEMORY_MODEL == t +#undef MEMORY_MODEL +#define MEMORY_MODEL TINY_MEMORY_MODEL +#endif + +#if MEMORY_MODEL == s +#undef MEMORY_MODEL +#define MEMORY_MODEL SMALL_MEMORY_MODEL +#endif + +#if MEMORY_MODEL == l +#undef MEMORY_MODEL +#define MEMORY_MODEL LARGE_MEMORY_MODEL +#endif + +#undef t +#undef s +#undef l +#endif +#endif + +/* Register nicknames */ +#define T0 R0 +#define T1 R1 +#define T2 R2 +#define T3 R3 +#define P0 R16 +#define P1 R17 +#define P2 R18 +#define P3 R19 +#define Q0 R20 +#define Q1 R21 +#define Q2 R22 +#define Q3 R23 +#define X0 R26 +#define X1 R27 +#define X2 R25 +#define Y0 R28 +#define Y1 R29 +#define Z0 R30 +#define Z1 R31 +#define Z2 R19 + +/* I/O-Space Register nicknames */ +#define RAMPD 0x38 +#define RAMPX 0x39 +#define RAMPY 0x3A +#define RAMPZ 0x3B +#define EIND 0x3C +#define SREG 0x3F diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c new file mode 100644 index 00000000..7d59a5e0 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c @@ -0,0 +1,141 @@ +/**************************************************************************//** + \file calibration.c + + \brief the calibration of the internal RC generator. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define INTERNAL_CLOCK F_CPU + +// low frequency oscillator clock for 1 cycle measurement +#define EXTERNAL_TICKS 1 +// mcu clocks number of one procedure measurement +#define CYCLE_LENGTH 7 +// stability crystal oscillator frequency +#define REFERENCE_CLOCK (32768/1024) +// Etalon mcu clock number for 1 ticks of 32 Hz asynchronous timer +#define REFERENCE_COUNT (INTERNAL_CLOCK * EXTERNAL_TICKS) / (REFERENCE_CLOCK * CYCLE_LENGTH) +// up direction +#define UP_DIRECT 2 +// down direction +#define DOWN_DIRECT 1 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Calculates number of cycles during EXTERNAL_TICKS period. +Parameters: + none +Returns: + number of the cycles. +******************************************************************************/ +uint16_t halMeasurement(void); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Performs calibration of the internal RC generator. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void halCalibrateInternalRc(void) +{ + uint16_t count; + uint8_t cycles = 0x80; + uint16_t counterGate = REFERENCE_COUNT; + uint8_t direct = 0; + + do + { + // perform clock measurement + count = halMeasurement(); + if (count > REFERENCE_COUNT) + { + if ((counterGate < (count - REFERENCE_COUNT)) && (UP_DIRECT == direct)) + { // previous measurement was more correct + OSCCAL--; + NOP; + break; + } + OSCCAL--; + NOP; + counterGate = count - REFERENCE_COUNT; + direct = DOWN_DIRECT; + } + + if (count < REFERENCE_COUNT) + { + if ((counterGate < (REFERENCE_COUNT - count)) && (DOWN_DIRECT == direct)) + { // previous measurement was more exactly + OSCCAL++; + NOP; + break; + } + OSCCAL++; + NOP; + counterGate = REFERENCE_COUNT - count; + direct = UP_DIRECT; + } + + if (REFERENCE_COUNT == count) + break; + + } while (--cycles); +} + +/****************************************************************************** +Performs calibration of the main clock generator. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void HAL_CalibrateMainClock(void) +{ + if (INTERNAL_RC == halGetClockSource()) + halCalibrateInternalRc(); +} + +/****************************************************************************** +Starts calibration after program starting or waking up from power down. +******************************************************************************/ +void halStartingCalibrate(void) +{ + uint16_t i; + + for (i = 0; i < 5000; i++) + { /* wait for 1 second start up low frequency generator*/ + __delay_us(200); // 200 us + } + HAL_CalibrateMainClock(); +} +// eof calibration.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90 new file mode 100644 index 00000000..ce20e615 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90 @@ -0,0 +1,250 @@ +;---------------------------------------------------------------------------- +; +; This module contains the AVR C and EC++ startup +; routine and must usually be tailored to suit +; customer's hardware. +; +; File version: $Revision: 1.13 $ +; +;---------------------------------------------------------------------------- +#include + +;---------------------------------------------------------------------------- +; Set up the INTVEC segment with a reset vector +;---------------------------------------------------------------------------- + MODULE ?RESET + + COMMON INTVEC:CODE:ROOT(1) ; Align at an even address + + EXTERN ?BC_STARTUP + PUBLIC __bitcloud_start + PUBLIC ?RESET + + ORG $0 +__bitcloud_start: +?RESET: + XJMP ?BC_STARTUP + + ENDMOD + +;---------------------------------------------------------------------------- +; Forward declarations of segments used in initialization +;---------------------------------------------------------------------------- + RSEG CSTACK:DATA:NOROOT(0) + RSEG RSTACK:DATA:NOROOT(0) + +;---------------------------------------------------------------------------- +; Perform C initialization +;---------------------------------------------------------------------------- + MODULE ?BC_STARTUP + + EXTERN __low_level_init + EXTERN __segment_init +#ifdef _ECLIB_ECPP + EXTERN __call_ctors +#endif /* _ECLIB_ECPP */ + EXTERN main + EXTERN exit + EXTERN _exit + ; jump NULL handler + EXTERN halWdtInit + +;---------------------------------------------------------------------------- +; If the return address stack is located in external SRAM, make sure that +; you have uncommented the correct code in __low_level_init!!! +;---------------------------------------------------------------------------- + RSEG CODE:CODE:NOROOT(1) + PUBLIC ?BC_STARTUP + PUBLIC __RESTART + EXTERN ?RESET + +__RESTART: +?BC_STARTUP: + XCALL halWdtInit ; call stop wdt, read reset reason and jump NULL handler + +#if A90_POINTER_REG_SIZE > 2 + PUBLIC ?zero_reg_initialization + +?zero_reg_initialization: + CLR R15 + OUT RAMPD,R15 +#endif + + REQUIRE ?SETUP_STACK + REQUIRE ?RESET + + RSEG CODE:CODE:NOROOT(1) + PUBLIC __RSTACK_in_external_ram + +__RSTACK_in_external_ram: + LDI R16,0xC0 + OUT 0x35,R16 ;Enable the external SRAM with a wait state + + RSEG CODE:CODE:NOROOT(1) + PUBLIC __RSTACK_in_external_ram_new_way + EXTERN __?XMCRA + +__RSTACK_in_external_ram_new_way: + LDI R16,0x8C ;SRE=1,SRL2=0,SRL1=0,SRL0=0,SRW11=1,SRW10=1,SRW01=0,SRW00=0 + STS __?XMCRA,R16 ;Enable the external SRAM with maximum wait state. + +;---------------------------------------------------------------------------- +; Set up the CSTACK and RSTACK pointers. +;---------------------------------------------------------------------------- + RSEG CODE:CODE:NOROOT(1) + ;; Fill up stacks with repeated pattern 0xCD (same pattern is used by IAR stack gauge) +?FILL_RSTACK: + LDI R16, 0xCD + LDI X0, LOW(SFB(RSTACK)) + LDI Y0, LOW(SFE(RSTACK)) +#if A90_POINTER_REG_SIZE > 1 + LDI X1, HIGH(SFB(RSTACK)) + LDI Y1, HIGH(SFE(RSTACK)) +#else + LDI X1, 0 + LDI Y1, 0 +#endif +?FILL_RSTACK_LOOP: + ST X+, R16 + CP X0, Y0 + CPC X1, Y1 + BRNE ?FILL_RSTACK_LOOP + +?FILL_CSTACK: + LDI X0, LOW(SFB(CSTACK)) + LDI Y0, LOW(SFE(CSTACK)) +#if A90_POINTER_REG_SIZE > 1 + LDI X1, HIGH(SFB(CSTACK)) + LDI Y1, HIGH(SFE(CSTACK)) +#else + LDI X1, 0 + LDI Y1, 0 +#endif +?FILL_CSTACK_LOOP: + ST X+, R16 + CP X0, Y0 + CPC X1, Y1 + BRNE ?FILL_CSTACK_LOOP + +?SETUP_STACK: + ;; Return address stack (RSTACK) + LDI R16,LOW(SFE(RSTACK)-1) + OUT 0x3D,R16 +#if A90_POINTER_REG_SIZE > 1 + LDI R16,HIGH(SFE(RSTACK)-1) + OUT 0x3E,R16 +#endif + + ;; Data stack (CSTACK) + LDI Y0,LOW(SFE(CSTACK)) +#if A90_POINTER_REG_SIZE > 1 +#if MEMORY_MODEL == TINY_MEMORY_MODEL + LDI Y1,0 +#else + LDI Y1,HIGH(SFE(CSTACK)) +#endif +#if A90_POINTER_REG_SIZE > 2 + LDI Z0,HWRD(SFB(CSTACK)) + OUT RAMPY,Z0 +#endif +#endif + +#if A90_POINTER_REG_SIZE > 2 +; Nothing here, the things previously here has been done earlier. +#else + REQUIRE ?call_low_level_init + +;---------------------------------------------------------------------------- +; Clear R15 so that it can be used as zero register by the code generator. +; The compiler will emit a "REQUIRE ?zero_reg_initialization" statement if +; this optimization has been enabled. +;---------------------------------------------------------------------------- + RSEG CODE:CODE:NOROOT(1) + PUBLIC ?zero_reg_initialization + +?zero_reg_initialization: + CLR R15 + +;---------------------------------------------------------------------------- +; Call __low_level_init to do low level initializatons. Modify the supplied +; __low_level_init module to add your own initialization code or to +; remove segment initialization (by returning 0). +;---------------------------------------------------------------------------- + RSEG CODE:CODE:NOROOT(1) +#endif + PUBLIC ?call_low_level_init + +?call_low_level_init: + XCALL __low_level_init + + REQUIRE ?cstartup_call_main + +;---------------------------------------------------------------------------- +; Call __segment_init to initialize segments. +;---------------------------------------------------------------------------- + RSEG CODE:CODE:NOROOT(1) + PUBLIC ?need_segment_init + +?need_segment_init: + TST P0 + BREQ ?skip_segment_init + XCALL __segment_init +?skip_segment_init: + +;---------------------------------------------------------------------------- +; Call the constructors of all global objects. This code will only +; be used if any EC++ modules defines global objects that need to +; have its constructor called before main. +;---------------------------------------------------------------------------- +#ifdef _ECLIB_ECPP + RSEG DIFUNCT:CODE:NOROOT(0) + RSEG CODE:CODE:NOROOT(1) + + PUBLIC ?call_ctors + +?call_ctors: +#ifdef __HAS_ELPM__ + LDI P0,LOW(SFB(DIFUNCT)) + LDI P1,LOW(SFB(DIFUNCT) >> 8) + LDI P2,SFB(DIFUNCT) >> 16 + + LDI Q0,LOW(SFE(DIFUNCT)) + LDI Q1,LOW(SFE(DIFUNCT) >> 8) + LDI Q2,SFE(DIFUNCT) >> 16 +#else + LDI P0,LOW(SFB(DIFUNCT)) + LDI P1,SFB(DIFUNCT) >> 8 + + LDI P2,LOW(SFE(DIFUNCT)) + LDI P3,SFE(DIFUNCT) >> 8 +#endif + + XCALL __call_ctors +#endif /* _ECLIB_ECPP */ + +;---------------------------------------------------------------------------- +; Call main +;---------------------------------------------------------------------------- + RSEG CODE:CODE:NOROOT(1) + + PUBLIC ?cstartup_call_main + +?cstartup_call_main: + XCALL main + XCALL exit + XJMP _exit + + END + +;---------------------------------------------------------------------------- +; $Log: cstartup.s90 $ +; Revision 1.13 2005/02/09 16:34:50Z IPEO +; Revision 1.12 2005/02/09 12:12:46Z IPEO +; Revision 1.11 2005/02/09 11:32:04Z IPEO +; Revision 1.10 2005/01/26 13:56:34Z IPEO +; Revision 1.9 2005/01/17 15:24:14Z IPEO +; Revision 1.8 2003/11/07 16:34:04Z IPEO +; Revision 1.7 2003/09/04 13:48:25Z IPEO +; Revision 1.6 2003/08/22 14:09:09Z IPEO +; Revision 1.5 2003/08/22 08:54:09Z IPEO +; Revision 1.4 2003/08/20 08:38:55Z IPEO diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c new file mode 100644 index 00000000..b9e19a0b --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c @@ -0,0 +1,163 @@ +/**************************************************************************//** + \file halAdc.c + + \brief Implementation of hardware depended ADC interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define ALL_CHANNEL_MASK 0x1F +#define CHANNEL_MASK_1 0x01 +#define CHANNEL_MASK_2 0x03 +#define CHANNEL_MASK_3 0x04 +#define CHANNEL_MASK_4 0x0C +#define DELAY_FOR_STABILIZE 125 + +/****************************************************************************** + Constants section +******************************************************************************/ +#if F_CPU == 4000000 + PROGMEM_DECLARE(const uint8_t halAdcDivider[5]) = {2, 3, 4, 5, 6}; +#elif F_CPU == 8000000 + PROGMEM_DECLARE(const uint8_t halAdcDivider[5]) = {3, 4, 5, 6, 7}; +#endif + +/****************************************************************************** + Global variables section +******************************************************************************/ +static volatile uint8_t halAdcResolution = RESOLUTION_8_BIT; +static volatile void *halAdcDataPointer = NULL; +static volatile uint16_t halAdcCurCount = 0; +static volatile uint16_t halAdcMaxCount = 0; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Initializations the ADC. +Parameters: + param - pointer to parameter structure +Returns: + none. +******************************************************************************/ +void halOpenAdc(HAL_AdcParams_t *param) +{ + halAdcMaxCount = param->selectionsAmount; + halAdcResolution = param->resolution; + halAdcDataPointer = param->bufferPointer; + + /* sets voltage reference */ + ADMUX = param->voltageReference; + /* Enable left adjust result */ + if (RESOLUTION_8_BIT == halAdcResolution) + ADMUX |= (1 << ADLAR); + + uint8_t tmp; + memcpy_P(&tmp, &(halAdcDivider[param->sampleRate]), 1); + ADCSRA = tmp | (1 << ADEN); +} + +/****************************************************************************** +Starts convertion on the ADC channel. +Parameters: + channel - channel number. +Returns: + none. +******************************************************************************/ +void halStartAdc(uint8_t channel) +{ + halAdcCurCount = 0; + /* disable digital buffers */ + if (HAL_ADC_CHANNEL3 >= channel) + { + DIDR0 = (1 << channel); + } + else + { + if ((HAL_ADC_DIFF_CHANNEL0 == channel) || (HAL_ADC_DIFF_CHANNEL2 == channel)) + DIDR0 = CHANNEL_MASK_1; + else if ((HAL_ADC_DIFF_CHANNEL1 == channel) || (HAL_ADC_DIFF_CHANNEL3 == channel)) + DIDR0 = CHANNEL_MASK_2; + else if ((HAL_ADC_DIFF_CHANNEL4 == channel) || (HAL_ADC_DIFF_CHANNEL6 == channel)) + DIDR0 = CHANNEL_MASK_3; + else if ((HAL_ADC_DIFF_CHANNEL5 == channel) || (HAL_ADC_DIFF_CHANNEL7 == channel)) + DIDR0 = CHANNEL_MASK_4; + } + + uint8_t tmp = ADMUX & ALL_CHANNEL_MASK; + + /* clear previous channel number */ + ADMUX &= ~ALL_CHANNEL_MASK; + /* set current channel number */ + ADMUX |= channel; + + /* if new differential channel is settled then must make 125 us delay for gain stabilize. */ + if ((tmp != channel) && (HAL_ADC_CHANNEL3 < channel)) + __delay_us(DELAY_FOR_STABILIZE); + + if (halAdcMaxCount > 1) + ADCSRA |= ((1 << ADIE) | (1 << ADATE) | (1 << ADSC)); // Starts running mode + else + ADCSRA |= ((1 << ADIE) | (1 << ADSC)); // Starts one conversion +} + +/****************************************************************************** +Closes the ADC. +Parameters: + none +Returns: + none +******************************************************************************/ +void halCloseAdc(void) +{ + ADMUX = 0; + ADCSRA = 0; + // Digital input enable + DIDR0 = 0; +} + +/****************************************************************************** +ADC conversion complete interrupt handler. +******************************************************************************/ +ISR(ADC_vect) +{ + BEGIN_MEASURE + // Read ADC conversion result + if (RESOLUTION_8_BIT == halAdcResolution) + ((uint8_t *)halAdcDataPointer)[halAdcCurCount++] = ADCH; + else + ((uint16_t *)halAdcDataPointer)[halAdcCurCount++] = ADC; + + if (halAdcCurCount == halAdcMaxCount) + { + // Disable ADC Interrupt + ADCSRA &= ~(1 << ADIE); + halSigAdcInterrupt(); + } + END_MEASURE(HALISR_ADC_TIME_LIMIT) +} +// eof halAdc.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c new file mode 100644 index 00000000..c462b896 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c @@ -0,0 +1,124 @@ +/**************************************************************************//** + \file halAppClock.c + + \brief Implementation of appTimer hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Global variables section +******************************************************************************/ +static uint32_t halAppTime = 0ul; // time of application timer +uint8_t halAppTimeOvfw = 0; +static volatile uint8_t halAppIrqCount = 0; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Initialization appTimer clock. +******************************************************************************/ +void halInitAppClock(void) +{ + OCR4A = TOP_TIMER_COUNTER_VALUE; // 1 millisecond timer interrupt interval. + TCCR4B = (1 << WGM12); // CTC mode + halStartAppClock(); // clock source is cpu divided by 8 + TIMSK4 |= (1 << OCIE4A); // Enable TC4 interrupt +} + +/****************************************************************************** +Return time of sleep timer. + +Returns: + time in ms. +******************************************************************************/ +uint32_t halGetTimeOfAppTimer(void) +{ + halAppSystemTimeSynchronize(); + return halAppTime; +} + +/****************************************************************************** +Return system time in us + +Parameters: + mem - memory for system time +Returns: + none. +******************************************************************************/ +void halGetSystemTimeUs(uint64_t *mem) +{ +#if (F_CPU == 4000000ul) + *mem = 1000ul * halAppTime + (TCNT4 << 1); +#endif +#if (F_CPU == 8000000ul) + *mem = 1000ul * halAppTime + TCNT4; +#endif +} + +/**************************************************************************//** +\brief Takes account of the sleep interval. + +\param[in] + interval - time of sleep +******************************************************************************/ +void halAdjustSleepInterval(uint32_t interval) +{ + halAppTime += interval; + halPostTask4(HAL_TIMER4_COMPA); +} + +/**************************************************************************//** +Synchronization system time which based on application timer. +******************************************************************************/ +void halAppSystemTimeSynchronize(void) +{ + uint8_t tmpCounter; + uint32_t tmpValue; + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + tmpCounter = halAppIrqCount; + halAppIrqCount = 0; + END_MEASURE(HAL_APP_TIMER_SYNCHRONIZE_LIMIT) + ATOMIC_SECTION_LEAVE + + tmpValue = tmpCounter * HAL_APPTIMERINTERVAL; + halAppTime += tmpValue; + if (halAppTime < tmpValue) + halAppTimeOvfw++; +} + +/****************************************************************************** +Interrupt handler +******************************************************************************/ +ISR(TIMER4_COMPA_vect) +{ + BEGIN_MEASURE + halAppIrqCount++; + halPostTask4(HAL_TIMER4_COMPA); + // infinity loop spy + SYS_InfinityLoopMonitoring(); + END_MEASURE(HALISR_TIMER4_COMPA_TIME_LIMIT) +} +// eof halAppClock.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s new file mode 100644 index 00000000..a6332b7d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s @@ -0,0 +1,79 @@ +/**************************************************************************//** + \file halCalibration.s + + \brief Implementation of measurement of mcu clock. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/10/08 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** +Calculates number of cycles during EXTERNAL_TICKS period. +Parameters: + none +Returns: + number of the cycles (r25:r24). +******************************************************************************/ +.global halMeasurement +.type halMeasurement,@function +halMeasurement: + push r21 + + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + + ; local copy cnt + push r28 + push r29 + ldi r28, 0 ; cnt = 0 + ldi r29, 0 ; cnt = 0 + + ; r21 = TCNT2 + push r23 ; save SREG to stack, to clear r23 + lds r21, 0x00B2 + ; while(TCNT2 == r21); + __l0: + lds r23, 0x00B2 + cp r23, r21 + breq __l0 + + ; r23++ + inc r23 + + ; measurement + __l1: + adiw r28, 0x01 ; cnt ++ (2 cycle) + lds r21, 0x00B2 ; read TCNT2 + cp r21, r23 ; if (TCNT2 == TCNT2old) + brne __l1 ; + + pop r23 ; load SREG from stack + + ; return cnt + movw r24, r28 + + pop r29 + pop r28 + + ; Restore SREG + out 0x3F, r23 + pop r23 + pop r21 + ret + +; eof halCalibration.s diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90 new file mode 100644 index 00000000..cbdb8d13 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90 @@ -0,0 +1,80 @@ +/**************************************************************************//** + \file halCalibration.s90 + + \brief Implementation of measurement of mcu clock. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/10/08 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/*============================================================= +Calculates number of cycles during EXTERNAL_TICKS period. +Parameters: + none +Returns: + number of the cycles (r17:r16). +===============================================================*/ +PUBLIC halMeasurement +RSEG CODE +halMeasurement: + push r21 + + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + + ; local copy cnt + push r28 + push r29 + ldi r28, 0 ; cnt = 0 + ldi r29, 0 ; cnt = 0 + + ; r21 = TCNT2 + push r23 ; save SREG to stack, to clear r23 + lds r21, 0x00B2 + ; while(TCNT2 == r21); + __l0: + lds r23, 0x00B2 + cp r23, r21 + breq __l0 + + ; r23++ + inc r23 + + ; measurement + __l1: + adiw r28, 0x01 ; cnt ++ (2 cycle) + lds r21, 0x00B2 ; read TCNT2 + cp r21, r23 ; if (TCNT2 == TCNT2old) + brne __l1 ; + + pop r23 ; load SREG from stack + + ; return cnt + movw r16, r28 + + pop r29 + pop r28 + + ; Restore SREG + out 0x3F, r23 + pop r23 + pop r21 + ret + +; eof halCalibration.s90 +END diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c new file mode 100644 index 00000000..e6f968d1 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c @@ -0,0 +1,122 @@ +/**************************************************************************//** + \file halClkCtrl.c + + \brief Implementation of clock control module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + 16/04/09 A. Khromykh - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +/****************************************************************************** + Define(s) section +******************************************************************************/ +// defines fuse mask for RC oscillator +#define HAL_RC_OSCILLATOR_CLOCK 0x02 +// mask for CKSEL bits +#define HAL_CKSEL_MASK 0x0F + +/****************************************************************************** + Prototypes section +******************************************************************************/ +void halStartingCalibrate(void); + +/****************************************************************************** + Global variables section +******************************************************************************/ +static volatile ClkSource_t clkClockSource; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Initialization system clock. +******************************************************************************/ +void halInitFreq(void) +{ + uint8_t lowFuseByte; + + // wait for end of eeprom writing + while (EECR & (1 << EEPE)); + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + lowFuseByte = SF_GET_LOW_FUSES(); + END_MEASURE(HALATOM_SETLOWFUSES_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + + if (HAL_RC_OSCILLATOR_CLOCK == (lowFuseByte & HAL_CKSEL_MASK)) + clkClockSource = INTERNAL_RC; + else + clkClockSource = OTHER_SOURCE; + + if (INTERNAL_RC == clkClockSource) + { + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + ASM ( + "push r21 \n\t" + + "ldi r21, 0x80 \n\t" /* CLKPR = 1 << CLKPCE */ + "sts 0x0061, r21 \n\t" /* CLKPR = 1 << CLKPCE */ + +#if (F_CPU == 4000000ul) + "ldi r21, 0x01 \n\t" /* CLKPR = 1 << CLKPS0 (1 cycle) */ + "sts 0x0061, r21 \n\t" /* CLKPR = 1 << CLKPS0 (2 cycle) */ +#endif +#if (F_CPU == 8000000ul) + "ldi r21, 0x00 \n\t" /* CLKPR = 0 (1 cycle) */ + "sts 0x0061, r21 \n\t" /* CLKPR = 0 (2 cycle) */ +#endif + + "pop r21 \n\t" + ); + + END_MEASURE(HALATOM_INITFREQ_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + halStartingCalibrate(); + } +} + +/**************************************************************************//** +\brief Return clock source + +\return + clock source. +******************************************************************************/ +ClkSource_t halGetClockSource(void) +{ + return clkClockSource; +} + +/**************************************************************************//** +\brief System clock. + +\return + system clock in Hz. +******************************************************************************/ +uint32_t HAL_ReadFreq(void) +{ + return (uint32_t)F_CPU; +} + +// eof halClkCtrl.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c new file mode 100644 index 00000000..0dfda94e --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c @@ -0,0 +1,66 @@ +/**************************************************************************//** + \file halEeprom.c + + \brief Implementation of the hardware dependent the EEPROM module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Writes a byte to EEPROM. +Parameters: + EECRMask - mask that define capability of interrupt after byte writing. + address - address of byte + data - data. +Returns: + none. +******************************************************************************/ +void halEepromWrite(uint8_t EECRMask, uint16_t address, uint8_t data) +{ + while (EECR & (1 << EEPE)); // wait for completion of previous eeprom write + while (SPMCSR & (1 << SPMEN)); // wait for completion of previous program memory write + EEAR = address; + EEDR = data; + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + EECR = EECRMask; + EECR |= (1 << EEPE); + END_MEASURE(HALISR_EEPROM_WRITE_TIME_LIMIT) + ATOMIC_SECTION_LEAVE +} + +/****************************************************************************** +Interrupt handler. +******************************************************************************/ +ISR(EE_READY_vect) +{ + BEGIN_MEASURE + EECR &= ~(1 << EERIE); //disable interrupt + halSigEepromReadyInterrupt(); + END_MEASURE(HALISR_EEPROM_READY_TIME_LIMIT) +} + +// eof helEeprom.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c new file mode 100644 index 00000000..593e6257 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c @@ -0,0 +1,71 @@ +/**************************************************************************//** + \file halInit.c + + \brief HAL start up module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Reads uid from external devices. +******************************************************************************/ +void halReadUid(void); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Performs start up HAL initialization. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void HAL_Init(void) +{ + /* Init first diagnostic timer */ +#ifdef MEASURE + TCCR5B = (1 << CS50); +#endif + + HAL_InitRfSpi(); + /* start sleep time */ + halStartSleepTimerClock(); + /* initialization work frequency & + * start calibration */ + halInitFreq(); + /* Reads unique ID */ + halReadUid(); + /* initialization and start application timer */ + halInitAppClock(); + /* initialization dtr interrupt */ + halSetIrqConfig(IRQ_4, IRQ_LOW_LEVEL); + /* global enable interrupt*/ + HAL_EnableInterrupts(); +} +// eof halInit.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c new file mode 100644 index 00000000..b119fe4d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c @@ -0,0 +1,119 @@ +/**************************************************************************//** + \file halIrq.c + + \brief Implementation of HWD IRQ interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Global variables section +******************************************************************************/ +#if defined(PLATFORM_ZIGBIT) + IrqCallback_t IrqCallbackList[HAL_NUM_IRQ_LINES] = {NULL, NULL}; +#else + IrqCallback_t IrqCallbackList[HAL_NUM_IRQ_LINES] = {NULL, NULL, NULL}; +#endif + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Sets configuration of pins and the registers. +Parameters: + irqNumber - number of interrupt. + irqMode - mode of interrupt +Returns: + none. +******************************************************************************/ +void halSetIrqConfig(uint8_t irqNumber, uint8_t irqMode) +{ + uint8_t ui8ShiftCount = (irqNumber - IRQ_4) << 1; + // IRQ pin is input + DDRE &= ~(1 << irqNumber); + PORTE |= (1 << irqNumber); + // Clear previous settings of corresponding interrupt sense control + EICRB &= ~(3 << ui8ShiftCount); + // Setup corresponding interrupt sence control + EICRB |= (irqMode & 0x03) << ui8ShiftCount; + // Clear the INTn interrupt flag + EIFR |= (1 << irqNumber); +} + +/**************************************************************************//** +\brief Clears configuration of pins and the registers. +\param[in] + irqNumber - number of interrupt. +******************************************************************************/ +void halClrIrqConfig(uint8_t irqNumber) +{ + uint8_t ui8ShiftCount = (irqNumber - IRQ_4) << 1; + DDRE &= ~(1 << irqNumber);// IRQ pin is input + PORTE &= ~(1 << irqNumber); // pullup off + EICRB &= ~(3 << ui8ShiftCount); +} + +#if !defined(PLATFORM_ZIGBIT) +/****************************************************************************** + External interrupt 5 handler +******************************************************************************/ +ISR(INT5_vect) +{ + BEGIN_MEASURE + halWakeupFromIrq(); + /* user's callback */ + if (NULL != IrqCallbackList[IRQ_5 - HAL_FIRST_VALID_IRQ]) + IrqCallbackList[IRQ_5 - HAL_FIRST_VALID_IRQ](); + END_MEASURE(HALISR_INT5_VECT_TIME_LIMIT) +} +#endif + +/****************************************************************************** + External interrupt 6 handler +******************************************************************************/ +ISR(INT6_vect) +{ + BEGIN_MEASURE + halWakeupFromIrq(); + /* user's callback */ + if (NULL != IrqCallbackList[IRQ_6 - HAL_FIRST_VALID_IRQ]) + IrqCallbackList[IRQ_6 - HAL_FIRST_VALID_IRQ](); + END_MEASURE(HALISR_INT6_VECT_TIME_LIMIT) +} + +/****************************************************************************** + External interrupt 7 handler +******************************************************************************/ +ISR(INT7_vect) +{ + BEGIN_MEASURE + halWakeupFromIrq(); + /* user's callback */ + if (NULL != IrqCallbackList[IRQ_7 - HAL_FIRST_VALID_IRQ]) + IrqCallbackList[IRQ_7 - HAL_FIRST_VALID_IRQ](); + END_MEASURE(HALISR_INT7_VECT_TIME_LIMIT) +} +// eof irq.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c new file mode 100644 index 00000000..d5cd8a74 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c @@ -0,0 +1,161 @@ +/**************************************************************************//** + \file halPwm.c + + \brief Implementation of hardware depended PWM interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/11/08 A. Taradov - Created + 5/04/11 A.Razinkov - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Implementations section +******************************************************************************/ + +/**************************************************************************//** +\brief Prepare PWM channel access. Determine control registers, ports, pins etc. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halPreparePwmChannelAccess(HAL_PwmDescriptor_t *descriptor) +{ + /* PWM output port and pin determination */ + switch (descriptor->unit) + { + case PWM_UNIT_1: + descriptor->service.DDRn = &DDRB; + descriptor->service.pwmBaseChannelPin = PWM_UNIT_1_BASE_CHANNEL_PIN; + break; + + case PWM_UNIT_3: + descriptor->service.DDRn = &DDRE; + descriptor->service.pwmBaseChannelPin = PWM_UNIT_3_BASE_CHANNEL_PIN; + break; + + /* Invalid PWM unit identifier */ + default: + break; + } + /* PWM control registers determination */ + descriptor->service.COMnx0 = COMNX0_BASE_BIT - (descriptor->channel * COMNX_BITFIELD_SIZE); + descriptor->service.OCRnx = (&OCRnA(descriptor->unit) + (descriptor->channel)); +} + +/**************************************************************************//** +\brief Initializes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. +******************************************************************************/ +void halOpenPwm(HAL_PwmUnit_t pwmUnit) +{ + /* Clear Timer/Counter */ + halMoveWordToRegister(&TCNTn(pwmUnit), 0x0000); + /* Clear Timer/Counter Input Capture register */ + halMoveWordToRegister(&ICRn(pwmUnit), 0x0000); + /* Configure port for normal operation */ + TCCRnA(pwmUnit) = 0x00; + /* Configure PWM mode: phase and frequency correct, TOP = ICRn */ + TCCRnB(pwmUnit) = (1 << WGMn3); +} + +/**************************************************************************//** +\brief Starts PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halStartPwm(HAL_PwmDescriptor_t *descriptor) +{ + /* Force compare on channel to clear output */ + TCCRnC(descriptor->unit) |= (1 << (FOCNX_BASE_BIT - descriptor->channel)); + /* Configure PWM pin as output */ + halMakeOutPwmPin(descriptor); + /* Configure Compare Output Mode for PWM channel */ + TCCRnA(descriptor->unit) |= + ((1 << COMnx1(descriptor)) | (1 << COMnx0(descriptor))); + if (PWM_POLARITY_INVERTED == descriptor->polarity) + TCCRnA(descriptor->unit) &= ~(1 << COMnx0(descriptor)); +} + +/**************************************************************************//** +\brief Stops PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halStopPwm(HAL_PwmDescriptor_t *descriptor) +{ + /* Clean compare register and stop Timer/Counter */ + halMoveWordToRegister(&OCRnx(descriptor), 0x0000); + TCCRnA(descriptor->unit) &= ~((1 << COMnx1(descriptor)) | (1 << COMnx0(descriptor))); + /* Configure PWM pin as intput */ + halMakeInPwmPin(descriptor); +} + +/**************************************************************************//** +\brief Sets base frequency of module. Common for all module channels. + +\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID. +\param [in] top - value for the TOP register. +\param [in] prescaler - clock prescaler. +******************************************************************************/ +void halSetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler) +{ + /* Stop Timer/Counter */ + TCCRnB(pwmUnit) &= ~((1 << CSn2) | (1 << CSn1) | (1 << CSn0)); + /* Set new TOP register (ICRn in our case) */ + halMoveWordToRegister(&ICRn(pwmUnit), top); + /* Initialize Timer/Counter with new TOP value */ + halMoveWordToRegister(&TCNTn(pwmUnit), top); + /* Clear all PWM outputs */ + halMoveWordToRegister(&OCRnA(pwmUnit), 0x0000); + halMoveWordToRegister(&OCRnB(pwmUnit), 0x0000); + halMoveWordToRegister(&OCRnC(pwmUnit), 0x0000); + + /* Run Timer/Counter */ + TCCRnB(pwmUnit) |= prescaler; +} + +/**************************************************************************//** +\brief Sets compare value for the PWM channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halSetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue) +{ + halMoveWordToRegister(&OCRnx(descriptor), cmpValue); +} + +/**************************************************************************//** +\brief Closes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. +******************************************************************************/ +void halClosePwm(HAL_PwmUnit_t pwmUnit) +{ + /* Configure port for normal operation */ + TCCRnA(pwmUnit) = 0x00; + /* Disable PWM and stop timer */ + TCCRnB(pwmUnit) = 0x00; +} + +// eof halPwm.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c new file mode 100644 index 00000000..305dfd39 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c @@ -0,0 +1,297 @@ +/**************************************************************************//** + \file halSleep.c + + \brief Implementation of sleep modes. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/12/09 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Performs calibration of the main clock generator. +******************************************************************************/ +void halStartingCalibrate(void); + +#ifdef _HAL_RF_RX_TX_INDICATOR_ +/**************************************************************************//** +\brief Turn on pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of +the radio transceiver. +******************************************************************************/ +void phyRxTxSwitcherOn(void); + +/**************************************************************************//** +\brief Turn off pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of +the radio transceiver. +******************************************************************************/ +void phyRxTxSwitcherOff(void); + +#endif + +#ifdef _HAL_ANT_DIVERSITY_ +/**************************************************************************//** +\brief Turn on pin 9 (DIG1) and pin 10 (DIG2) to enable antenna select. +******************************************************************************/ +void phyAntennaSwitcherOn(void); + +/**************************************************************************//** +\brief Turn off pin 9 (DIG1) and pin 10 (DIG2) to disable antenna select. +******************************************************************************/ +void phyAntennaSwitcherOff(void); + +#endif // _HAL_ANT_DIVERSITY_ + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern volatile bool halEnableDtrWakeUp; +extern HalSleepControl_t halSleepControl; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static uint32_t halTimeStartOfSleep = 0ul; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Switch on system power. + +\param[in] + wakeupSource - wake up source +******************************************************************************/ +void halPowerOn(const uint8_t wakeupSource) +{ + halSleepControl.wakeupStation = HAL_ACTIVE_MODE; + halSleepControl.wakeupSource = wakeupSource; + + if (INTERNAL_RC == halGetClockSource()) + { + GPIO_RF_SLP_TR_clr(); + } + else + { + GPIO_RF_SLP_TR_make_in(); + TCCR2A &= ~((1 << COM2A1) | (1 << COM2A0)); // no compare + while (ASSR & HAL_ASSR_FLAGS); + } + GPIO_RF_SLP_TR_make_out(); + + #ifdef _HAL_USE_AMPLIFIER_ + // set one on pin. Enable power amplifier. + GPIO_POW_AMPLF_SLP_set(); + #endif + + halPostTask4(HAL_WAKEUP); +} + +/****************************************************************************** +Shutdowns system. + NOTES: + the application should be sure the poweroff will not be + interrupted after the execution of the sleep(). +******************************************************************************/ +void halPowerOff(void) +{ + if (HAL_ACTIVE_MODE == halSleepControl.wakeupStation) + return; // it is a too late to sleep. + + // stop application timer clock + halStopAppClock(); // will be shutdown + if (0ul == halTimeStartOfSleep) + { // start of sleep procedure + // save time of stopping of the application timer + halTimeStartOfSleep = halGetTimeOfSleepTimer(); + } + + #ifdef _HAL_USE_AMPLIFIER_ + // set zero on pin. Disable power amplifier. + GPIO_POW_AMPLF_SLP_clr(); + #endif + + #ifdef _HAL_RF_RX_TX_INDICATOR_ + + // disable front end driver if that is supported + phyRxTxSwitcherOff(); + + #endif + + #ifdef _HAL_ANT_DIVERSITY_ + + // disable antenna diversity switcher + phyAntennaSwitcherOff(); + + #endif + + if (halEnableDtrWakeUp) + { /* enable DTR (irq 4) wake up */ + halEnableIrqInterrupt(IRQ_4); + } /* enable DTR (irq 4) wake up */ + + // wait for end of eeprom writing + halWaitEepromReady(); + + if (INTERNAL_RC == halGetClockSource()) + { + GPIO_RF_SLP_TR_set(); + GPIO_RF_SLP_TR_make_out(); + + if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState) + { // sleep timer is started + SMCR = (1 << SM1) | (1 << SM0) | (1 << SE); // power-save + __SLEEP; + SMCR = 0; + } + else + { + halStopSleepTimerClock(); + SMCR = (1 << SM1) | (1 << SE); // power-down + __SLEEP; + SMCR = 0; + halStartSleepTimerClock(); + halStartingCalibrate(); + } + } + else + { + uint8_t timsk4 = TIMSK4; + uint8_t twcr = TWCR; + uint8_t adcsra = ADCSRA; + TIMSK4 = 0; + TWCR = 0; + ADCSRA = 0; + GPIO_RF_SLP_TR_make_out(); + SMCR = (1 << SM1) | (1 << SM0) | (1 << SE); // power-save + __SLEEP; + SMCR = 0; + TIMSK4 = timsk4; + TWCR = twcr; + ADCSRA = adcsra; + } + + // wait for time about 1 TOSC1 cycle for correct re-entering from power save mode to power save mode + // wait for time about 1 TOSC1 cycle for correct reading TCNT2 after wake up to + OCR2B = SOME_VALUE_FOR_SYNCHRONIZATION; + while (ASSR & HAL_ASSR_FLAGS); +} + +/****************************************************************************** + Prepares system for power-save, power-down. + Power-down the mode is possible only when internal RC is used + Parameters: + none. + Returns: + -1 there is no possibility to power-down system. +******************************************************************************/ +int HAL_Sleep(void) +{ + if (INTERNAL_RC != halGetClockSource()) + { + if (HAL_SLEEP_TIMER_IS_STOPPED == halSleepControl.sleepTimerState) + { // sleep timer isn't started + return -1; + } + GPIO_RF_SLP_TR_make_in(); + + while (ASSR & HAL_ASSR_FLAGS); + if (!(TIMSK2 & (1 << OCIE2A))) + { // compare interrupt is disabled + OCR2A = 0xFF; + while (ASSR & HAL_ASSR_FLAGS); + } + + TCCR2A |= ((1 << COM2A1) | (1 << COM2A0)); // set OC2A on compare + while (ASSR & HAL_ASSR_FLAGS); + TCCR2B |= (1 << FOC2A); // force output to set OC2A + while (ASSR & HAL_ASSR_FLAGS); + TCCR2A &= ~((1 << COM2A1) | (1 << COM2A0)); // no compare + while (ASSR & HAL_ASSR_FLAGS); + TCCR2A |= (1 << COM2A1); // clear OC2A on compare + while (ASSR & HAL_ASSR_FLAGS); + } + + halSleepControl.wakeupStation = HAL_SLEEP_MODE; // the reset of sign of entry to the sleep mode. + while (ASSR & HAL_ASSR_FLAGS); + halPostTask4(HAL_SLEEP); + return 0; +} + +/****************************************************************************** + Handler for task manager. It is executed when system has waked up. +******************************************************************************/ +void halWakeupHandler(void) +{ + uint32_t timeEndOfSleep; + + // save time of stopping of the application timer + timeEndOfSleep = halGetTimeOfSleepTimer(); + + timeEndOfSleep -= halTimeStartOfSleep; // time of sleep + halTimeStartOfSleep = 0ul; + // adjust application timer interval + halAdjustSleepInterval(timeEndOfSleep); + // start application timer clock + halStartAppClock(); + // Wait for when radio will be waked up. + halWaitRadio(); + + #ifdef _HAL_ANT_DIVERSITY_ + + // enable antenna diversity switcher + phyAntennaSwitcherOn(); + + #endif + + #ifdef _HAL_RF_RX_TX_INDICATOR_ + + // enable front end driver if that is supported + phyRxTxSwitcherOn(); + + #endif + + if (HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE == halSleepControl.wakeupSource) + { + if (halSleepControl.callback) + halSleepControl.callback(); + } +} + +/******************************************************************************* + Makes MCU enter Idle mode. +*******************************************************************************/ +void HAL_IdleMode(void) +{ + SMCR = 0x1; + __SLEEP; + SMCR = 0; +} + +// eof sleep.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c new file mode 100644 index 00000000..70038e7f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c @@ -0,0 +1,304 @@ +/**************************************************************************//** + \file halSleepTimer.c + + \brief Module for count out requested sleep interval. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + 7/04/09 A. Khromykh - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define LSB_IN_DWORD(A) ((uint32_t)A & 0x000000FF) +#define MULTIPLY_ON_31d25(A) (((uint32_t)A << 5) - (uint32_t)A + ((uint32_t)A >> 2)) +#define MAX_TIMER_VALUE 0xFF +#define SLEEP_TIMER_ITERATOR (1000ul * 256ul * SLEEPTIMER_DIVIDER / SLEEPTIMER_CLOCK) + +/****************************************************************************** + Types section +******************************************************************************/ +typedef struct +{ + volatile uint16_t interval; // Contains number of timer full interval before will load reminder. + volatile uint8_t remainder; // Contains number of ticks that passed before timer firing +} TimerControl_t; + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern HalSleepControl_t halSleepControl; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static volatile TimerControl_t halTimerControl; +// time of sleep timer in ms. +static uint32_t halSleepTime = 0ul; +// upper byte of sleep time +uint8_t halSleepTimerOvfw = 0; +// interrupt counter +static volatile uint8_t halIrqOvfwCount = 0; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Clear timer control structure +******************************************************************************/ +void halClearTimeControl(void) +{ + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + // clear timer control structure + halTimerControl.remainder = 0; + halTimerControl.interval = 0; + END_MEASURE(HALATOM_CLEAR_TIME_CONTROL_TIME_LIMIT) + ATOMIC_SECTION_LEAVE +} + +/**************************************************************************//** +\brief Wake up procedure for all external interrupts +******************************************************************************/ +void halWakeupFromIrq(void) +{ + if (HAL_SLEEP_MODE == halSleepControl.wakeupStation) + { + halPowerOn(HAL_EXT_IRQ_IS_WAKEUP_SOURCE); + // disable compare match interrupt + TIMSK2 &= ~(1 << OCIE2A); + // clear timer control structure + halClearTimeControl(); + // stop high sleep timer logic + halSleepControl.sleepTimerState = HAL_SLEEP_TIMER_IS_STOPPED; + } +} + +/****************************************************************************** +Starts the sleep timer clock. +******************************************************************************/ +void halStartSleepTimerClock(void) +{ + //1. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2. + halDisableSleepTimerInt(); + //2. Select clock source by setting AS2 as appropriate. + ASSR |= (1 << AS2); // clock source is TOSC1 pin + //3. Write new values to TCNT2, OCR2x, and TCCR2x. + TCNT2 = 0; + TCCR2A = 0x00; // normal operation, OC2A&OC2B disconnected + TCCR2B = 0x00; + OCR2A = 0x00; + //4. To switch to asynchronous operation: Wait for TCN2UB, OCR2xUB, and TCR2xUB. + while (ASSR & HAL_ASSR_FLAGS); + //5. Clear the Timer/Counter2 Interrupt Flags. + TIFR2 = (1 << OCF2A) | (1 << TOV2); + //6. Enable interrupts, if needed. + TCCR2B = SLEEPTIMER_PRESCALER; // start timer + TIMSK2 |= (1 << TOIE2); // enable overflow interrupt +} + +/****************************************************************************** +Stops the sleep timer clock. +******************************************************************************/ +void halStopSleepTimerClock(void) +{ + while (ASSR & HAL_ASSR_FLAGS); + //1. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2. + halDisableSleepTimerInt(); + TCCR2B &= ~SLEEPTIMER_PRESCALER; // Stops the timer + GTCCR |= (1 << PSRASY); // Reset prescaler + while (ASSR & HAL_ASSR_FLAGS); + // switch of oscillator + ASSR &= ~(1 << AS2); +} + +/****************************************************************************** +Sets interval. +Parameters: + value - contains number of ticks which the timer must count out. +Returns: + none. +******************************************************************************/ +void halSetSleepTimerInterval(uint32_t value) +{ + uint8_t currCounter = TCNT2; + uint32_t tempValue = LSB_IN_DWORD(~currCounter); + + if (value > tempValue) + { + value -= tempValue; + // halTimerControl.interval = value / 255 + halTimerControl.interval = value >> 8; + halTimerControl.remainder = value & 0xFF; + } + else + { // enough timer reminder before overflow + currCounter += (uint8_t)value; + // wait for end of synchronization + while (ASSR & HAL_ASSR_FLAGS); + // load compared value + OCR2A = currCounter; + // clear compare interrupt flag + TIFR2 = 1 << OCF2A; + // enable compare match interrupt + TIMSK2 |= (1 << OCIE2A); + } +} + +/****************************************************************************** +Return time of sleep timer. + +Returns: + time in ms. +******************************************************************************/ +uint32_t halGetTimeOfSleepTimer(void) +{ + uint32_t tempValue; + uint8_t tmpCounter; + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + // read interrupt counter + tmpCounter = halIrqOvfwCount; + // read asynchronous counter + tempValue = TCNT2; + // wait for setup asynchronous registers + OCR2B = SOME_VALUE_FOR_SYNCHRONIZATION; + while (ASSR & HAL_ASSR_FLAGS); + if (TIFR2 & (1 << TOV2)) + { // there is issued interrupt + tempValue = TCNT2; + tempValue += MAX_TIMER_VALUE; + } + END_MEASURE(HAL_GET_SLEEP_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + + tempValue += tmpCounter * MAX_TIMER_VALUE; + + #if defined(SLEEP_PRESCALER_1024) + // one tick time 31.25 ms. + return (halSleepTime + MULTIPLY_ON_31d25(tempValue)); + #else + #warning 'to do counting sleep timer for that prescaler' + return (halSleepTime + tempValue * (1000 * SLEEPTIMER_DIVIDER / SLEEPTIMER_CLOCK)); + #endif +} + +/****************************************************************************** +Returns the sleep timer frequency in Hz. +Parameters: + none. +Returns: + frequency. +******************************************************************************/ +uint32_t halSleepTimerFrequency(void) +{ + return (SLEEPTIMER_CLOCK / SLEEPTIMER_DIVIDER); +} + +/**************************************************************************//** +Synchronization system time which based on sleep timer. +******************************************************************************/ +void halSleepSystemTimeSynchronize(void) +{ + uint8_t tmpCounter; + uint32_t tmpValue; + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + tmpCounter = halIrqOvfwCount; + halIrqOvfwCount = 0; + END_MEASURE(HAL_SLEEP_TIMER_SYNCHRONIZE_LIMIT) + ATOMIC_SECTION_LEAVE + + tmpValue = tmpCounter * SLEEP_TIMER_ITERATOR; + halSleepTime += tmpValue; + if (halSleepTime < tmpValue) + halSleepTimerOvfw++; +} + +/****************************************************************************** +Compare interrupt handler. +******************************************************************************/ +ISR(TIMER2_COMPA_vect) +{ + BEGIN_MEASURE + // disable compare match interrupt + TIMSK2 &= ~(1 << OCIE2A); + // nulling for adjusting + halTimerControl.remainder = 0; + if (HAL_SLEEP_MODE == halSleepControl.wakeupStation) + halPowerOn(HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE); + // post task for task manager + if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState) + halInterruptSleepClock(); + END_MEASURE(HALISR_TIMER2_COMPA_TIME_LIMIT) +} + +/****************************************************************************** +Overflow interrupt handler. +******************************************************************************/ +ISR(TIMER2_OVF_vect) +{ + BEGIN_MEASURE + if (0 == halTimerControl.interval) + { + if (0 == halTimerControl.remainder) + { + if (HAL_SLEEP_MODE == halSleepControl.wakeupStation) + halPowerOn(HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE); + // post task for task manager + if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState) + halInterruptSleepClock(); + } + else + { + // wait for end of synchronization + while (ASSR & HAL_ASSR_FLAGS); + // load compared value + OCR2A = halTimerControl.remainder; + // clear compare interrupt flag + TIFR2 = 1 << OCF2A; + // enable compare match interrupt + TIMSK2 |= (1 << OCIE2A); + if (HAL_SLEEP_MODE == halSleepControl.wakeupStation) + HAL_Sleep(); + } + } + else + { + halTimerControl.interval--; + if (HAL_SLEEP_MODE == halSleepControl.wakeupStation) + HAL_Sleep(); + } + + halIrqOvfwCount++; + halSynchronizeSleepTime(); + + END_MEASURE(HALISR_TIMER2_OVF_TIME_LIMIT) +} + +//eof halSleepTimerClock.c + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c new file mode 100644 index 00000000..b0c8bf0a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c @@ -0,0 +1,142 @@ +/**************************************************************************//** +\file halSpi.c + +\brief Implementation of USART SPI mode. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/06/07 E. Ivanov - Created +******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define UDORD0 2 +#define UCPHA0 1 +#define UCPOL0 0 +#define SPI_CLOCK_MODE_AMOUNT 4 +#define SPI_DATA_ORDER_AMOUNT 2 + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Set the parameters of USART to work at SPI mode. +Parameters: + descriptor - pointer to the spi descriptor. +Returns: + none. +******************************************************************************/ +void halSetUsartSpiConfig(HAL_SpiDescriptor_t *descriptor) +{ + uint8_t clockMode[SPI_CLOCK_MODE_AMOUNT] = {((0 << UCPOL0) | (0 << UCPHA0)), + ((0 << UCPOL0) | (1 << UCPHA0)), + ((1 << UCPOL0) | (0 << UCPHA0)), + ((1 << UCPOL0) | (1 << UCPHA0))}; + uint8_t dataOrder[SPI_DATA_ORDER_AMOUNT] = {(0 << UDORD0), + (1 << UDORD0)}; + + // setting of the spi gpio direct + if (SPI_CHANNEL_0 == descriptor->tty) + GPIO_USART0_EXTCLK_make_out(); + else + GPIO_USART1_EXTCLK_make_out(); + + UBRRn(descriptor->tty) = 0; + // Set MSPI mode + UCSRnC(descriptor->tty) = (1 << UMSEL01) | (1 << UMSEL00); + // Set clock mode and data order + UCSRnC(descriptor->tty) |= (dataOrder[descriptor->dataOrder] | clockMode[descriptor->clockMode]); + // Enable receiver and transmitter + UCSRnB(descriptor->tty) = (1 << RXEN0) | (1 << TXEN0); + // Set baud rate + UBRRn(descriptor->tty) = descriptor->baudRate; +} + +/****************************************************************************** +Disables USART channel. +Parameters: + tty - spi channel. +******************************************************************************/ +void halClearUsartSpi(SpiChannel_t tty) +{ + if (SPI_CHANNEL_0 == tty) + GPIO_USART0_EXTCLK_make_in(); + else + GPIO_USART1_EXTCLK_make_in(); + + UCSRnB(tty) = 0x00; // disable +} + +/****************************************************************************** +Write a length bytes to the SPI. +Parameters: + tty - spi channel + buffer - pointer to application data buffer; + length - number bytes for transfer; +Returns: + number of written bytes +******************************************************************************/ +uint16_t halSyncUsartSpiWriteData(SpiChannel_t tty, uint8_t *buffer, uint16_t length) +{ + uint16_t i; + uint8_t temp; + + for (i = 0; i < length; i++) + { + // Wait for empty transmit buffer + while (!(UCSRnA(tty) & (1 << UDRE0))); + // Send data + UDRn(tty) = *(buffer + i); + // Wait for data to be received + while (!(UCSRnA(tty) & (1 << RXC0))); + // receives data to clear received usart buffer + temp = UDRn(tty); + (void)temp; + } + return i; +} + +/****************************************************************************** +Write & read a length bytes to & from the SPI. +Parameters: + tty - spi channel + buffer - pointer to application data buffer; + length - number bytes for transfer; +Returns: + number of written & read bytes +******************************************************************************/ +uint16_t halSyncUsartSpiReadData(SpiChannel_t tty, uint8_t *buffer, uint16_t length) +{ + uint16_t i; + + for (i = 0; i < length; i++) + { + // Wait for empty transmit buffer + while (!(UCSRnA(tty) & (1 << UDRE0))); + // Send data + UDRn(tty) = *(buffer + i); + // Wait for data to be received + while (!(UCSRnA(tty) & (1 << RXC0))); + // Receive data + *(buffer + i) = UDRn(tty); + } + return i; +} + +//end of halSpi.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c new file mode 100644 index 00000000..90388ed0 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c @@ -0,0 +1,190 @@ +/**************************************************************************//** +\file halUsart.c + +\brief Implementation of usart hardware-dependent module. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/05/07 E. Ivanov - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +void halPostUsartTask(HalUsartTaskId_t taskId); + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern volatile bool halEnableDtrWakeUp; +extern void (* dtrWakeUpCallback)(void); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** + \brief Sets USART module parameters. + \param + usartmode - pointer to HAL_UsartDescriptor_t + \return + none. +******************************************************************************/ +void halSetUsartConfig(HAL_UsartDescriptor_t *usartMode) +{ + UCSRnB(usartMode->tty) = 0x00; // disable usart + UBRRn(usartMode->tty) = usartMode->baudrate; // usart speed + + if (USART_MODE_ASYNC == usartMode->mode) + { + UCSRnA(usartMode->tty) = (uint8_t)USART_DOUBLE_SPEED << U2X0; // Double the USART Transmition Speed + UCSRnC(usartMode->tty) = 0x00; + } + else + { + UCSRnA(usartMode->tty) = 0; + UCSRnC(usartMode->tty) = usartMode->edge; // edge select + } + + UCSRnC(usartMode->tty) |= usartMode->mode; + UCSRnC(usartMode->tty) |= usartMode->dataLength; // character size + UCSRnC(usartMode->tty) |= usartMode->parity; // parity mode + UCSRnC(usartMode->tty) |= usartMode->stopbits; // stop bit select + UCSRnA(usartMode->tty) |= (1 << RXC0); // clear receive interrupt + UCSRnB(usartMode->tty) |= (1 << RXEN1) | (1 << TXEN1); // usart enable + UCSRnB(usartMode->tty) |= (1 << RXCIE0) ; // receive interrupt enable +} + +/**************************************************************************//** + \brief The interrupt handler of USART0 - data register is empty. +******************************************************************************/ +ISR(USART0_UDRE_vect) +{ + BEGIN_MEASURE + // We must disable the interrupt because we must "break" context. + halDisableUsartDremInterrupt(USART_CHANNEL_0); + halPostUsartTask(HAL_USART_TASK_USART0_DRE); + END_MEASURE(HALISR_USART0_UDR_TIME_LIMIT) +} + +/**************************************************************************//** + \brief The interrupt handler of USART0 - transmission is completed. +******************************************************************************/ +ISR(USART0_TX_vect) +{ + BEGIN_MEASURE + halDisableUsartTxcInterrupt(USART_CHANNEL_0); + halPostUsartTask(HAL_USART_TASK_USART0_TXC); + END_MEASURE(HALISR_USART0_TX_TIME_LIMIT) +} + +/**************************************************************************//** + \brief The interrupt handler of USART0 - reception is completed. +******************************************************************************/ +ISR(USART0_RX_vect) +{ + BEGIN_MEASURE + uint8_t status = UCSR0A; + uint8_t data = UDR0; + + if (!(status & ((1 << FE0) | (1 << DOR0) | (1 << UPE0)))) + { + halUsartRxBufferFiller(USART_CHANNEL_0, data); + halPostUsartTask(HAL_USART_TASK_USART0_RXC); + } + #if defined(_USE_USART_ERROR_EVENT_) + else // There is an error in the received byte. + { + halUsartSaveErrorReason(USART_CHANNEL_0, status); + halPostUsartTask(HAL_USART_TASK_USART0_ERR); + } + #endif + + END_MEASURE(HALISR_USART0_RX_TIME_LIMIT) +} + +/**************************************************************************//** + \brief The interrupt handler of USART1 - data register is empty. +******************************************************************************/ +ISR(USART1_UDRE_vect) +{ + BEGIN_MEASURE + // We must disable the interrupt because we must "break" context. + halDisableUsartDremInterrupt(USART_CHANNEL_1); + halPostUsartTask(HAL_USART_TASK_USART1_DRE); + END_MEASURE(HALISR_USART1_UDRE_TIME_LIMIT) +} + +/**************************************************************************//** + \brief The interrupt handler of USART1 - transmission is completed. +******************************************************************************/ +ISR(USART1_TX_vect) +{ + BEGIN_MEASURE + halDisableUsartTxcInterrupt(USART_CHANNEL_1); + halPostUsartTask(HAL_USART_TASK_USART1_TXC); + END_MEASURE(HALISR_USART1_TX_TIME_LIMIT) +} + +/**************************************************************************//** + \brief The interrupt handler of USART1 - reception is completed. +******************************************************************************/ +ISR(USART1_RX_vect) +{ + BEGIN_MEASURE + uint8_t status = UCSR1A; + uint8_t data = UDR1; + + if (!(status & ((1 << FE1) | (1 << DOR1) | (1 << UPE1)))) + { + halUsartRxBufferFiller(USART_CHANNEL_1, data); + halPostUsartTask(HAL_USART_TASK_USART1_RXC); + } + #if defined(_USE_USART_ERROR_EVENT_) + else // There is an error in the received byte. + { + halUsartSaveErrorReason(USART_CHANNEL_1, status); + halPostUsartTask(HAL_USART_TASK_USART1_ERR); + } + #endif + END_MEASURE(HALISR_USART1_RX_TIME_LIMIT) +} + +/**************************************************************************//** +/brief External interrupt 4 (DTR) handler +******************************************************************************/ +ISR(INT4_vect) +{ + BEGIN_MEASURE + halWakeupFromIrq(); + + if (halEnableDtrWakeUp) + { /* enable DTR (irq 4) wake up */ + halDisableIrqInterrupt(IRQ_4); + } /* enable DTR (irq 4) wake up */ + + if (NULL != dtrWakeUpCallback) + dtrWakeUpCallback(); + END_MEASURE(HALISR_INT4_TIME_LIMIT) +} +// eof halUsart.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s new file mode 100644 index 00000000..1c76747f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s @@ -0,0 +1,210 @@ +/**************************************************************************//** + \file halW1.s + + \brief Implementation of 1-wire hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +.include "halGccD.h" +.set __w1_port, 0x14 ; PORTG +.set __w1_bit, 5 ; PORTG5 +.set __w1_ddr, 0x13 ; DDRG +.set __w1_pin, 0x12 ; PING + +/*============================================================= + Resets all devices connected to the bus. Function asserts on + the bus reset pulse and detects presence pulse. The result is + contained in r24. + Parameters: + Returns: + W1_SUCCESS_STATUS - If device(s) was(were) detected. + W1_NO_DEVICE_STATUS - If device(s) was(were) not detected. +===============================================================*/ +.global halResetW1 +.type halResetW1,@function +halResetW1: + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + ; Pull down + sbi __w1_ddr, __w1_bit + cbi __w1_port, __w1_bit + ; Reset Low Time (500 us) + ldi r24, 250 + call __delay_us + ldi r24, 250 + call __delay_us + ; Tri-state (external pullup) + cbi __w1_ddr, __w1_bit + ; Presence-Detect Sample Time (70 us) + ldi r24, 70 + call __delay_us + ; Precense-Detect + ldi r24, 0x01 + sbic __w1_pin, __w1_bit + ldi r24, 0x00 + push r24 + ; Tail of Reset High Time + ldi r24, 240 + call __delay_us + pop r24 + ; Restore SREG + out 0x3F, r23 + pop r23 + ret + +/*============================================================= + Reads bit from the bus + Returns: + bit read from the bus in r24 +===============================================================*/ +.global halReadW1Bit +.type halReadW1Bit,@function +halReadW1Bit: + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + ; Pull down + sbi __w1_ddr, __w1_bit + cbi __w1_port, __w1_bit + ; Read Low Time (6 us) + ldi r24, 6 + call __delay_us + ; Tri-state (external pullup) + cbi __w1_ddr, __w1_bit + ; Tail of Read Sample Time (10 us) + ldi r24, 10 + call __delay_us + ; Read Sample + clc + sbic __w1_pin, __w1_bit + sec + rol r24 + ; Tail of Timeslot Duration + push r24 + ldi r24, 100 + call __delay_us + pop r24 + ; Restore SREG + out 0x3F, r23 + pop r23 + ret + +/*============================================================= + Reads byte from the bus + Returns: + byte read from the bus in r24 +===============================================================*/ +.global halReadW1 +.type halReadW1,@function +halReadW1: + push r25 + push r23 + ldi r25, 8 +__read_bit_again: + call halReadW1Bit + ror r24 + ror r23 + dec r25 + tst r25 + brne __read_bit_again + mov r24, r23 + pop r23 + pop r25 + ret + +/*============================================================= + Writes bit to the bus + Parameters: + value - bit that should be written to the bus. +===============================================================*/ +.global halWriteW1bit +.type halWriteW1bit,@function +halWriteW1bit: + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + ; Pull down + cbi __w1_port, __w1_bit + sbi __w1_ddr, __w1_bit + ; Write-1 Low Time + push r24 + ldi r24, 6 + call __delay_us + pop r24 + ; Write bit + ror r24 + brcc __w1_write_zero + ; Write-One -> tri-state (external pullup) + cbi __w1_ddr, __w1_bit +__w1_write_zero: + ; Tail of Timeslot Duration + push r24 + ldi r24, 100 + call __delay_us + pop r24 + ; Tri-state (external pullup) + cbi __w1_ddr, __w1_bit + ; Restore SREG + out 0x3F, r23 + pop r23 + ret + +/*============================================================= + Writes byte to the bus + Parameters: + value - byte that should be written to the bus. +===============================================================*/ +.global halWriteW1 +.type halWriteW1,@function +halWriteW1: + push r25 + ldi r25, 8 +__write_bit_again: + call halWriteW1bit + dec r25 + tst r25 + brne __write_bit_again + pop r25 + ret + +/*============================================================= + Delay in microseconds. + Parameters: + us - delay time in microseconds +===============================================================*/ +.global __delay_us +.type __delay_us,@function +__delay_us: +__w0: +.if FCPU==8000000 + nop + nop + nop + nop +.endif + dec r24 + tst r24 + brne __w0 + ret +; eof halW1.s diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90 new file mode 100644 index 00000000..a12f063d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90 @@ -0,0 +1,211 @@ +/**************************************************************************//** + \file halW1.s90 + + \brief Implementation of 1-wire hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#include +__w1_port VAR 0x14 ; PORTG +__w1_bit VAR 5 ; PORTG5 +__w1_ddr VAR 0x13 ; DDRG +__w1_pin VAR 0x12 ; PING + +/*============================================================= + Resets all devices connected to the bus. Function asserts on + the bus reset pulse and detects presence pulse. The result is + contained in r16. + Parameters: + Returns: + W1_SUCCESS_STATUS - If device(s) was(were) detected. + W1_NO_DEVICE_STATUS - If device(s) was(were) not detected. +===============================================================*/ +PUBLIC halResetW1 +RSEG CODE +halResetW1: + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + ; Pull down + sbi __w1_ddr, __w1_bit + cbi __w1_port, __w1_bit + ; Reset Low Time (500 us) + ldi r16, 250 + call __delay_us + ldi r16, 250 + call __delay_us + ; Tri-state (external pullup) + cbi __w1_ddr, __w1_bit + ; Presence-Detect Sample Time (70 us) + ldi r16, 70 + call __delay_us + ; Precense-Detect + ldi r16, 0x01 + sbic __w1_pin, __w1_bit + ldi r16, 0x00 + push r16 + ; Tail of Reset High Time + ldi r16, 240 + call __delay_us + pop r16 + ; Restore SREG + out 0x3F, r23 + pop r23 + ret + +/*============================================================= + Reads bit from the bus + Returns: + bit read from the bus in r16 +===============================================================*/ +PUBLIC halReadW1Bit +RSEG CODE +halReadW1Bit: + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + ; Pull down + sbi __w1_ddr, __w1_bit + cbi __w1_port, __w1_bit + ; Read Low Time (6 us) + ldi r16, 6 + call __delay_us + ; Tri-state (external pullup) + cbi __w1_ddr, __w1_bit + ; Tail of Read Sample Time (10 us) + ldi r16, 10 + call __delay_us + ; Read Sample + clc + sbic __w1_pin, __w1_bit + sec + rol r16 + ; Tail of Timeslot Duration + push r16 + ldi r16, 100 + call __delay_us + pop r16 + ; Restore SREG + out 0x3F, r23 + pop r23 + ret + +/*============================================================= + Reads byte from the bus + Returns: + byte read from the bus in r16 +===============================================================*/ +PUBLIC halReadW1 +RSEG CODE +halReadW1: + push r25 + push r23 + ldi r25, 8 +__read_bit_again: + call halReadW1Bit + ror r16 + ror r23 + dec r25 + tst r25 + brne __read_bit_again + mov r16, r23 + pop r23 + pop r25 + ret + +/*============================================================= + Writes bit to the bus + Parameters: + value - bit that should be written to the bus. +===============================================================*/ +PUBLIC halWriteW1bit +RSEG CODE +halWriteW1bit: + ; Store SREG + push r23 + in r23, 0x3F + ; Disable interrupts + cli + ; Pull down + cbi __w1_port, __w1_bit + sbi __w1_ddr, __w1_bit + ; Write-1 Low Time + push r16 + ldi r16, 6 + call __delay_us + pop r16 + ; Write bit + ror r16 + brcc __w1_write_zero + ; Write-One -> tri-state (external pullup) + cbi __w1_ddr, __w1_bit +__w1_write_zero: + ; Tail of Timeslot Duration + push r16 + ldi r16, 100 + call __delay_us + pop r16 + ; Tri-state (external pullup) + cbi __w1_ddr, __w1_bit + ; Restore SREG + out 0x3F, r23 + pop r23 + ret + +/*============================================================= + Writes byte to the bus + Parameters: + value - byte that should be written to the bus. +===============================================================*/ +PUBLIC halWriteW1 +RSEG CODE +halWriteW1: + push r25 + ldi r25, 8 +__write_bit_again: + call halWriteW1bit + dec r25 + tst r25 + brne __write_bit_again + pop r25 + ret + +/*============================================================= + Delay in microseconds. + Parameters: + us - delay time in microseconds +===============================================================*/ +PUBLIC __delay_us +RSEG CODE +__delay_us: +__w0: +#if FCPU==8000000 + nop + nop + nop + nop +#endif + dec r16 + tst r16 + brne __w0 + ret +; eof halW1.s +END diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c new file mode 100644 index 00000000..eb2a9dff --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c @@ -0,0 +1,175 @@ +/**************************************************************************//** + \file halWdtInit.c + + \brief Implementation of WDT start up procedure. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define PIN_OUT 62500 +#define MEANING_BITS 0x1F + +/****************************************************************************** + Prototypes section +******************************************************************************/ +#ifdef _SYS_ASSERT_ON_ + INLINE void halJumpNullHandler(void); +#endif + +/****************************************************************************** + Global variables section +******************************************************************************/ +#if defined(__GNUC__) + uint8_t halResetReason __attribute__ ((section (".noinit"))); +#elif defined(__ICCAVR__) + __no_init uint8_t halResetReason; +#endif + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Resets and stops wdt. Saves the reason of reset. +Parameters: + none. +Returns: + none. +******************************************************************************/ +#if defined(__GNUC__) + + void halWdtInit(void) __attribute__ ((naked)) \ + __attribute__ ((section (".init0"))); + + void halWdtInit(void) + { + ASM("clr r1"); +#elif defined(__ICCAVR__) + + __task void halWdtInit(void) + { + ASM("clr r15"); +#else + #error 'Compiler not supported.' +#endif + + if (TEMP_WARM_RESET != halResetReason) + { + halResetReason = MCUSR & MEANING_BITS; + + if (halResetReason & POWER_ON_RESET) + halResetReason = POWER_ON_RESET; + } + else + { + halResetReason = WARM_RESET; + } + MCUSR = 0; + WDTCSR |= (1 << WDCE) | (1 << WDE); + WDTCSR = 0x00; + + #ifdef _SYS_ASSERT_ON_ + halJumpNullHandler(); + #endif + } + +#ifdef _SYS_ASSERT_ON_ +/****************************************************************************** +Jump to NULL handler. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void halJumpNullHandler(void) +{ + if (0 == halResetReason) // was jump on NULL + { + register volatile uint16_t tmp; + tmp = SP; + + ASM ("cli"); + DDRB |= 0xE0; + /* Init UART*/ + UBRR1H = 0; + #if (F_CPU == 4000000ul) + UBRR1L = 12; + #elif (F_CPU == 8000000ul) + UBRR1L = 25; + #endif + UCSR1A = (1 << U2X1); + UCSR1B = (1 << TXEN1); + UCSR1C = (3 << UCSZ10); // 8-bit data + + /* Init timer counter 4.*/ + OCR4A = 0; + /* Disable TC4 interrupt */ + TIMSK4 &= ~(1 << OCIE4A); + /* main clk / 8 */ + TCCR4B = (1 << WGM12) | (1 << CS11); + + while (1) + { + do + { /* Send byte to UART */ + while (!(UCSR1A & (1 << UDRE1))); + UDR1 = *((uint8_t *)SP); + SP++; + } while (RAMEND >= SP); + SP = tmp; + + PORTB |= 0x80; + TCNT4 = 0; + while(TCNT4 < PIN_OUT); + PORTB &= ~0x80; + PORTB |= 0x40; + TCNT4 = 0; + while(TCNT4 < PIN_OUT); + PORTB &= ~0x40; + PORTB |= 0x20; + TCNT4 = 0; + while(TCNT4 < PIN_OUT); + PORTB &= ~0x20; + } + } +} +#endif + +#if defined(__GNUC__) && defined(_REPORT_STATS_) +void halFillStack(void) __attribute__ ((naked, section (".init1"))); +/**************************************************************************//** +\brief Fill cstack with repeated pattern 0xCD +******************************************************************************/ +void halFillStack(void) +{ + extern uint16_t __stack_start; + extern uint16_t __stack; + + for (uint8_t *start = (uint8_t *)&__stack_start; start <= (uint8_t *)&__stack; start++) + *start = 0xCD; +} +#endif + +// eof halWdtInit.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c new file mode 100644 index 00000000..f118194e --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c @@ -0,0 +1,90 @@ +/**************************************************************************//** + \file i2c.c + + \brief Provides the functionality of TWI. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Inits TWI module. Setup teh speed of TWI. +Parameters: + i2cMode - the speed of TWI. +Returns: + none. +******************************************************************************/ +void halInitI2c(HAL_i2cMode_t *i2cMode) +{ + TWCR = 0x00; + TWSR = HAL_I2C_PRESCALER; // prescaler + // Set bit rate + TWBR = i2cMode->clockrate; +} + +/****************************************************************************** +Interrupt handler. +******************************************************************************/ +ISR(TWI_vect) +{ + BEGIN_MEASURE + switch (TWSR & 0xF8) + { + case TWS_START: + case TWS_RSTART: + halSendStartDoneI2c(); + break; + + case TWS_MT_SLA_ACK: + case TWS_MT_DATA_ACK: + halWriteDoneI2c(); + break; + + case TWS_BUSERROR: + case TWS_MT_SLA_NACK: + case TWS_MT_DATA_NACK: + case TWS_MR_SLA_NACK: + halI2cBusReset(); + break; + + case TWS_MR_SLA_ACK: + halMasterReadWriteAddressAckI2c(); + break; + + case TWS_MR_DATA_ACK: + halReadDoneI2c(halReadByteI2c()); + break; + + case TWS_MR_DATA_NACK: + halReadLastByteDoneI2c(halReadByteI2c()); + break; + + default: + break; + } + END_MEASURE(HALISR_TWI_TIME_LIMIT) +} +// eof i2c.c + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c new file mode 100644 index 00000000..d9c5a859 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c @@ -0,0 +1,79 @@ +/**************************************************************************//** + \file wdt.c + + \brief Implementation of WDT interrupt handler. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#include +#include +#include +#include + +/****************************************************************************** + Global variables section +******************************************************************************/ +void (*halWdtCallback)(void) = NULL; + +/******************************************************************************* +Registers WDT fired callback. +Parameters: + wdtCallback - callback. +Returns: + none. +*******************************************************************************/ +void HAL_RegisterWdtCallback(void (*wdtCallback)(void)) +{ + halWdtCallback = wdtCallback; +} + +/******************************************************************************* +Starts WDT with interval. +Parameters: + interval - interval. +Returns: + none. +*******************************************************************************/ +void HAL_StartWdt(HAL_WdtInterval_t interval) +{ + uint8_t i = 0; + + if (halWdtCallback) + i = (1< + +/****************************************************************************** + Types section. +******************************************************************************/ +typedef enum +{ + HAL_RTIMER_REPEAT_MODE = 0, + HAL_RTIMER_ONE_SHOT_MODE = 1, + HAL_RTIMER_STOPPED_MODE = 2, +} HAL_RTimerMode_t; + +typedef struct // Timer description. +{ + volatile HAL_RTimerMode_t mode; // Mode. + volatile uint16_t period; // Period of the timer. + volatile uint16_t nextEvent; // Counter of periods. +} RTimerDescr_t; + +/****************************************************************************** + External variables. +******************************************************************************/ +// Do not use it in other files. +extern RTimerDescr_t __rtimer; + +/****************************************************************************** + Prototypes section. +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer and RF ext. interrupts. +******************************************************************************/ +void HAL_InitMacIsr(void); + +/****************************************************************************** + Starts RTimer. Function should be invoked in critical section. + Parameters: + source - source of invocation. + mode - RTimer mode. + period - RTimer period. +******************************************************************************/ +bool HAL_StartRtimer(HAL_RTimerMode_t mode, uint16_t period); + +/****************************************************************************** + Stops RTimer. Function should be invoked in critical section. +******************************************************************************/ +void HAL_StopRtimer(void); + +#endif /* _HALMACISR_H */ + +// eof halMacIsr.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfCtrl.h new file mode 100644 index 00000000..7b6534d2 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfCtrl.h @@ -0,0 +1,127 @@ +/**************************************************************************//** + \file halRfCtrl.h + + \brief Types and constants declaration for IEEE802.15.4 PHY implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 28/05/07 ALuzhetsky - Created. + 06/08/07 A. Mandychev, E. Ivanov - Modified. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFCTRL_H +#define _HALRFCTRL_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + HAL_FREQ_NOCLK, + HAL_FREQ_1MHZ, + HAL_FREQ_2MHZ, + HAL_FREQ_4MHZ, + HAL_FREQ_8MHZ, + HAL_FREQ_16MHZ +} HalSysFreq_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Delay in us +******************************************************************************/ +void HAL_Delay(uint8_t us); + +/****************************************************************************** + Clears the irq. +******************************************************************************/ +void HAL_ClearRfIrqFlag(void); + +/****************************************************************************** + Enables the irq. +******************************************************************************/ +void HAL_EnableRfIrq(void); + +/****************************************************************************** + Disables the irq. +******************************************************************************/ +uint8_t HAL_DisableRfIrq(void); + +/****************************************************************************** + Sets SLP_TR pin to 1. +******************************************************************************/ +void HAL_SetRfSlpTr(void); + +/****************************************************************************** + Clears SLP_TR pin to 0. +******************************************************************************/ +void HAL_ClearRfSlpTr(void); + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeInRfSlpTr(void); + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeOutRfSlpTr(void); + +/****************************************************************************** + Sets RST_TR pin to 1. +******************************************************************************/ +void HAL_SetRfRst(void); + +/****************************************************************************** + Clears RST_TR pin to 1. +******************************************************************************/ +void HAL_ClearRfRst(void); + +/****************************************************************************** + Init pins that controls RF chip. +******************************************************************************/ +void HAL_InitRfPins(void); + +/****************************************************************************** + Inits Atmega IRQ pin. +******************************************************************************/ +void HAL_InitRfIrq(void); + +/****************************************************************************** + Returns current frequency code. +******************************************************************************/ +HalSysFreq_t HAL_GetRfFreq(void); + +/**************************************************************************//** + \brief Wait for when radio will be waked up. + + \param none. + \return none. +******************************************************************************/ +void halWaitRadio(void); + +/**************************************************************************//** + \brief Enables RX TX indicator for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxTxSwitcher(void); + +#endif /* _HALRFCTRL_H */ + +// eof halRfCtrl.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfPio.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfPio.h new file mode 100644 index 00000000..87ac6c88 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfPio.h @@ -0,0 +1,43 @@ +/**************************************************************************//** + \file halRfPio.h + + \brief AT86RF230 control pins declarations. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFPIO_H +#define _HALRFPIO_H + +#include + +// Macros for the RF_SLP_TR pin manipulation. +HAL_ASSIGN_PIN(RF_SLP_TR, B, 4); +// Macros for the RF_RST pin manipulation. +HAL_ASSIGN_PIN(RF_RST, B, 5); +// Macros for the RF_IRQ pin manipulation. +HAL_ASSIGN_PIN(RF_IRQ, D, 4); +// Macros for the SPI_CS pin manipulation. +HAL_ASSIGN_PIN(SPI_CS, B, 0); +// Macros for the SPI_SCK pin manipulation. +HAL_ASSIGN_PIN(SPI_SCK, B, 1); +// Macros for the SPI_MOSI pin manipulation. +HAL_ASSIGN_PIN(SPI_MOSI, B, 2); +// Macros for the SPI_MISO pin manipulation. +HAL_ASSIGN_PIN(SPI_MISO, B, 3); +// Macros for the RF_TST pin manipulation. +HAL_ASSIGN_PIN(RF_TST, B, 6); +#endif /* _HALRFPIO_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfSpi.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfSpi.h new file mode 100644 index 00000000..663ae50b --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/include/halRfSpi.h @@ -0,0 +1,80 @@ +/***************************************************************************//** + \file halRfSpi.h + + \brief SPI interface routines header. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFSPI_H +#define _HALRFSPI_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Performs initialization of SPI interface. +******************************************************************************/ +void HAL_InitRfSpi(void); + +/****************************************************************************** + Writes/reads byte to/from SPI. + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +uint8_t HAL_WriteByteRfSpi(uint8_t value); + +/****************************************************************************** + Deselects a slave device. +******************************************************************************/ +void HAL_DeselectRfSpi(void); + +/****************************************************************************** + Selects a slave device. +******************************************************************************/ +void HAL_SelectRfSpi(void); + +/****************************************************************************** + Inline function (to use in critical sections) + Writes/reads byte to/from SPI. + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +INLINE uint8_t HAL_WriteByteInlineRfSpi(uint8_t value) +{ + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + SPDR = value; // Write data. + asm("nop"); // This "nop" tunes up the "while" to reduce time for SPIF flag + // detecting. + while (!(SPSR&(1 << SPIF))); + END_MEASURE(HALATOM_WRITEBYTE_RFSPI_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + return SPDR; +} + + +#endif /* _HALRFSPI_H */ + +//eof halRfSpi.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halMacIsr.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halMacIsr.c new file mode 100644 index 00000000..e622372d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halMacIsr.c @@ -0,0 +1,152 @@ +/**************************************************************************//** + \file halMacIsr.c + + \brief mac interrupts implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 14/01/08 A. Mandychev - Created. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(HAL_3d6864MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period >> 1) +#elif defined(HAL_4MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period >> 1) +#elif defined(HAL_7d3728MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period) +#elif defined(HAL_8MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period) +#endif + +/****************************************************************************** + Global variables section +******************************************************************************/ +RTimerDescr_t __rtimer; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer. +******************************************************************************/ +void HAL_InitMacIsr(void); + +/****************************************************************************** + Redirect interrupt event depending on the TrxState. + Parameters: none. + Returns: none. +******************************************************************************/ +void phyDispatcheRTimerEvent(void); + +/****************************************************************************** + Redirect interrupt event depending on the TrxState. + Parameters: none. + Returns: none. +******************************************************************************/ +void phyDispatcheRfInterrupt(void); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer. +******************************************************************************/ +void HAL_InitMacIsr(void) +{ + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; + HAL_InitRfIrq(); +} + +/****************************************************************************** + Starts RTimer. Function should be invoked in critical section. + Parameters: + source - source of invocation. + mode - RTimer mode. + period - RTimer period. +******************************************************************************/ +bool HAL_StartRtimer(HAL_RTimerMode_t mode, uint16_t period) +{ + if (HAL_RTIMER_STOPPED_MODE != __rtimer.mode) + return false; + + __rtimer.period = HAL_RTIMER_INTERVAL_CALCULATE(period); + __rtimer.mode = mode; + __rtimer.nextEvent = TCNT4 + __rtimer.period; + if (__rtimer.nextEvent > TOP_TIMER_COUNTER_VALUE) + __rtimer.nextEvent -= TOP_TIMER_COUNTER_VALUE; + OCR4B = __rtimer.nextEvent; + // clear possible interrupt by setting logical one. + TIFR4 = (1 << OCF4B); + // enable interrupt + TIMSK4 |= (1 << OCIE4B); + return true; +} + +/****************************************************************************** + Stops RTimer. Function should be invoked in critical section. +******************************************************************************/ +void HAL_StopRtimer(void) +{ + // clear possible interrupt + TIFR4 &= ~(1 << OCF4B); + // disable interrupt + TIMSK4 &= ~(1 << OCIE4B); + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; +} + +/****************************************************************************** + Output compare unit (channel B) interrupt handler. +******************************************************************************/ +ISR(TIMER4_COMPB_vect) +{ + BEGIN_MEASURE + if (HAL_RTIMER_ONE_SHOT_MODE == __rtimer.mode) + { + TIMSK4 &= ~(1 << OCIE4B); + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; + } + else + { + __rtimer.nextEvent += __rtimer.period; + if (__rtimer.nextEvent > TOP_TIMER_COUNTER_VALUE) + __rtimer.nextEvent -= TOP_TIMER_COUNTER_VALUE; + OCR4B = __rtimer.nextEvent; + } + phyDispatcheRTimerEvent(); + END_MEASURE(HALISR_TIMER3_COMPA_TIME_LIMIT) +} + +/**************************************************************** + Interrupt service routine. + Do not move this ISR! It could be omitted in your project. +****************************************************************/ +ISR(TIMER1_CAPT_vect) +{ + BEGIN_MEASURE + phyDispatcheRfInterrupt(); + END_MEASURE(HALISR_PHYDISPATCH_RFINT_TIME_LIMIT) +} + +// eof halMacIsr.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfCtrl.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfCtrl.c new file mode 100644 index 00000000..ffbd38b5 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfCtrl.c @@ -0,0 +1,214 @@ +/**************************************************************************//** + \file halRfCtrl.c + + \brief mac pin interface implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 28/05/07 ALuzhetsky - Created. + 06/08/07 A. Mandychev, E. Ivanov - Modified. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define RF_REGISTER_READ_ACCESS_MODE 0x80 +#define RF_REGISTER_TRX_STATUS_ADDRESS 0x01 +#define RF_TRX_OFF_STATE 0x08 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +#ifdef _HAL_RF_RX_TX_INDICATOR_ +/**************************************************************************//** +\brief Turn on pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of +the radio transceiver. +******************************************************************************/ +void phyRxTxSwitcherOn(void); + +#endif //_HAL_RF_RX_TX_INDICATOR_ + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Delay in us +******************************************************************************/ +void HAL_Delay(uint8_t us) +{ + __delay_us(us); +} + +/****************************************************************************** + Clears the irq. +******************************************************************************/ +void HAL_ClearRfIrqFlag(void) +{ + TIFR1 = 1 << ICF1; +} + +/****************************************************************************** + Enables the irq. +******************************************************************************/ +void HAL_EnableRfIrq(void) +{ + TIMSK1 |= 1 << ICIE1; +} + +/****************************************************************************** + Disables the irq. +******************************************************************************/ +uint8_t HAL_DisableRfIrq(void) +{ + uint8_t tmp; + + tmp = TIMSK1 & (1 << ICIE1); + TIMSK1 &= ~(1 << ICIE1); + return tmp; +} + +/****************************************************************************** + Sets SLP_TR pin to 1. +******************************************************************************/ +void HAL_SetRfSlpTr(void) +{ + GPIO_RF_SLP_TR_set(); +} + +/****************************************************************************** + Clears SLP_TR pin to 0. +******************************************************************************/ +void HAL_ClearRfSlpTr(void) +{ + GPIO_RF_SLP_TR_clr(); +} + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeInRfSlpTr(void) +{ + GPIO_RF_SLP_TR_make_in(); +} + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeOutRfSlpTr(void) +{ + GPIO_RF_SLP_TR_make_out(); +} + +/****************************************************************************** + Sets RST_TR pin to 1. +******************************************************************************/ +void HAL_SetRfRst(void) +{ + GPIO_RF_RST_set(); +} + +/****************************************************************************** + Clears RST_TR pin to 1. +******************************************************************************/ +void HAL_ClearRfRst(void) +{ + GPIO_RF_RST_clr(); +} + +/****************************************************************************** + Init pins that controls RF chip. +******************************************************************************/ +void HAL_InitRfPins(void) +{ + GPIO_RF_TST_make_out(); + GPIO_RF_TST_clr(); + + GPIO_RF_SLP_TR_clr(); + GPIO_RF_SLP_TR_make_out(); + + GPIO_RF_RST_set(); + GPIO_RF_RST_make_out(); + + GPIO_RF_IRQ_make_in(); +} + +/****************************************************************************** + Inits Atmega IRQ pin. +******************************************************************************/ +void HAL_InitRfIrq(void) +{ + OCR1A = 0; + TCCR1B = (1 << WGM12) | (1 << CS10); // CTC mode, clock source is not prescaled + TCCR1B |= (1 << ICNC1) | (1 << ICES1); // input noise canceler and rising edge are enabled +} + +/****************************************************************************** + Returns current frequency code. +******************************************************************************/ +HalSysFreq_t HAL_GetRfFreq(void) +{ +/* if (INTERNAL_RC == halGetClockSource()) + { + return HAL_FREQ_NOCLK; + } + else*/ + { + #if (F_CPU == 4000000ul) + return HAL_FREQ_4MHZ; + #endif + #if (F_CPU == 8000000ul) + return HAL_FREQ_8MHZ; + #endif + } +} + +/**************************************************************************//** + \brief Wait for when radio will be waked up. + + \param none. + \return none. +******************************************************************************/ +void halWaitRadio(void) +{ + uint8_t tempValue = 0; + + do { + HAL_SelectRfSpi(); + HAL_WriteByteRfSpi(RF_REGISTER_READ_ACCESS_MODE | RF_REGISTER_TRX_STATUS_ADDRESS); + tempValue = HAL_WriteByteRfSpi(tempValue); + HAL_DeselectRfSpi(); + } while(RF_TRX_OFF_STATE != tempValue); +} + +/**************************************************************************//** + \brief Enables RX TX indicator for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxTxSwitcher(void) +{ + #ifdef _HAL_RF_RX_TX_INDICATOR_ + phyRxTxSwitcherOn(); + #endif //_HAL_RF_RX_TX_INDICATOR_ +} + +//eof halRfCtrl.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfSpi.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfSpi.c new file mode 100644 index 00000000..053ba68a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halRfSpi.c @@ -0,0 +1,90 @@ +/**************************************************************************//** + \file halrfSpi.c + + \brief SPI interface routines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#include +#include + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Performs initialization of SPI interface. +******************************************************************************/ +void HAL_InitRfSpi(void) +{ + GPIO_SPI_CS_set(); + GPIO_SPI_MISO_make_in(); + GPIO_SPI_MOSI_make_out(); + GPIO_SPI_SCK_make_out(); + GPIO_SPI_CS_make_out(); + SPCR = ((1 << SPE) | (1 << MSTR)); // SPI enable, master mode. + SPSR = (1 << SPI2X); // rate = fosc/2 +} + +/****************************************************************************** + Writes/reads byte to/from SPI. CPU clock critical function (4 MHz only). + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +uint8_t HAL_WriteByteRfSpi(uint8_t value) +{ + uint8_t tmp8; + + SPDR = value; // Write data. + asm("nop"); // 1 + asm("nop"); // 2 + asm("nop"); // 3 + asm("nop"); // 4 + asm("nop"); // 5 + asm("nop"); // 5 + asm("nop"); // 7 + asm("nop"); // 8 + asm("nop"); // 9 + asm("nop"); // 10 + asm("nop"); // 11 + asm("nop"); // 12 + asm("nop"); // 13 + asm("nop"); // 14 + asm("nop"); // 15 + asm("nop"); // 16 + asm("nop"); // 17 + tmp8 = SPSR; + (void)tmp8; + return SPDR; +} + +/****************************************************************************** + Deselects a slave device. +******************************************************************************/ +void HAL_DeselectRfSpi(void) +{ + GPIO_SPI_CS_set(); +} + +/****************************************************************************** + Selects a slave device. +******************************************************************************/ +void HAL_SelectRfSpi(void) +{ + GPIO_SPI_CS_clr(); +} + +// eof halrfSpi.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halUid.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halUid.c new file mode 100644 index 00000000..21976ce9 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb230/src/halUid.c @@ -0,0 +1,87 @@ +/**************************************************************************//** + \file halUid.c + + \brief Implementation of UID interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 7/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief uid type. */ +typedef union +{ + uint64_t uid; + uint8_t array[sizeof(uint64_t)]; +} HalUid_t; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HalUid_t halUid = {.uid = 0ull}; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Reads uid from external spi eeprom at25010a. +******************************************************************************/ +void halReadUid(void) +{ + uint8_t command = 0x03; + uint8_t address = 0; + uint8_t itr; + + GPIO_RF_RST_make_out(); + GPIO_RF_RST_clr(); + GPIO_SPI_CS_clr(); + + HAL_WriteByteRfSpi(command); + HAL_WriteByteRfSpi(address); + for (itr=0; itr + +/****************************************************************************** + Types section. +******************************************************************************/ +typedef enum +{ + HAL_RTIMER_REPEAT_MODE = 0, + HAL_RTIMER_ONE_SHOT_MODE = 1, + HAL_RTIMER_STOPPED_MODE = 2, +} HAL_RTimerMode_t; + +typedef struct // Timer description. +{ + volatile HAL_RTimerMode_t mode; // Mode. + volatile uint16_t period; // Period of the timer. + volatile uint16_t nextEvent; // Counter of periods. +} RTimerDescr_t; + +/****************************************************************************** + External variables. +******************************************************************************/ +// Do not use it in other files. +extern RTimerDescr_t __rtimer; + +/****************************************************************************** + Prototypes section. +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer and RF ext. interrupts. +******************************************************************************/ +void HAL_InitMacIsr(void); + +/****************************************************************************** + Starts RTimer. Function should be invoked in critical section. + Parameters: + source - source of invocation. + mode - RTimer mode. + period - RTimer period. +******************************************************************************/ +bool HAL_StartRtimer(HAL_RTimerMode_t mode, uint16_t period); + +/****************************************************************************** + Stops RTimer. Function should be invoked in critical section. +******************************************************************************/ +void HAL_StopRtimer(void); + +#endif /* _HALMACISR_H */ + +// eof halMacIsr.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfCtrl.h new file mode 100644 index 00000000..846b101c --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfCtrl.h @@ -0,0 +1,142 @@ +/**************************************************************************//** + \file halRfCtrl.h + + \brief Types and constants declaration for IEEE802.15.4 PHY implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 28/05/07 ALuzhetsky - Created. + 06/08/07 A. Mandychev, E. Ivanov - Modified. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFCTRL_H +#define _HALRFCTRL_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + HAL_FREQ_NOCLK, + HAL_FREQ_1MHZ, + HAL_FREQ_2MHZ, + HAL_FREQ_4MHZ, + HAL_FREQ_8MHZ, + HAL_FREQ_16MHZ +} HalSysFreq_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Delay in us +******************************************************************************/ +void HAL_Delay(uint8_t us); + +/****************************************************************************** + Clears the irq. +******************************************************************************/ +void HAL_ClearRfIrqFlag(void); + +/****************************************************************************** + Enables the irq. +******************************************************************************/ +void HAL_EnableRfIrq(void); + +/****************************************************************************** + Disables the irq. +******************************************************************************/ +uint8_t HAL_DisableRfIrq(void); + +/****************************************************************************** + Sets SLP_TR pin to 1. +******************************************************************************/ +void HAL_SetRfSlpTr(void); + +/****************************************************************************** + Clears SLP_TR pin to 0. +******************************************************************************/ +void HAL_ClearRfSlpTr(void); + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeInRfSlpTr(void); + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeOutRfSlpTr(void); + +/****************************************************************************** + Sets RST_TR pin to 1. +******************************************************************************/ +void HAL_SetRfRst(void); + +/****************************************************************************** + Clears RST_TR pin to 1. +******************************************************************************/ +void HAL_ClearRfRst(void); + +/****************************************************************************** + Init pins that controls RF chip. +******************************************************************************/ +void HAL_InitRfPins(void); + +/****************************************************************************** + Inits Atmega IRQ pin. +******************************************************************************/ +void HAL_InitRfIrq(void); + +/****************************************************************************** + Returns current frequency code. +******************************************************************************/ +HalSysFreq_t HAL_GetRfFreq(void); + +/**************************************************************************//** + \brief Wait for when radio will be waked up. + + \param none. + \return none. +******************************************************************************/ +void halWaitRadio(void); + +/**************************************************************************//** + \brief Enables RX TX indicator for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxTxSwitcher(void); + +/**************************************************************************//** + \brief Enables Antenna diversity option for radio if that is supported. +******************************************************************************/ +void HAL_InitAntennaDiversity(void); + +/**************************************************************************//** + \brief Enables Antenna diversity in RX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxAntennaDiversity(void); + +/**************************************************************************//** + \brief Enables Antenna diversity in TX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableTxAntennaDiversity(void); + +#endif /* _HALRFCTRL_H */ + +// eof halRfCtrl.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfPio.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfPio.h new file mode 100644 index 00000000..bbce93f4 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfPio.h @@ -0,0 +1,41 @@ +/**************************************************************************//** + \file halRfPio.h + + \brief AT86RF230 control pins declarations. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFPIO_H +#define _HALRFPIO_H + +#include + +// Macros for the RF_SLP_TR pin manipulation. +HAL_ASSIGN_PIN(RF_SLP_TR, B, 4); +// Macros for the RF_RST pin manipulation. +HAL_ASSIGN_PIN(RF_RST, B, 5); +// Macros for the RF_IRQ pin manipulation. +HAL_ASSIGN_PIN(RF_IRQ, D, 0); +// Macros for the SPI_CS pin manipulation. +HAL_ASSIGN_PIN(SPI_CS, B, 0); +// Macros for the SPI_SCK pin manipulation. +HAL_ASSIGN_PIN(SPI_SCK, B, 1); +// Macros for the SPI_MOSI pin manipulation. +HAL_ASSIGN_PIN(SPI_MOSI, B, 2); +// Macros for the SPI_MISO pin manipulation. +HAL_ASSIGN_PIN(SPI_MISO, B, 3); +#endif /* _HALRFPIO_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfSpi.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfSpi.h new file mode 100644 index 00000000..fe3328a6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/include/halRfSpi.h @@ -0,0 +1,79 @@ +/***************************************************************************//** + \file halRfSpi.h + + \brief SPI interface routines header. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFSPI_H +#define _HALRFSPI_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Performs initialization of SPI interface. +******************************************************************************/ +void HAL_InitRfSpi(void); + +/****************************************************************************** + Writes/reads byte to/from SPI. + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +uint8_t HAL_WriteByteRfSpi(uint8_t value); + +/****************************************************************************** + Deselects a slave device. +******************************************************************************/ +void HAL_DeselectRfSpi(void); + +/****************************************************************************** + Selects a slave device. +******************************************************************************/ +void HAL_SelectRfSpi(void); + +/****************************************************************************** + Inline function (to use in critical sections) + Writes/reads byte to/from SPI. + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +INLINE uint8_t HAL_WriteByteInlineRfSpi(uint8_t value) +{ + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + SPDR = value; // Write data. + asm("nop"); // This "nop" tunes up the "while" to reduce time for SPIF flag + // detecting. + while (!(SPSR&(1 << SPIF))); + END_MEASURE(HALATOM_WRITEBYTE_RFSPI_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + return SPDR; +} + +#endif /* _HALRFSPI_H */ + +//eof halRfSpi.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halMacIsr.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halMacIsr.c new file mode 100644 index 00000000..b468cbdf --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halMacIsr.c @@ -0,0 +1,152 @@ +/**************************************************************************//** + \file halMacIsr.c + + \brief mac interrupts implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 14/01/08 A. Mandychev - Created. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(HAL_3d6864MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period >> 1) +#elif defined(HAL_4MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period >> 1) +#elif defined(HAL_7d3728MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period) +#elif defined(HAL_8MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period) +#endif + +/****************************************************************************** + Global variables section +******************************************************************************/ +RTimerDescr_t __rtimer; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer. +******************************************************************************/ +void HAL_InitMacIsr(void); + +/****************************************************************************** + Redirect interrupt event depending on the TrxState. + Parameters: none. + Returns: none. +******************************************************************************/ +void phyDispatcheRTimerEvent(void); + +/****************************************************************************** + Redirect interrupt event depending on the TrxState. + Parameters: none. + Returns: none. +******************************************************************************/ +void phyDispatcheRfInterrupt(void); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer. +******************************************************************************/ +void HAL_InitMacIsr(void) +{ + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; + HAL_InitRfIrq(); +} + +/****************************************************************************** + Starts RTimer. Function should be invoked in critical section. + Parameters: + source - source of invocation. + mode - RTimer mode. + period - RTimer period. +******************************************************************************/ +bool HAL_StartRtimer(HAL_RTimerMode_t mode, uint16_t period) +{ + if (HAL_RTIMER_STOPPED_MODE != __rtimer.mode) + return false; + + __rtimer.period = HAL_RTIMER_INTERVAL_CALCULATE(period); + __rtimer.mode = mode; + __rtimer.nextEvent = TCNT4 + __rtimer.period; + if (__rtimer.nextEvent > TOP_TIMER_COUNTER_VALUE) + __rtimer.nextEvent -= TOP_TIMER_COUNTER_VALUE; + OCR4B = __rtimer.nextEvent; + // clear possible interrupt by setting logical one. + TIFR4 = (1 << OCF4B); + // enable interrupt + TIMSK4 |= (1 << OCIE4B); + return true; +} + +/****************************************************************************** + Stops RTimer. Function should be invoked in critical section. +******************************************************************************/ +void HAL_StopRtimer(void) +{ + // clear possible interrupt + TIFR4 &= ~(1 << OCF4B); + // disable interrupt + TIMSK4 &= ~(1 << OCIE4B); + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; +} + +/****************************************************************************** + Output compare unit (channel B) interrupt handler. +******************************************************************************/ +ISR(TIMER4_COMPB_vect) +{ + BEGIN_MEASURE + if (HAL_RTIMER_ONE_SHOT_MODE == __rtimer.mode) + { + TIMSK4 &= ~(1 << OCIE4B); + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; + } + else + { + __rtimer.nextEvent += __rtimer.period; + if (__rtimer.nextEvent > TOP_TIMER_COUNTER_VALUE) + __rtimer.nextEvent -= TOP_TIMER_COUNTER_VALUE; + OCR4B = __rtimer.nextEvent; + } + phyDispatcheRTimerEvent(); + END_MEASURE(HALISR_TIMER3_COMPA_TIME_LIMIT) +} + +/**************************************************************** + Interrupt service routine. + Do not move this ISR! It could be omitted in your project. +****************************************************************/ +ISR(INT0_vect) +{ + BEGIN_MEASURE + phyDispatcheRfInterrupt(); + END_MEASURE(HALISR_PHYDISPATCH_RFINT_TIME_LIMIT) +} + +// eof halMacIsr.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfCtrl.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfCtrl.c new file mode 100644 index 00000000..c21a9784 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfCtrl.c @@ -0,0 +1,257 @@ +/**************************************************************************//** + \file halRfCtrl.c + + \brief mac pin interface implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 28/05/07 ALuzhetsky - Created. + 06/08/07 A. Mandychev, E. Ivanov - Modified. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define RF_REGISTER_READ_ACCESS_MODE 0x80 +#define RF_REGISTER_TRX_STATUS_ADDRESS 0x01 +#define RF_TRX_OFF_STATE 0x08 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +#ifdef _HAL_RF_RX_TX_INDICATOR_ +/**************************************************************************//** +\brief Turn on pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of +the radio transceiver. +******************************************************************************/ +void phyRxTxSwitcherOn(void); + +#endif //_HAL_RF_RX_TX_INDICATOR_ + +#ifdef _HAL_ANT_DIVERSITY_ +/**************************************************************************//** +\brief Enable antenna diversity feature. +******************************************************************************/ +void phyAntennaDiversityInit(void); + +/**************************************************************************//** +\brief Enable antenna diversity in the receive state of the radio transceiver. +******************************************************************************/ +void phyRxAntennaDiversity(void); + +/**************************************************************************//** +\brief Enable antenna diversity in the transmit state of the radio transceiver. +******************************************************************************/ +void phyTxAntennaDiversity(void); + +#endif //_HAL_ANT_DIVERSITY_ + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Delay in us +******************************************************************************/ +void HAL_Delay(uint8_t us) +{ + __delay_us(us); +} + +/****************************************************************************** + Clears the irq. +******************************************************************************/ +void HAL_ClearRfIrqFlag(void) +{ + EIFR = 1 << INTF0; +} + +/****************************************************************************** + Enables the irq. +******************************************************************************/ +void HAL_EnableRfIrq(void) +{ + EIMSK |= 1 << INT0; +} + +/****************************************************************************** + Disables the irq. +******************************************************************************/ +uint8_t HAL_DisableRfIrq(void) +{ + uint8_t tmp; + + tmp = EIMSK & (1 << INT0); + EIMSK &= ~(1 << INT0); + return tmp; +} + +/****************************************************************************** + Sets SLP_TR pin to 1. +******************************************************************************/ +void HAL_SetRfSlpTr(void) +{ + GPIO_RF_SLP_TR_set(); +} + +/****************************************************************************** + Clears SLP_TR pin to 0. +******************************************************************************/ +void HAL_ClearRfSlpTr(void) +{ + GPIO_RF_SLP_TR_clr(); +} + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeInRfSlpTr(void) +{ + GPIO_RF_SLP_TR_make_in(); +} + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeOutRfSlpTr(void) +{ + GPIO_RF_SLP_TR_make_out(); +} + +/****************************************************************************** + Sets RST_TR pin to 1. +******************************************************************************/ +void HAL_SetRfRst(void) +{ + GPIO_RF_RST_set(); +} + +/****************************************************************************** + Clears RST_TR pin to 1. +******************************************************************************/ +void HAL_ClearRfRst(void) +{ + GPIO_RF_RST_clr(); +} + +/****************************************************************************** + Init pins that controls RF chip. +******************************************************************************/ +void HAL_InitRfPins(void) +{ + GPIO_RF_SLP_TR_clr(); + GPIO_RF_SLP_TR_make_out(); + + GPIO_RF_RST_set(); + GPIO_RF_RST_make_out(); + + GPIO_RF_IRQ_make_in(); +} + +/****************************************************************************** + Inits Atmega IRQ pin. +******************************************************************************/ +void HAL_InitRfIrq(void) +{ + EICRA |= (1 << ISC01) | (1 << ISC00); // rising edge +} + +/****************************************************************************** + Returns current frequency code. +******************************************************************************/ +HalSysFreq_t HAL_GetRfFreq(void) +{ +/* if (INTERNAL_RC == halGetClockSource()) + { + return HAL_FREQ_NOCLK; + } + else*/ + { + #if (F_CPU == 4000000ul) + return HAL_FREQ_4MHZ; + #endif + #if (F_CPU == 8000000ul) + return HAL_FREQ_8MHZ; + #endif + } +} + +/**************************************************************************//** + \brief Wait for when radio will be waked up. + + \param none. + \return none. +******************************************************************************/ +void halWaitRadio(void) +{ + uint8_t tempValue = 0; + + do { + HAL_SelectRfSpi(); + HAL_WriteByteRfSpi(RF_REGISTER_READ_ACCESS_MODE | RF_REGISTER_TRX_STATUS_ADDRESS); + tempValue = HAL_WriteByteRfSpi(tempValue); + HAL_DeselectRfSpi(); + } while(RF_TRX_OFF_STATE != tempValue); +} + +/**************************************************************************//** + \brief Enables RX TX indicator for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxTxSwitcher(void) +{ + #ifdef _HAL_RF_RX_TX_INDICATOR_ + phyRxTxSwitcherOn(); + #endif //_HAL_RF_RX_TX_INDICATOR_ +} + +/**************************************************************************//** + \brief Enables Antenna diversity option for radio if that is supported. +******************************************************************************/ +void HAL_InitAntennaDiversity(void) +{ + #ifdef _HAL_ANT_DIVERSITY_ + phyAntennaDiversityInit(); + #endif //_HAL_ANT_DIVERSITY_ +} + +/**************************************************************************//** + \brief Enables Antenna diversity in RX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxAntennaDiversity(void) +{ + #ifdef _HAL_ANT_DIVERSITY_ + phyRxAntennaDiversity(); + #endif //_HAL_ANT_DIVERSITY_ +} + +/**************************************************************************//** + \brief Enables Antenna diversity in TX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableTxAntennaDiversity(void) +{ + #ifdef _HAL_ANT_DIVERSITY_ + phyTxAntennaDiversity(); + #endif //_HAL_ANT_DIVERSITY_ +} + +//eof halRfCtrl.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfSpi.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfSpi.c new file mode 100644 index 00000000..053ba68a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halRfSpi.c @@ -0,0 +1,90 @@ +/**************************************************************************//** + \file halrfSpi.c + + \brief SPI interface routines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#include +#include + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Performs initialization of SPI interface. +******************************************************************************/ +void HAL_InitRfSpi(void) +{ + GPIO_SPI_CS_set(); + GPIO_SPI_MISO_make_in(); + GPIO_SPI_MOSI_make_out(); + GPIO_SPI_SCK_make_out(); + GPIO_SPI_CS_make_out(); + SPCR = ((1 << SPE) | (1 << MSTR)); // SPI enable, master mode. + SPSR = (1 << SPI2X); // rate = fosc/2 +} + +/****************************************************************************** + Writes/reads byte to/from SPI. CPU clock critical function (4 MHz only). + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +uint8_t HAL_WriteByteRfSpi(uint8_t value) +{ + uint8_t tmp8; + + SPDR = value; // Write data. + asm("nop"); // 1 + asm("nop"); // 2 + asm("nop"); // 3 + asm("nop"); // 4 + asm("nop"); // 5 + asm("nop"); // 5 + asm("nop"); // 7 + asm("nop"); // 8 + asm("nop"); // 9 + asm("nop"); // 10 + asm("nop"); // 11 + asm("nop"); // 12 + asm("nop"); // 13 + asm("nop"); // 14 + asm("nop"); // 15 + asm("nop"); // 16 + asm("nop"); // 17 + tmp8 = SPSR; + (void)tmp8; + return SPDR; +} + +/****************************************************************************** + Deselects a slave device. +******************************************************************************/ +void HAL_DeselectRfSpi(void) +{ + GPIO_SPI_CS_set(); +} + +/****************************************************************************** + Selects a slave device. +******************************************************************************/ +void HAL_SelectRfSpi(void) +{ + GPIO_SPI_CS_clr(); +} + +// eof halrfSpi.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halUid.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halUid.c new file mode 100644 index 00000000..21976ce9 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/rcb231_212/src/halUid.c @@ -0,0 +1,87 @@ +/**************************************************************************//** + \file halUid.c + + \brief Implementation of UID interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 7/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief uid type. */ +typedef union +{ + uint64_t uid; + uint8_t array[sizeof(uint64_t)]; +} HalUid_t; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HalUid_t halUid = {.uid = 0ull}; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Reads uid from external spi eeprom at25010a. +******************************************************************************/ +void halReadUid(void) +{ + uint8_t command = 0x03; + uint8_t address = 0; + uint8_t itr; + + GPIO_RF_RST_make_out(); + GPIO_RF_RST_clr(); + GPIO_SPI_CS_clr(); + + HAL_WriteByteRfSpi(command); + HAL_WriteByteRfSpi(address); + for (itr=0; itr +#include + +/****************************************************************************** + Definitions section +******************************************************************************/ +#define SINGLE_WIRE_SUCCESS_STATUS 0 +#define SINGLE_WIRE_ERROR_STATUS -1 + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief uid type. */ +typedef union +{ + uint64_t uid; + uint8_t array[sizeof(uint64_t)]; +} HalUid_t; + +/****************************************************************************** + Inline static functions prototypes section. +******************************************************************************/ +HAL_ASSIGN_PIN(SINGLE_WIRE, G, 5); // Macros for the Single-wire pin actions. + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Reads Atmel MeshBean UID from ATTiny13A + +\param[in] uidBuffer - memory for unique ID. + +\return + SINGLE_WIRE_SUCCESS_STATUS - if UID read successfully; + SINGLE_WIRE_ERROR_STATUS - if error occured during UID read. +******************************************************************************/ +int halReadAtmelMeshbeanUid(uint8_t *uidBuffer); + +#endif /* _HALATMELUID_H */ + +// eof halAtmelUid.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halMacIsr.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halMacIsr.h new file mode 100644 index 00000000..127af1ee --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halMacIsr.h @@ -0,0 +1,77 @@ +/**************************************************************************//** + \file halMacIsr.h + + \brief Declaration mac timer interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 14/01/08 A. Mandychev - Created. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALMACISR_H +#define _HALMACISR_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include + +/****************************************************************************** + Types section. +******************************************************************************/ +typedef enum +{ + HAL_RTIMER_REPEAT_MODE = 0, + HAL_RTIMER_ONE_SHOT_MODE = 1, + HAL_RTIMER_STOPPED_MODE = 2, +} HAL_RTimerMode_t; + +typedef struct // Timer description. +{ + volatile HAL_RTimerMode_t mode; // Mode. + volatile uint16_t period; // Period of the timer. + volatile uint16_t nextEvent; // Counter of periods. +} RTimerDescr_t; + +/****************************************************************************** + External variables. +******************************************************************************/ +// Do not use it in other files. +extern RTimerDescr_t __rtimer; + +/****************************************************************************** + Prototypes section. +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer and RF ext. interrupts. +******************************************************************************/ +void HAL_InitMacIsr(void); + +/****************************************************************************** + Starts RTimer. Function should be invoked in critical section. + Parameters: + source - source of invocation. + mode - RTimer mode. + period - RTimer period. +******************************************************************************/ +bool HAL_StartRtimer(HAL_RTimerMode_t mode, uint16_t period); + +/****************************************************************************** + Stops RTimer. Function should be invoked in critical section. +******************************************************************************/ +void HAL_StopRtimer(void); + +#endif /* _HALMACISR_H */ + +// eof halMacIsr.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfCtrl.h new file mode 100644 index 00000000..846b101c --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfCtrl.h @@ -0,0 +1,142 @@ +/**************************************************************************//** + \file halRfCtrl.h + + \brief Types and constants declaration for IEEE802.15.4 PHY implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 28/05/07 ALuzhetsky - Created. + 06/08/07 A. Mandychev, E. Ivanov - Modified. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFCTRL_H +#define _HALRFCTRL_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + HAL_FREQ_NOCLK, + HAL_FREQ_1MHZ, + HAL_FREQ_2MHZ, + HAL_FREQ_4MHZ, + HAL_FREQ_8MHZ, + HAL_FREQ_16MHZ +} HalSysFreq_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Delay in us +******************************************************************************/ +void HAL_Delay(uint8_t us); + +/****************************************************************************** + Clears the irq. +******************************************************************************/ +void HAL_ClearRfIrqFlag(void); + +/****************************************************************************** + Enables the irq. +******************************************************************************/ +void HAL_EnableRfIrq(void); + +/****************************************************************************** + Disables the irq. +******************************************************************************/ +uint8_t HAL_DisableRfIrq(void); + +/****************************************************************************** + Sets SLP_TR pin to 1. +******************************************************************************/ +void HAL_SetRfSlpTr(void); + +/****************************************************************************** + Clears SLP_TR pin to 0. +******************************************************************************/ +void HAL_ClearRfSlpTr(void); + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeInRfSlpTr(void); + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeOutRfSlpTr(void); + +/****************************************************************************** + Sets RST_TR pin to 1. +******************************************************************************/ +void HAL_SetRfRst(void); + +/****************************************************************************** + Clears RST_TR pin to 1. +******************************************************************************/ +void HAL_ClearRfRst(void); + +/****************************************************************************** + Init pins that controls RF chip. +******************************************************************************/ +void HAL_InitRfPins(void); + +/****************************************************************************** + Inits Atmega IRQ pin. +******************************************************************************/ +void HAL_InitRfIrq(void); + +/****************************************************************************** + Returns current frequency code. +******************************************************************************/ +HalSysFreq_t HAL_GetRfFreq(void); + +/**************************************************************************//** + \brief Wait for when radio will be waked up. + + \param none. + \return none. +******************************************************************************/ +void halWaitRadio(void); + +/**************************************************************************//** + \brief Enables RX TX indicator for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxTxSwitcher(void); + +/**************************************************************************//** + \brief Enables Antenna diversity option for radio if that is supported. +******************************************************************************/ +void HAL_InitAntennaDiversity(void); + +/**************************************************************************//** + \brief Enables Antenna diversity in RX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxAntennaDiversity(void); + +/**************************************************************************//** + \brief Enables Antenna diversity in TX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableTxAntennaDiversity(void); + +#endif /* _HALRFCTRL_H */ + +// eof halRfCtrl.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfPio.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfPio.h new file mode 100644 index 00000000..05f3f296 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfPio.h @@ -0,0 +1,41 @@ +/**************************************************************************//** + \file halRfPio.h + + \brief AT86RF230 control pins declarations. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFPIO_H +#define _HALRFPIO_H + +#include + +// Macros for the RF_SLP_TR pin manipulation. +HAL_ASSIGN_PIN(RF_SLP_TR, B, 4); +// Macros for the RF_RST pin manipulation. +HAL_ASSIGN_PIN(RF_RST, A, 7); +// Macros for the RF_IRQ pin manipulation. +HAL_ASSIGN_PIN(RF_IRQ, E, 5); +// Macros for the SPI_CS pin manipulation. +HAL_ASSIGN_PIN(SPI_CS, B, 0); +// Macros for the SPI_SCK pin manipulation. +HAL_ASSIGN_PIN(SPI_SCK, B, 1); +// Macros for the SPI_MOSI pin manipulation. +HAL_ASSIGN_PIN(SPI_MOSI, B, 2); +// Macros for the SPI_MISO pin manipulation. +HAL_ASSIGN_PIN(SPI_MISO, B, 3); +#endif /* _HALRFPIO_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfSpi.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfSpi.h new file mode 100644 index 00000000..fe3328a6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/include/halRfSpi.h @@ -0,0 +1,79 @@ +/***************************************************************************//** + \file halRfSpi.h + + \brief SPI interface routines header. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALRFSPI_H +#define _HALRFSPI_H + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Performs initialization of SPI interface. +******************************************************************************/ +void HAL_InitRfSpi(void); + +/****************************************************************************** + Writes/reads byte to/from SPI. + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +uint8_t HAL_WriteByteRfSpi(uint8_t value); + +/****************************************************************************** + Deselects a slave device. +******************************************************************************/ +void HAL_DeselectRfSpi(void); + +/****************************************************************************** + Selects a slave device. +******************************************************************************/ +void HAL_SelectRfSpi(void); + +/****************************************************************************** + Inline function (to use in critical sections) + Writes/reads byte to/from SPI. + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +INLINE uint8_t HAL_WriteByteInlineRfSpi(uint8_t value) +{ + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + SPDR = value; // Write data. + asm("nop"); // This "nop" tunes up the "while" to reduce time for SPIF flag + // detecting. + while (!(SPSR&(1 << SPIF))); + END_MEASURE(HALATOM_WRITEBYTE_RFSPI_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + return SPDR; +} + +#endif /* _HALRFSPI_H */ + +//eof halRfSpi.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halAtmelUid.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halAtmelUid.c new file mode 100644 index 00000000..9c80dcbe --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halAtmelUid.c @@ -0,0 +1,248 @@ +/**************************************************************************//** + \file halAtmelUid.c + + \brief The header file describes the UID interface for Atmel MeshBean. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/10 A. Malkin - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define UID_LEN 0x08 // size of UID (bytes) + +#define SINGLE_WIRE_ZERO_BIT 0x00 // logical level zero +#define SINGLE_WIRE_ONE_BIT 0x01 // logical level one + +#define BIT_DURATION 208 // bit duration - 208 us +#define BIT_DURATION_HALF BIT_DURATION/2 +#define MAX_START_BIT_WAITING 10 // waiting time(in bit) of Start bit + +// Commands for Single-wire UART (Atmel MeshBean) +#define CMD_SYNCH 0xAA // Synchronization +#define CMD_READ_MAC64_0 0x60 // Read 64-bit MAC address +#define NUM_OF_MAC64 0x00 // Number of MAC64 slot +/****************************************************************************** + Prototypes section +******************************************************************************/ +static void halWriteSingleWireBit(uint8_t value); +static void halWriteSingleWire(uint8_t value); +static int halWaitSingleWireStartBit(void); +static uint8_t halReadSingleWireBit(void); +static int halReadSingleWire(uint8_t *data); + +/****************************************************************************** + Global variables section +******************************************************************************/ + +/****************************************************************************** + Implementations section +******************************************************************************/ +/***************************************************************************//** +\brief Writes bit to the bus + +\param[in] + value - byte to write. The bit is placed to position of LSB. +*******************************************************************************/ +static void halWriteSingleWireBit(uint8_t value) +{ + if (value) + GPIO_SINGLE_WIRE_set(); + else + GPIO_SINGLE_WIRE_clr(); + + __delay_us(BIT_DURATION); +} + +/***************************************************************************//** +\brief Writes byte to the bus + +\param[in] + value - byte to write. +*******************************************************************************/ +static void halWriteSingleWire(uint8_t value) +{ + uint8_t i; + + // write Start bit + halWriteSingleWireBit(SINGLE_WIRE_ZERO_BIT); + + // write Data + for (i = 0; i < UID_LEN; i++) + { + halWriteSingleWireBit(value & 0x01); + value >>= 1; + } + + // add 2 Stop bits + halWriteSingleWireBit(SINGLE_WIRE_ONE_BIT); + halWriteSingleWireBit(SINGLE_WIRE_ONE_BIT); +} + +/***************************************************************************//** +\brief Wait for Start bit from the bus. + +\return + SINGLE_WIRE_SUCCESS_STATUS - if Start bit has been found successfully; \n + SINGLE_WIRE_ERROR_STATUS - if Start bit has been not found. +*******************************************************************************/ +static int halWaitSingleWireStartBit(void) +{ + uint16_t i; + + for (i = BIT_DURATION * MAX_START_BIT_WAITING; i > 0; i--) + { + if (!GPIO_SINGLE_WIRE_read()) + return SINGLE_WIRE_SUCCESS_STATUS; + __delay_us(1); + } + + return SINGLE_WIRE_ERROR_STATUS; +} + +/***************************************************************************//** +\brief Reads bit from the bus. + +\return + Read bit is placed to position of last significant bit. +*******************************************************************************/ +static uint8_t halReadSingleWireBit(void) +{ + uint8_t result; + + // read pin level in half of bit period + if (GPIO_SINGLE_WIRE_read()) + result = SINGLE_WIRE_ONE_BIT; + else + result = SINGLE_WIRE_ZERO_BIT; + + // wait for bit period before next bit reading + __delay_us(BIT_DURATION); + + return result; +} + +/***************************************************************************//** +\brief Reads byte from the Atmel Single-wire bus. + +\param[in] + data - byte read from the bus. + +\return + SINGLE_WIRE_SUCCESS_STATUS - if byte read without error; + SINGLE_WIRE_ERROR_STATUS - if there are some errors during byte read. +*******************************************************************************/ +static int halReadSingleWire(uint8_t *data) +{ + uint8_t reg = 0; + uint8_t bit; + uint8_t i; + int result; + + // wait for Start bit of response + result = halWaitSingleWireStartBit(); + + if (result) + return SINGLE_WIRE_ERROR_STATUS; + + // wait for half of bit period before reading Start bit + __delay_us(BIT_DURATION_HALF); + + // read Start bit + bit = halReadSingleWireBit(); + if (SINGLE_WIRE_ZERO_BIT != bit) + return SINGLE_WIRE_ERROR_STATUS; + + // read byte + for (i = 0; i < UID_LEN; i++) + { + if (SINGLE_WIRE_ONE_BIT == halReadSingleWireBit()) + reg |= (1 << i); + } + + // read and check 1'st Stop bit + bit = halReadSingleWireBit(); + if (SINGLE_WIRE_ONE_BIT != bit) + return SINGLE_WIRE_ERROR_STATUS; + + // wait for bit period after reading + __delay_us(BIT_DURATION_HALF); + + *data = reg; + + return SINGLE_WIRE_SUCCESS_STATUS; +} + +/**************************************************************************//** +\brief Reads Atmel MeshBean UID from ATTiny13A + +\param[in] uidBuffer - memory for unique ID. + +\return + SINGLE_WIRE_SUCCESS_STATUS - if UID read successfully; + SINGLE_WIRE_ERROR_STATUS - if error occured during UID read. +******************************************************************************/ +int halReadAtmelMeshbeanUid(uint8_t *uidBuffer) +{ + uint8_t i; + uint8_t reg = 0; + + // port sets as output. + GPIO_SINGLE_WIRE_make_out(); + + // send synchronization byte + halWriteSingleWire(CMD_SYNCH); + + // write command + halWriteSingleWire(CMD_READ_MAC64_0); + + // write UID location + halWriteSingleWire(NUM_OF_MAC64); + + // Tri-state (external pullup) + GPIO_SINGLE_WIRE_make_in(); + + // wait for synchronization + if (halReadSingleWire(®)) + return SINGLE_WIRE_ERROR_STATUS; + + if (CMD_SYNCH != reg) + return SINGLE_WIRE_ERROR_STATUS; + + // wait for response with same command ID + if (halReadSingleWire(®)) + return SINGLE_WIRE_ERROR_STATUS; + + if (CMD_READ_MAC64_0 == reg) + { + // wait for 8 bytes of UID + for (i = UID_LEN; i > 0; i--) + { + // fill array in reversionary order + if (halReadSingleWire(uidBuffer + i - 1)) + return SINGLE_WIRE_ERROR_STATUS; + } + } + return SINGLE_WIRE_SUCCESS_STATUS; +} + +// eof halAtmelUid.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halMacIsr.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halMacIsr.c new file mode 100644 index 00000000..7f349660 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halMacIsr.c @@ -0,0 +1,152 @@ +/**************************************************************************//** + \file halMacIsr.c + + \brief mac interrupts implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 14/01/08 A. Mandychev - Created. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(HAL_3d6864MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period >> 1) +#elif defined(HAL_4MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period >> 1) +#elif defined(HAL_7d3728MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period) +#elif defined(HAL_8MHz) + #define HAL_RTIMER_INTERVAL_CALCULATE(period) (period) +#endif + +/****************************************************************************** + Global variables section +******************************************************************************/ +RTimerDescr_t __rtimer; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer. +******************************************************************************/ +void HAL_InitMacIsr(void); + +/****************************************************************************** + Redirect interrupt event depending on the TrxState. + Parameters: none. + Returns: none. +******************************************************************************/ +void phyDispatcheRTimerEvent(void); + +/****************************************************************************** + Redirect interrupt event depending on the TrxState. + Parameters: none. + Returns: none. +******************************************************************************/ +void phyDispatcheRfInterrupt(void); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Initializes Rtimer. +******************************************************************************/ +void HAL_InitMacIsr(void) +{ + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; + HAL_InitRfIrq(); +} + +/****************************************************************************** + Starts RTimer. Function should be invoked in critical section. + Parameters: + source - source of invocation. + mode - RTimer mode. + period - RTimer period. +******************************************************************************/ +bool HAL_StartRtimer(HAL_RTimerMode_t mode, uint16_t period) +{ + if (HAL_RTIMER_STOPPED_MODE != __rtimer.mode) + return false; + + __rtimer.period = HAL_RTIMER_INTERVAL_CALCULATE(period); + __rtimer.mode = mode; + __rtimer.nextEvent = TCNT4 + __rtimer.period; + if (__rtimer.nextEvent > TOP_TIMER_COUNTER_VALUE) + __rtimer.nextEvent -= TOP_TIMER_COUNTER_VALUE; + OCR4B = __rtimer.nextEvent; + // clear possible interrupt by setting logical one. + TIFR4 = (1 << OCF4B); + // enable interrupt + TIMSK4 |= (1 << OCIE4B); + return true; +} + +/****************************************************************************** + Stops RTimer. Function should be invoked in critical section. +******************************************************************************/ +void HAL_StopRtimer(void) +{ + // clear possible interrupt + TIFR4 &= ~(1 << OCF4B); + // disable interrupt + TIMSK4 &= ~(1 << OCIE4B); + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; +} + +/****************************************************************************** + Output compare unit (channel B) interrupt handler. +******************************************************************************/ +ISR(TIMER4_COMPB_vect) +{ + BEGIN_MEASURE + if (HAL_RTIMER_ONE_SHOT_MODE == __rtimer.mode) + { + TIMSK4 &= ~(1 << OCIE4B); + __rtimer.mode = HAL_RTIMER_STOPPED_MODE; + } + else + { + __rtimer.nextEvent += __rtimer.period; + if (__rtimer.nextEvent > TOP_TIMER_COUNTER_VALUE) + __rtimer.nextEvent -= TOP_TIMER_COUNTER_VALUE; + OCR4B = __rtimer.nextEvent; + } + phyDispatcheRTimerEvent(); + END_MEASURE(HALISR_TIMER3_COMPA_TIME_LIMIT) +} + +/**************************************************************** + Interrupt service routine. + Do not move this ISR! It could be omitted in your project. +****************************************************************/ +ISR(INT5_vect) +{ + BEGIN_MEASURE + phyDispatcheRfInterrupt(); + END_MEASURE(HALISR_PHYDISPATCH_RFINT_TIME_LIMIT) +} + +// eof halMacIsr.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfCtrl.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfCtrl.c new file mode 100644 index 00000000..8e3232a7 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfCtrl.c @@ -0,0 +1,281 @@ +/**************************************************************************//** + \file halRfCtrl.c + + \brief mac pin interface implementation. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 28/05/07 ALuzhetsky - Created. + 06/08/07 A. Mandychev, E. Ivanov - Modified. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section. +******************************************************************************/ +#include +#include +#include +#include +#include +#include +//#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define RF_REGISTER_READ_ACCESS_MODE 0x80 +#define RF_REGISTER_TRX_STATUS_ADDRESS 0x01 +#define RF_TRX_OFF_STATE 0x08 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +#ifdef _HAL_RF_RX_TX_INDICATOR_ +/**************************************************************************//** +\brief Turn on pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of +the radio transceiver. +******************************************************************************/ +void phyRxTxSwitcherOn(void); + +#endif //_HAL_RF_RX_TX_INDICATOR_ + +#ifdef _HAL_ANT_DIVERSITY_ +/**************************************************************************//** +\brief Enable antenna diversity feature. +******************************************************************************/ +void phyAntennaDiversityInit(void); + +/**************************************************************************//** +\brief Enable antenna diversity in the receive state of the radio transceiver. +******************************************************************************/ +void phyRxAntennaDiversity(void); + +/**************************************************************************//** +\brief Enable antenna diversity in the transmit state of the radio transceiver. +******************************************************************************/ +void phyTxAntennaDiversity(void); + +#endif //_HAL_ANT_DIVERSITY_ + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Delay in us +******************************************************************************/ +void HAL_Delay(uint8_t us) +{ + __delay_us(us); +} + +/****************************************************************************** + Clears the irq. +******************************************************************************/ +void HAL_ClearRfIrqFlag(void) +{ + EIFR = 1 << INTF5; +} + +/****************************************************************************** + Enables the irq. +******************************************************************************/ +void HAL_EnableRfIrq(void) +{ + EIMSK |= 1 << INT5; +} + +/****************************************************************************** + Disables the irq. +******************************************************************************/ +uint8_t HAL_DisableRfIrq(void) +{ + uint8_t tmp; + + tmp = EIMSK & (1 << INT5); + EIMSK &= ~(1 << INT5); + return tmp; +} + +/****************************************************************************** + Sets SLP_TR pin to 1. +******************************************************************************/ +void HAL_SetRfSlpTr(void) +{ + GPIO_RF_SLP_TR_set(); +} + +/****************************************************************************** + Clears SLP_TR pin to 0. +******************************************************************************/ +void HAL_ClearRfSlpTr(void) +{ + GPIO_RF_SLP_TR_clr(); +} + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeInRfSlpTr(void) +{ + GPIO_RF_SLP_TR_make_in(); +} + +/****************************************************************************** + Makes SLP_TR pin as input. +******************************************************************************/ +void HAL_MakeOutRfSlpTr(void) +{ + GPIO_RF_SLP_TR_make_out(); +} + +/****************************************************************************** + Sets RST_TR pin to 1. +******************************************************************************/ +void HAL_SetRfRst(void) +{ + GPIO_RF_RST_set(); +} + +/****************************************************************************** + Clears RST_TR pin to 1. +******************************************************************************/ +void HAL_ClearRfRst(void) +{ + GPIO_RF_RST_clr(); +} + +/****************************************************************************** + Init pins that controls RF chip. +******************************************************************************/ +void HAL_InitRfPins(void) +{ + GPIO_RF_SLP_TR_clr(); + GPIO_RF_SLP_TR_make_out(); + + GPIO_RF_RST_set(); + GPIO_RF_RST_make_out(); + + GPIO_RF_IRQ_make_in(); + + #ifdef _HAL_USE_AMPLIFIER_ + // enable power amplifier + // make port C pin 1 as output + GPIO_POW_AMPLF_SLP_make_out(); + // set one on pin + GPIO_POW_AMPLF_SLP_set(); + #endif +} + +/****************************************************************************** + Inits Atmega IRQ pin. +******************************************************************************/ +void HAL_InitRfIrq(void) +{ + EICRB |= (1 << ISC51) | (1 << ISC50); // rising edge +} + +/****************************************************************************** + Returns current frequency code. +******************************************************************************/ +HalSysFreq_t HAL_GetRfFreq(void) +{ +/* if (INTERNAL_RC == halGetClockSource()) + { + return HAL_FREQ_NOCLK; + } + else*/ + { + #if (F_CPU == 4000000ul) + return HAL_FREQ_4MHZ; + #endif + #if (F_CPU == 8000000ul) + return HAL_FREQ_8MHZ; + #endif + } +} + +/**************************************************************************//** + \brief Wait for when radio will be waked up. + + \param none. + \return none. +******************************************************************************/ +void halWaitRadio(void) +{ + uint8_t tempValue = 0; + + do { + HAL_SelectRfSpi(); + HAL_WriteByteRfSpi(RF_REGISTER_READ_ACCESS_MODE | RF_REGISTER_TRX_STATUS_ADDRESS); + tempValue = HAL_WriteByteRfSpi(tempValue); + HAL_DeselectRfSpi(); + } while(RF_TRX_OFF_STATE != tempValue); +} + +/**************************************************************************//** +\brief Checks if amplifier is used. + +\return true - is used, \n + false - is not used. +******************************************************************************/ +bool HAL_IsAmplifierUsed(void) +{ + #ifdef _HAL_USE_AMPLIFIER_ + return true; + #else + return false; + #endif +} + +/**************************************************************************//** + \brief Enables RX TX indicator for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxTxSwitcher(void) +{ + #ifdef _HAL_RF_RX_TX_INDICATOR_ + phyRxTxSwitcherOn(); + #endif //_HAL_RF_RX_TX_INDICATOR_ +} + +/**************************************************************************//** + \brief Enables Antenna diversity option for radio if that is supported. +******************************************************************************/ +void HAL_InitAntennaDiversity(void) +{ + #ifdef _HAL_ANT_DIVERSITY_ + phyAntennaDiversityInit(); + #endif //_HAL_ANT_DIVERSITY_ +} + +/**************************************************************************//** + \brief Enables Antenna diversity in RX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableRxAntennaDiversity(void) +{ + #ifdef _HAL_ANT_DIVERSITY_ + phyRxAntennaDiversity(); + #endif //_HAL_ANT_DIVERSITY_ +} + +/**************************************************************************//** + \brief Enables Antenna diversity in TX mode for radio if that is supported. +******************************************************************************/ +void HAL_EnableTxAntennaDiversity(void) +{ + #ifdef _HAL_ANT_DIVERSITY_ + phyTxAntennaDiversity(); + #endif //_HAL_ANT_DIVERSITY_ +} + +//eof halRfCtrl.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfSpi.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfSpi.c new file mode 100644 index 00000000..6edb9d7a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halRfSpi.c @@ -0,0 +1,87 @@ +/**************************************************************************//** + \file halrfSpi.c + + \brief SPI interface routines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 A. Luzhetsky - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#include +#include + +/****************************************************************************** + Performs initialization of SPI interface. +******************************************************************************/ +void HAL_InitRfSpi(void) +{ + GPIO_SPI_CS_set(); + GPIO_SPI_MISO_make_in(); + GPIO_SPI_MOSI_make_out(); + GPIO_SPI_SCK_make_out(); + GPIO_SPI_CS_make_out(); + SPCR = ((1 << SPE) | (1 << MSTR)); // SPI enable, master mode. + SPSR = (1 << SPI2X); // rate = fosc/2 +} + +/****************************************************************************** + Writes/reads byte to/from SPI. CPU clock critical function (4 MHz only). + parameters: value - byte to write. + Returns: the byte which was read. +******************************************************************************/ +uint8_t HAL_WriteByteRfSpi(uint8_t value) +{ + uint8_t tmp8; + + SPDR = value; // Write data. + asm("nop"); // 1 + asm("nop"); // 2 + asm("nop"); // 3 + asm("nop"); // 4 + asm("nop"); // 5 + asm("nop"); // 5 + asm("nop"); // 7 + asm("nop"); // 8 + asm("nop"); // 9 + asm("nop"); // 10 + asm("nop"); // 11 + asm("nop"); // 12 + asm("nop"); // 13 + asm("nop"); // 14 + asm("nop"); // 15 + asm("nop"); // 16 + asm("nop"); // 17 + tmp8 = SPSR; + (void)tmp8; + return SPDR; +} + +/****************************************************************************** + Deselects a slave device. +******************************************************************************/ +void HAL_DeselectRfSpi(void) +{ + GPIO_SPI_CS_set(); +} + +/****************************************************************************** + Selects a slave device. +******************************************************************************/ +void HAL_SelectRfSpi(void) +{ + GPIO_SPI_CS_clr(); +} + +// eof halrfSpi.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halUid.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halUid.c new file mode 100644 index 00000000..4f135528 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/zigBit/src/halUid.c @@ -0,0 +1,72 @@ +/**************************************************************************//** + \file uid.c + + \brief Implementation of UID interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 7/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HalUid_t halUid = {.uid = 0ull}; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Reads uid from ds2411 (meshnetics meshbean) or ATTiny13A (atmel meshbean). +******************************************************************************/ +void halReadUid(void) +{ +#ifdef _HAL_TINY_UID_ + // Atmel Single-Wire Software UART UID + halReadAtmelMeshbeanUid(halUid.array); +#else + // 1-Wire UID + if (W1_SUCCESS_STATUS == HAL_SearchW1Device(W1_ANY_FAMILY, halUid.array, 1, NULL)) + { + *(halUid.array + 7) = *(halUid.array + 0); + halUid.uid >>= 8; + } +#endif +} + +/****************************************************************************** + UID discovery. + Parameters: + id - UID buffer pointer. + Returns: + 0 - if unique ID has been found without error; + -1 - if there are some errors during UID discovery. +******************************************************************************/ +int HAL_ReadUid(uint64_t *id) +{ + if (!id) + return -1; + + *id = halUid.uid; + return 0; +} + +// eof uid.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/adc.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/adc.c new file mode 100644 index 00000000..03598dcd --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/adc.c @@ -0,0 +1,133 @@ +/**************************************************************************//** + \file adc.c + + \brief Implementation of ADC interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + IDLE, // idle + DATA, // performs request + BUSY // the module is ready to start conversion +} AdcStates_t; + +typedef struct +{ + void (*callback)(void); // address of callback +} HalAdcControl_t; + +/****************************************************************************** + Global variables section +******************************************************************************/ +AdcStates_t halAdcState = IDLE; // Monitors current state +HalAdcControl_t halAdcControl; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Opens the ADC to make the measuring on a ADC channel. +Parameters: + param - pointer to parameter structure +Returns: + -1 - unsupported parameter or ADC is busy. + 0 - on success. +******************************************************************************/ +int HAL_OpenAdc(HAL_AdcParams_t *param) +{ + if (IDLE != halAdcState) + return -1; + if (NULL == param) + return -1; + if (NULL == param->bufferPointer) + return -1; + if (param->resolution > RESOLUTION_10_BIT) + return -1; + /* unsupported voltage reference */ + if (param->voltageReference & 0x3F) + return -1; + /* adc speed must be only 9600 or 4800 SPS for 10 bit resolution */ + if ((RESOLUTION_10_BIT == param->resolution) && (param->sampleRate < ADC_9600SPS)) + return -1; + + halAdcState = BUSY; + halOpenAdc(param); + halAdcControl.callback = param->callback; + return 0; +} + +/****************************************************************************** +Starts ADC with the parameters that were defined at HAL_OpenAdc. +Parameters: + channel - number of channel +Returns: + -1 - the ADC was not opened, unsupported channel number. + 0 - on success. +******************************************************************************/ +int HAL_ReadAdc(HAL_AdcChannelNumber_t channel) +{ + if (BUSY != halAdcState) + return -1; + if (((channel > HAL_ADC_CHANNEL3) && (channel < HAL_ADC_DIFF_CHANNEL0)) || (channel > HAL_ADC_DIFF_CHANNEL7)) + return -1; + + halAdcState = DATA; + halStartAdc(channel); + return 0; +} + +/****************************************************************************** +Closes the ADC. +Parameters: + none. +Returns: + -1 - the module was not opened to be used. + 0 - on success. +******************************************************************************/ +int HAL_CloseAdc(void) +{ + if (IDLE == halAdcState) + return -1; + + halAdcState = IDLE; + halCloseAdc(); + return 0; +} + +/****************************************************************************** + ADC interrupt handler. +******************************************************************************/ +void halSigAdcHandler(void) +{ + if (DATA == halAdcState) + { + halAdcState = BUSY; + if (NULL != halAdcControl.callback) + halAdcControl.callback(); + } +} +// eof adc.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/appTimer.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/appTimer.c new file mode 100644 index 00000000..45047822 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/appTimer.c @@ -0,0 +1,169 @@ +/**************************************************************************//** + \file appTimer.c + + \brief Implementation of appTimer. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +#include +#if defined(_SYSTEM_TIME_ON_SLEEP_TIMER_) + #include +#endif + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern uint8_t halSleepTimerOvfw; +extern uint8_t halAppTimeOvfw; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HAL_AppTimer_t *halAppTimerHead = NULL; // head of appTimer list + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Interrupt handler of appTimer clock. +******************************************************************************/ +void halAppTimerHandler(void) +{ + uint32_t sysTime; + + // search for expired timers and call their callbacks + while ( halAppTimerHead + && ((sysTime = halGetTimeOfAppTimer()) - halAppTimerHead->service.sysTimeLabel) >= halAppTimerHead->interval) + { + HAL_AppTimer_t *p = halAppTimerHead; + halRemoveTimer(&halAppTimerHead, NULL, p); + if (TIMER_REPEAT_MODE == p->mode) + { + p->service.sysTimeLabel = sysTime; + halAddTimer(&halAppTimerHead, p, sysTime); + } + p->callback(); + } +} + +/****************************************************************************** +Check if timer is already started. +Parameters: + appTimer - pointer to HAL_AppTimer_t. +Returns: + true - timer specified already started and presents in the system timers queue + false - timer is't started yet +******************************************************************************/ +static bool isTimerAlreadyStarted(HAL_AppTimer_t *appTimer) +{ + bool result = false; + Timer_t *p; // p is bottom of list + p = halAppTimerHead; + + while (NULL != p) + { + if (p == appTimer) + { + result = true; + assert(false, APPTIMER_MISTAKE); + break; + } + p = (Timer_t *)p->service.next; + } + return result; +} + + +/****************************************************************************** +Starts to count an interval. +Parameters: + appTimer - pointer to HAL_AppTimer_t. +Returns: + -1 - pointer is NULL. + 0 - success +******************************************************************************/ +int HAL_StartAppTimer(HAL_AppTimer_t *appTimer) +{ + uint32_t sysTime; + + if (!appTimer) + return -1; + + if (true == isTimerAlreadyStarted(appTimer)) + return 0; + + sysTime = halGetTimeOfAppTimer(); + appTimer->service.next = NULL; + appTimer->service.sysTimeLabel = sysTime; + halAddTimer((Timer_t**)(&halAppTimerHead), (Timer_t*)appTimer, sysTime); + return 0; +} + +/****************************************************************************** +Stops the timer. +Parameters: + appTimer - pointer to HAL_AppTimer_t. +Returns: + -1 there is not the appTimer. + 0 - success +******************************************************************************/ +int HAL_StopAppTimer(HAL_AppTimer_t *appTimer) +{ + Timer_t *prev = 0; + Timer_t **t = &appTimer; + + if (!appTimer) + return -1; + if (halAppTimerHead != *t) + { + if (!(prev = halFindPrevTimer((Timer_t**)(&halAppTimerHead), appTimer))) + return -1; // This timer is not in the list + } + halRemoveTimer((Timer_t**)(&halAppTimerHead), prev, appTimer); + return 0; +} + +/**************************************************************************//** +\brief Gets system time. + +\return + time since power up in milliseconds(8 bytes). +******************************************************************************/ +BcTime_t HAL_GetSystemTime(void) +{ + BcTime_t sysTime = 0ull; + + #if defined(_SYSTEM_TIME_ON_SLEEP_TIMER_) + sysTime = halGetTimeOfSleepTimer(); + sysTime |= ((BcTime_t)halSleepTimerOvfw << 32); + #else + sysTime = halGetTimeOfAppTimer(); + sysTime |= ((BcTime_t)halAppTimeOvfw << 32); + #endif + + return sysTime; +} + +// eof appTimer.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/eeprom.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/eeprom.c new file mode 100644 index 00000000..8e17055b --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/eeprom.c @@ -0,0 +1,156 @@ +/**************************************************************************//** + \file eeprom.c + + \brief Implementation of the EEPROM interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + EEPROM_IDLE = 0, + EEPROM_BUSY +} EepromState_t; + +/****************************************************************************** + Global variables section +******************************************************************************/ +EepromState_t halEepromState = EEPROM_IDLE; // state +HAL_EepromParams_t halEepromParams; +void (*halEepromDone)(); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Reads some number of bytes defined by HAL_EepromParams_t from the EEPROM. +Parameters: + params - address of HAL_EepromParams_t defined by user. + readDone - callback method +Returns: + 0 - success. + -1 - the EEPROM has request that was not completed, + number of byte to read too much. + -2 - eeprom is busy +******************************************************************************/ +int HAL_ReadEeprom(HAL_EepromParams_t *params, void (*readDone)()) +{ + uint16_t i; + + if (EEPROM_IDLE != halEepromState) + return -2; + if (NULL == params) + return -1; + if ((uint16_t)(params->address + params->length) > EEPROM_DATA_MEMORY_SIZE) + return -1; + + halEepromState = EEPROM_BUSY; + halEepromDone = readDone; + halEepromParams = *params; + halWaitEepromReady(); // wait for completion of previous operation + for (i = 0; i < halEepromParams.length; i++) + { + halEepromParams.data[i] = halReadEeprom(halEepromParams.address++); + } + halEepromParams.length = 0; + halPostTask3(HAL_EE_READY); + + return 0; +} + +/****************************************************************************** +Writes number of bytes defined by HAL_EepromParams_t to EEPROM. +By writeDone parameter user can control if write operation will be asynchronous +or synchronous. +Parameters: + params - address of HAL_EepromParams_t defined by user. + writeDone - address of callback. if writeDone is NULL write operation will be + synchronous. +Returns: + 0 - success. + -1 - the EEPROM has request that was not completed, + number of byte to write too much. + -2 - eeprom is busy +******************************************************************************/ +int HAL_WriteEeprom(HAL_EepromParams_t *params, void (*writeDone)()) +{ + uint16_t i; + + if (EEPROM_IDLE != halEepromState) + return -2; + if (NULL == params) + return -1; + if ((uint16_t)(params->address + params->length) > EEPROM_DATA_MEMORY_SIZE) + return -1; + + halEepromState = EEPROM_BUSY; + halEepromParams = *params; + halEepromDone = writeDone; + if (halEepromDone) + {// asynchronous operation + halEepromWrite(HAL_EEPROM_WRITE_MASK_INT, halEepromParams.address++, *halEepromParams.data++); + halEepromParams.length--; + return 0; + } + for (i = 0; i < halEepromParams.length; i++) + { + halEepromWrite(HAL_EEPROM_WRITE_MASK, halEepromParams.address++, *halEepromParams.data++); + } + halWaitEepromReady(); // wait for completion of previous write + halEepromState = EEPROM_IDLE; + + return 0; +} + +/****************************************************************************** +Checks the eeprom state. + +Returns: + true - eeprom is busy; + false - eeprom is free; +******************************************************************************/ +bool HAL_IsEepromBusy(void) +{ + if (EEPROM_BUSY == halEepromState) + return true; + else + return false; +} + +/****************************************************************************** +Interrupt handler about write completion to EEPROM. +******************************************************************************/ +void halSigEepromReadyHandler(void) +{ + if (!halEepromParams.length) + { + halEepromState = EEPROM_IDLE; + if (NULL != halEepromDone) + halEepromDone(); + return; + } + halEepromWrite(HAL_EEPROM_WRITE_MASK_INT, halEepromParams.address++, *halEepromParams.data++); + halEepromParams.length--; +} +//eof eeprom.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/halTaskManager.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/halTaskManager.c new file mode 100644 index 00000000..2c647084 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/halTaskManager.c @@ -0,0 +1,305 @@ +/**************************************************************************//** + \file halTaskManager.c + + \brief Implemenattion of HAL task manager. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Global variables section +******************************************************************************/ +void (* extHandler)(void); + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Interrupt handler of appTimer clock. +******************************************************************************/ +void halAppTimerHandler(void); + +/**************************************************************************//** +\brief HAL USART task. Exact ection depends on USART internal task. +******************************************************************************/ +void halSigUsartHandler(void); + +/**************************************************************************//** +\brief twi end of sending handler +******************************************************************************/ +void halSig2WireSerialHandler(void); + +/**************************************************************************//** +\brief Interrupt handler about write completion to EEPROM. +******************************************************************************/ +void halSigEepromReadyHandler(void); + +/**************************************************************************//** +\brief Interrupt handler about sleep interval was completed. +******************************************************************************/ +void halAsyncTimerHandler(void); + +/***************************************************************************//** +\brief Shutdown system. \n + NOTES: \n + the application should be sure the poweroff will not be \n + interrupted after the execution of the sleep(). +*******************************************************************************/ +void halPowerOff(void); + +/**************************************************************************//** +\brief ADC interrupt handler. +******************************************************************************/ +void halSigAdcHandler(void); + +/**************************************************************************//** +\brief Endpoint interrupt handler. +******************************************************************************/ +void halEndPointHandler(void); + +/**************************************************************************//** +\brief usb suspend interrupt handler. +******************************************************************************/ +void halSuspendHandler(void); + +/**************************************************************************//** +\brief usb resume interrupt handler. +******************************************************************************/ +void halResumeHandler(void); + +/**************************************************************************//** +\brief usb bus reset interrupt handler. +******************************************************************************/ +void halBusResetHandler(void); + +/**************************************************************************//** +\brief Handler for task manager. It is executed when system has waked up. +******************************************************************************/ +void halWakeupHandler(void); + +/**************************************************************************//** +\brief Security Module request handler. +******************************************************************************/ +void halSmRequestHandler(void); + +/**************************************************************************//** +\brief Synchronization system time which based on sleep timer. +******************************************************************************/ +void halSleepSystemTimeSynchronize(void); + +/**************************************************************************//** +\brief Slave spi reception complete interrupt handler. +******************************************************************************/ +void halSpiRxByteComplete(void); + +/****************************************************************************** + Global variables section +******************************************************************************/ +volatile uint8_t halTaskFlags0 = 0; +volatile uint8_t halTaskFlags1 = 0; +volatile uint8_t halTaskFlags2 = 0; +volatile uint8_t halTaskFlags3 = 0; +volatile uint8_t halTaskFlags4 = 0; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +HAL task handler. +******************************************************************************/ +void HAL_TaskHandler() +{ + if (0) + { + } +#ifdef HAL_USE_TIMER2_COMPA + else if (halTaskFlags0 & HAL_ASYNC_TIMER) + { + ATOMIC_SECTION_ENTER + halTaskFlags0 &= (~HAL_ASYNC_TIMER); + ATOMIC_SECTION_LEAVE + halAsyncTimerHandler(); + } +#endif // HAL_USE_TIMER2_COMPA + +#ifdef HAL_USE_TIMER2_COMPA + else if (halTaskFlags0 & HAL_SYNC_SLEEP_TIME) + { + ATOMIC_SECTION_ENTER + halTaskFlags0 &= (~HAL_SYNC_SLEEP_TIME); + ATOMIC_SECTION_LEAVE + halSleepSystemTimeSynchronize(); + } +#endif // HAL_USE_TIMER2_COMPA + +#ifdef HAL_USE_SPI + else if (halTaskFlags2 & HAL_TASK_SPI) + { + ATOMIC_SECTION_ENTER + halTaskFlags2 &= (~HAL_TASK_SPI); + ATOMIC_SECTION_LEAVE + halSpiRxByteComplete(); + } +#endif // HAL_USE_SPI + +#ifdef HAL_USE_USART + else if (halTaskFlags2 & HAL_TASK_USART) + { + ATOMIC_SECTION_ENTER + halTaskFlags2 &= (~HAL_TASK_USART); + ATOMIC_SECTION_LEAVE + halSigUsartHandler(); + } +#endif // HAL_USE_USART + +#ifdef HAL_USE_ADC + else if (halTaskFlags3 & HAL_ADC) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_ADC); + ATOMIC_SECTION_LEAVE + halSigAdcHandler(); + } +#endif // HAL_USE_ADC + +#ifdef HAL_USE_EE_READY + else if (halTaskFlags3 & HAL_EE_READY) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_EE_READY); + ATOMIC_SECTION_LEAVE + halSigEepromReadyHandler(); + } +#endif // HAL_USE_EE_READY + +#ifdef HAL_USE_USB + else if (halTaskFlags3 & HAL_USB_ENDPOINTS) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_USB_ENDPOINTS); + ATOMIC_SECTION_LEAVE + halEndPointHandler(); + } +#endif // HAL_USE_USB + +#ifdef HAL_USE_USB + else if (halTaskFlags3 & HAL_USB_SUSPEND) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_USB_SUSPEND); + ATOMIC_SECTION_LEAVE + halSuspendHandler(); + } +#endif // HAL_USE_USB + +#ifdef HAL_USE_USB + else if (halTaskFlags3 & HAL_USB_RESUME) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_USB_RESUME); + ATOMIC_SECTION_LEAVE + halResumeHandler(); + } +#endif // HAL_USE_USB + +#ifdef _HAL_HW_AES_ + else if (halTaskFlags3 & HAL_SM_REQ) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_SM_REQ); + ATOMIC_SECTION_LEAVE + halSmRequestHandler(); + } +#endif // _HAL_HW_AES_ + +#ifdef HAL_USE_USB + else if (halTaskFlags3 & HAL_USB_BUS_RESET) + { + ATOMIC_SECTION_ENTER + halTaskFlags3 &= (~HAL_USB_BUS_RESET); + ATOMIC_SECTION_LEAVE + halBusResetHandler(); + } +#endif // HAL_USE_USB + +#ifdef HAL_USE_WAKEUP + else if (halTaskFlags4 & HAL_WAKEUP) + { + ATOMIC_SECTION_ENTER + halTaskFlags4 &= (~HAL_WAKEUP); + ATOMIC_SECTION_LEAVE + halWakeupHandler(); + } +#endif + +#ifdef HAL_USE_TWI + else if (halTaskFlags4 & HAL_TWI) + { + ATOMIC_SECTION_ENTER + halTaskFlags4 &= (~HAL_TWI); + ATOMIC_SECTION_LEAVE + halSig2WireSerialHandler(); + } +#endif // HAL_USE_TWI + +#ifdef HAL_USE_TIMER4_COMPA + else if (halTaskFlags4 & HAL_TIMER4_COMPA) + { + ATOMIC_SECTION_ENTER + halTaskFlags4 &= (~HAL_TIMER4_COMPA); + ATOMIC_SECTION_LEAVE + halAppTimerHandler(); + } +#endif // HAL_USE_TIMER4_COMPA + +#ifdef HAL_USE_SLEEP + else if (halTaskFlags4 & HAL_SLEEP) + { + ATOMIC_SECTION_ENTER + halTaskFlags4 &= (~HAL_SLEEP); + ATOMIC_SECTION_LEAVE + halPowerOff(); + } +#endif // HAL_USE_SLEEP + +#ifdef HAL_USE_EXT_HANDLER + else if (halTaskFlags4 & HAL_EXT_HANDLER) + { + ATOMIC_SECTION_ENTER + halTaskFlags4 &= (~HAL_EXT_HANDLER); + ATOMIC_SECTION_LEAVE + if (extHandler) + extHandler(); + } +#endif // HAL_USE_EXT_HANDLER + + if (halTaskFlags0 || + halTaskFlags1 || + halTaskFlags2 || + halTaskFlags3 || + halTaskFlags4) + { + SYS_PostTask(HAL_TASK_ID); + } +} + +// eof halTaskManager.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/i2cPacket.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/i2cPacket.c new file mode 100644 index 00000000..340981e1 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/i2cPacket.c @@ -0,0 +1,371 @@ +/**************************************************************************//** + \file i2cPacket.c + + \brief Provides the functionality for the writing and the reading \n + of packets through the TWI. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/* states of the i2c transaction */ +#define I2C_CLOSE 0 +#define I2C_IDLE 1 +#define I2C_WRITE_IADDR_WRITE_DATA 2 +#define I2C_WRITE_IADDR_READ_DATA 3 +#define I2C_WRITE_DATA 4 +#define I2C_READ_DATA 5 +#define I2C_TRANSAC_SUCCESS 6 +#define I2C_TRANSAC_FAIL 7 + +/****************************************************************************** + Types section +******************************************************************************/ +typedef struct +{ + volatile uint8_t* data; // bytes to write to the i2c bus + volatile uint8_t length; // length in bytes of the request + volatile uint8_t index; // current index of read/write byte + volatile uint8_t addr; // destination address + volatile uint32_t intAddress; // internal address inner i2c device + void (*done)(bool result); // callback +} HalI2cPacketControl_t; + +/****************************************************************************** + Global variables section +******************************************************************************/ +// current state of the i2c request +volatile uint8_t halI2cPacketState = I2C_CLOSE; +HalI2cPacketControl_t halI2cPacketControl; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Resets TWI bus and i2c HAL. +******************************************************************************/ +void halI2cBusReset(void) +{ + halI2cPacketState = I2C_TRANSAC_FAIL; + halResetI2c(); + halPostTask4(HAL_TWI); +} + +/****************************************************************************** +Opens resource. +Parameters: + i2cMode - pointer to clock rate structure. +Returns: + Returns: + -1 - resource was opened or pointer is NULL + 0 - success. +******************************************************************************/ +int HAL_OpenI2cPacket(HAL_i2cMode_t *i2cMode) +{ + if (NULL == i2cMode) + return -1; + if (I2C_CLOSE == halI2cPacketState) + { + halInitI2c(i2cMode); + halI2cPacketState = I2C_IDLE; + halI2cPacketControl.index = 0; + return 0; + } + return -1; +} + +/****************************************************************************** +Closes resource. +Returns: + -1 - resource was not opened. + 0 - success. +******************************************************************************/ +int HAL_CloseI2cPacket(void) +{ + if (I2C_CLOSE != halI2cPacketState) + { + halI2cPacketControl.done = NULL; + halI2cPacketState = I2C_CLOSE; + return 0; + } + return -1; +} + +/****************************************************************************** +Writes the series of bytes out to the TWI bus. +Parameters: + param - pointer to HAL_I2cParams_t structure +Returns: + 0 - the bus is free and the request is accepted. + -1 - other case. +******************************************************************************/ +int HAL_WriteI2cPacket(HAL_I2cParams_t *param) +{ + if ((I2C_IDLE == halI2cPacketState) && param) + { + halI2cPacketControl.addr = param->id; + halI2cPacketControl.data = param->data; + halI2cPacketControl.index = param->lengthAddr; + halI2cPacketControl.length = param->length; + halI2cPacketControl.done = param->f; + halI2cPacketControl.intAddress = param->internalAddr; + } + else + { + return -1; + } + + if (HAL_NO_INTERNAL_ADDRESS == halI2cPacketControl.index) + halI2cPacketState = I2C_WRITE_DATA; + else + halI2cPacketState = I2C_WRITE_IADDR_WRITE_DATA; + halSendStartI2c(); + return 0; +} + +/****************************************************************************** +Reads the series of bytes out to the TWI bus. +Parameters: + param - pointer to HAL_I2cParams_t structure +Returns: + 0 - the bus is free and the request is accepted. + -1 - other case. +******************************************************************************/ +int HAL_ReadI2cPacket(HAL_I2cParams_t *param) +{ + if ((I2C_IDLE == halI2cPacketState) && param) + { + halI2cPacketControl.addr = param->id; + halI2cPacketControl.index = param->lengthAddr; + halI2cPacketControl.length = param->length; + halI2cPacketControl.data = param->data; + halI2cPacketControl.done = param->f; + halI2cPacketControl.intAddress = param->internalAddr; + } + else + { + return -1; + } + + if (HAL_NO_INTERNAL_ADDRESS == halI2cPacketControl.index) + halI2cPacketState = I2C_READ_DATA; + else + halI2cPacketState = I2C_WRITE_IADDR_READ_DATA; + halSendStartI2c(); + return 0; +} + +/****************************************************************************** +Notification about the start condition was sent. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void halSendStartDoneI2c(void) +{ + if ((I2C_WRITE_IADDR_WRITE_DATA == halI2cPacketState) || + (I2C_WRITE_IADDR_READ_DATA == halI2cPacketState) || + (I2C_WRITE_DATA == halI2cPacketState)) + { + halWriteI2c(((halI2cPacketControl.addr << 1) + 0)); + } + else if (I2C_READ_DATA == halI2cPacketState) + { + halWriteI2c(((halI2cPacketControl.addr << 1) + 1)); + } + else + { // abnormal + halI2cBusReset(); + } +} + +/****************************************************************************** +Sending data to i2c bus. If last byte then send stop condition and post task. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void halWriteData(void) +{ + if (halI2cPacketControl.index < halI2cPacketControl.length) + { + halWriteI2c(halI2cPacketControl.data[halI2cPacketControl.index++]); + } + else + { + halI2cPacketState = I2C_TRANSAC_SUCCESS; + halSendStopI2c(); + halPostTask4(HAL_TWI); + } +} + +/****************************************************************************** +Sending internal device address to i2c bus. If address is sent then switch i2c +hal state. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void halWriteInternalAddress(void) +{ + uint8_t data; + + data = (uint8_t)(halI2cPacketControl.intAddress >> --halI2cPacketControl.index * 8); + halWriteI2c(data); + + if (0 == halI2cPacketControl.index) + { + if (I2C_WRITE_IADDR_WRITE_DATA == halI2cPacketState) + halI2cPacketState = I2C_WRITE_DATA; + else + halI2cPacketState = I2C_READ_DATA; + } +} + +/****************************************************************************** +Notification that byte was written to the TWI. +Parameters: + result - contains result of previous operation. +Returns: + none. +******************************************************************************/ +void halWriteDoneI2c(void) +{ + if (I2C_WRITE_DATA == halI2cPacketState) + { + halWriteData(); + } + else if ((I2C_WRITE_IADDR_WRITE_DATA == halI2cPacketState) || (I2C_WRITE_IADDR_READ_DATA == halI2cPacketState)) + { + halWriteInternalAddress(); + } + else if (I2C_READ_DATA == halI2cPacketState) + { + halSendStartI2c(); + } + else + { // abnormal + halI2cBusReset(); + } +} + +/****************************************************************************** +Notification that address byte was written to the TWI and was read ACK. +Starts reading data. +Parameters: + none. +Returns: + none. +******************************************************************************/ +void halMasterReadWriteAddressAckI2c(void) +{ + if (I2C_READ_DATA == halI2cPacketState) + { + if (1 == halI2cPacketControl.length) + halReadI2c(false); // send nack + else + halReadI2c(true); // send ack + } + else + { // abnormal + halI2cBusReset(); + } +} + +/****************************************************************************** +Notification that byte was read from the TWI. +Parameters: + data - contains byte that was read. +Returns: + none. +******************************************************************************/ +void halReadDoneI2c(uint8_t data) +{ + if (I2C_READ_DATA == halI2cPacketState) + { + halI2cPacketControl.data[halI2cPacketControl.index++] = data; + if (halI2cPacketControl.index < (halI2cPacketControl.length - 1)) + halReadI2c(true); // send ACK + else + halReadI2c(false); // send NACK + } + else + { // abnormal + halI2cBusReset(); + } +} + +/****************************************************************************** +Notification that last byte was read from the TWI. Needs send STOP condition +on bus. +Parameters: + data - contains byte that was read. +Returns: + none. +******************************************************************************/ +void halReadLastByteDoneI2c(uint8_t data) +{ + if (I2C_READ_DATA == halI2cPacketState) + { + halI2cPacketControl.data[halI2cPacketControl.index++] = data; + halI2cPacketState = I2C_TRANSAC_SUCCESS; + halSendStopI2c(); + halPostTask4(HAL_TWI); + } + else + { // abnormal + halI2cBusReset(); + } +} + +/****************************************************************************** +Waits for end of sending and calls user's callback +******************************************************************************/ +void halSig2WireSerialHandler(void) +{ + if (halI2cPacketControl.done) + { + if (I2C_TRANSAC_SUCCESS == halI2cPacketState) + { + halWaitEndOfStopStation(); + halI2cPacketState = I2C_IDLE; + halI2cPacketControl.done(true); + } + else + { + halI2cPacketState = I2C_IDLE; + halI2cPacketControl.done(false); + } + } + else + { + halI2cPacketState = I2C_IDLE; + } +} +// eof i2cPacket.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/irq.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/irq.c new file mode 100644 index 00000000..c681ba74 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/irq.c @@ -0,0 +1,143 @@ +/**************************************************************************//** + \file irq.c + + \brief Implementation of IRQ interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern IrqCallback_t IrqCallbackList[HAL_NUM_IRQ_LINES]; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Registers user's irqNumber interrupt + Parameters: + irqNumber - IRQ number + irqMode - Interrupt sence control + f - user's interrupt handler. Handler must be executed less than 100 us. + Returns: + -1 - if irqNumber is out of range, not valid irq mode, invalid interrupt handler + or such interrupt has been already registered. + 0 - otherwise. +******************************************************************************/ +int HAL_RegisterIrq(HAL_IrqNumber_t irqNumber, HAL_IrqMode_t irqMode, void (*f)(void)) +{ + uint8_t irqOffsetNumber = irqNumber - HAL_FIRST_VALID_IRQ; + + // irqNumber is out of range + if (irqOffsetNumber >= HAL_NUM_IRQ_LINES) + return -1; + // Such interrupt has been already register + if (NULL != IrqCallbackList[irqOffsetNumber]) + return -1; + // not valid irq mode + if (IRQ_HIGH_LEVEL == irqMode) + return -1; + // invalid interrupt handler + if (NULL == f) + return -1; + + /* type HAL_IrqMode_t has not valid IRQ_HIGH_LEVEL state, + * because for saving to register all states need decrement after IRQ_LOW_LEVEL state. */ + if (IRQ_LOW_LEVEL == irqMode) + halSetIrqConfig(irqNumber, irqMode); + else + halSetIrqConfig(irqNumber, irqMode - 1); + + IrqCallbackList[irqOffsetNumber] = f; + return 0; +} + +/****************************************************************************** + Enables irqNumber interrupt + Parameters: + irqNumber - IRQ number + Returns: + -1 - if irqNumber is out of range or has not been + registered yet. + 0 - otherwise. +******************************************************************************/ +int HAL_EnableIrq(HAL_IrqNumber_t irqNumber) +{ + uint8_t irqOffsetNumber = irqNumber - HAL_FIRST_VALID_IRQ; + // irqNumber is out of range + if (irqOffsetNumber >= HAL_NUM_IRQ_LINES) + return -1; + // Interrupt has not been opened yet + if (NULL == IrqCallbackList[irqOffsetNumber]) + return -1; + halEnableIrqInterrupt(irqNumber); + return 0; +} + +/****************************************************************************** + Disables irqNumber interrupt + Parameters: + irqNumber - IRQ number + Returns: + -1 - if irqNumber is out of range or has not been + registered yet. + 0 - otherwise. +******************************************************************************/ +int HAL_DisableIrq(HAL_IrqNumber_t irqNumber) +{ + uint8_t irqOffsetNumber = irqNumber - HAL_FIRST_VALID_IRQ; + // irqNumber is out of range + if (irqOffsetNumber >= HAL_NUM_IRQ_LINES) + return -1; + // Interrupt has not been opened yet + if (NULL == IrqCallbackList[irqOffsetNumber]) + return -1; + halDisableIrqInterrupt(irqNumber); + return 0; +} + +/****************************************************************************** + Unregisters user's irqNumber interrupt + Parameters: + irqNumber - IRQ number + Returns: + -1 - if irqNumber is out of range or has not been + registered yet. + 0 - otherwise. +******************************************************************************/ +int HAL_UnregisterIrq(HAL_IrqNumber_t irqNumber) +{ + uint8_t irqOffsetNumber = irqNumber - HAL_FIRST_VALID_IRQ; + // irqNumber is out of range + if (irqOffsetNumber >= HAL_NUM_IRQ_LINES) + return -1; + // Interrupt has not been opened yet + if (NULL == IrqCallbackList[irqOffsetNumber]) + return -1; + // Disable external interrupt request + halDisableIrqInterrupt(irqNumber); + halClrIrqConfig(irqNumber); + IrqCallbackList[irqOffsetNumber] = NULL; + return 0; +} + +// eof irq.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/pwm.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/pwm.c new file mode 100644 index 00000000..ad7b18a2 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/pwm.c @@ -0,0 +1,165 @@ +/**************************************************************************//** + \file pwm.c + + \brief Implementation of PWM interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/11/08 A. Taradov - Created + 5/04/11 A.Razinkov - Refactored +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ + +/****************************************************************************** + Constants section +******************************************************************************/ + +/****************************************************************************** + Global variables section +******************************************************************************/ + +/****************************************************************************** + Implementations section +******************************************************************************/ + +/**************************************************************************//** +\brief Initializes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. + +\return operation status +******************************************************************************/ +int HAL_OpenPwm(HAL_PwmUnit_t pwmUnit) +{ + /* Check PWM unit */ + if ((PWM_UNIT_1 == pwmUnit) || (PWM_UNIT_3 == pwmUnit)) + halOpenPwm(pwmUnit); + else + return PWM_INVALID_UNIT_STATUS; + + return PWM_SUCCESS_STATUS; +} + +/**************************************************************************//** +\brief Starts PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. + +\return operation status +******************************************************************************/ +int HAL_StartPwm(HAL_PwmDescriptor_t *descriptor) +{ + /* Invalid PWM channel specified */ + if (PWM_INVALID_CHANNEL <= descriptor->channel) + return PWM_INVALID_CHANNEL_STATUS; + /* Check PWM unit */ + if ((PWM_UNIT_1 == descriptor->unit) || (PWM_UNIT_3 == descriptor->unit)) + { + halPreparePwmChannelAccess(descriptor); + halStartPwm(descriptor); + } + else + return PWM_INVALID_UNIT_STATUS; + + return PWM_SUCCESS_STATUS; +} + +/**************************************************************************//** +\brief Stops PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. + +\return operation status +******************************************************************************/ +int HAL_StopPwm(HAL_PwmDescriptor_t *descriptor) +{ + /* Invalid PWM channel specified */ + if (PWM_INVALID_CHANNEL <= descriptor->channel) + return PWM_INVALID_CHANNEL_STATUS; + else + halStopPwm(descriptor); + + return PWM_SUCCESS_STATUS; +} + +/**************************************************************************//** +\brief Sets base frequency of module. Common for all module channels. + +\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID. +\param [in] top - value for the TOP register. +\param [in] prescaler - clock prescaler. + +\return operation status +******************************************************************************/ +int HAL_SetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler) +{ + /* Check prescaler value */ + if (PWM_PRESCALER_INVALID <= prescaler) + return PWM_INVALID_PRESCALER_STATUS; + else halSetPwmFrequency(pwmUnit, top, prescaler); + + return PWM_SUCCESS_STATUS; +} + +/**************************************************************************//** +\brief Sets compare value for the PWM channel. + +\param [in] descriptor - PWM channel descriptor. + +\return operation status +******************************************************************************/ +int HAL_SetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue) +{ + /* Invalid PWM channel specified */ + if (PWM_INVALID_CHANNEL <= descriptor->channel) + return PWM_INVALID_CHANNEL_STATUS; + /* Check PWM unit */ + if ((PWM_UNIT_1 == descriptor->unit) || (PWM_UNIT_3 == descriptor->unit)) + halSetPwmCompareValue(descriptor, cmpValue); + else + return PWM_INVALID_UNIT_STATUS; + + return PWM_SUCCESS_STATUS; +} + +/**************************************************************************//** +\brief Closes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. + +\return operation status +******************************************************************************/ +int HAL_ClosePwm(HAL_PwmUnit_t pwmUnit) +{ + /* Check PWM unit */ + if ((PWM_UNIT_1 == pwmUnit) || (PWM_UNIT_3 == pwmUnit)) + halClosePwm(pwmUnit); + else + return PWM_INVALID_UNIT_STATUS; + + return PWM_SUCCESS_STATUS; +} + +// eof pwm.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/resetReason.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/resetReason.c new file mode 100644 index 00000000..0fecaa11 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/resetReason.c @@ -0,0 +1,59 @@ +/**************************************************************************//** + \file halWdtInit.c + + \brief Implementation of the reset reason interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + External variables section +******************************************************************************/ +extern uint8_t halResetReason; // contains the reset reason + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Returns the reset reason. +Parameters: + none. +Returns: + The reason of reset. +******************************************************************************/ +HAL_ResetReason_t HAL_ReadResetReason(void) +{ + return (HAL_ResetReason_t)halResetReason; +} + +/****************************************************************************** +Software reset. +******************************************************************************/ +void HAL_WarmReset(void) +{ + + halResetReason = TEMP_WARM_RESET; + wdt_enable(0); + while(1); +} +//eof resetReason.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleep.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleep.c new file mode 100644 index 00000000..1ad72df2 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleep.c @@ -0,0 +1,79 @@ +/**************************************************************************//** + \file sleep.c + + \brief The implementation of common sleep and wake up. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/12/09 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define HAL_NULL_POINTER -1 +#define HAL_SLEEP_TIMER_HAS_ALREADY_STARTED -3 +#define HAL_SLEEP_TIMER_IS_BUSY -2 +#define HAL_SLEEP_SYSTEM_HAS_ALREADY_STARTED -3 + +/****************************************************************************** + Global variables section +******************************************************************************/ +HalSleepControl_t halSleepControl = +{ + .wakeupStation = HAL_ACTIVE_MODE, + .sleepTimerState = HAL_SLEEP_TIMER_IS_STOPPED +}; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Starts sleep timer and HAL sleep. When system is wake up send callback +\param[in] + sleepParam - pointer to sleep structure. +\return + -1 - bad pointer, \n + -2 - sleep timer is busy, \n + -3 - sleep system has been started. + 0 - success. +******************************************************************************/ +int HAL_StartSystemSleep(HAL_Sleep_t *sleepParam) +{ + HAL_SleepTimer_t sleepTimer; + int sleepTimerStatus; + + if (!sleepParam) + return HAL_NULL_POINTER; + + halSleepControl.callback = sleepParam->callback; + sleepTimer.interval = sleepParam->sleepTime; + sleepTimer.mode = TIMER_ONE_SHOT_MODE; + sleepTimer.callback = NULL; + + sleepTimerStatus = HAL_StartSleepTimer(&sleepTimer); + if ((HAL_NULL_POINTER == sleepTimerStatus) || (HAL_SLEEP_TIMER_HAS_ALREADY_STARTED == sleepTimerStatus)) + return HAL_SLEEP_TIMER_IS_BUSY; + + if (-1 == HAL_Sleep()) + return HAL_SLEEP_SYSTEM_HAS_ALREADY_STARTED; + + return 0; +} + +//eof sleep.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleepTimer.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleepTimer.c new file mode 100644 index 00000000..f83d2446 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/sleepTimer.c @@ -0,0 +1,126 @@ +/**************************************************************************//** + \file sleepTimer.c + + \brief The implementation of the sleep timer. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define HAL_NULL_POINTER -1 +#define HAL_TIME_CAN_NOT_BE_COUNTED -2 +#define HAL_SLEEP_TIMER_HAS_ALREADY_STARTED -3 +#define HAL_SLEEP_TIMER_HAS_ALREADY_STOPPED -1 + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern HalSleepControl_t halSleepControl; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Starts sleep timer. Interval must be greater one tick time. + Parameters: + sleepTimer - address of the HAL_SleepTimer_t. + Returns: + -1 - NULL pointer, \n + -2 - interval can not be counted out, \n + -3 - sleep timer has already started. \n + 0 - otherwise. +******************************************************************************/ +int HAL_StartSleepTimer(HAL_SleepTimer_t *sleepTimer) +{ + uint32_t tempValue; + + if (!sleepTimer) + return HAL_NULL_POINTER; + + // Convert millisecond interval to the sleep timer ticks. + tempValue = (halSleepTimerFrequency() * sleepTimer->interval) / 1000ul; + if (!tempValue) + return HAL_TIME_CAN_NOT_BE_COUNTED;// Can't count out interval + + if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState) // there is active timer + return HAL_SLEEP_TIMER_HAS_ALREADY_STARTED; + + halSleepControl.sleepTimerState = HAL_SLEEP_TIMER_IS_STARTED; + halSleepControl.sleepTimer = *sleepTimer; + // Start asynchronous timer2. + halSetSleepTimerInterval(tempValue); + return 0; +}// end sleepTimer_start + +/****************************************************************************** +Removes timer. +Parameters: + sleepTimer - is not used now. For capabilities for old version. +Returns: + -1 - there is no active sleep timer. + 0 - otherwise. +******************************************************************************/ +int HAL_StopSleepTimer(HAL_SleepTimer_t *sleepTimer) +{ + (void)sleepTimer; + + // there is no active timer + if (HAL_SLEEP_TIMER_IS_STOPPED == halSleepControl.sleepTimerState) + return HAL_SLEEP_TIMER_HAS_ALREADY_STOPPED; + halClearTimeControl(); + halSleepControl.sleepTimerState = HAL_SLEEP_TIMER_IS_STOPPED; + + return 0; +} + +/****************************************************************************** +Interrupt handler about sleep interval was completed. +******************************************************************************/ +void halAsyncTimerHandler(void) +{ + // there isn't work timer + if (HAL_SLEEP_TIMER_IS_STOPPED == halSleepControl.sleepTimerState) + return; + + if (TIMER_REPEAT_MODE == halSleepControl.sleepTimer.mode) + { + if (halSleepControl.sleepTimer.callback) + halSleepControl.sleepTimer.callback(); + + // user can stop timer in callback + if (HAL_SLEEP_TIMER_IS_STOPPED == halSleepControl.sleepTimerState) + return; + + halSetSleepTimerInterval(halSleepControl.sleepTimer.interval); + } + else + { + halSleepControl.sleepTimerState = HAL_SLEEP_TIMER_IS_STOPPED; + if (halSleepControl.sleepTimer.callback) + halSleepControl.sleepTimer.callback(); + } +} + +//eof sleepTimer.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/spi.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/spi.c new file mode 100644 index 00000000..cd4c55b0 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/spi.c @@ -0,0 +1,602 @@ +/**************************************************************************//** + \file spi.c + + \brief Implementation of USART SPI mode, hardware-independent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Global functions prototypes section +******************************************************************************/ +void halSetUsartSpiConfig(HAL_SpiDescriptor_t *descriptor); +void halSetSlaveSpiConfig(HAL_SpiDescriptor_t *descriptor); + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern HAL_UsartDescriptor_t *halPointDescrip[NUM_USART_CHANNELS]; +#if defined(ATMEGA128RFA1) + extern HAL_SpiDescriptor_t *halRealSpiDescripPointer; + extern volatile uint8_t rxSlaveBuffer[HAL_SPI_RX_BUFFER_LENGTH]; +#endif + +/****************************************************************************** + Static functions prototypes section +******************************************************************************/ +static bool isClosedPd(void *pointer); +static bool isOpenedPd(void *pointer); +static int halCheckUsartDescriptor(HAL_SpiDescriptor_t *descriptor, bool(* predicate)(void *)); +static int halOpenUsartSpi(HAL_SpiDescriptor_t *descriptor); +static int halCloseUsartSpi(HAL_SpiDescriptor_t *descriptor); +static int halFillServiceInfo(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length, uint8_t transac); +static int halWriteUsartSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); +static int halReadUsartSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); +#if defined(ATMEGA128RFA1) +static int halCheckSpiDescriptor(HAL_SpiDescriptor_t *descriptor, bool(* predicate)(void *)); +static int halOpenRealSpi(HAL_SpiDescriptor_t *descriptor); +static int halCloseRealSpi(HAL_SpiDescriptor_t *descriptor); +static int halWriteRealSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); +static int halReadRealSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); +#endif + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Predicate for check of closed station. +\param[in] + pointer - pointer to some descriptor. +\return + true - interface is closed; + false - interface is not closed. +******************************************************************************/ +static bool isClosedPd(void *pointer) +{ + return pointer ? false : true; +} + +/**************************************************************************//** +\brief Predicate for check of opened station. +\param[in] + pointer - pointer to some descriptor. +\return + true - interface is opened; + false - interface is not opened. +******************************************************************************/ +static bool isOpenedPd(void *pointer) +{ + return pointer ? true : false; +} + +/**************************************************************************//** +\brief Check correctenss of the usart spi descriptor. +\param[in] + descriptor - pointer to the usart spi descriptor. +\param[in] + predicate - check station predicate. +\return + interface index - interface is opened; + -1 - interface is not opened. +******************************************************************************/ +static int halCheckUsartDescriptor(HAL_SpiDescriptor_t *descriptor, bool(* predicate)(void *)) +{ + int i; + + if (NULL == descriptor) + return -1; + + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (false == predicate((void *)halPointDescrip[i])) + return -1; + + return i; +} + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Check correctenss of the real spi descriptor. +\param[in] + descriptor - pointer to the real spi descriptor. +\param[in] + predicate - check station predicate. +\return + 0 - interface is opened; + -1 - interface is not opened. +******************************************************************************/ +static int halCheckSpiDescriptor(HAL_SpiDescriptor_t *descriptor, bool(* predicate)(void *)) +{ + if (NULL == descriptor) + return -1; + + if (SPI_CHANNEL_2 != descriptor->tty) + return -1; + + if (false == predicate((void *)halRealSpiDescripPointer)) + return -1; + + return 0; +} +#endif + +/**************************************************************************//** +\brief Configure usart in mspi mode. +\param[in] + descriptor - pointer to the usart spi descriptor. +\return + -1 - there not are free resources. + 0 - SPI channel is ready. +******************************************************************************/ +static int halOpenUsartSpi(HAL_SpiDescriptor_t *descriptor) +{ + int i; // Descriptor index + + i = halCheckUsartDescriptor(descriptor, isClosedPd); + if (-1 == i) + return -1; + + if (NULL != descriptor->callback) + { + descriptor->spiDescriptor.txCallback = descriptor->callback; + descriptor->spiDescriptor.tty = descriptor->tty; + } + + halPointDescrip[i] = &descriptor->spiDescriptor; + halSetUsartSpiConfig(descriptor); + return 0; +} + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Configure spi. +\param[in] + descriptor - pointer to the spi descriptor. +\return + -1 - there are no free resources. + 0 - SPI channel is ready. +******************************************************************************/ +static int halOpenRealSpi(HAL_SpiDescriptor_t *descriptor) +{ + if (-1 == halCheckSpiDescriptor(descriptor, isClosedPd)) + return -1; + + halRealSpiDescripPointer = descriptor; + halRealSpiDescripPointer->spiDescriptor.service.txPointOfRead = 0; + halRealSpiDescripPointer->spiDescriptor.service.txPointOfWrite = 0; + halRealSpiDescripPointer->spiDescriptor.service.rxPointOfRead = 0; + halRealSpiDescripPointer->spiDescriptor.service.rxPointOfWrite = 0; + halSetSlaveSpiConfig(descriptor); + return 0; +} +#endif + +/**************************************************************************//** +\brief Open the SPI interface. +\param[in] + descriptor - pointer to the spi descriptor. +\return + -1 - there not are free resources. + 0 - SPI channel is ready. +******************************************************************************/ +int HAL_OpenSpi(HAL_SpiDescriptor_t *descriptor) +{ +#if defined(ATMEGA128RFA1) + if (SPI_CHANNEL_2 == descriptor->tty) + return halOpenRealSpi(descriptor); + else +#endif + return halOpenUsartSpi(descriptor); +} + +/**************************************************************************//** +\brief Clear the usart channel and pins. +\param[in] + descriptor - pointer to the spi descriptor. +\return + 0 - success + -1 - channel was not opened. +******************************************************************************/ +static int halCloseUsartSpi(HAL_SpiDescriptor_t *descriptor) +{ + int i; + + i = halCheckUsartDescriptor(descriptor, isOpenedPd); + if (-1 == i) + return -1; + + halPointDescrip[i] = NULL; + halClearUsartSpi(descriptor->tty); + return 0; +} + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Clear the spi channel and pins. +\param[in] + descriptor - pointer to the spi descriptor. +\return + Returns 0 on success or -1 if channel was not opened. +******************************************************************************/ +static int halCloseRealSpi(HAL_SpiDescriptor_t *descriptor) +{ + if (-1 == halCheckSpiDescriptor(descriptor, isClosedPd)) + return -1; + + halRealSpiDescripPointer = NULL; + halClearRealSpi(); + return 0; +} +#endif + +/**************************************************************************//** +\brief Close the SPI channel and pins. +\param[in] + descriptor - pointer to the spi descriptor. +\return + Returns 0 on success or -1 if channel was not opened. +******************************************************************************/ +int HAL_CloseSpi(HAL_SpiDescriptor_t *descriptor) +{ +#if defined(ATMEGA128RFA1) + if (SPI_CHANNEL_2 == descriptor->tty) + return halCloseRealSpi(descriptor); + else +#endif + return halCloseUsartSpi(descriptor); +} + +/**************************************************************************//** +\brief Fill service structure for bus transaction. +\param[in] + descriptor - pointer to the spi descriptor. +\param[in] + buffer -pointer to data buffer. +\param[in] + length - length of the data buffer. +\param[in] + transac - bus transaction type. +\return + -1 - interface is busy; + 0 - success. +******************************************************************************/ +static int halFillServiceInfo(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length, uint8_t transac) +{ + HalUsartService_t *halBufferControl; + + halBufferControl = &descriptor->spiDescriptor.service; + if (halBufferControl->txPointOfWrite != halBufferControl->txPointOfRead) + return -1; // there is unsent data + + descriptor->spiDescriptor.txBuffer = buffer; + descriptor->spiDescriptor.txBufferLength = 0; + halBufferControl->txPointOfWrite = length; + halBufferControl->txPointOfRead = 0; + descriptor->spiDescriptor.rxBuffer = buffer; + descriptor->spiDescriptor.flowControl = transac; + return 0; +} + +/**************************************************************************//** +\brief Writes a length bytes to the usart. \n + Callback function will be used to notify about the finishing transmitting. +\param[in] + descriptor - pointer to spi descriptor +\param[in] + buffer - pointer to application data buffer; +\param[in] + length - number bytes for transfer; +\return + -1 - spi module was not opened, there is unsent data, pointer to the data or + the length are zero; \n + 0 - on success or a number; \n + Number of written bytes if the synchronous method is used(callback is NULL). +******************************************************************************/ +static int halWriteUsartSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + int i; + + if (!buffer || !length) + return -1; + + i = halCheckUsartDescriptor(descriptor, isOpenedPd); + if (-1 == i) + return -1; + + if (&descriptor->spiDescriptor != halPointDescrip[i]) + return -1; // incorrect descriptor + + if (NULL != descriptor->callback) + { + if (-1 == halFillServiceInfo(descriptor, buffer, length, USART_SPI_WRITE_MODE)) + return -1; + + halEnableUsartSpiRxcInterrupt(descriptor->tty); + halEnableUsartSpiDremInterrupt(descriptor->tty); + return 0; + } + else + { + return halSyncUsartSpiWriteData(descriptor->tty, buffer, length); + } +} + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Writes a length bytes to the spi. \n +\param[in] + descriptor - pointer to spi descriptor +\param[in] + buffer - pointer to application data buffer; +\param[in] + length - number bytes for transfer; +\return + -1 - spi module was not opened, there is unsent data, pointer to the data or + the length are zero; \n + 0 - on success or a number; \n +******************************************************************************/ +static int halWriteRealSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + if (!buffer || !length) + return -1; + + if (-1 == halCheckSpiDescriptor(descriptor, isOpenedPd)) + return -1; + + if (descriptor != halRealSpiDescripPointer) + return -1; // incorrect descriptor + + if (-1 == halFillServiceInfo(descriptor, buffer, length, USART_SPI_WRITE_MODE)) + return -1; + + halSendSpiByte(*buffer); + return 0; +} +#endif + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Put next byte to the spi. +******************************************************************************/ +void halSpiTxByteComplete(void) +{ + HalUsartService_t *halBufferControl; + + halBufferControl = &halRealSpiDescripPointer->spiDescriptor.service; + + if (halBufferControl->txPointOfWrite != halBufferControl->txPointOfRead) + halSendSpiByte(halRealSpiDescripPointer->spiDescriptor.txBuffer[++halBufferControl->txPointOfRead]); +} +#endif + +/**************************************************************************//** +\brief Writes a length bytes to the SPI. \n + Callback function will be used to notify about the finishing transmitting. + (only for master spi) +\param[in] + descriptor - pointer to spi descriptor +\param[in] + buffer - pointer to application data buffer; +\param[in] + length - number bytes for transfer; +\return + -1 - spi module was not opened, there is unsent data, pointer to the data or + the length are zero; \n + 0 - on success or a number; \n + Number of written bytes if the synchronous method is used(callback is NULL), \n + only for master spi. +******************************************************************************/ +int HAL_WriteSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ +#if defined(ATMEGA128RFA1) + if (SPI_CHANNEL_2 == descriptor->tty) + return halWriteRealSpi(descriptor, buffer, length); + else +#endif + return halWriteUsartSpi(descriptor, buffer, length); +} + +/**************************************************************************//** +\brief Reads a number of bytes from the usart.\n + Callback function will be used to notify when the activity is finished.\n + The read data is placed to the buffer. +\param[in] + descriptor - pointer to HAL_SpiDescriptor_t structure +\param[in] + buffer - pointer to the application data buffer +\param[in] + length - number of bytes to transfer +\return + -1 - spi module was not opened, or there is unsent data, or the pointer to + data or the length are NULL; \n + 0 - success; \n + Number of written bytes if the synchronous method is used(callback is NULL). +******************************************************************************/ +static int halReadUsartSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + HAL_UsartDescriptor_t *spiDescrip; + int i; + + if (!buffer || !length) + return -1; + + i = halCheckUsartDescriptor(descriptor, isOpenedPd); + if (-1 == i) + return -1; + + spiDescrip = &descriptor->spiDescriptor; + if (spiDescrip != halPointDescrip[i]) + return -1; // incorrect descriptor + + if (NULL != descriptor->callback) + { + if (-1 == halFillServiceInfo(descriptor, buffer, length, USART_SPI_READ_MODE)) + return -1; + + halEnableUsartSpiRxcInterrupt(descriptor->tty); + halEnableUsartSpiDremInterrupt(descriptor->tty); + return 0; + } + else + { + return halSyncUsartSpiReadData(descriptor->tty, buffer, length); + } +} + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Reads a number of bytes from spi internal buffer and places them to the buffer. +\param[in] + descriptor - pointer to HAL_SpiDescriptor_t structure +\param[in] + buffer - pointer to the application data buffer +\param[in] + length - number of bytes to transfer +\return + -1 - spi module was not opened, or there is unsent data, or the pointer to + data or the length are NULL; \n + Number of read bytes from spi internal buffer. +******************************************************************************/ +static int halReadRealSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint16_t wasRead = 0; + uint16_t poW; + uint16_t poR; + HalUsartService_t *halBufferControl; + + if (!buffer || !length) + return -1; + + if (-1 == halCheckSpiDescriptor(descriptor, isOpenedPd)) + return -1; + + if (descriptor != halRealSpiDescripPointer) + return -1; // incorrect descriptor + + halBufferControl = &halRealSpiDescripPointer->spiDescriptor.service; + ATOMIC_SECTION_ENTER + poW = halBufferControl->rxPointOfWrite; + poR = halBufferControl->rxPointOfRead; + ATOMIC_SECTION_LEAVE + + while ((poR != poW) && (wasRead < length)) + { + buffer[wasRead] = rxSlaveBuffer[poR]; + if (HAL_SPI_RX_BUFFER_LENGTH == ++poR) + poR = 0; + wasRead++; + } + + ATOMIC_SECTION_ENTER + halBufferControl->rxPointOfRead = poR; + halBufferControl->rxBytesInBuffer -= wasRead; + ATOMIC_SECTION_LEAVE + + return wasRead; +} +#endif + +/**************************************************************************//** +\brief For master : writes a number of bytes to the spi.\n + Callback function will be used to notify when the activity is finished.\n + The read data is placed to the buffer. \n + For slave: reads a number of bytes from internal spi buffer and writes them \n + to application buffer. +\param[in] + descriptor - pointer to HAL_SpiDescriptor_t structure +\param[in] + buffer - pointer to the application data buffer +\param[in] + length - number of bytes to transfer +\return + -1 - spi module was not opened, or there is unsent data, or the pointer to + data or the length are NULL; \n + 0 - success for master; \n + Number of written bytes if the synchronous method is used(callback is NULL) for master \n + or number of read bytes from internal buffer to the application buffer for slave. +******************************************************************************/ +int HAL_ReadSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ +#if defined(ATMEGA128RFA1) + if (SPI_CHANNEL_2 == descriptor->tty) + return halReadRealSpi(descriptor, buffer, length); + else +#endif + return halReadUsartSpi(descriptor, buffer, length); +} + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Puts the received byte to the cyclic buffer. + +\param[in] + data - data to put. +******************************************************************************/ +void halSpiRxBufferFiller(uint8_t data) +{ + uint16_t old; + HalUsartService_t *halBufferControl; + + if (NULL == halRealSpiDescripPointer) + {// abnormal + halClearRealSpi(); + return; + } + + halBufferControl = &halRealSpiDescripPointer->spiDescriptor.service; + old = halBufferControl->rxPointOfWrite; + + if (HAL_SPI_RX_BUFFER_LENGTH == ++halBufferControl->rxPointOfWrite) + halBufferControl->rxPointOfWrite = 0; + + if (halBufferControl->rxPointOfWrite == halBufferControl->rxPointOfRead) + { // Buffer full. + halBufferControl->rxPointOfWrite = old; + return; + } // Buffer full. + + rxSlaveBuffer[old] = data; + halBufferControl->rxBytesInBuffer++; +} +#endif + +#if defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Slave spi reception complete interrupt handler. +******************************************************************************/ +void halSpiRxByteComplete(void) +{ + uint16_t number; + + ATOMIC_SECTION_ENTER + number = halRealSpiDescripPointer->spiDescriptor.service.rxBytesInBuffer; + ATOMIC_SECTION_LEAVE + + if (number) + if (NULL != halRealSpiDescripPointer->slave_callback) + halRealSpiDescripPointer->slave_callback(number); +} +#endif + +// eof spi.c + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/timer.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/timer.c new file mode 100644 index 00000000..ca36cca9 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/timer.c @@ -0,0 +1,114 @@ +/**************************************************************************//** + \file timer.c + + \brief Functions to manipulate by timers list. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 7/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Adds timer to the timer's list. +Parameters: + head - address of pointer to head of the timers list. + timer - address of timer that must be added to the list. + sysTime - current time. +Returns: + none. +******************************************************************************/ +void halAddTimer(Timer_t **head, Timer_t *new, uint32_t sysTime) +{ + if (!*head) + { + *head = new; + return; + } + + Timer_t *it, *prev = NULL; + for (it = *head; it; it = it->service.next) + { + uint32_t remain = it->service.sysTimeLabel + it->interval - sysTime; + if ((remain < INT32_MAX) && (remain >= new->interval)) + break; + prev = it; + } + if (it == *head) + { + new->service.next = *head; + *head = new; + } + else + { + prev->service.next = new; + new->service.next = it; + } +} + +/****************************************************************************** +Removes timer from the timers list. +Parameters: + head - address of pointer to head of the timers list. + prev - address of the timer before the timer that must be removed from the list. + p - address of timer that must be removed from the list. +Returns: + pointer to next cell or pointer to head if deleting is head +******************************************************************************/ +Timer_t* halRemoveTimer(Timer_t **head, Timer_t *prev, Timer_t *p) +{ + Timer_t *t; + + if (p == *head) + {// removing first element of list + t = p->service.next; + p->service.next = 0; + *head = t; + return *head; + } + else + { + prev->service.next = p->service.next; + p->service.next = 0; + return prev->service.next; + } +} + +/****************************************************************************** +The search of the timer in the timers list before one. +Parameters: + head - address of pointer to head of the timers list. +Returns: + pointer to saerching timer +******************************************************************************/ +Timer_t *halFindPrevTimer(Timer_t **head, Timer_t *p) +{ + Timer_t *t = *head; + + for (; t ;) + { + if (t->service.next == p) + return t; + t = t->service.next; + } + return NULL; +} +//eof timer.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usart.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usart.c new file mode 100644 index 00000000..53a63927 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usart.c @@ -0,0 +1,1061 @@ +/**************************************************************************//** +\file usart.c + +\brief USART implementation. Asynchronous mode. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/05/07 E. Ivanov - Created + 18/02/09 A. Luzhetsky - Corretced. +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define HANDLERS_GET(A, I) memcpy_P(A, &halUsartHandlers[I], sizeof(HalUsartTask_t)) +/** \brief Amount of reserved bytes in received buffer. Some clients (PC Windows for example) + send few more bytes after CTS setting, so we need to reserve some space for them. + Reserved space = Buffer Size / 2^BUFFER_RESERV. */ +#define BUFFER_RESERV 1 +#define USART_HW_CONTROLLER_TIMER_PERIOD 10 +#if defined(_USE_USART_ERROR_EVENT_) + #define HAL_BM_FRAME_ERROR (1 << 4) + #define HAL_BM_DATA_OVERRUN (1 << 3) + #define HAL_BM_PARITY_ERROR (1 << 2) +#endif +#if NUM_USART_CHANNELS == 0 + #error 'USART channels is not alowed.' +#endif + +/****************************************************************************** + Types definition section +******************************************************************************/ +/**************************************************************************//** + \brief HAL USART tasks bit mask. +******************************************************************************/ +typedef volatile uint8_t HalUsartTaskBitMask_t; + +/**************************************************************************//** + \brief HAL USART task type declaration. +******************************************************************************/ +typedef void (* HalUsartTask_t)(void); + +/****************************************************************************** + Global functions prototypes section +******************************************************************************/ +void halSigUsartHandler(void); +void halSetUsartConfig(HAL_UsartDescriptor_t *usartmode); +void halPostUsartTask(HalUsartTaskId_t taskId); +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + void hwControlPinsPollCallback(void); +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + +/****************************************************************************** + Static function prototypes section +******************************************************************************/ +#if defined(HAL_USE_USART_CHANNEL_0) + static void halUsartTaskUsart0Dre(void); + static void halUsartTaskUsart0Txc(void); + static void halUsartTaskUsart0Rxc(void); + #if defined(_USE_USART_ERROR_EVENT_) + static void halUsartTaskUsart0Err(void); + #endif +#endif + +#if defined(HAL_USE_USART_CHANNEL_1) + static void halUsartTaskUsart1Dre(void); + static void halUsartTaskUsart1Txc(void); + static void halUsartTaskUsart1Rxc(void); + #if defined(_USE_USART_ERROR_EVENT_) + static void halUsartTaskUsart1Err(void); + #endif +#endif + +static void halUsartHwController(UsartChannel_t tty); +static void halSigUsartReceptionComplete(UsartChannel_t tty); +static void halSetUsartClockPinDirection(HAL_UsartDescriptor_t *descriptor); + +/****************************************************************************** + Static variables section +******************************************************************************/ +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + static HAL_AppTimer_t halUsartAppTimer; +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT +HAL_UsartDescriptor_t *halPointDescrip[NUM_USART_CHANNELS] = +{ + #if defined(HAL_USE_USART_CHANNEL_0) + NULL, + #endif + #if defined(HAL_USE_USART_CHANNEL_1) + NULL + #endif +}; +static volatile HalUsartTaskBitMask_t halUsartTaskBitMask = 0; // HAL USART tasks' bit mask. +static const HalUsartTask_t PROGMEM_DECLARE(halUsartHandlers[HAL_USART_TASKS_NUMBER]) = +{ + #if defined(HAL_USE_USART_CHANNEL_0) + halUsartTaskUsart0Dre, + halUsartTaskUsart0Txc, + halUsartTaskUsart0Rxc, + #if defined(_USE_USART_ERROR_EVENT_) + halUsartTaskUsart0Err, + #endif + #endif + + #if defined(HAL_USE_USART_CHANNEL_1) + halUsartTaskUsart1Dre, + halUsartTaskUsart1Txc, + halUsartTaskUsart1Rxc, + #if defined(_USE_USART_ERROR_EVENT_) + halUsartTaskUsart1Err, + #endif + #endif +}; // List Of possible HAL USART tasks. + +/****************************************************************************** + DTR service +******************************************************************************/ +volatile bool halEnableDtrWakeUp = false; +void (* dtrWakeUpCallback)(void) = NULL; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief HAL USART task. Exact action depends on USART internal task. +******************************************************************************/ +void halSigUsartHandler(void) +{ + HalUsartTask_t handler; + HalUsartTaskBitMask_t mask = 1; + HalUsartTaskId_t index = 0; + + for ( ; index < HAL_USART_TASKS_NUMBER; index++, mask <<= 1) + { + if (halUsartTaskBitMask & mask) + { + ATOMIC_SECTION_ENTER + halUsartTaskBitMask ^= mask; + ATOMIC_SECTION_LEAVE + HANDLERS_GET(&handler, index); + handler(); + } + } +} + +/**************************************************************************//** +\brief Posts specific USART task. + +\param[in] + taskId - unique identifier of the task to be posted. +******************************************************************************/ +void halPostUsartTask(HalUsartTaskId_t taskId) +{ + halUsartTaskBitMask |= (HalUsartTaskBitMask_t)1 << taskId; + halPostTask2(HAL_TASK_USART); +} + +/**************************************************************************//** +\brief Puts the byte received to the cyclic buffer. + +\param[in] + tty - channel number. +\param[in] + data - data to put. +******************************************************************************/ +void halUsartRxBufferFiller(UsartChannel_t tty, uint8_t data) +{ + uint16_t old; + uint8_t i; + HalUsartService_t *halUsartControl; + + i = HAL_GET_INDEX_BY_CHANNEL(tty); + if (NULL == halPointDescrip[i]) + {// abnormal + halDisableUsartRxcInterrupt(tty); // disable usart + return; + } + + if (halPointDescrip[i]->flowControl & USART_SPI_WRITE_MODE) + return; + + if (halPointDescrip[i]->flowControl & USART_SPI_READ_MODE) + { // For spi mode. + *(uint8_t*)(halPointDescrip[i]->rxBuffer) = data; + halPointDescrip[i]->rxBuffer++; + return; + } // For spi mode. + + halUsartControl = &halPointDescrip[i]->service; + if (NULL != halPointDescrip[i]->rxBuffer) + { + old = halUsartControl->rxPointOfWrite; + + if (++halUsartControl->rxPointOfWrite == halPointDescrip[i]->rxBufferLength) + halUsartControl->rxPointOfWrite = 0; + + if (halUsartControl->rxPointOfWrite == halUsartControl->rxPointOfRead) + { // Buffer full. + halUsartControl->rxPointOfWrite = old; + return; + } // Buffer full. + + halPointDescrip[i]->rxBuffer[old] = data; + halUsartControl->rxBytesInBuffer++; + +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + if ((halPointDescrip[i]->flowControl & USART_FLOW_CONTROL_HARDWARE) && (HW_CONTROL_PINS_PORT_ASSIGNMENT == halPointDescrip[i]->tty)) + { + if (halUsartControl->rxBytesInBuffer > (halPointDescrip[i]->rxBufferLength >> BUFFER_RESERV)) + GPIO_USART_CTS_set();// CTS_ON + } +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + } +} + +#if defined(_USE_USART_ERROR_EVENT_) +/**************************************************************************//** +\brief Save status register for analyzing of the error reason. + +\param[in] + tty - channel number. +\param[in] + status - usart status register. +******************************************************************************/ +void halUsartSaveErrorReason(UsartChannel_t tty, uint8_t status) +{ + HalUsartService_t *halUsartControl; + uint8_t i; + + i = HAL_GET_INDEX_BY_CHANNEL(tty); + if (NULL == halPointDescrip[i]) + {// abnormal + halDisableUsartRxcInterrupt(tty); // disable usart + return; + } + + halUsartControl = &halPointDescrip[i]->service; + halUsartControl->errorReason = status; +} +#endif + +/**************************************************************************//** +\brief Registers uasrt's event handlers. Performs configuration +of usart registers. Performs configuration of RTS, CTS and DTR pins. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure + +\return + Returns positive usart descriptor on success or -1 in cases: \n + - bad usart channel. \n + - unsupported parameters. \n + - the channel was already opened. \n + - there are not enough resources. \n +******************************************************************************/ +int HAL_OpenUsart(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; // Descriptor index + + if (NULL == descriptor) + return -1; + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + if ((descriptor->flowControl & USART_FLOW_CONTROL_HARDWARE) && + (HW_CONTROL_PINS_PORT_ASSIGNMENT != descriptor->tty)) + return -1; // Hardware control cannot be used for this channel. +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (NULL != halPointDescrip[i]) + return -1; // Channel is already opened. + + halPointDescrip[i] = descriptor; +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + if (HW_CONTROL_PINS_PORT_ASSIGNMENT == descriptor->tty) + { + if (descriptor->flowControl & USART_DTR_CONTROL) + GPIO_USART_DTR_make_in(); + if (descriptor->flowControl & USART_FLOW_CONTROL_HARDWARE) + { + GPIO_USART_CTS_make_out(); + GPIO_USART_RTS_make_in(); + if (NULL == descriptor->rxBuffer) + GPIO_USART_CTS_set(); // CTS_ON + else + GPIO_USART_CTS_clr(); // CTS_OFF + } + } +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + + if (USART_MODE_SYNC == descriptor->mode) + halSetUsartClockPinDirection(descriptor); + + descriptor->service.txPointOfRead = 0; + descriptor->service.txPointOfWrite = 0; + if (NULL == descriptor->rxBuffer) + descriptor->rxBufferLength = 0; + if (NULL == descriptor->txBuffer) + descriptor->txBufferLength = 0; + descriptor->service.rxPointOfRead = 0; + descriptor->service.rxPointOfWrite = 0; + descriptor->service.usartShiftRegisterEmpty = 1; + + halSetUsartConfig(descriptor); + + return descriptor->tty; +} + +/**************************************************************************//** +\brief Frees the usart channel and pins, if hardware flow control was used. + +\param[in] + descriptor - the usart descriptor. +\return + 0 on success, \n + -1 if bad descriptor or channel is already closed. +******************************************************************************/ +int HAL_CloseUsart(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; + + if (NULL == descriptor) + return -1; + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (NULL == halPointDescrip[i]) + return -1; // Channel is already closed. + + halCloseUsart(halPointDescrip[i]->tty); +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + if (halPointDescrip[i]->flowControl & USART_FLOW_CONTROL_HARDWARE) + GPIO_USART_CTS_make_in(); +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + + if (USART_MODE_SYNC == halPointDescrip[i]->mode) + { + halPointDescrip[i]->syncMode = USART_CLK_MODE_SLAVE; + halSetUsartClockPinDirection(halPointDescrip[i]); + } + halPointDescrip[i] = NULL; + + return 0; +} + +/**************************************************************************//** +\brief Controls RTS and DTR the pins and makes decision if the usart can transmit + byte. + +\param[in] + tty - channel number. +******************************************************************************/ +static void halUsartHwController(UsartChannel_t tty) +{ + uint8_t i; + HalUsartService_t *halUsartControl; + + i = HAL_GET_INDEX_BY_CHANNEL(tty); + if (NULL == halPointDescrip[i]) + return; // Port closed. + + halUsartControl = &halPointDescrip[i]->service; +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + if (HW_CONTROL_PINS_PORT_ASSIGNMENT == tty) + { + uint8_t hw1 = 0; + uint8_t hw2 = 0; + + if (halPointDescrip[i]->flowControl & USART_DTR_CONTROL) + hw1 = GPIO_USART_DTR_read(); + + if (halPointDescrip[i]->flowControl & USART_FLOW_CONTROL_HARDWARE) + hw2 = GPIO_USART_RTS_read(); + + if (hw1 || hw2) + { + halUsartAppTimer.interval = USART_HW_CONTROLLER_TIMER_PERIOD; + halUsartAppTimer.mode = TIMER_ONE_SHOT_MODE; + halUsartAppTimer.callback = hwControlPinsPollCallback; + HAL_StartAppTimer(&halUsartAppTimer); + return; + } + } +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + + uint16_t poW; + uint16_t poR; + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + poW = halUsartControl->txPointOfWrite; + poR = halUsartControl->txPointOfRead; + END_MEASURE(HAL_USART_HW_CONTROLLER_LIMIT) + ATOMIC_SECTION_LEAVE + + if (poW != poR) + { + halSendUsartByte(tty, halPointDescrip[i]->txBuffer[poR++]); + if (poR == halPointDescrip[i]->txBufferLength) + poR = 0; + halEnableUsartDremInterrupt(tty); + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + halUsartControl->txPointOfRead = poR; + END_MEASURE(HAL_USART_HW_CONTROLLER_LIMIT) + ATOMIC_SECTION_LEAVE + + } + else + { + // data register empty interrupt was disabled + halEnableUsartTxcInterrupt(tty);// TX Complete interrupt enable + } +} + +/**************************************************************************//** +\brief Writes a number of bytes to a usart channel. +txCallback function will be used to notify when the transmission is finished. +If hardware flow control is used for transmitting then RTS and DTR pins will +be tested during transmission. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\param[in] + buffer - pointer to the application data buffer; + +\param[in] + length - number of bytes to transfer; + +\return + -1 - bad descriptor; \n + Number of bytes placed to the buffer - success. +******************************************************************************/ +int HAL_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint8_t i; + uint16_t poW; + uint16_t poR; + uint16_t old; + uint16_t wasWrote = 0; + bool needStartTrmt = false; + HalUsartService_t *halUsartControl; + + if (NULL == descriptor) + return -1; + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + if (!buffer || !length) + return -1; + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + halUsartControl = &descriptor->service; + if (0 == descriptor->txBufferLength) + { // Callback mode + if (halUsartControl->txPointOfWrite != halUsartControl->txPointOfRead) + return -1; // there is unsent data + descriptor->txBuffer = buffer; + halUsartControl->txPointOfWrite = length; + halUsartControl->txPointOfRead = 0; + needStartTrmt = true; + wasWrote = length; + } // Callback mode. + else + { // Polling mode. + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + poW = halUsartControl->txPointOfWrite; + poR = halUsartControl->txPointOfRead; + END_MEASURE(HALATOM_WRITE_USART_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + + if (poW == poR) + needStartTrmt = true; // Buffer empty. + + while (wasWrote < length) + { + old = poW; + + if (++poW == descriptor->txBufferLength) + poW = 0; + + if (poW == poR) + { // Buffer full. + poW = old; + break; + } // Buffer full. + + descriptor->txBuffer[old] = buffer[wasWrote++]; + } + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + halUsartControl->txPointOfWrite = poW; + END_MEASURE(HALATOM_WRITE_USART_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + } // Polling mode + + if (needStartTrmt) + { + halUsartControl->usartShiftRegisterEmpty = 0; // Buffer and shift register is full + // Enable interrupt. Transaction will be launched in the callback. + halEnableUsartDremInterrupt(descriptor->tty); + } + + return wasWrote; +} + +/*************************************************************************//** +\brief Reads length bytes from usart and places ones to buffer. + +\param[in] + descriptor - usart descriptor; +\param[out] + buffer - pointer to a application buffer; +\param[in] + length - the number of bytes which should be placed to buffer + +\return + -1 - bad descriptor, bad number to read or number of bytes that \n + were placed to buffer. +*****************************************************************************/ +int HAL_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint8_t i = 0; + uint16_t wasRead = 0; + uint16_t poW; + uint16_t poR; + HalUsartService_t *halUsartControl; +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + uint16_t number; +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + + if (NULL == descriptor) + return -1; + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + if (!buffer || !length) + return -1; + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + halUsartControl = &halPointDescrip[i]->service; + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + poW = halUsartControl->rxPointOfWrite; + poR = halUsartControl->rxPointOfRead; + END_MEASURE(HALATOM_READ_USART_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + + while ((poR != poW) && (wasRead < length)) + { + buffer[wasRead] = descriptor->rxBuffer[poR]; + if (++poR == descriptor->rxBufferLength) + poR = 0; + wasRead++; + } + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + halUsartControl->rxPointOfRead = poR; + halUsartControl->rxBytesInBuffer -= wasRead; +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + number = halUsartControl->rxBytesInBuffer; +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + END_MEASURE(HALATOM_READ_USART_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT + if ((HW_CONTROL_PINS_PORT_ASSIGNMENT == descriptor->tty) && (descriptor->flowControl & USART_FLOW_CONTROL_HARDWARE)) + if (number <= (descriptor->rxBufferLength >> BUFFER_RESERV)) + GPIO_USART_CTS_clr(); +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + + return wasRead; +} + +/**************************************************************************//** +\brief Forbids to the host data transmiting. Only HW_CONTROL_PINS_PORT_ASSIGNMENT + port can be used for hardware flow control. + +\param[in] + descriptor - usart descriptor. + +\return + -1 - bad descriptor, bad usart, unsupported mode; + 0 - on success. +******************************************************************************/ +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT +int HAL_OnUsartCts(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; + + if (NULL == descriptor) + return -1; + + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + if (HW_CONTROL_PINS_PORT_ASSIGNMENT != descriptor->tty) + return -1; + + GPIO_USART_CTS_set();// CTS_ON + + return 0; +} +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + +/**************************************************************************//** +\brief Allows to transfer a host data. Only HW_CONTROL_PINS_PORT_ASSIGNMENT +can be used for hardware flow control. + +\param[in] + descriptor - usart descriptor. + +\return + -1 - bad descriptor, bad usart, unsupported mode; + 0 - on success. +******************************************************************************/ +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT +int HAL_OffUsartCts(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; + + if (NULL == descriptor) + return -1; + + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + if (HW_CONTROL_PINS_PORT_ASSIGNMENT != descriptor->tty) + return -1; + + GPIO_USART_CTS_clr(); // CTS_OFF + + return 0; +} +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + +/**************************************************************************//** +\brief Fills UsartHardwareControl_t variable by potential of RTS pin. Only + HW_CONTROL_PINS_PORT_ASSIGNMENT can be used for hardware flow control. + +\param[in] + descriptor - usart descriptor. +\return + -1 - bad descriptor, bad usart, unsupported mode; + 0 - on success. +******************************************************************************/ +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT +int HAL_ReadUsartRts(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; + + if (NULL == descriptor) + return -1; + + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + if (HW_CONTROL_PINS_PORT_ASSIGNMENT != descriptor->tty) + return -1; + + return GPIO_USART_RTS_read(); +} +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + +/**************************************************************************//** +\brief Fills UsartHardwareControl_t variable by potential of DTR pin. Only + HW_CONTROL_PINS_PORT_ASSIGNMENT can be used for hardware flow control. + +\param[in] + descriptor - usart descriptor. +\return + -1 - bad descriptor, bad usart, unsupported mode; + 0 - on success. +******************************************************************************/ +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT +int HAL_ReadUsartDtr(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; + + if (NULL == descriptor) + return -1; + + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + if (HW_CONTROL_PINS_PORT_ASSIGNMENT != descriptor->tty) + return -1; + + return GPIO_USART_DTR_read(); +} +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + +// Interrupt handlers +/**************************************************************************//** +\brief Hardware Control pins polling timer callback. +******************************************************************************/ +#ifdef HW_CONTROL_PINS_PORT_ASSIGNMENT +void hwControlPinsPollCallback(void) +{ + halUsartHwController(HW_CONTROL_PINS_PORT_ASSIGNMENT); +} +#endif // HW_CONTROL_PINS_PORT_ASSIGNMENT + +/**************************************************************************//** +\brief Transmission complete interrupt handler. + +\param[in] + tty - USART channel identifier. +******************************************************************************/ +void halSigUsartTransmissionComplete(UsartChannel_t tty) +{ + uint8_t i; + HalUsartService_t *halUsartControl; + uint16_t poW; + uint16_t poR; + + i = HAL_GET_INDEX_BY_CHANNEL(tty); + if (NULL == halPointDescrip[i]) + { + assert(false, USARTC_HALSIGUSARTTRANSMISSIONCOMPLETE_0); + return; // Descriptor with "tty" channel is not found. + } + + halUsartControl = &halPointDescrip[i]->service; + + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + poW = halUsartControl->txPointOfWrite; + poR = halUsartControl->txPointOfRead; + END_MEASURE(HAL_USART_TRANS_COMPLETE_LIMIT) + ATOMIC_SECTION_LEAVE + + if (poW == poR) + halUsartControl->usartShiftRegisterEmpty = 1; // Buffer is empty, shift register is empty too. + + if (0 == halPointDescrip[i]->txBufferLength) + halPointDescrip[i]->txBuffer = NULL; // nulling pointer for callback mode + + if (NULL != halPointDescrip[i]->txCallback) + halPointDescrip[i]->txCallback(); +} + +/**************************************************************************//** +\brief Reception complete interrupt handler. + +\param[in] + tty - USART channel identifier. +******************************************************************************/ +static void halSigUsartReceptionComplete(UsartChannel_t tty) +{ + uint8_t i; + HalUsartService_t *halUsartControl; + uint16_t number; + + i = HAL_GET_INDEX_BY_CHANNEL(tty); + if (NULL == halPointDescrip[i]) + { + assert(false, USARTC_HALSIGUSARTRECEPTIONCOMPLETE_0); + return; // Descriptor with "tty" channel is not found. + } + + if (halPointDescrip[i]->flowControl & (USART_SPI_READ_MODE | USART_SPI_WRITE_MODE)) + return; // for spi mode + + halUsartControl = &halPointDescrip[i]->service; + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + number = halUsartControl->rxBytesInBuffer; + END_MEASURE(HALATOM_USART_RX_COMPLETE_TIME_LIMIT) + ATOMIC_SECTION_LEAVE + + if (number) + if (NULL != halPointDescrip[i]->rxCallback) + halPointDescrip[i]->rxCallback(number); +} + +#if defined(_USE_USART_ERROR_EVENT_) +/**************************************************************************//** +\brief Error occurred action handler. + +\param[in] + tty - USART channel identifier. +******************************************************************************/ +static void halSigUsartErrorOccurred(UsartChannel_t tty) +{ + uint8_t i; + HalUsartService_t *halUsartControl; + UsartErrorReason_t errReason = FRAME_ERROR; + + i = HAL_GET_INDEX_BY_CHANNEL(tty); + if (NULL == halPointDescrip[i]) + { + assert(false, USARTC_HALSIGUSARTERROROCCURED_0); + return; // Descriptor with "tty" channel is not found. + } + + halUsartControl = &halPointDescrip[i]->service; + if (halUsartControl->errorReason & HAL_BM_FRAME_ERROR) + errReason = FRAME_ERROR; + else if (halUsartControl->errorReason & HAL_BM_DATA_OVERRUN) + errReason = DATA_OVERRUN; + else if (halUsartControl->errorReason & HAL_BM_PARITY_ERROR) + errReason = PARITY_ERROR; + else + { + assert(false, USARTC_HALUNKNOWNERRORREASON_0); + } + + if (NULL != halPointDescrip[i]->errCallback) + halPointDescrip[i]->errCallback(errReason); +} +#endif + +/**************************************************************************//** +\brief Enables DTR wake up. + +\param[in] callback - callback method pointer. +******************************************************************************/ +void HAL_EnableDtrWakeUp(void (* callback)(void)) +{ + dtrWakeUpCallback = callback; + halEnableDtrWakeUp = true; +} + +/**************************************************************************//** +\brief Disables DTR wake up. +******************************************************************************/ +void HAL_DisableDtrWakeUp(void) +{ + halEnableDtrWakeUp = false; +} + +/**************************************************************************//** +\brief Checks the status of tx buffer. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\return + -1 - bad descriptor, no tx buffer; \n + 1 - tx buffer is empty; \n + 0 - tx buffer is not empty; +******************************************************************************/ +int HAL_IsTxEmpty(HAL_UsartDescriptor_t *descriptor) +{ + uint8_t i; + HalUsartService_t *halUsartControl; + uint16_t poW; + uint16_t poR; + + if (NULL == descriptor) + return -1; + if (false == halIsUsartChannelCorrect(descriptor->tty)) + return -1; + i = HAL_GET_INDEX_BY_CHANNEL(descriptor->tty); + if (descriptor != halPointDescrip[i]) + return -1; // Channel is not opened. + + halUsartControl = &halPointDescrip[i]->service; + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + poW = halUsartControl->txPointOfWrite; + poR = halUsartControl->txPointOfRead; + END_MEASURE(HAL_USART_TX_EMPTY_LIMIT) + ATOMIC_SECTION_LEAVE + if (poW == poR) + return halUsartControl->usartShiftRegisterEmpty; + return 0; +} + +/**************************************************************************//** +\brief Checks the channel number. + +\param[in] + channel - channel to be verified. + +\return + true if channel is possible, \n + false otherwise. +******************************************************************************/ +bool halIsUsartChannelCorrect(UsartChannel_t channel) +{ + switch (channel) + { +#ifdef USART_CHANNEL_0 + case USART_CHANNEL_0: +#endif // USART_CHANNEL_0 +#ifdef USART_CHANNEL_1 + case USART_CHANNEL_1: +#endif // USART_CHANNEL_0 +#if defined(USART_CHANNEL_0) || defined(USART_CHANNEL_1) + return true; +#endif + default: + return false; + } +} + +/**************************************************************************//** +\brief Set clock pin direction for synchronous mode. + +\param[in] + descriptor - pointer to usart channel descriptor. +******************************************************************************/ +static void halSetUsartClockPinDirection(HAL_UsartDescriptor_t *descriptor) +{ + if (USART_CLK_MODE_MASTER == descriptor->syncMode) + { + switch (descriptor->tty) + { +#ifdef USART_CHANNEL_0 + case USART_CHANNEL_0: + GPIO_USART0_EXTCLK_make_out(); + break; +#endif // USART_CHANNEL_0 +#ifdef USART_CHANNEL_1 + case USART_CHANNEL_1: + GPIO_USART1_EXTCLK_make_out(); + break; +#endif // USART_CHANNEL_1 + default: + break; + } + } + else + { + switch (descriptor->tty) + { +#ifdef USART_CHANNEL_0 + case USART_CHANNEL_0: + GPIO_USART0_EXTCLK_make_in(); + GPIO_USART0_EXTCLK_make_pullup(); + break; +#endif // USART_CHANNEL_0 +#ifdef USART_CHANNEL_1 + case USART_CHANNEL_1: + GPIO_USART1_EXTCLK_make_in(); + GPIO_USART1_EXTCLK_make_pullup(); + break; +#endif // USART_CHANNEL_1 + default: + break; + } + } +} + +#if defined(HAL_USE_USART_CHANNEL_0) +/**************************************************************************//** +\brief Wrapper for data empty handler for usart channel 0 +******************************************************************************/ +static void halUsartTaskUsart0Dre(void) +{ + halUsartHwController(USART_CHANNEL_0); +} + +/**************************************************************************//** +\brief Wrapper for transmit complete handler for usart channel 0 +******************************************************************************/ +static void halUsartTaskUsart0Txc(void) +{ + halSigUsartTransmissionComplete(USART_CHANNEL_0); +} + +/**************************************************************************//** +\brief Wrapper for receive complete handler for usart channel 0 +******************************************************************************/ +static void halUsartTaskUsart0Rxc(void) +{ + halSigUsartReceptionComplete(USART_CHANNEL_0); +} + +#if defined(_USE_USART_ERROR_EVENT_) +/**************************************************************************//** +\brief Wrapper for error occurred handler for usart channel 0 +******************************************************************************/ +static void halUsartTaskUsart0Err(void) +{ + halSigUsartErrorOccurred(USART_CHANNEL_0); +} +#endif // defined(_USE_USART_ERROR_EVENT_) +#endif // defined(HAL_USE_USART_CHANNEL_0) + +#if defined(HAL_USE_USART_CHANNEL_1) +/**************************************************************************//** +\brief Wrapper for data empty handler for usart channel 1 +******************************************************************************/ +static void halUsartTaskUsart1Dre(void) +{ + halUsartHwController(USART_CHANNEL_1); +} + +/**************************************************************************//** +\brief Wrapper for transmit complete handler for usart channel 1 +******************************************************************************/ +static void halUsartTaskUsart1Txc(void) +{ + halSigUsartTransmissionComplete(USART_CHANNEL_1); +} + +/**************************************************************************//** +\brief Wrapper for receive complete handler for usart channel 0 +******************************************************************************/ +static void halUsartTaskUsart1Rxc(void) +{ + halSigUsartReceptionComplete(USART_CHANNEL_1); +} + +#if defined(_USE_USART_ERROR_EVENT_) +/**************************************************************************//** +\brief Wrapper for error occurred handler for usart channel 1 +******************************************************************************/ +static void halUsartTaskUsart1Err(void) +{ + halSigUsartErrorOccurred(USART_CHANNEL_1); +} +#endif // defined(_USE_USART_ERROR_EVENT_) +#endif // defined(HAL_USE_USART_CHANNEL_1) +//eof usart.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usb.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usb.c new file mode 100644 index 00000000..b164f1dc --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/usb.c @@ -0,0 +1,435 @@ +/**************************************************************************//** + \file usb.c + + \brief Implementation of usb hardware independent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 17/07/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + External global variables section +******************************************************************************/ +// user's request handler +extern void (* sendReqToUpper)(uint8_t *req); +// Holds the internal state for each endpoint of the UDP +extern UsbEndpoint_t endpoints[USB_END_POINTS_NUMBER]; +// Device current state +extern volatile uint8_t deviceState; +// Previous device current state +extern volatile uint8_t previousDeviceState; +// pointer to request memory. Memory allocate by user. +extern uint8_t *requestMemory; + +/****************************************************************************** + Global variables section +******************************************************************************/ +void (* resumeCallback)(void) = NULL; +void (* suspendCallback)(void) = NULL; +void (* endOfBusResetCallback)(void) = NULL; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** + Registers user's end of bus reset handler + +Parameters: + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterEndOfBusResetHandler(void (* f)(void)) +{ + endOfBusResetCallback = f; +} + +/****************************************************************************** + Registers user's resume handler + +Parameters: + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterResumeHandler(void (* f)(void)) +{ + resumeCallback = f; +} + +/****************************************************************************** + Registers user's suspend handler + +Parameters: + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterSuspendHandler(void (* f)(void)) +{ + suspendCallback = f; +} + +/****************************************************************************** + Registers user's request handler + +Parameters: + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterRequestHandler(void (* f)(uint8_t *req)) +{ + sendReqToUpper = f; +} + +/****************************************************************************** +Configures an endpoint according to its Endpoint Descriptor. + +Parameters: + descriptor - Pointer to an Endpoint descriptor. +******************************************************************************/ +void HAL_ConfigureEndpoint(HAL_UsbEndPointDescptr_t *descriptor) +{ + UsbEndpoint_t *endpoint; + uint8_t eptnum; + uint8_t type; + HAL_UsbEndPointDirect_t direction; + + // NULL descriptor -> Control endpoint 0 + if (NULL == descriptor) + { + eptnum = USB_END_POINT_0; + endpoint = &(endpoints[USB_END_POINT_0]); + type = EP_CONTROL; + direction = EP_OUT; + endpoint->size = UDP_ENDPOINTS_MAXPACKETSIZE(USB_END_POINT_0); + } + else + { + eptnum = descriptor->bEndpointAddress & 0x0F; + endpoint = &(endpoints[eptnum]); + type = descriptor->bmAttributes & 0x03; + if (descriptor->bEndpointAddress & 0x80) + direction = EP_IN; + else + direction = EP_OUT; + endpoint->size = descriptor->wMaxPacketSize; + } + + // Abort the current transfer is the endpoint was configured and in + // Write or Read state + if ((UDP_ENDPOINT_RECEIVING == endpoint->state) || (UDP_ENDPOINT_SENDING == endpoint->state)) + halEndOfTransfer(eptnum, STATUS_RESET); + + endpoint->state = UDP_ENDPOINT_IDLE; + halConfigureEndpoint(eptnum, type, direction); +} + +/****************************************************************************** +Sends data through a USB endpoint. Sets up the transfer descriptor, +writes one or two data payloads (depending on the number of FIFO bank +for the endpoint) and then starts the actual transfer. The operation is +complete when all the data has been sent. + +*If the size of the buffer is greater than the size of the endpoint +(or twice the size if the endpoint has two FIFO banks), then the buffer +must be kept allocated until the transfer is finished*. This means that +it is not possible to declare it on the stack (i.e. as a local variable +of a function which returns after starting a transfer). + +Parameters: + eptnum - Endpoint number. + data - Pointer to a buffer with the data to send. + size - Size of the data buffer. + callback - Optional callback function to invoke when the transfer is complete. + argument - Optional argument to the callback function. + +Returns: + STATUS_SUCCESS if the transfer has been started; otherwise, the + corresponding error status code. +******************************************************************************/ +uint8_t HAL_UsbWrite(uint8_t eptnum, void *data, uint32_t size, TransferCallback_t callback, void *argument) +{ + UsbEndpoint_t *endpoint = &(endpoints[eptnum]); + UsbTransfer_t *transfer = &(endpoint->transfer); + + // Check that the endpoint is in Idle state + if (UDP_ENDPOINT_IDLE != endpoint->state) + return STATUS_BUSY; + + // Setup the transfer descriptor + transfer->data = (void *) data; + transfer->remaining = size; + transfer->buffered = 0; + transfer->transferred = 0; + transfer->callback = callback; + transfer->argument = argument; + + // Send the first packet + endpoint->state = UDP_ENDPOINT_SENDING; + halStartUsbWrite(eptnum); + + // Enable interrupt on endpoint + halEnableEndPointTxInterrupt(eptnum); + + return STATUS_SUCCESS; +} + +/****************************************************************************** +Reads incoming data on an USB endpoint This methods sets the transfer +descriptor and activate the endpoint interrupt. The actual transfer is +then carried out by the endpoint interrupt handler. The Read operation +finishes either when the buffer is full, or a short packet (inferior to +endpoint maximum size) is received. + +*The buffer must be kept allocated until the transfer is finished*. + +Parameters: + eptnum - Endpoint number. + data - Pointer to a data buffer. + size - Size of the data buffer in bytes. + callback - Optional end-of-transfer callback function. + argument - Optional argument to the callback function. + +Returns: + STATUS_SUCCESS if the read operation has been started; otherwise, + the corresponding error code. +******************************************************************************/ +uint8_t HAL_UsbRead(uint8_t eptnum, void *data, uint32_t size, TransferCallback_t callback, void *argument) +{ + UsbEndpoint_t *endpoint = &(endpoints[eptnum]); + UsbTransfer_t *transfer = &(endpoint->transfer); + + if (NULL == data) + return STATUS_ABORTED; + + // Return if the endpoint is not in IDLE state + if (UDP_ENDPOINT_IDLE != endpoint->state) + return STATUS_BUSY; + + // Endpoint enters Receiving state + endpoint->state = UDP_ENDPOINT_RECEIVING; + + // Set the transfer descriptor + transfer->data = data; + transfer->remaining = size; + transfer->buffered = 0; + transfer->transferred = 0; + transfer->callback = callback; + transfer->argument = argument; + + // Enable interrupt on endpoint + halEnableEndPointRxInterrupt(eptnum); + + return STATUS_SUCCESS; +} + +/****************************************************************************** +Sets the HALT feature on the given endpoint (if not already in this state). + +Parameters: + eptnum - Endpoint number. +******************************************************************************/ +void HAL_Halt(uint8_t eptnum) +{ + UsbEndpoint_t *endpoint = &(endpoints[eptnum]); + + // Check that endpoint is enabled and not already in Halt state + if ((UDP_ENDPOINT_DISABLED != endpoint->state) && (UDP_ENDPOINT_HALTED != endpoint->state)) + { + // Abort the current transfer if necessary + halEndOfTransfer(eptnum, STATUS_ABORTED); + + halEndpointHaltState(eptnum); + + // Enable the endpoint interrupt + halEnableEndPointStallInterrupt(eptnum); + } +} + +/****************************************************************************** +Clears the Halt feature on the given endpoint. + +Parameters: + eptnum - Endpoint number. +******************************************************************************/ +void HAL_Unhalt(uint8_t eptnum) +{ + UsbEndpoint_t *endpoint = &(endpoints[eptnum]); + + // Check if the endpoint is enabled + if (UDP_ENDPOINT_DISABLED != endpoint->state) + { + // Return endpoint to Idle state + endpoint->state = UDP_ENDPOINT_IDLE; + + halEndpointUnHaltState(eptnum); + } +} + +/****************************************************************************** +Returns the current Halt status of an endpoint. + +Parameters: + eptnum - Endpoint number. + +Returns: + 1 - if the endpoint is currently halted; + 0 - otherwise. +******************************************************************************/ +uint8_t HAL_IsHalted(uint8_t eptnum) +{ + UsbEndpoint_t *endpoint = &(endpoints[eptnum]); + if (UDP_ENDPOINT_HALTED == endpoint->state) + return 1; + else + return 0; +} + +/****************************************************************************** +Causes the given endpoint to acknowledge the next packet it receives with +a STALL handshake. + +Parameters: + eptnum - Endpoint number. + +Returns: + STATUS_SUCCESS or STATUS_BUSY. +******************************************************************************/ +uint8_t HAL_Stall(uint8_t eptnum) +{ + UsbEndpoint_t *endpoint = &(endpoints[eptnum]); + + // Check that endpoint is in Idle state + if (UDP_ENDPOINT_IDLE != endpoint->state) + { + return STATUS_BUSY; + } + + halSendStallToHost(eptnum); + // Enable the endpoint interrupt + halEnableEndPointStallInterrupt(eptnum); + + return STATUS_SUCCESS; +} + +/****************************************************************************** +Sets the device address to the given value. + +Parameters: + address - New device address. +******************************************************************************/ +void HAL_SetAddress(uint8_t *address) +{ + halSetUsbAddress(*address); + // If the address is 0, the device returns to the Default state + if (*address) + deviceState = DEVICE_PREADDRESSED; + // If the address is non-zero, the device enters the Address state + else + deviceState = DEVICE_DEFAULT; +} + +/****************************************************************************** +Sets the current device configuration. + +Parameters: + cfgnum - Configuration number to set. +******************************************************************************/ +void HAL_SetConfiguration(uint8_t cfgnum) +{ + // If the configuration number if non-zero, the device enters the + // Configured state + if (cfgnum) + { + deviceState = DEVICE_CONFIGURED; + } + // If the configuration number is zero, the device goes back to the Address + // state + else + { + deviceState = DEVICE_ADDRESS; + // Abort all transfers + halDisableEndpoints(); + } +} + +/****************************************************************************** +Initializes the USB driver. + +Parameters: + reqMem - Memory for usb request. Memory allocate by user. +******************************************************************************/ +void HAL_UsbInit(uint8_t *reqMem) +{ + requestMemory = reqMem; + + // Reset endpoint structures + halResetEndpoints(); + + // Device is in the Attached state + deviceState = DEVICE_SUSPENDED; + previousDeviceState = DEVICE_POWERED; + halInitUsbDevice(); + halUsbInterrupt(); +} + +/****************************************************************************** +Returns the current state of the USB device. + +Returns: + Device current state. +******************************************************************************/ +uint8_t HAL_GetState(void) +{ + return deviceState; +} + +/****************************************************************************** +Endpoint interrupt handler. +******************************************************************************/ +void halEndPointHandler(void) +{ + halCommonEndpointHandler(); +} + +/****************************************************************************** +usb suspend interrupt handler. +******************************************************************************/ +void halSuspendHandler(void) +{ + if (NULL != suspendCallback) + suspendCallback(); +} + +/****************************************************************************** +usb resume interrupt handler. +******************************************************************************/ +void halResumeHandler(void) +{ + if (NULL != resumeCallback) + resumeCallback(); +} + +/****************************************************************************** +usb bus reset interrupt handler. +******************************************************************************/ +void halBusResetHandler(void) +{ + halEndOfBusResetHandler(); + if (NULL != endOfBusResetCallback) + endOfBusResetCallback(); +} + +// eof usb.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/w1.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/w1.c new file mode 100644 index 00000000..99b92d1a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/common/src/w1.c @@ -0,0 +1,382 @@ +/**************************************************************************//** + \file w1.c + + \brief The implementation of the 1-wire interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define HAL_ROM_BYTE_LEN 8 +#define HAL_ROM_BIT_LEN 64 +#define HAL_W1_CRC_POLINOM 0x8C +#define HAL_SEARCH_ROM_CMD 0xF0 +#define HAL_SEARCH_ALRM_CMD 0xEC + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/******************************************************************************* + 1-Wire search procedure for all devices discovering + Parameters: + cmd - ROM function command. + family - 8-bit family code. + data - pointer of SRAM where are stored the 8 bytes ROM + codes returned by the devices. + count - number of devices wish to find. + actCount - number of devices have been found. + Returns: + W1_SUCCESS_STATUS - if at least one device has been found. + W1_NO_DEVICE_STATUS - if there are no any devices presented + on the bus with specified family code. + W1_INVALID_CRC - if during searching invalid CRC has + been read and no devices with + spicified family code has been found. +*******************************************************************************/ +W1Status_t halCommSearchW1(uint8_t cmd, + uint8_t family, + uint8_t *data, + uint8_t count, + uint8_t *actCount); + +/******************************************************************************* + 1-Wire search procedure for one device discovering + Parameters: + cmd - ROM function command. + Returns: + W1_SUCCESS_STATUS - if device has been found, ROM number + in ROM_NO buffer. + W1_NO_DEVICE_STATUS - if device has not been found. + W1_INVALID_CRC - if during searching invalid CRC has + been read. +*******************************************************************************/ +W1Status_t halSearchW1(uint8_t cmd); + +/******************************************************************************* + Calculating 1-Wire 8-bit CRC + Parameters: + data - data buffer pointer. + length - data length. + Returns: + CRC value based on polynomial x^8 + x^5 + x^4 + 1 +*******************************************************************************/ +uint8_t halW1CRC(uint8_t *data, uint8_t length); + +/****************************************************************************** + Global variables section +******************************************************************************/ +// 8-byte buffer that contains the current ROM registration +// number discovered +static uint8_t ROM_NO[HAL_ROM_BYTE_LEN]; +// Bit index that identifies from which bit the next search +// discrepancy check should start +static uint8_t LastDiscrepancy; +// Flag to indicate previos search was the last device +static uint8_t LastDeviceFlag; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/******************************************************************************* + 1-Wire search procedure with search ROM command only + Parameters: + family - 8-bit family code. + data - pointer of SRAM where are stored the 8 bytes ROM + codes returned by the devices. + count - number of devices wish to find. + actCount - number of devices have been found. + Returns: + W1_SUCCESS_STATUS - if at least one device has been found. + W1_NO_DEVICE_STATUS - if there are no any devices presented + on the bus with specified family code. + W1_INVALID_CRC - if during searching invalid CRC has + been read and no devices with + spicified family code has been found. +*******************************************************************************/ +W1Status_t HAL_SearchW1Device(uint8_t family, + uint8_t *data, + uint8_t count, + uint8_t *actCount) +{ + return halCommSearchW1(HAL_SEARCH_ROM_CMD, family, data, count, actCount); +} + +/******************************************************************************* + 1-Wire search procedure with alarm search command only + Parameters: + family - 8-bit family code. + data - pointer of SRAM where are stored the 8 bytes ROM + codes returned by the devices. + count - number of devices wish to find. + actCount - number of devices have been found. + Returns: + W1_SUCCESS_STATUS - if at least one device has been found. + W1_NO_DEVICE_STATUS - if there are no any devices presented + on the bus with specified family code. + W1_INVALID_CRC - if during searching invalid CRC has + been read and no devices with + spicified family code has been found. +*******************************************************************************/ +W1Status_t HAL_AlarmSearchW1Device(uint8_t family, + uint8_t *data, + uint8_t count, + uint8_t *actCount) +{ + return halCommSearchW1(HAL_SEARCH_ALRM_CMD, family, data, count, actCount); +} + +/******************************************************************************* + 1-Wire search procedure for all devices discovering + Parameters: + cmd - ROM function command. + family - 8-bit family code. + data - pointer of SRAM where are stored the 8 bytes ROM + codes returned by the devices. + count - number of devices wish to find. + actCount - number of devices have been found. + Returns: + W1_SUCCESS_STATUS - if at least one device has been found. + W1_NO_DEVICE_STATUS - if there are no any devices presented + on the bus with specified family code. + W1_INVALID_CRC - if during searching invalid CRC has + been read and no devices with + spicified family code has been found. +*******************************************************************************/ +W1Status_t halCommSearchW1(uint8_t cmd, + uint8_t family, + uint8_t *data, + uint8_t count, + uint8_t *actCount) +{ + W1Status_t w1_result; + uint8_t i; + + // Reset the searh state + LastDiscrepancy = 0; + LastDeviceFlag = 0; + // Setup family code + if (W1_ANY_FAMILY != family) + { + ROM_NO[0] = family; + LastDiscrepancy = HAL_ROM_BIT_LEN + 1; + for (i = 1; i < HAL_ROM_BYTE_LEN; i++) ROM_NO[i] = 0; + } + i = 0; + // Discovering + do + { + w1_result = halSearchW1(cmd); + if (W1_SUCCESS_STATUS != w1_result) + break; + // There is some device with specified family code + if ((ROM_NO[0] == family) || (W1_ANY_FAMILY == family)) + { + *(uint64_t *)(data + 8 * i) = *(uint64_t *)ROM_NO; + i++; + } + else // There are not any devices with specified family code + { + w1_result = W1_NO_DEVICE_STATUS; + break; + } + } + while (!LastDeviceFlag && (i < count)); + + if (NULL != actCount) + *actCount = i; + + if (i != 0) + return W1_SUCCESS_STATUS; + else + return w1_result; +} + +/******************************************************************************* + 1-Wire search procedure for one device discovering + Parameters: + cmd - ROM function command. + Returns: + W1_SUCCESS_STATUS - if device has been found, ROM number + in ROM_NO buffer. + W1_NO_DEVICE_STATUS - if device has not been found. + W1_INVALID_CRC - if during searching invalid CRC has + been read. +*******************************************************************************/ +W1Status_t halSearchW1(uint8_t cmd) +{ + uint8_t id_bit_number; + uint8_t last_zero, rom_byte_number; + uint8_t id_bit, cmp_id_bit; + uint8_t rom_byte_mask, search_direction; + + // initialize for search + id_bit_number = 1; + last_zero = 0; + rom_byte_number = 0; + rom_byte_mask = 1; + + // 1-Wire reset + ATOMIC_SECTION_ENTER + id_bit = halResetW1(); + ATOMIC_SECTION_LEAVE + if (W1_NO_DEVICE_STATUS == id_bit) + { + LastDiscrepancy = 0; + LastDeviceFlag = 0; + return W1_NO_DEVICE_STATUS; + } + + // issue the search command + ATOMIC_SECTION_ENTER + halWriteW1(cmd); + ATOMIC_SECTION_LEAVE + // search 64-bit uniqued registration number + do + { + // read a bit and its complement + ATOMIC_SECTION_ENTER + id_bit = halReadW1Bit(); + cmp_id_bit = halReadW1Bit(); + ATOMIC_SECTION_LEAVE + // check for no devices on 1-wire + if ((1 == id_bit) && (1 == cmp_id_bit)) + return W1_NO_DEVICE_STATUS; + + // all devices coupled have 0 or 1 + if (id_bit != cmp_id_bit) + { + search_direction = id_bit; + // there is descepancy + } + else + { + // if this discrepancy if before the Last Discrepancy + // on a previous next then pick the same as last time (old branch) + if (id_bit_number < LastDiscrepancy) + search_direction = ((ROM_NO[rom_byte_number] & rom_byte_mask) > 0); + // if equal to last pick 1, if not then pick 0 (new branch) + else + search_direction = (id_bit_number == LastDiscrepancy); + // if 0 was picked then record its position in LastZero + if (0 == search_direction) + last_zero = id_bit_number; + } + + if (1 == search_direction) + ROM_NO[rom_byte_number] |= rom_byte_mask; + else + ROM_NO[rom_byte_number] &= ~rom_byte_mask; + ATOMIC_SECTION_ENTER + halWriteW1bit(search_direction); + ATOMIC_SECTION_LEAVE + id_bit_number++; + rom_byte_mask <<= 1; + + if (rom_byte_mask == 0) + { + rom_byte_number++; + rom_byte_mask = 1; + } + } while (rom_byte_number < HAL_ROM_BYTE_LEN); + + // Invalid CRC + if (halW1CRC(ROM_NO, HAL_ROM_BYTE_LEN)) + return W1_INVALID_CRC; + + LastDiscrepancy = last_zero; + // check for last device + if (0 == LastDiscrepancy) + LastDeviceFlag = 1; + + return W1_SUCCESS_STATUS; +} + +/******************************************************************************* + Calculating 1-Wire 8-bit CRC + Parameters: + data - data buffer pointer. + length - data length. + Returns: + CRC value based on polynomial x^8 + x^5 + x^4 + 1 +*******************************************************************************/ +uint8_t halW1CRC(uint8_t *data, uint8_t length) +{ + uint8_t reg; + uint8_t b; + + for (reg = 0; length > 0; length--, data++) + { + for (b = 0; b < 8; b++) + { + if (((*data >> b) & 1) ^ (reg & 1)) + { + reg >>= 1; + reg ^= HAL_W1_CRC_POLINOM; + } + else + reg >>= 1; + } + } + return reg; +} + +/******************************************************************************* +Resets all devices connected to the bus. +Parameters: + none. +Returns: + 0 - there are some devices at the bus. + 1 - there are not any devices at the bus. +*******************************************************************************/ +uint8_t HAL_ResetW1(void) +{ + return halResetW1(); +}; + +/******************************************************************************* +Writes byte to the bus +Parameters: + value - byte to write. +Returns: + none. +*******************************************************************************/ +void HAL_WriteW1(uint8_t value) +{ + halWriteW1(value); +} + +/******************************************************************************* +Reads byte from the bus. +Parameters: + none. +Returns: + byte read from the bus. +*******************************************************************************/ +uint8_t HAL_ReadW1(void) +{ + return halReadW1(); +} + +// eof halW1.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/ISD/src/isdImageStorage.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/ISD/src/isdImageStorage.c new file mode 100644 index 00000000..a173da69 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/ISD/src/isdImageStorage.c @@ -0,0 +1,626 @@ +/**************************************************************************//** +\file isdImageStorage.c + +\brief Implementation of image storage driver. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 25.05.11 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if (APP_USE_OTAU == 1) + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +// Size of length field in frame +#define LEN_SIZE (sizeof(((IsdCommandFrame_t*)NULL)->length)) +// Start of frame market +#define SOF 0x2A +// 500 ms interbyte timeout should be enough for everyone +#define INTERBYTE_TIMEOUT 500 +// 5000 ms timeout between request to storage system and response from it. +#define INTERMESSAGE_TIMEOUT 5000 +#define USART_RX_BUFFER_LENGTH 104 + +#ifndef APP_MAX_COMMAND_PAYLOAD_SIZE + #define APP_MAX_COMMAND_PAYLOAD_SIZE 100 +#endif + +// code from runner +#define ISD_ZCL_COMMAND_INDICATION 0x0046 +#define ISD_ZCL_COMMAND_REQUEST 0x0044 +#define ISD_DRIVER_INIT_REQUEST 0x0100 +#define ISD_DRIVER_INIT_RESPONSE 0x0101 +#define ISD_COMMAND_ID_SIZE (sizeof(uint16_t)) +#define ISD_INIT_MARKER 0x55 +/****************************************************************************** + Types section +******************************************************************************/ +// States of tx FSM +typedef enum _TxState_t +{ + TX_ERR_OR_OFF, + TX_IDLE, + TX_SENDING_SOF, + TX_SENDING_DATA, +} TxState_t; + +// States of rx FSM +typedef enum _RxState_t +{ + RX_ERR_OR_OFF, + RX_WAITING_START, // AKA IDLE + RX_WAITING_LEN, + RX_WAITING_DATA, +} RxState_t; + +BEGIN_PACK +typedef struct PACK _IsdCommandFrame_t +{ + uint16_t length; + uint16_t commandId; + uint8_t payload[APP_MAX_COMMAND_PAYLOAD_SIZE]; +} IsdCommandFrame_t; + +typedef struct PACK +{ + uint8_t srcAddrMode; + ShortAddr_t srcShortAddress; + ExtAddr_t srcExtAddress; + ProfileId_t srcProfileId; + Endpoint_t srcEndpointId; + ClusterId_t srcClusterId; + + ClusterId_t clusterId; + uint8_t direction; + uint8_t commandId; + uint8_t payload[1]; +} IsdCommandIndication_t; + +typedef struct PACK +{ + LITTLE_ENDIAN_OCTET(3,( + uint8_t direction : 1, + uint8_t generalCommand : 1, + uint8_t reserved : 6 + )) +} IsdCommandOptions_t; + +typedef struct PACK +{ + uint8_t addrMode; + ShortAddr_t shortAddress; + ExtAddr_t extAddress; + ProfileId_t profileId; + uint8_t endpoint; + uint8_t dstEndpoint; + ClusterId_t clusterId; + uint8_t defaultResponse; + IsdCommandOptions_t commandOptions; + uint8_t commandId; + uint8_t recordsCount; + uint8_t request[1]; +} IsdCommandRequest_t; +END_PACK + +/****************************************************************************** + Static Function Prototypes section +******************************************************************************/ +static void isdUsartReceivedHandler(uint16_t bytesAmount); +static void isdSendCommandFrame(void); +static void isdUsartTransmittedHandler(void); +static void isdInterbyteTimeoutExpired(void); +static void isdIntermessageTimeoutExpired(void); +static void isdInitReq(void); +static void isdInitResp(void); +static void isdSerialNotify(void); +static void isdSetState(ISD_Status_t state); + +/****************************************************************************** + Static variables section +******************************************************************************/ +static HAL_UsartDescriptor_t usartDescriptor; +static RxState_t rxState = RX_ERR_OR_OFF; +static TxState_t txState = TX_ERR_OR_OFF; +static uint8_t usartDescriptorRxBuffer[USART_RX_BUFFER_LENGTH]; +static IsdCommandFrame_t isdBuffer; + +static HAL_AppTimer_t interbyteTimer = +{ + .interval = INTERBYTE_TIMEOUT, + .mode = TIMER_ONE_SHOT_MODE, + .callback = isdInterbyteTimeoutExpired, +}; + +static HAL_AppTimer_t intermessageTimer = +{ + .interval = INTERMESSAGE_TIMEOUT, + .mode = TIMER_ONE_SHOT_MODE, + .callback = isdIntermessageTimeoutExpired, +}; + +static IsdOpenCb_t generalCb; +static IsdUpgradeEndCb_t upgradeEndCb; +static IsdQueryNextImageCb_t queryNextImageCb; +static IsdImageBlockCb_t imageBlockCb; + +static ISD_Status_t isdState; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Open image storage driver + +\param[in] cb - callback about driver actions +******************************************************************************/ +void ISD_Open(IsdOpenCb_t cb) +{ + // Implementation depends on 'length' field in IsdCommandFrame_t being one byte + // In case of change, several modifications would be required + assert_static(2 == LEN_SIZE); + // Also depends on 'length' field being first field of command frame + assert_static(0 == offsetof(IsdCommandFrame_t, length)); + +#ifdef BSP_ENABLE_RS232_CONTROL + BSP_EnableRs232(); +#endif /* BSP_ENABLE_RS232_CONTROL */ + + usartDescriptor.tty = APP_USART_CHANNEL; + usartDescriptor.mode = USART_MODE_ASYNC; + usartDescriptor.flowControl = USART_FLOW_CONTROL_NONE; + usartDescriptor.baudrate = USART_BAUDRATE_38400; + usartDescriptor.dataLength = USART_DATA8; + usartDescriptor.parity = USART_PARITY_NONE; + usartDescriptor.stopbits = USART_STOPBIT_1; + usartDescriptor.rxBuffer = usartDescriptorRxBuffer; + usartDescriptor.rxBufferLength = USART_RX_BUFFER_LENGTH; //BULK_SIZE + usartDescriptor.txBuffer = NULL; + usartDescriptor.txBufferLength = 0; + usartDescriptor.rxCallback = isdUsartReceivedHandler; + usartDescriptor.txCallback = isdUsartTransmittedHandler; + + generalCb = cb; + + if (-1 != HAL_OpenUsart(&usartDescriptor)) + { + rxState = RX_WAITING_START; + txState = TX_IDLE; + isdInitReq(); + } + else + { + rxState = RX_ERR_OR_OFF; + txState = TX_ERR_OR_OFF; + isdSetState(ISD_HARDWARE_FAULT); + } +} + +/**************************************************************************//** +\brief Request to storage system about communication. +******************************************************************************/ +static void isdInitReq(void) +{ + isdBuffer.commandId = ISD_DRIVER_INIT_REQUEST; + isdBuffer.length = ISD_COMMAND_ID_SIZE + sizeof(uint8_t); + isdBuffer.payload[0] = ISD_INIT_MARKER; + + HAL_StartAppTimer(&intermessageTimer); + isdSendCommandFrame(); +} + +/**************************************************************************//** +\brief Response from storage system about communication. +******************************************************************************/ +static void isdInitResp(void) +{ + HAL_StopAppTimer(&intermessageTimer); + + if (ISD_INIT_MARKER != isdBuffer.payload[0]) + isdSetState(ISD_COMMUNICATION_LOST); + else + isdSetState(ISD_SUCCESS); +} + +/**************************************************************************//** +\brief Close image storage driver +******************************************************************************/ +void ISD_Close(void) +{ + rxState = RX_ERR_OR_OFF; + txState = TX_ERR_OR_OFF; + HAL_CloseUsart(&usartDescriptor); +} + +/**************************************************************************//** +\brief Reset rx FSM on expiration of interbyte timeout +******************************************************************************/ +static void isdInterbyteTimeoutExpired(void) +{ + if (RX_ERR_OR_OFF != rxState) + rxState = RX_WAITING_START; +} + +/**************************************************************************//** +\brief Callback about timout expiration between request and response +******************************************************************************/ +static void isdIntermessageTimeoutExpired(void) +{ + isdSetState(ISD_COMMUNICATION_LOST); + isdInitReq(); +} + +/**************************************************************************//** +\brief Callback on reception of serial byte(s) + +\param[in] bytesAmount number of received bytes +******************************************************************************/ +static void isdUsartReceivedHandler(uint16_t bytesAmount) +{ + static uint16_t rxCnt = 0; + while (bytesAmount) + { + switch (rxState) + { + case RX_WAITING_START: + { + uint8_t data; + if (HAL_ReadUsart(&usartDescriptor, &data, sizeof(uint8_t)) <= 0) + { + rxState = RX_ERR_OR_OFF; + isdSetState(ISD_HARDWARE_FAULT); + return; + } + if (SOF == data) + rxState = RX_WAITING_LEN; + + bytesAmount--; + } + break; + + case RX_WAITING_LEN: + { + if (bytesAmount >= sizeof(uint16_t)) + { + if (HAL_ReadUsart(&usartDescriptor, (uint8_t *)&isdBuffer.length, sizeof(uint16_t)) <= 0) + { + rxState = RX_ERR_OR_OFF; + isdSetState(ISD_HARDWARE_FAULT); + return; + } + + // Limit length to avoid possible buffer overflow + isdBuffer.length = MIN(isdBuffer.length, sizeof(IsdCommandFrame_t) - LEN_SIZE); + + if (isdBuffer.length > 0) + rxState = RX_WAITING_DATA; + else + rxState = RX_WAITING_START; // Do not allow zero len + + bytesAmount -= sizeof(uint16_t); + rxCnt = 0; + } + else + return; + } + break; + + case RX_WAITING_DATA: + { + int readCnt; + uint8_t *readPtr = (uint8_t *)&isdBuffer; + + readPtr += offsetof(IsdCommandFrame_t, commandId) + rxCnt; + readCnt = HAL_ReadUsart(&usartDescriptor, readPtr, MIN(bytesAmount, (uint16_t) (isdBuffer.length - rxCnt))); + + if (readCnt <= 0) + { + rxState = RX_ERR_OR_OFF; + isdSetState(ISD_HARDWARE_FAULT); + return; + } + + bytesAmount -= readCnt; + rxCnt += readCnt; + if (rxCnt >= isdBuffer.length) + { + // Full packet is received + rxState = RX_WAITING_START; + isdSerialNotify(); + } + } + break; + + case RX_ERR_OR_OFF: + default: + return; + } + } + + HAL_StopAppTimer(&interbyteTimer); + + if (RX_WAITING_DATA == rxState || RX_WAITING_LEN == rxState) + HAL_StartAppTimer(&interbyteTimer); +} + +/**************************************************************************//** +\brief Sends new command frame + +\return result code +******************************************************************************/ +static void isdSendCommandFrame(void) +{ + static uint8_t sof = SOF; + + if (HAL_WriteUsart(&usartDescriptor, &sof, sizeof(sof)) > 0) + { + txState = TX_SENDING_SOF; + } + else + { + txState = TX_ERR_OR_OFF; + isdSetState(ISD_HARDWARE_FAULT); + } +} + +/**************************************************************************//** +\brief Callback on completion of single serial transmit +******************************************************************************/ +static void isdUsartTransmittedHandler(void) +{ + switch (txState) + { + case TX_SENDING_SOF: + { + uint8_t *writePtr = (uint8_t *)&isdBuffer; + + writePtr += offsetof(IsdCommandFrame_t, length); + if (HAL_WriteUsart(&usartDescriptor, writePtr, isdBuffer.length + LEN_SIZE) <= 0) + { + txState = TX_ERR_OR_OFF; + isdSetState(ISD_HARDWARE_FAULT); + } + else + txState = TX_SENDING_DATA; + } + break; + + case TX_SENDING_DATA: + txState = TX_IDLE; + break; + + case TX_IDLE: + case TX_ERR_OR_OFF: + default: + break; + } +} + +/**************************************************************************//** +\brief Send query next image request to storage system + +\param[in] addressing - pointer to structure that include client network information; \n +\param[in] data - data payload; \n +\param[in] cd - callback about response receiving from storage system. +******************************************************************************/ +void ISD_QueryNextImageReq(ZCL_Addressing_t *addressing, ZCL_OtauQueryNextImageReq_t *data, IsdQueryNextImageCb_t cb) +{ + IsdCommandIndication_t *serialData = (IsdCommandIndication_t *)isdBuffer.payload; + + if (ISD_SUCCESS != isdState) + return; + + serialData->clusterId = addressing->clusterId; + serialData->commandId = QUERY_NEXT_IMAGE_REQUEST_ID; + serialData->srcAddrMode = addressing->addrMode; + serialData->srcShortAddress = addressing->addr.shortAddress; + serialData->srcExtAddress = addressing->addr.extAddress; + serialData->srcProfileId = addressing->profileId; + serialData->srcEndpointId = addressing->endpointId; + serialData->srcClusterId = addressing->clusterId; + serialData->direction = addressing->clusterSide; + + memcpy(serialData->payload, data, sizeof(ZCL_OtauQueryNextImageReq_t)); + + isdBuffer.commandId = ISD_ZCL_COMMAND_INDICATION; + isdBuffer.length = ISD_COMMAND_ID_SIZE + sizeof(IsdCommandIndication_t) + + sizeof(ZCL_OtauQueryNextImageReq_t) - sizeof(uint8_t); + + queryNextImageCb = cb; + + HAL_StartAppTimer(&intermessageTimer); + isdSendCommandFrame(); +} + +/**************************************************************************//** +\brief Send image block request to storage system + +\param[in] addressing - pointer to structure that include client network information; \n +\param[in] data - data payload; \n +\param[in] cd - callback about response receiving from storage system. +******************************************************************************/ +void ISD_ImageBlockReq(ZCL_Addressing_t *addressing, ZCL_OtauImageBlockReq_t *data, IsdImageBlockCb_t cb) +{ + IsdCommandIndication_t *serialData = (IsdCommandIndication_t *)isdBuffer.payload; + + if (ISD_SUCCESS != isdState) + return; + + serialData->clusterId = addressing->clusterId; + serialData->commandId = IMAGE_BLOCK_REQUEST_ID; + serialData->srcAddrMode = addressing->addrMode; + serialData->srcShortAddress = addressing->addr.shortAddress; + serialData->srcExtAddress = addressing->addr.extAddress; + serialData->srcProfileId = addressing->profileId; + serialData->srcEndpointId = addressing->endpointId; + serialData->srcClusterId = addressing->clusterId; + serialData->direction = addressing->clusterSide; + + memcpy(serialData->payload, data, sizeof(ZCL_OtauImageBlockReq_t)); + + isdBuffer.commandId = ISD_ZCL_COMMAND_INDICATION; + isdBuffer.length = ISD_COMMAND_ID_SIZE + sizeof(IsdCommandIndication_t) + + sizeof(ZCL_OtauImageBlockReq_t) - sizeof(uint8_t); + + imageBlockCb = cb; + + HAL_StartAppTimer(&intermessageTimer); + isdSendCommandFrame(); +} + +/**************************************************************************//** +\brief Send upgrade end request to storage system + +\param[in] addressing - pointer to structure that include client network information; \n +\param[in] data - data payload; \n +\param[in] cd - callback about response receiving from storage system. +******************************************************************************/ +void ISD_UpgradeEndReq(ZCL_Addressing_t *addressing, ZCL_OtauUpgradeEndReq_t *data, IsdUpgradeEndCb_t cb) +{ + IsdCommandIndication_t *serialData = (IsdCommandIndication_t *)isdBuffer.payload; + + if (ISD_SUCCESS != isdState) + return; + + serialData->clusterId = addressing->clusterId; + serialData->commandId = UPGRADE_END_REQUEST_ID; + serialData->srcAddrMode = addressing->addrMode; + serialData->srcShortAddress = addressing->addr.shortAddress; + serialData->srcExtAddress = addressing->addr.extAddress; + serialData->srcProfileId = addressing->profileId; + serialData->srcEndpointId = addressing->endpointId; + serialData->srcClusterId = addressing->clusterId; + serialData->direction = addressing->clusterSide; + + memcpy(serialData->payload, data, sizeof(ZCL_OtauUpgradeEndReq_t)); + + isdBuffer.commandId = ISD_ZCL_COMMAND_INDICATION; + isdBuffer.length = ISD_COMMAND_ID_SIZE + sizeof(IsdCommandIndication_t) + + sizeof(ZCL_OtauUpgradeEndReq_t) - sizeof(uint8_t); + + upgradeEndCb = cb; + + HAL_StartAppTimer(&intermessageTimer); + isdSendCommandFrame(); +} + +/**************************************************************************//** +\brief Receive any messages from storage system +******************************************************************************/ +static void isdSerialNotify(void) +{ + IsdCommandRequest_t *req = (IsdCommandRequest_t *)isdBuffer.payload; + + if (ISD_DRIVER_INIT_RESPONSE == isdBuffer.commandId) + { + isdInitResp(); + return; + } + + if (ISD_ZCL_COMMAND_REQUEST != isdBuffer.commandId) + return; + + if (OTAU_CLUSTER_ID != req->clusterId) + return; + + switch (req->commandId) + { + case QUERY_NEXT_IMAGE_RESPONSE_ID: + { + ZCL_OtauQueryNextImageResp_t *resp = (ZCL_OtauQueryNextImageResp_t *)req->request; + + HAL_StopAppTimer(&intermessageTimer); + if (queryNextImageCb) + { + queryNextImageCb(resp); + queryNextImageCb = NULL; + } + } + break; + case IMAGE_BLOCK_RESPONSE_ID: + { + ZCL_OtauImageBlockResp_t *resp = (ZCL_OtauImageBlockResp_t *)req->request; + + HAL_StopAppTimer(&intermessageTimer); + if (imageBlockCb) + { + imageBlockCb(resp); + imageBlockCb = NULL; + } + } + break; + case UPGRADE_END_RESPONSE_ID: + { + ZCL_OtauUpgradeEndResp_t *resp = (ZCL_OtauUpgradeEndResp_t *)req->request; + + HAL_StopAppTimer(&intermessageTimer); + if (upgradeEndCb) + { + upgradeEndCb(resp); + upgradeEndCb = NULL; + } + else + { + ZCL_Addressing_t addr = + { + .addrMode = req->addrMode, + .profileId = req->profileId, + .endpointId = req->dstEndpoint, + .clusterId = req->clusterId, + .clusterSide = ZCL_CLIENT_CLUSTER_TYPE, + .manufacturerSpecCode = 0, + }; + + if (APS_EXT_ADDRESS == addr.addrMode) + addr.addr.extAddress = req->extAddress; + else + addr.addr.shortAddress = req->shortAddress; + + ZCL_UnsolicitedUpgradeEndResp(&addr, resp); + } + } + break; + } +} + +/**************************************************************************//** +\brief Set actual driver state and report to high layer about that. + +\param[in] state - actual driver state +******************************************************************************/ +static void isdSetState(ISD_Status_t state) +{ + isdState = state; + + if (generalCb) + generalCb(state); +} + +#endif // (APP_USE_OTAU == 1) +#endif // _OTAU_ + +// eof isdImageStorage.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/Makefile b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/Makefile new file mode 100644 index 00000000..ef22558f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/Makefile @@ -0,0 +1,107 @@ +COMPONENTS_PATH = ../../.. +#include $(COMPONENTS_PATH)/Makerules +include $(MAKERULES) + +DEBUG = NO +###### Option to switch on the fake driver ########## +ifndef APP_USE_FAKE_OFD_DRIVER + APP_USE_FAKE_OFD_DRIVER = 0 +endif + +# Hardware flags. +CFLAGS += $(CFLAGS_HW) + +##### PATHS FLAGS OF INCLUDES ######### +CFLAGS += -I./include +CFLAGS += -I./../include +CFLAGS += -I$(HAL_PATH)/include +CFLAGS += -I$(HAL_HWD_COMMON_PATH)/include +CFLAGS += -I$(SE_PATH)/include + +ifeq ($(DEBUG), YES) + CFLAGS += -D_DEBUG_ +endif + +#### ASM DEFINES FLAGS ####### +ifeq ($(COMPILER_TYPE), GCC) + ASMFLAGS = $(filter -mmcu%,$(CFLAGS)) + ASM_FILE_EXT = s +endif +ifeq ($(COMPILER_TYPE), IAR) + ASMFLAGS = -s+ # Enables case sensitivity. + ASMFLAGS += -w+ # Enables warnings. + ASMFLAGS += -M'<>'# Change asm.macro argument quote chars. + ASMFLAGS += -t8 # Set tab spacing. + ASMFLAGS += -u_enhancedCore + ASMFLAGS += -D__HAS_ENHANCED_CORE__=1 + ASMFLAGS += -D__HAS_MUL__=1 + ASMFLAGS += -D__MEMORY_MODEL__=2 + ifneq (, $(findstring $(HAL), ATMEGA1281 ATMEGA1284 AT90USB1287 ATMEGA128RFA1)) + ASMFLAGS += -v3 # Select processor option: Relative jumps do not wrap. + endif + ifneq (, $(findstring $(HAL), ATMEGA2561 ATXMEGA256A3 ATXMEGA256D3)) + ASMFLAGS += -v5 # Select processor option: Relative jumps do not wrap. + endif + ifneq (, $(findstring $(HAL), ATXMEGA256A3 ATXMEGA256D3)) + ASMFLAGS += --xmega #Enable Xmega specific instructions + endif + ASMFLAGS += -D__HAS_ELPM__=1 + ASMFLAGS += -S + ASM_FILE_EXT = s90 +endif + +###### LIB ########## +BUILDDIR = . + +LIBDIR = ./../lib +LDFLAGS = -L$(LIBDIR) +PROG = OFD.elf +LIBS = $(LIBDIR)/lib$(OFD_LIB).a + +driver_label: + @echo + @echo ---------------------------------------------------- + @echo Otau flash driver library creation. + @echo ---------------------------------------------------- + +ifneq ($(APP_USE_FAKE_OFD_DRIVER), 1) +modules = \ + ofdAt25fDriver \ + ofdAt45dbDriver \ + ofdCommand \ + ofdCrcService \ + ofdSpiSerializer + +asm_modules = \ + ofdIntFlashRead +else +modules = \ + ofdFakeDriver +endif + +objects = $(addsuffix .o,$(addprefix $(BUILDDIR)/objs/,$(modules))) +sources = $(addsuffix .c,$(addprefix $(BUILDDIR)/src/,$(modules))) +objects_asm = $(addsuffix .o,$(addprefix $(BUILDDIR)/objs/,$(asm_modules))) +sources_asm = $(addsuffix .$(ASM_FILE_EXT),$(addprefix $(BUILDDIR)/src/,$(asm_modules))) + +###### TARGETS ################ +all: driver_label LIB_OFD + +################ c part ###################### +$(BUILDDIR)/objs/%.o: $(BUILDDIR)/src/%.c + $(CC) $(CFLAGS) $^ -o $@ + +################ assembler part ###################### +$(BUILDDIR)/objs/%.o: $(BUILDDIR)/src/%.$(ASM_FILE_EXT) + $(AS) $(ASMFLAGS) -o $@ $^ + +################ +LIB_OFD : $(objects) $(objects_asm) + $(AR) $(AR_KEYS) $(LIBDIR)/lib$(OFD_LIB).a $(objects) $(objects_asm) + $(SIZE) -td $(LIBDIR)/lib$(OFD_LIB).a +################ +clean: + @echo ---------------------------------------------------- + @echo OTAU flash driver cleaning. + @echo ---------------------------------------------------- + rm -f $(objects) $(objects_asm) $(LIBS) $(BUILDDIR)/list/*.* \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/include/ofdMemoryDriver.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/include/ofdMemoryDriver.h new file mode 100644 index 00000000..d158af26 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/include/ofdMemoryDriver.h @@ -0,0 +1,310 @@ +/**************************************************************************//** +\file ofdMemoryDriver.h + +\brief The implementation interface of external flash. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 31/07/09 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +#ifndef _OFDMEMORYDRIVER_H +#define _OFDMEMORYDRIVER_H + +#ifdef _OTAU_ +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if EXTERNAL_MEMORY == AT25F2048 + + #if !defined(ATMEGA1281) && !defined(ATMEGA128RFA1) + #error 'at25f2048 is supported only for atmega1281/128rfa1.' + #endif + + // flash instruction format (see at25f2048 manual) + #define WREN 0x06 + #define WRDI 0x04 + #define RDSR 0x05 + #define WRSR 0x01 + #define READ 0x03 + #define PROGRAM 0x02 + #define SECTOR_ERASE 0x52 + #define CHIP_ERASE 0x62 + #define RDID 0x15 + + // status register bits + #define RDY 0x01 + #define WEN 0x02 + #define BP0 0x04 + #define BP1 0x08 + #define WPEN 0x80 + + // Atmel ID + #define OFD_MANUFACTURER_ID 0x1F + // at25f2048 + #define OFD_DEVICE_ID 0x63 + + #define PAGE_SIZE 256 + + // flash sectors + #define SECTOR_ONE 0x00000000ul + #define SECTOR_TWO 0x00010000ul + #define SECTOR_THREE 0x00020000ul + #define SECTOR_FOUR 0x00030000ul + // 2 Mbits + #define OFD_FLASH_SIZE 262144 + // image consists mcu flash - bootloader size + eeprom size. 128k - 4k + 4k + #define OFD_IMAGE_SIZE 131072 + #define OFD_FLASH_START_ADDRESS 0 + #define OFD_IMAGE1_START_ADDRESS OFD_FLASH_START_ADDRESS + #define OFD_IMAGE2_START_ADDRESS (OFD_FLASH_START_ADDRESS + OFD_IMAGE_SIZE) + + #define OFD_MCU_FLASH_SIZE OFD_IMAGE_SIZE + #define OFD_MCU_EEPROM_SIZE 4096 + #define OFD_EEPROM_OFFSET_WITHIN_IMAGE (OFD_MCU_FLASH_SIZE - OFD_MCU_EEPROM_SIZE) + // 1 byte (action for bootloader), 2 bytes (images crc), 1 byte table of image types. + #define OFD_SERVICE_INFO_SIZE 4 + +#elif EXTERNAL_MEMORY == AT45DB041 + + #if !defined(ATMEGA1281) && !defined(ATMEGA128RFA1) && !defined(ATXMEGA256A3) && !defined(ATXMEGA256D3) + #error 'at45db041 is supported only for atmega1281/128rfa1, atxmega256a/d3.' + #endif + + // flash instruction format (see at45db041 manual) + #define WRITE_BUF1 0x84 + #define WRITE_BUF2 0x87 + #define RDSR 0xD7 + #define READ 0xE8 + #define PROGRAM_BUF1 0x88 + #define PROGRAM_BUF2 0x89 + #define BLOCK_ERASE 0x50 + + // status register bits + #define RDY 0x80 + // unchanged bit mask within status register xx0111xx + #define STATUS_UNCHANGED_BIT_MASK 0x3C + #define STATUS_UNCHANGED_BITS 0x1C + + #define PAGE_SIZE 264 + // block addresses + #define FIRST_HALF_BLOCK_NUMBER 0 + #define SECOND_HALF_BLOCK_NUMBER 128 + + // 4 Mbits + #define OFD_FLASH_SIZE 540672 + + #if defined(ATMEGA1281) || defined(ATMEGA128RFA1) + // image consists mcu flash - bootloader size + eeprom size. 128k - 4k + 4k + // image uses 497 pages. 1 block = 8 pages + #define OFD_USED_BLOCKS_AMOUNT 63 + #define OFD_IMAGE_SIZE 131072 + #define OFD_MCU_FLASH_SIZE OFD_IMAGE_SIZE + #define OFD_EEPROM_OFFSET_WITHIN_IMAGE (OFD_MCU_FLASH_SIZE - OFD_MCU_EEPROM_SIZE) + #define OFD_LOAD_NO_COMMAND_TO_NVM + #elif defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + // image consists mcu flash + eeprom size. 256k + 4k + // image uses 1009 pages. 1 block = 8 pages + #define OFD_USED_BLOCKS_AMOUNT 128 + #define OFD_IMAGE_SIZE 266240 + #define OFD_MCU_FLASH_SIZE 262144 + #define OFD_EEPROM_OFFSET_WITHIN_IMAGE OFD_MCU_FLASH_SIZE + #define OFD_LOAD_NO_COMMAND_TO_NVM NVM.CMD = NVM_CMD_NO_OPERATION_gc + #endif + + #define OFD_FLASH_START_ADDRESS 0 + #define OFD_IMAGE1_START_ADDRESS OFD_FLASH_START_ADDRESS + #define OFD_IMAGE2_START_ADDRESS 270336 + + #define OFD_MCU_EEPROM_SIZE 4096 + // 1 byte (action for bootloader), 2 bytes (images crc), 1 byte table of image types. + #define OFD_SERVICE_INFO_SIZE 4 + +#elif EXTERNAL_MEMORY == AT25DF041A + + #if !defined(ATXMEGA256A3) && !defined(ATXMEGA256D3) + #error 'at25df041a is supported only for atxmega256a3.' + #endif + + // flash instruction format (see at25df041a manual) + #define WREN 0x06 + #define WRDI 0x04 + #define RDSR 0x05 + #define WRSR 0x01 + #define READ 0x03 + #define PROGRAM 0x02 + #define SECTOR_ERASE 0xD8 + #define CHIP_ERASE 0x60 + #define RDID 0x9F + #define PROTECT_SECTOR 0x36 + #define UNPROTECT_SECTOR 0x39 + + // status register arguments + #define GLOBAL_UNPROTECT 0x00 + #define GLOBAL_PROTECT 0x7F + + // status register bits + #define RDY 0x01 + #define WEN 0x02 + #define SWP0 0x04 + #define SWP1 0x08 + #define WPP 0x10 + #define EPE 0x20 + #define SPM 0x40 + #define WPRL 0x80 + + // Atmel ID + #define OFD_MANUFACTURER_ID 0x1F + // at25df041a + #define OFD_DEVICE_ID_1 0x44 + #define OFD_DEVICE_ID_2 0x01 + #define EXT_STRING_LENGTH 0x00 + + #define PAGE_SIZE 256 + + // flash sectors + #define SECTOR_ONE 0x00000000ul + #define SECTOR_TWO 0x00010000ul + #define SECTOR_THREE 0x00020000ul + #define SECTOR_FOUR 0x00030000ul + // 4 Mbits + #define OFD_FLASH_SIZE 524288 + // image consists mcu flash size + eeprom size. 256k + 4k + #define OFD_IMAGE_SIZE 266240 + #define OFD_FLASH_START_ADDRESS 0 + #define OFD_IMAGE1_START_ADDRESS OFD_FLASH_START_ADDRESS + // this is fake start address used for code compatibility + #define OFD_IMAGE2_START_ADDRESS (OFD_FLASH_START_ADDRESS + OFD_IMAGE_SIZE) + + #define OFD_MCU_FLASH_SIZE OFD_IMAGE_SIZE + #define OFD_MCU_EEPROM_SIZE 4096 + #define OFD_EEPROM_OFFSET_WITHIN_IMAGE (OFD_MCU_FLASH_SIZE - OFD_MCU_EEPROM_SIZE) + // 1 byte (action for bootloader), 2 bytes (images crc), 1 byte table of image types. + #define OFD_SERVICE_INFO_SIZE 4 + +#else + #error 'Unknown memory type.' +#endif + +#define OFD_START_EEPROM_SREC_ADDRESS 0x810000 +#define OFD_LITTLE_TO_BIG_ENDIAN(A) ((((uint32_t)A & 0xFFul) << 24) \ + | (((uint32_t)A & 0xFF00ul) << 8) \ + | (((uint32_t)A >> 8) & 0xFF00ul) \ + | (((uint32_t)A >> 24) & 0xFFul)) + + +typedef struct +{ + union + { + uint32_t flashOffset; + uint16_t eepromOffset; + }; + uint8_t *data; + uint32_t length; +} OfdInternalMemoryAccessParam_t; + +// image type table +typedef uint8_t OfdImageTable_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Starts image erasing in the external memory. +******************************************************************************/ +void ofdEraseImage(void); + +/**************************************************************************//** +\brief Writes data to the external memory. +******************************************************************************/ +void ofdWriteData(void); + +/**************************************************************************//** +\brief Checks image crc. +******************************************************************************/ +void ofdCheckCrc(void); + +/**************************************************************************//** +\brief Starts saving internal flash. +******************************************************************************/ +void ofdSaveCurrentFlashImage(void); + +/**************************************************************************//** +\brief Reads image crc from internal eeprom. +******************************************************************************/ +void ofdReadCrc(void); + +/**************************************************************************//** +\brief Counts crc current memory area. CRC-8. Polynom 0x31 x^8 + x^5 + x^4 + 1. + +\param[in] + crc - first crc state +\param[in] + pcBlock - pointer to the memory for crc counting +\param[in] + length - memory size + +\return + current area crc +******************************************************************************/ +uint8_t ofdCrc(uint8_t crc, uint8_t *pcBlock, uint8_t length); + +/**************************************************************************//** +\brief Finds storage space. +******************************************************************************/ +void ofdFindStorageSpace(void); + +/**************************************************************************//** +\brief Sets action for internal bootloader. +******************************************************************************/ +void ofdSetActionForBootloader(void); + +/**************************************************************************//** +\brief Flushs memory buffer to flash. +******************************************************************************/ +void ofdFlushData(void); + +#if EXTERNAL_MEMORY == AT25DF041A +/**************************************************************************//** +\brief Unprotects memory sectors for writing and erasing. +******************************************************************************/ +void ofdUnprotectMemorySectors(void); +#endif + +/****************************************************************************** + Inline static functions prototypes section. +******************************************************************************/ +// Macros for the EXT_MEM_CS pin manipulation. +#if defined(ATMEGA1281) + +HAL_ASSIGN_PIN(EXT_MEM_CS, F, 3); + +#elif defined(ATMEGA128RFA1) + +HAL_ASSIGN_PIN(EXT_MEM_CS, G, 5); + +#elif defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + +HAL_ASSIGN_PIN(EXT_MEM_CS, D, 4); + +#endif + +#endif // _OTAU_ + +#endif /* _OFDMEMORYDRIVER_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt25Driver.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt25Driver.c new file mode 100644 index 00000000..4f470eb4 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt25Driver.c @@ -0,0 +1,742 @@ +/**************************************************************************//** +\file ofdAt25fDriver.c + +\brief Implementation of chip-flash interface. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 5/12/07 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if ((EXTERNAL_MEMORY == AT25F2048) ||(EXTERNAL_MEMORY == AT25DF041A)) && (APP_USE_OTAU == 1) +#if APP_USE_FAKE_OFD_DRIVER == 0 + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define SPI_BUSY_POLL_PERIOD 10 +// cycles of counting flash crc before context gap. +#define ATOMIC_COUNTING 128 +#define EEPROM_OK 0 +#define EEPROM_BUSY -2 + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + FLASH_BUSY, + FLASH_READY +} FlashBusyState_t; + +typedef enum +{ + FLASH_TRANSACTION, + EEPROM_TRANSACTION +} DelayedTransactionType_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +static inline uint8_t ofdReadStatusRegister(void); +static inline void ofdStartPollTimer(DelayedTransactionType_t type); +static void ofdReadImageTable(void); +static void ofdSaveCrcCallback(void); +static void ofdContinueEraseImage(void); +static void ofdSaveCurrentEepromImage(void); +static void ofdFlushCrcCallback(OFD_Status_t status, OFD_ImageInfo_t *pInfo); +static void ofdSaveCurrentEepromImageContinue(void); +static void ofdPollBusyState(void); +static void ofdStartFlashDelayedTransaction(void); +static void ofdStartEepromDelayedTransaction(void); +uint8_t ofdReadInternalFlash(uint32_t flashAddress); +#if defined(_OFD_DEBUG_) +void ofdReadData(uint32_t address, uint8_t *data, uint16_t size, OFD_Callback_t cb); +#endif + +/****************************************************************************** + External variables section +******************************************************************************/ +extern HAL_SpiDescriptor_t spiDesc; +extern OFD_Position_t sectorNumber; +extern OFD_Position_t actionSector; +extern OFD_Callback_t ofdCallback; +extern OFD_Callback_t ofdAuxCallback; +extern OFD_MemoryAccessParam_t localAccessStructure; +extern OFD_ImageInfo_t imageInfo; +extern OfdImageTable_t imageTable; +extern OfdInternalMemoryAccessParam_t internalAccessParam; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HAL_AppTimer_t ofdBusyTimer = +{ + .interval = SPI_BUSY_POLL_PERIOD, + .mode = TIMER_ONE_SHOT_MODE, +}; +void (* delayedTransaction)(void) = NULL; +#if defined(_OFD_DEBUG_) +static HAL_UsartDescriptor_t usartDescriptor; +static uint32_t debugOffset = 0ul; +static uint8_t debugBuffer[OFD_BLOCK_SIZE]; +#endif + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Checks flash station. + +\return flash states: \n + FLASH_BUSY \n + FLASH_READY +******************************************************************************/ +static inline FlashBusyState_t ofdCheckBusyState(void) +{ + uint8_t statusReg = ofdReadStatusRegister(); + + if (!(statusReg & RDY)) + return FLASH_READY; + + return FLASH_BUSY; +} + +/**************************************************************************//** +\brief Starts flash delayed transaction. +******************************************************************************/ +static void ofdStartFlashDelayedTransaction(void) +{ + if (FLASH_READY == ofdCheckBusyState()) + delayedTransaction(); + else + ofdStartPollTimer(FLASH_TRANSACTION); +} + +/**************************************************************************//** +\brief Starts eeprom delayed transaction. +******************************************************************************/ +static void ofdStartEepromDelayedTransaction(void) +{ + if (!HAL_IsEepromBusy()) + delayedTransaction(); + else + ofdStartPollTimer(EEPROM_TRANSACTION); +} + +/**************************************************************************//** +\brief Starts timer for start delayed transaction. + +\param[in] + type - transaction type (flash or eeprom) +******************************************************************************/ +static inline void ofdStartPollTimer(DelayedTransactionType_t type) +{ + if (FLASH_TRANSACTION == type) + ofdBusyTimer.callback = ofdStartFlashDelayedTransaction; + else + ofdBusyTimer.callback = ofdStartEepromDelayedTransaction; + + HAL_StartAppTimer(&ofdBusyTimer); +} + +/**************************************************************************//** +\brief Routine of eeprom access. +\param[in] + result - result of hal eeprom action +\param[in] + action - initiator action +\return + false - incorrect parameters + true - eeprom transaction is started +******************************************************************************/ +static bool ofdEepromHandler(int result, void(* action)()) +{ + switch (result) + { + case EEPROM_OK: + return true; + case EEPROM_BUSY: + delayedTransaction = action; + ofdStartPollTimer(EEPROM_TRANSACTION); + return true; + default: + return false; + } +} + +/**************************************************************************//** +\brief Returns SUCCESS status. +******************************************************************************/ +static void ofdReturnSuccessStatus(void) +{ + if (ofdCallback) + ofdCallback(OFD_STATUS_SUCCESS); +} + +/**************************************************************************//** +\brief Reads image table. +******************************************************************************/ +static void ofdReadImageTable(void) +{ + HAL_EepromParams_t params; + + params.address = OFD_SERVICE_INFO_SIZE - sizeof(OfdImageTable_t); + params.data = &imageTable; + params.length = sizeof(OfdImageTable_t); + + if (!ofdEepromHandler(HAL_ReadEeprom(¶ms, ofdReturnSuccessStatus), ofdReadImageTable)) + if (ofdCallback) + ofdCallback(OFD_STATUS_INCORRECT_EEPROM_PARAMETER); +} + +/**************************************************************************//** +\brief Reads manufacturer ID and chip ID. +******************************************************************************/ +void ofdFindStorageSpace(void) +{ + uint64_t manufacId = RDID; + + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdFindStorageSpace; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + GPIO_EXT_MEM_CS_clr(); +#if EXTERNAL_MEMORY == AT25F2048 + HAL_ReadSpi(&spiDesc, (uint8_t *)&manufacId, sizeof(uint32_t)-1); +#elif EXTERNAL_MEMORY == AT25DF041A + HAL_ReadSpi(&spiDesc, (uint8_t *)&manufacId, sizeof(uint64_t)-3); +#endif + GPIO_EXT_MEM_CS_set(); + + if (OFD_MANUFACTURER_ID == (uint8_t)(manufacId >> 8)) + { +#if EXTERNAL_MEMORY == AT25F2048 + if (OFD_DEVICE_ID == (uint8_t)(manufacId >> 16)) +#elif EXTERNAL_MEMORY == AT25DF041A + if ((OFD_DEVICE_ID_1 == (uint8_t)(manufacId >> 16)) && + (OFD_DEVICE_ID_2 == (uint8_t)(manufacId >> 24)) && + (EXT_STRING_LENGTH == (uint8_t)(manufacId >> 32))) +#endif + { + // read image table to global variable + ofdReadImageTable(); + return; + } + } + + if (ofdCallback) + ofdCallback(OFD_STATUS_UNKNOWN_EXTERNAL_FLASH_TYPE); +} + +/**************************************************************************//** +\brief Reads status register from the external flash. + +\return status register +******************************************************************************/ +static inline uint8_t ofdReadStatusRegister(void) +{ + uint16_t regStatus = RDSR; + + GPIO_EXT_MEM_CS_clr(); + HAL_ReadSpi(&spiDesc, (uint8_t *)®Status, sizeof(uint16_t)); + GPIO_EXT_MEM_CS_set(); + + return (uint8_t)(regStatus >> 8); +} + +/**************************************************************************//** +\brief Sends "write enable" command to the external flash. +******************************************************************************/ +void ofdSendWriteEnable(void) +{ + uint8_t wren = WREN; + + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, &wren, sizeof(uint8_t)); + GPIO_EXT_MEM_CS_set(); +} + +/**************************************************************************//** +\brief Starts physical sector erasing in the external memory. + +\param[in] + sectorNumber - address from erased sector +******************************************************************************/ +void ofdEraseSector(uint32_t sectorNumber) +{ + uint32_t erasedSector = sectorNumber | ((uint32_t)SECTOR_ERASE << 24); + + ofdSendWriteEnable(); + erasedSector = OFD_LITTLE_TO_BIG_ENDIAN(erasedSector); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&erasedSector, sizeof(uint32_t)); + GPIO_EXT_MEM_CS_set(); +} + +/**************************************************************************//** +\brief Starts image erasing in the external memory. +******************************************************************************/ +void ofdEraseImage(void) +{ + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdEraseImage; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + if (OFD_POSITION_1 == sectorNumber) + ofdEraseSector(SECTOR_ONE); + else + ofdEraseSector(SECTOR_THREE); + + delayedTransaction = ofdContinueEraseImage; + ofdStartPollTimer(FLASH_TRANSACTION); +} + +/**************************************************************************//** +\brief Continues image erasing in the external memory. +******************************************************************************/ +static void ofdContinueEraseImage(void) +{ + if (OFD_POSITION_1 == sectorNumber) + ofdEraseSector(SECTOR_TWO); + else + ofdEraseSector(SECTOR_FOUR); + + ofdReturnSuccessStatus(); +} + +/**************************************************************************//** +\brief Writes data to the external memory. +******************************************************************************/ +void ofdWriteData(void) +{ + uint8_t *dataPointer; + uint16_t dataLength; + uint32_t dataAddress; + uint8_t writeInstruc = PROGRAM; + + if (!localAccessStructure.length) + { + ofdReturnSuccessStatus(); + return; + } + + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdWriteData; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + dataAddress = OFD_LITTLE_TO_BIG_ENDIAN(localAccessStructure.offset); + dataAddress >>= 8; + dataPointer = localAccessStructure.data; + dataLength = PAGE_SIZE - (uint8_t)localAccessStructure.offset; + if (dataLength >= localAccessStructure.length) + dataLength = localAccessStructure.length; + + localAccessStructure.data += dataLength; + localAccessStructure.offset += dataLength; + localAccessStructure.length -= dataLength; + + ofdSendWriteEnable(); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, &writeInstruc, sizeof(uint8_t)); + HAL_WriteSpi(&spiDesc, (uint8_t *)&dataAddress, sizeof(uint32_t)-1); + HAL_WriteSpi(&spiDesc, dataPointer, dataLength); + GPIO_EXT_MEM_CS_set(); + + delayedTransaction = ofdWriteData; + ofdStartPollTimer(FLASH_TRANSACTION); +} + +/**************************************************************************//** +\brief Calls callback about end of eeprom saving. +******************************************************************************/ +static void ofdSaveCrcCallback(void) +{ + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_SUCCESS, &imageInfo); +} + +/**************************************************************************//** +\brief Saves image table to the internal eeprom. +******************************************************************************/ +void ofdSaveImageTable(void) +{ + HAL_EepromParams_t params; + + params.address = OFD_SERVICE_INFO_SIZE-1; + params.data = &imageTable; + params.length = sizeof(OfdImageTable_t); + + if (!ofdEepromHandler(HAL_WriteEeprom(¶ms, ofdSaveCrcCallback), ofdSaveImageTable)) + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_INCORRECT_EEPROM_PARAMETER, &imageInfo); +} + +/**************************************************************************//** +\brief Saves crc to the internal eeprom. +******************************************************************************/ +void ofdSaveCrc(void) +{ + HAL_EepromParams_t params; + + params.address = sectorNumber + 1; + params.data = &imageInfo.crc; + params.length = sizeof(uint8_t); + + if (!ofdEepromHandler(HAL_WriteEeprom(¶ms, ofdSaveImageTable), ofdSaveCrc)) + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_INCORRECT_EEPROM_PARAMETER, &imageInfo); +} + +/**************************************************************************//** +\brief Flushs memory buffer to flash. +******************************************************************************/ +void ofdFlushData(void) +{} + +/**************************************************************************//** +\brief Checks image crc. +******************************************************************************/ +void ofdCheckCrc(void) +{ + uint32_t address; + uint8_t writeInstruc = READ; + uint8_t atomicCounting = ATOMIC_COUNTING; + + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdCheckCrc; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + while (atomicCounting--) + { + address = localAccessStructure.offset; + address = OFD_LITTLE_TO_BIG_ENDIAN(address<<8); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, &writeInstruc, sizeof(uint8_t)); + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)-1); + HAL_ReadSpi(&spiDesc, localAccessStructure.data, OFD_BLOCK_FOR_CHECK_CRC); + GPIO_EXT_MEM_CS_set(); // release spi cs + imageInfo.crc = ofdCrc(imageInfo.crc, localAccessStructure.data, OFD_BLOCK_FOR_CHECK_CRC); + localAccessStructure.offset += OFD_BLOCK_FOR_CHECK_CRC; + localAccessStructure.length -= OFD_BLOCK_FOR_CHECK_CRC; + if (!localAccessStructure.length) + { + ofdSaveCrc(); + return; + } + } + // context gap + delayedTransaction = ofdCheckCrc; + ofdStartPollTimer(FLASH_TRANSACTION); +} + +/**************************************************************************//** +\brief Callback for saving internal flash. + +\param[in] status - status of the data flash writing +******************************************************************************/ +void ofdWriteFlashDataCallback(OFD_Status_t status) +{ + uint32_t maxOffset; + + if (OFD_STATUS_SUCCESS != status) + { + if (ofdAuxCallback) + ofdAuxCallback(status); + return; + } + if (OFD_POSITION_1 == sectorNumber) + maxOffset = OFD_IMAGE1_START_ADDRESS + OFD_MCU_FLASH_SIZE - OFD_MCU_EEPROM_SIZE; + else + maxOffset = OFD_IMAGE2_START_ADDRESS + OFD_MCU_FLASH_SIZE - OFD_MCU_EEPROM_SIZE; + + if (localAccessStructure.offset < maxOffset) + { // save mcu flash + ofdSaveCurrentFlashImage(); + return; + } + + internalAccessParam.eepromOffset = 0; + // save eeprom image + ofdSaveCurrentEepromImage(); +} + +/**************************************************************************//** +\brief Starts saving internal flash. +******************************************************************************/ +void ofdSaveCurrentFlashImage(void) +{ +#if EXTERNAL_MEMORY == AT25F2048 + uint16_t itr; + + localAccessStructure.length = OFD_BLOCK_FOR_CHECK_CRC; + localAccessStructure.data = internalAccessParam.data; + for (itr = 0; itr < OFD_BLOCK_FOR_CHECK_CRC; itr++) + internalAccessParam.data[itr] = ofdReadInternalFlash(internalAccessParam.flashOffset++); + internalAccessParam.length -= OFD_BLOCK_FOR_CHECK_CRC; + ofdCallback = ofdWriteFlashDataCallback; + ofdWriteData(); +#elif EXTERNAL_MEMORY == AT25DF041A + ofdSetActionForBootloader(); +#endif +} + +/**************************************************************************//** +\brief Callback for saving internal eeprom. + +\param[in] status - status of the data eeprom writing +******************************************************************************/ +void ofdWriteEepromDataCallback(OFD_Status_t status) +{ + uint32_t maxOffset; + + if (OFD_STATUS_SUCCESS != status) + { + if (ofdAuxCallback) + ofdAuxCallback(status); + return; + } + if (OFD_POSITION_1 == sectorNumber) + maxOffset = OFD_IMAGE1_START_ADDRESS + OFD_MCU_FLASH_SIZE; + else + maxOffset = OFD_IMAGE2_START_ADDRESS + OFD_MCU_FLASH_SIZE; + + if (localAccessStructure.offset < maxOffset) + { // save mcu eeprom + ofdSaveCurrentEepromImage(); + return; + } + + // start check crc + OFD_FlushAndCheckCrc(sectorNumber, internalAccessParam.data, ofdFlushCrcCallback); +} + +/**************************************************************************//** +\brief Starts saving internal eeprom. +******************************************************************************/ +static void ofdSaveCurrentEepromImage(void) +{ + HAL_EepromParams_t params; + + params.address = internalAccessParam.eepromOffset; + params.data = internalAccessParam.data; + params.length = OFD_BLOCK_FOR_CHECK_CRC; + + if (!ofdEepromHandler(HAL_ReadEeprom(¶ms, ofdSaveCurrentEepromImageContinue), ofdSaveCurrentEepromImage)) + if (ofdAuxCallback) + ofdAuxCallback(OFD_STATUS_INCORRECT_EEPROM_PARAMETER); +} + +/**************************************************************************//** +\brief Continues saving internal flash. +******************************************************************************/ +static void ofdSaveCurrentEepromImageContinue(void) +{ + localAccessStructure.length = OFD_BLOCK_FOR_CHECK_CRC; + localAccessStructure.data = internalAccessParam.data; + if (0 == internalAccessParam.eepromOffset) + memset(internalAccessParam.data, 0xFF, OFD_SERVICE_INFO_SIZE); + + internalAccessParam.eepromOffset += OFD_BLOCK_FOR_CHECK_CRC; + internalAccessParam.length -= OFD_BLOCK_FOR_CHECK_CRC; + ofdCallback = ofdWriteEepromDataCallback; + ofdWriteData(); +} + +/**************************************************************************//** +\brief Callback for start of saving of action for bootloader. + +\param[in] + status - status of the crc saving to eeprom +\param[in] + pInfo - ponter to image information +******************************************************************************/ +static void ofdFlushCrcCallback(OFD_Status_t status, OFD_ImageInfo_t *pInfo) +{ + (void)pInfo; + + if (OFD_STATUS_SUCCESS != status) + { + if (ofdAuxCallback) + ofdAuxCallback(status); + return; + } + ofdSetActionForBootloader(); +} + +/**************************************************************************//** +\brief Sets action for internal bootloader. +******************************************************************************/ +void ofdSetActionForBootloader(void) +{ + HAL_EepromParams_t params; + + params.address = 0; + params.data = (uint8_t *)&actionSector; + params.length = sizeof(OFD_Position_t); + + if (!ofdEepromHandler(HAL_WriteEeprom(¶ms, ofdPollBusyState), ofdSetActionForBootloader)) + if (ofdAuxCallback) + ofdAuxCallback(OFD_STATUS_INCORRECT_EEPROM_PARAMETER); +} + +/**************************************************************************//** +\brief Waits for end of image saving. +******************************************************************************/ +static void ofdPollBusyState(void) +{ + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdPollBusyState; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + if (ofdAuxCallback) + ofdAuxCallback(OFD_STATUS_SUCCESS); +} + +/**************************************************************************//** +\brief Reads image crc from internal eeprom. +******************************************************************************/ +void ofdReadCrc(void) +{ + HAL_EepromParams_t params; + + params.address = sectorNumber + 1; + params.data = &imageInfo.crc; + params.length = sizeof(uint8_t); + + if (!ofdEepromHandler(HAL_ReadEeprom(¶ms, ofdSaveCrcCallback), ofdReadCrc)) + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_INCORRECT_EEPROM_PARAMETER, &imageInfo); +} + +#if EXTERNAL_MEMORY == AT25DF041A +/**************************************************************************//** +\brief Unprotects memory sectors for writing and erasing. +******************************************************************************/ +void ofdUnprotectMemorySectors(void) +{ + uint8_t unprotect = WRSR; + uint8_t unprotectArg = GLOBAL_UNPROTECT; + + ofdSendWriteEnable(); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, &unprotect, sizeof(uint8_t)); + HAL_WriteSpi(&spiDesc, &unprotectArg, sizeof(uint8_t)); + GPIO_EXT_MEM_CS_set(); +} +#endif + +#if defined(_OFD_DEBUG_) +/**************************************************************************//** +\brief Flash read callback. +******************************************************************************/ +void ofdReadConfirm(OFD_Status_t status) +{ + HAL_WriteUsart(&usartDescriptor, debugBuffer, OFD_BLOCK_SIZE); +} + +/**************************************************************************//** +\brief Usart write callback. +******************************************************************************/ +void usartWriteConfirm(void) +{ + debugOffset += OFD_BLOCK_SIZE; + if (debugOffset < OFD_IMAGE_SIZE) + { + ofdReadData(debugOffset, debugBuffer, OFD_BLOCK_SIZE, ofdReadConfirm); + } +} + +/**************************************************************************//** +\brief Initialization of usart for consinsting of flash transmitting. +******************************************************************************/ +void ofdInitDebugInterface(void) +{ + usartDescriptor.tty = USART_CHANNEL_1; + usartDescriptor.mode = USART_MODE_ASYNC; + usartDescriptor.flowControl = USART_FLOW_CONTROL_NONE; + usartDescriptor.baudrate = USART_BAUDRATE_38400; + usartDescriptor.dataLength = USART_DATA8; + usartDescriptor.parity = USART_PARITY_NONE; + usartDescriptor.stopbits = USART_STOPBIT_1; + usartDescriptor.rxBuffer = NULL; + usartDescriptor.rxBufferLength = 0; + usartDescriptor.txBuffer = NULL; + usartDescriptor.txBufferLength = 0; + usartDescriptor.rxCallback = NULL; + usartDescriptor.txCallback = usartWriteConfirm; + + HAL_OpenUsart(&usartDescriptor); + ofdReadData(debugOffset, debugBuffer, OFD_BLOCK_SIZE, ofdReadConfirm); +} + +/**************************************************************************//** +\brief Reads data from the external memory. + +\param[in] + address - flash cell address +\param[out] + data - pointer to memory buffer +\param[in] + size - size of memory buffer +\param[in] + cb - pointer to callback +******************************************************************************/ +void ofdReadData(uint32_t address, uint8_t *data, uint16_t size, OFD_Callback_t cb) +{ + uint8_t writeInstruc = READ; + + while (FLASH_BUSY == ofdCheckBusyState()) + {;}// waits till flash ready + + address = OFD_LITTLE_TO_BIG_ENDIAN(address<<8); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, &writeInstruc, sizeof(uint8_t)); + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)-1); + HAL_ReadSpi(&spiDesc, data, size); + GPIO_EXT_MEM_CS_set(); + if (cb) + cb(OFD_STATUS_SUCCESS); +} +#endif // defined(_OFD_DEBUG_) + +#endif // APP_USE_FAKE_OFD_DRIVER == 0 +#endif // ((EXTERNAL_MEMORY == AT25F2048) ||(EXTERNAL_MEMORY == AT25DF041A)) && (APP_USE_OTAU == 1) +#endif // _OTAU_ +// eof ofdAt25fDriver.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt45dbDriver.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt45dbDriver.c new file mode 100644 index 00000000..f06d765d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdAt45dbDriver.c @@ -0,0 +1,758 @@ +/**************************************************************************//** +\file ofdAt45dbDriver.c + +\brief Implementation of chip-flash interface. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 20/07/10 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if (EXTERNAL_MEMORY == AT45DB041) && (APP_USE_OTAU == 1) +#if APP_USE_FAKE_OFD_DRIVER == 0 + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define SPI_BUSY_POLL_PERIOD 10 +// cycles of counting flash crc before context gap. +#define ATOMIC_COUNTING 128 +#define EEPROM_OK 0 +#define EEPROM_BUSY -2 +#define ALL_DATA_HAS_BEEN_SAVED 0xFFFFFFFFul + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + FLASH_BUSY, + FLASH_READY +} FlashBusyState_t; + +typedef enum +{ + FLASH_TRANSACTION, + EEPROM_TRANSACTION +} DelayedTransactionType_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +static inline uint8_t ofdReadStatusRegister(void); +static inline void ofdStartPollTimer(DelayedTransactionType_t type); +static void ofdReadImageTable(void); +static void ofdSaveCrcCallback(void); +static void ofdSaveCurrentEepromImage(void); +static void ofdFlushCrcCallback(OFD_Status_t status, OFD_ImageInfo_t *pInfo); +static void ofdSaveCurrentEepromImageContinue(void); +static void ofdPollBusyState(void); +static void ofdStartFlashDelayedTransaction(void); +static void ofdStartEepromDelayedTransaction(void); +static void ofdClearFlashInternalBuffer(void); +uint8_t ofdReadInternalFlash(uint32_t flashAddress); +#if defined(_OFD_DEBUG_) +void ofdReadData(uint32_t address, uint8_t *data, uint16_t size, OFD_Callback_t cb); +#endif + +/****************************************************************************** + External variables section +******************************************************************************/ +extern HAL_SpiDescriptor_t spiDesc; +extern OFD_Position_t sectorNumber; +extern OFD_Position_t actionSector; +extern OFD_Callback_t ofdCallback; +extern OFD_Callback_t ofdAuxCallback; +extern OFD_MemoryAccessParam_t localAccessStructure; +extern OFD_ImageInfo_t imageInfo; +extern OfdImageTable_t imageTable; +extern OfdInternalMemoryAccessParam_t internalAccessParam; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HAL_AppTimer_t ofdBusyTimer = +{ + .interval = SPI_BUSY_POLL_PERIOD, + .mode = TIMER_ONE_SHOT_MODE, +}; +void (* delayedTransaction)(void) = NULL; +static uint16_t serviceGapData = 0; +static uint32_t flushedPageAddr = ALL_DATA_HAS_BEEN_SAVED; +#if defined(_OFD_DEBUG_) +static HAL_UsartDescriptor_t usartDescriptor; +static uint32_t debugOffset = 0ul; +static uint8_t debugBuffer[OFD_BLOCK_SIZE]; +#endif + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Checks flash state. + +\return flash states: \n + FLASH_BUSY \n + FLASH_READY +******************************************************************************/ +static inline FlashBusyState_t ofdCheckBusyState(void) +{ + uint8_t statusReg = ofdReadStatusRegister(); + + if (statusReg & RDY) + return FLASH_READY; + + return FLASH_BUSY; +} + +/**************************************************************************//** +\brief Starts flash delayed transaction. +******************************************************************************/ +static void ofdStartFlashDelayedTransaction(void) +{ + if (FLASH_READY == ofdCheckBusyState()) + delayedTransaction(); + else + ofdStartPollTimer(FLASH_TRANSACTION); +} + +/**************************************************************************//** +\brief Starts eeprom delayed transaction. +******************************************************************************/ +static void ofdStartEepromDelayedTransaction(void) +{ + if (!HAL_IsEepromBusy()) + delayedTransaction(); + else + ofdStartPollTimer(EEPROM_TRANSACTION); +} + +/**************************************************************************//** +\brief Starts timer for start delayed transaction. + +\param[in] + type - transaction type (flash or eeprom) +******************************************************************************/ +static inline void ofdStartPollTimer(DelayedTransactionType_t type) +{ + if (FLASH_TRANSACTION == type) + ofdBusyTimer.callback = ofdStartFlashDelayedTransaction; + else + ofdBusyTimer.callback = ofdStartEepromDelayedTransaction; + + HAL_StartAppTimer(&ofdBusyTimer); +} + +/**************************************************************************//** +\brief Routine of eeprom access. +\param[in] + result - result of hal eeprom action +\param[in] + action - initiator action +\return + false - incorrect parameters + true - eeprom transaction is started +******************************************************************************/ +static bool ofdEepromHandler(int result, void(* action)()) +{ + switch (result) + { + case EEPROM_OK: + return true; + case EEPROM_BUSY: + delayedTransaction = action; + ofdStartPollTimer(EEPROM_TRANSACTION); + return true; + default: + return false; + } +} + +/**************************************************************************//** +\brief Returns SUCCESS status. +******************************************************************************/ +static void ofdReturnSuccessStatus(void) +{ + if (ofdCallback) + ofdCallback(OFD_STATUS_SUCCESS); +} + +/**************************************************************************//** +\brief Reads image table. +******************************************************************************/ +static void ofdReadImageTable(void) +{ + HAL_EepromParams_t params; + + params.address = OFD_SERVICE_INFO_SIZE - sizeof(OfdImageTable_t); + params.data = &imageTable; + params.length = sizeof(OfdImageTable_t); + + if (!ofdEepromHandler(HAL_ReadEeprom(¶ms, ofdReturnSuccessStatus), ofdReadImageTable)) + if (ofdCallback) + ofdCallback(OFD_STATUS_INCORRECT_EEPROM_PARAMETER); +} + +/**************************************************************************//** +\brief Reads status register and check unchanged bits. +******************************************************************************/ +void ofdFindStorageSpace(void) +{ + if (STATUS_UNCHANGED_BITS == (ofdReadStatusRegister() & STATUS_UNCHANGED_BIT_MASK)) + { + // read image table to global variable + ofdReadImageTable(); + return; + } + + if (ofdCallback) + ofdCallback(OFD_STATUS_UNKNOWN_EXTERNAL_FLASH_TYPE); +} + +/**************************************************************************//** +\brief Reads status register from the external flash. + +\return status register +******************************************************************************/ +static inline uint8_t ofdReadStatusRegister(void) +{ + uint16_t regStatus = RDSR; + + GPIO_EXT_MEM_CS_clr(); + HAL_ReadSpi(&spiDesc, (uint8_t *)®Status, sizeof(uint16_t)); + GPIO_EXT_MEM_CS_set(); + + return (uint8_t)(regStatus >> 8); +} + +/**************************************************************************//** +\brief Starts physical block(8 pages) erasing in the external memory. + +\param[in] + blockNumber - address of the erased block +******************************************************************************/ +void ofdEraseBlock(uint8_t blockNumber) +{ + uint32_t erasedBlock = OFD_LITTLE_TO_BIG_ENDIAN((uint32_t)blockNumber << 4); + + erasedBlock >>= 8; + erasedBlock |= BLOCK_ERASE; + + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&erasedBlock, sizeof(uint32_t)); + GPIO_EXT_MEM_CS_set(); +} + +/**************************************************************************//** +\brief Starts image erasing in the external memory. +******************************************************************************/ +void ofdEraseImage(void) +{ + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdEraseImage; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + if (OFD_POSITION_1 == sectorNumber) + ofdEraseBlock(FIRST_HALF_BLOCK_NUMBER + serviceGapData++); + else + ofdEraseBlock(SECOND_HALF_BLOCK_NUMBER + serviceGapData++); + + if (serviceGapData < OFD_USED_BLOCKS_AMOUNT) + { + delayedTransaction = ofdEraseImage; + ofdStartPollTimer(FLASH_TRANSACTION); + } + else + { + serviceGapData = 0; + ofdReturnSuccessStatus(); + } +} + +/**************************************************************************//** +\brief Writes data to the external memory. +******************************************************************************/ +void ofdWriteData(void) +{ + uint8_t *dataPointer; + uint16_t dataLength; + uint32_t address; + uint32_t pageAddr; + uint32_t byteAddr; + + if (!localAccessStructure.length) + { + ofdReturnSuccessStatus(); + return; + } + + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdWriteData; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + pageAddr = localAccessStructure.offset / PAGE_SIZE; + + if ((pageAddr > flushedPageAddr) && (ALL_DATA_HAS_BEEN_SAVED != flushedPageAddr)) + { // there is gap in the image address map. + ofdFlushData(); + delayedTransaction = ofdClearFlashInternalBuffer; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + flushedPageAddr = pageAddr; + byteAddr = localAccessStructure.offset % PAGE_SIZE; + dataPointer = localAccessStructure.data; + + if ((byteAddr + localAccessStructure.length) > PAGE_SIZE) + dataLength = PAGE_SIZE - byteAddr; + else + dataLength = localAccessStructure.length; + + localAccessStructure.data += dataLength; + localAccessStructure.offset += dataLength; + localAccessStructure.length -= dataLength; + + address = OFD_LITTLE_TO_BIG_ENDIAN(byteAddr); + address |= WRITE_BUF1; + + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)); + HAL_WriteSpi(&spiDesc, dataPointer, dataLength); + GPIO_EXT_MEM_CS_set(); + + if (PAGE_SIZE == (byteAddr + dataLength)) + { + ofdFlushData(); + delayedTransaction = ofdClearFlashInternalBuffer; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + ofdReturnSuccessStatus(); +} + +/**************************************************************************//** +\brief Calls callback about end of eeprom saving. +******************************************************************************/ +static void ofdSaveCrcCallback(void) +{ + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_SUCCESS, &imageInfo); +} + +/**************************************************************************//** +\brief Saves image table to the internal eeprom. +******************************************************************************/ +void ofdSaveImageTable(void) +{ + HAL_EepromParams_t params; + + params.address = OFD_SERVICE_INFO_SIZE-1; + params.data = &imageTable; + params.length = sizeof(OfdImageTable_t); + + if (!ofdEepromHandler(HAL_WriteEeprom(¶ms, ofdSaveCrcCallback), ofdSaveImageTable)) + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_INCORRECT_EEPROM_PARAMETER, &imageInfo); +} + +/**************************************************************************//** +\brief Saves crc to the internal eeprom. +******************************************************************************/ +void ofdSaveCrc(void) +{ + HAL_EepromParams_t params; + + params.address = sectorNumber + 1; + params.data = &imageInfo.crc; + params.length = sizeof(uint8_t); + + if (!ofdEepromHandler(HAL_WriteEeprom(¶ms, ofdSaveImageTable), ofdSaveCrc)) + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_INCORRECT_EEPROM_PARAMETER, &imageInfo); +} + +/**************************************************************************//** +\brief Clears internal flash buffer. +******************************************************************************/ +static void ofdClearFlashInternalBuffer(void) +{ + uint32_t address = 0ul; + uint64_t data; + uint8_t itr; + + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdClearFlashInternalBuffer; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + memset((uint8_t *)&data, 0xFF, sizeof(uint64_t)); + + address |= WRITE_BUF1; + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)); + for (itr = 0; itr < (PAGE_SIZE / sizeof(uint64_t)); itr++) + HAL_WriteSpi(&spiDesc, (uint8_t *)&data, sizeof(uint64_t)); + GPIO_EXT_MEM_CS_set(); + + ofdWriteData(); +} + +/**************************************************************************//** +\brief Flushs memory buffer to flash. +******************************************************************************/ +void ofdFlushData(void) +{ + if (ALL_DATA_HAS_BEEN_SAVED == flushedPageAddr) + return; + + flushedPageAddr = OFD_LITTLE_TO_BIG_ENDIAN(flushedPageAddr << 1); + flushedPageAddr >>= 8; + flushedPageAddr |= PROGRAM_BUF1; + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&flushedPageAddr, sizeof(uint32_t)); + GPIO_EXT_MEM_CS_set(); + flushedPageAddr = ALL_DATA_HAS_BEEN_SAVED; +} + +/**************************************************************************//** +\brief Checks image crc. +******************************************************************************/ +void ofdCheckCrc(void) +{ + uint32_t address; + uint32_t pageAddr; + uint32_t byteAddr; + uint8_t atomicCounting = ATOMIC_COUNTING; + + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdCheckCrc; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + while (atomicCounting--) + { + pageAddr = localAccessStructure.offset / PAGE_SIZE; + byteAddr = localAccessStructure.offset % PAGE_SIZE; + address = byteAddr | (pageAddr << 9) | ((uint32_t)READ << 24); + address = OFD_LITTLE_TO_BIG_ENDIAN(address); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)); + // load 32 don't care bits + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)); + HAL_ReadSpi(&spiDesc, localAccessStructure.data, OFD_BLOCK_FOR_CHECK_CRC); + GPIO_EXT_MEM_CS_set(); // release spi cs + imageInfo.crc = ofdCrc(imageInfo.crc, localAccessStructure.data, OFD_BLOCK_FOR_CHECK_CRC); + localAccessStructure.offset += OFD_BLOCK_FOR_CHECK_CRC; + localAccessStructure.length -= OFD_BLOCK_FOR_CHECK_CRC; + if (!localAccessStructure.length) + { + ofdSaveCrc(); + return; + } + } + // context gap + delayedTransaction = ofdCheckCrc; + ofdStartPollTimer(FLASH_TRANSACTION); +} + +/**************************************************************************//** +\brief Callback for saving internal flash. + +\param[in] status - status of the data flash writing +******************************************************************************/ +void ofdWriteFlashDataCallback(OFD_Status_t status) +{ + uint32_t maxOffset; + + if (OFD_STATUS_SUCCESS != status) + { + if (ofdAuxCallback) + ofdAuxCallback(status); + return; + } + if (OFD_POSITION_1 == sectorNumber) + maxOffset = OFD_IMAGE1_START_ADDRESS + OFD_EEPROM_OFFSET_WITHIN_IMAGE; + else + maxOffset = OFD_IMAGE2_START_ADDRESS + OFD_EEPROM_OFFSET_WITHIN_IMAGE; + + if (localAccessStructure.offset < maxOffset) + { // save mcu flash + ofdSaveCurrentFlashImage(); + return; + } + + internalAccessParam.eepromOffset = 0; + // save eeprom image + ofdSaveCurrentEepromImage(); +} + +/**************************************************************************//** +\brief Starts saving internal flash. +******************************************************************************/ +void ofdSaveCurrentFlashImage(void) +{ + uint16_t itr; + + localAccessStructure.length = OFD_BLOCK_FOR_CHECK_CRC; + localAccessStructure.data = internalAccessParam.data; + for (itr = 0; itr < OFD_BLOCK_FOR_CHECK_CRC; itr++) + { + OFD_LOAD_NO_COMMAND_TO_NVM; + internalAccessParam.data[itr] = ofdReadInternalFlash(internalAccessParam.flashOffset++); + } + internalAccessParam.length -= OFD_BLOCK_FOR_CHECK_CRC; + ofdCallback = ofdWriteFlashDataCallback; + ofdWriteData(); +} + +/**************************************************************************//** +\brief Callback for saving internal eeprom. + +\param[in] status - status of the data eeprom writing +******************************************************************************/ +void ofdWriteEepromDataCallback(OFD_Status_t status) +{ + uint32_t maxOffset; + + if (OFD_STATUS_SUCCESS != status) + { + if (ofdAuxCallback) + ofdAuxCallback(status); + return; + } + if (OFD_POSITION_1 == sectorNumber) + maxOffset = OFD_IMAGE1_START_ADDRESS + OFD_IMAGE_SIZE; + else + maxOffset = OFD_IMAGE2_START_ADDRESS + OFD_IMAGE_SIZE; + + if (localAccessStructure.offset < maxOffset) + { // save mcu eeprom + ofdSaveCurrentEepromImage(); + return; + } + + // start check crc + OFD_FlushAndCheckCrc(sectorNumber, internalAccessParam.data, ofdFlushCrcCallback); +} + +/**************************************************************************//** +\brief Starts saving internal eeprom. +******************************************************************************/ +static void ofdSaveCurrentEepromImage(void) +{ + HAL_EepromParams_t params; + + params.address = internalAccessParam.eepromOffset; + params.data = internalAccessParam.data; + params.length = OFD_BLOCK_FOR_CHECK_CRC; + + if (!ofdEepromHandler(HAL_ReadEeprom(¶ms, ofdSaveCurrentEepromImageContinue), ofdSaveCurrentEepromImage)) + if (ofdAuxCallback) + ofdAuxCallback(OFD_STATUS_INCORRECT_EEPROM_PARAMETER); +} + +/**************************************************************************//** +\brief Continues saving internal flash. +******************************************************************************/ +static void ofdSaveCurrentEepromImageContinue(void) +{ + localAccessStructure.length = OFD_BLOCK_FOR_CHECK_CRC; + localAccessStructure.data = internalAccessParam.data; + if (0 == internalAccessParam.eepromOffset) + memset(internalAccessParam.data, 0xFF, OFD_SERVICE_INFO_SIZE); + + internalAccessParam.eepromOffset += OFD_BLOCK_FOR_CHECK_CRC; + internalAccessParam.length -= OFD_BLOCK_FOR_CHECK_CRC; + ofdCallback = ofdWriteEepromDataCallback; + ofdWriteData(); +} + +/**************************************************************************//** +\brief Callback for start of saving of action for bootloader. + +\param[in] + status - status of the crc saving to eeprom +\param[in] + pInfo - ponter to image information +******************************************************************************/ +static void ofdFlushCrcCallback(OFD_Status_t status, OFD_ImageInfo_t *pInfo) +{ + (void)pInfo; + + if (OFD_STATUS_SUCCESS != status) + { + if (ofdAuxCallback) + ofdAuxCallback(status); + return; + } + ofdSetActionForBootloader(); +} + +/**************************************************************************//** +\brief Sets action for internal bootloader. +******************************************************************************/ +void ofdSetActionForBootloader(void) +{ + HAL_EepromParams_t params; + + params.address = 0; + params.data = (uint8_t *)&actionSector; + params.length = sizeof(OFD_Position_t); + + if (!ofdEepromHandler(HAL_WriteEeprom(¶ms, ofdPollBusyState), ofdSetActionForBootloader)) + if (ofdAuxCallback) + ofdAuxCallback(OFD_STATUS_INCORRECT_EEPROM_PARAMETER); +} + +/**************************************************************************//** +\brief Waits for end of image saving. +******************************************************************************/ +static void ofdPollBusyState(void) +{ + if (FLASH_BUSY == ofdCheckBusyState()) + { // waits till flash ready + delayedTransaction = ofdPollBusyState; + ofdStartPollTimer(FLASH_TRANSACTION); + return; + } + + if (ofdAuxCallback) + ofdAuxCallback(OFD_STATUS_SUCCESS); +} + +/**************************************************************************//** +\brief Reads image crc from internal eeprom. +******************************************************************************/ +void ofdReadCrc(void) +{ + HAL_EepromParams_t params; + + params.address = sectorNumber + 1; + params.data = &imageInfo.crc; + params.length = sizeof(uint8_t); + + if (!ofdEepromHandler(HAL_ReadEeprom(¶ms, ofdSaveCrcCallback), ofdReadCrc)) + if (ofdCallback) + ((OFD_InfoCallback_t)ofdCallback)(OFD_STATUS_INCORRECT_EEPROM_PARAMETER, &imageInfo); +} + +#if defined(_OFD_DEBUG_) +/**************************************************************************//** +\brief Flash read callback. +******************************************************************************/ +void ofdReadConfirm(OFD_Status_t status) +{ + HAL_WriteUsart(&usartDescriptor, debugBuffer, OFD_BLOCK_SIZE); +} + +/**************************************************************************//** +\brief Usart write callback. +******************************************************************************/ +void usartWriteConfirm(void) +{ + debugOffset += OFD_BLOCK_SIZE; + if (debugOffset < OFD_IMAGE_SIZE) + { + ofdReadData(debugOffset, debugBuffer, OFD_BLOCK_SIZE, ofdReadConfirm); + } +} + +/**************************************************************************//** +\brief Initialization of usart for consinsting of flash transmitting. +******************************************************************************/ +void ofdInitDebugInterface(void) +{ +#if defined(ATMEGA1281) || defined(ATMEGA128RFA1) + usartDescriptor.tty = USART_CHANNEL_1; +#elif defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + usartDescriptor.tty = USART_CHANNEL_F0; +#endif + usartDescriptor.mode = USART_MODE_ASYNC; + usartDescriptor.flowControl = USART_FLOW_CONTROL_NONE; + usartDescriptor.baudrate = USART_BAUDRATE_38400; + usartDescriptor.dataLength = USART_DATA8; + usartDescriptor.parity = USART_PARITY_NONE; + usartDescriptor.stopbits = USART_STOPBIT_1; + usartDescriptor.rxBuffer = NULL; + usartDescriptor.rxBufferLength = 0; + usartDescriptor.txBuffer = NULL; + usartDescriptor.txBufferLength = 0; + usartDescriptor.rxCallback = NULL; + usartDescriptor.txCallback = usartWriteConfirm; + + HAL_OpenUsart(&usartDescriptor); + ofdReadData(debugOffset, debugBuffer, OFD_BLOCK_SIZE, ofdReadConfirm); +} + +/**************************************************************************//** +\brief Reads data from the external memory. + +\param[in] + address - flash cell address +\param[out] + data - pointer to memory buffer +\param[in] + size - size of memory buffer +\param[in] + cb - pointer to callback +******************************************************************************/ +void ofdReadData(uint32_t address, uint8_t *data, uint16_t size, OFD_Callback_t cb) +{ + uint32_t pageAddr; + uint32_t byteAddr; + + + while (FLASH_BUSY == ofdCheckBusyState()) + {;}// waits till flash ready + pageAddr = address / PAGE_SIZE; + byteAddr = address % PAGE_SIZE; + address = byteAddr | (pageAddr << 9) | ((uint32_t)READ << 24); + address = OFD_LITTLE_TO_BIG_ENDIAN(address); + GPIO_EXT_MEM_CS_clr(); + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)); + // load 32 don't care bits + HAL_WriteSpi(&spiDesc, (uint8_t *)&address, sizeof(uint32_t)); + HAL_ReadSpi(&spiDesc, data, size); + GPIO_EXT_MEM_CS_set(); + if (cb) + cb(OFD_STATUS_SUCCESS); +} +#endif // defined(_OFD_DEBUG_) + +#endif // APP_USE_FAKE_OFD_DRIVER == 0 +#endif // (EXTERNAL_MEMORY == AT45DB041) && (APP_USE_OTAU == 1) +#endif // _OTAU_ +// eof ofdAt25fDriver.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCommand.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCommand.c new file mode 100644 index 00000000..02a71723 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCommand.c @@ -0,0 +1,243 @@ +/**************************************************************************//** +\file ofdCommand.c + +\brief Implementation of OTAU flash driver interface. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 7/08/09 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if (APP_USE_OTAU == 1) +#if APP_USE_FAKE_OFD_DRIVER == 0 + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define CRC_INITIALIZATION_VALUE 0xFF + +/****************************************************************************** + Global variables section +******************************************************************************/ +OFD_Position_t sectorNumber = 0; +OFD_Position_t actionSector = 0; +OFD_Callback_t ofdCallback = NULL; +OFD_Callback_t ofdAuxCallback = NULL; +OFD_MemoryAccessParam_t localAccessStructure; +OfdInternalMemoryAccessParam_t internalAccessParam; +OFD_ImageInfo_t imageInfo; +OfdImageTable_t imageTable; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Erases image in the external memory. + +\param[in] + pos - image position in the external memory +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_EraseImage(OFD_Position_t pos, OFD_Callback_t cb) +{ + if (pos >= OFD_POSITION_MAX) + { + if (cb) + cb(OFD_STATUS_INCORRECT_API_PARAMETER); + return; + } + + sectorNumber = pos; + ofdCallback = cb; + ofdEraseImage(); +} + +/**************************************************************************//** +\brief Writes data to the external memory. + +\param[in] + pos - image position for new data +\param[in] + accessParam - pointer to the access structure +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_Write(OFD_Position_t pos, OFD_MemoryAccessParam_t *accessParam, OFD_Callback_t cb) +{ + if ((pos >= OFD_POSITION_MAX) || (NULL == accessParam)) + { + if (cb) + cb(OFD_STATUS_INCORRECT_API_PARAMETER); + return; + } + + sectorNumber = pos; + ofdCallback = cb; + localAccessStructure = *accessParam; + + // set table info like "image was written through api" + imageTable |= (OfdImageTable_t)(1 << pos); + + if (localAccessStructure.offset >= OFD_START_EEPROM_SREC_ADDRESS) + localAccessStructure.offset -= (OFD_START_EEPROM_SREC_ADDRESS - OFD_EEPROM_OFFSET_WITHIN_IMAGE); + + if (OFD_POSITION_1 == sectorNumber) + localAccessStructure.offset += OFD_IMAGE1_START_ADDRESS; + else + localAccessStructure.offset += OFD_IMAGE2_START_ADDRESS; + + ofdWriteData(); +} + +/**************************************************************************//** +\brief Flushes data from internal buffer, checks image crc and saves it to +the external memory. + +\param[in] + pos - image position for new data +\param[in] + countBuff - pointer to the memory for internal data (memory size must be OFD_BLOCK_FOR_CHECK_CRC) +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_FlushAndCheckCrc(OFD_Position_t pos, uint8_t *countBuff, OFD_InfoCallback_t cb) +{ + if ((pos >= OFD_POSITION_MAX) || (NULL == countBuff)) + { + if (cb) + cb(OFD_STATUS_INCORRECT_API_PARAMETER, &imageInfo); + return; + } + + ofdFlushData(); + + sectorNumber = pos; + ofdCallback = (OFD_Callback_t)cb; + imageInfo.crc = CRC_INITIALIZATION_VALUE; + + localAccessStructure.data = countBuff; + localAccessStructure.length = OFD_IMAGE_SIZE; + if (OFD_POSITION_1 == sectorNumber) + localAccessStructure.offset = OFD_IMAGE1_START_ADDRESS; + else + localAccessStructure.offset = OFD_IMAGE2_START_ADDRESS; + + ofdCheckCrc(); +} + +/**************************************************************************//** +\brief Saves current mcu flash and eeprom to the external memory, checks crc for its +and set command for bootloader. + +\param[in] + whereToSave - image position for current mcu flash and eeprom +\param[in] + from - new image position +\param[in] + copyBuff - pointer to the memory for internal data (memory size must be OFD_BLOCK_FOR_CHECK_CRC) +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_SwitchToNewImage(OFD_Position_t whereToSave, OFD_Position_t from, uint8_t *copyBuff, OFD_Callback_t cb) +{ + if ((whereToSave >= OFD_POSITION_MAX) || (from >= OFD_POSITION_MAX) || (whereToSave == from) || (NULL == copyBuff)) + { + if (cb) + cb(OFD_STATUS_INCORRECT_API_PARAMETER); + return; + } + + sectorNumber = whereToSave; + actionSector = from; + ofdAuxCallback = cb; + + // set table info like "image was saved from mcu" + imageTable &= (OfdImageTable_t)~(1 << sectorNumber); + + internalAccessParam.flashOffset = 0ul; + internalAccessParam.data = copyBuff; + internalAccessParam.length = OFD_IMAGE_SIZE; + + if (OFD_POSITION_1 == sectorNumber) + localAccessStructure.offset = OFD_IMAGE1_START_ADDRESS; + else + localAccessStructure.offset = OFD_IMAGE2_START_ADDRESS; + + ofdSaveCurrentFlashImage(); +} + +/**************************************************************************//** +\brief Reads image informations. + +\param[in] + pos - image position +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_ReadImageInfo(OFD_Position_t pos, OFD_InfoCallback_t cb) +{ + if (pos >= OFD_POSITION_MAX) + { + if (cb) + cb(OFD_STATUS_INCORRECT_API_PARAMETER, &imageInfo); + return; + } + + sectorNumber = pos; + + if (imageTable & (1 << pos)) + imageInfo.type = OFD_IMAGE_WAS_WRITTEN_THROUGH_API; + else + imageInfo.type = OFD_IMAGE_WAS_SAVED_FROM_MCU; + + ofdCallback = (OFD_Callback_t)cb; + + ofdReadCrc(); +} + +/**************************************************************************//** +\brief Sets command for bootloader. + +\param[in] + from - image position +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_ChangeImage(OFD_Position_t from, OFD_Callback_t cb) +{ + if (from >= OFD_POSITION_MAX) + { + if (cb) + cb(OFD_STATUS_INCORRECT_API_PARAMETER); + return; + } + + actionSector = from; + ofdAuxCallback = cb; + ofdSetActionForBootloader(); +} + +#endif // APP_USE_FAKE_OFD_DRIVER == 0 +#endif // (APP_USE_OTAU == 1) +#endif // _OTAU_ + +// eof ofdCommand.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCrcService.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCrcService.c new file mode 100644 index 00000000..3ba6ed45 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdCrcService.c @@ -0,0 +1,66 @@ +/**************************************************************************//** +\file ofdCrcService.c + +\brief Implementation of crc counting algorithm. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 7/08/09 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if (APP_USE_OTAU == 1) +#if APP_USE_FAKE_OFD_DRIVER == 0 + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Counts crc current memory area. CRC-8. Polynom 0x31 x^8 + x^5 + x^4 + 1. + +\param[in] + crc - first crc state +\param[in] + pcBlock - pointer to the memory for crc counting +\param[in] + length - memory size + +\return + current area crc +******************************************************************************/ +uint8_t ofdCrc(uint8_t crc, uint8_t *pcBlock, uint8_t length) +{ + uint8_t i; + + while (length--) + { + crc ^= *pcBlock++; + + for (i = 0; i < 8; i++) + crc = crc & 0x80 ? (crc << 1) ^ 0x31 : crc << 1; + } + + return crc; +} + +#endif // APP_USE_FAKE_OFD_DRIVER == 0 +#endif // (APP_USE_OTAU == 1) +#endif // _OTAU_ + +// eof ofdCrcService.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdFakeDriver.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdFakeDriver.c new file mode 100644 index 00000000..2d781c70 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdFakeDriver.c @@ -0,0 +1,218 @@ +/**************************************************************************//** +\file ofdFakeDriver.c + +\brief Implementation of OTAU fake flash driver. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 2/06/10 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if (APP_USE_OTAU == 1) +#if APP_USE_FAKE_OFD_DRIVER == 1 + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define CALL_CALLBACK_TIME 10 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +static void ofdRunDriverCb(void); +static void ofdRunInfoDriverCb(void); + +/****************************************************************************** + Global variables section +******************************************************************************/ +static HAL_AppTimer_t ofdCallbackRunner = +{ + .interval = CALL_CALLBACK_TIME, + .mode = TIMER_ONE_SHOT_MODE, +}; +OFD_Callback_t ofdFuncCb = NULL; +OFD_InfoCallback_t ofdFuncInfoCb = NULL; +OFD_ImageInfo_t ofdImageInfo = +{ + .type = OFD_IMAGE_WAS_SAVED_FROM_MCU, + .crc = 0x00 +}; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Run flash driver callback if that has been initialized. +******************************************************************************/ +static void ofdRunDriverCb(void) +{ + if (ofdFuncCb) + { + ofdFuncCb(OFD_STATUS_SUCCESS); + } +} + +/**************************************************************************//** +\brief Run flash information driver callback if that has been initialized. +******************************************************************************/ +static void ofdRunInfoDriverCb(void) +{ + if (ofdFuncInfoCb) + { + ofdFuncInfoCb(OFD_STATUS_SUCCESS, &ofdImageInfo); + } +} + +/**************************************************************************//** +\brief Opens serial interface and checks memory type. + +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_Open(OFD_Callback_t cb) +{ + ofdFuncCb = cb; + ofdCallbackRunner.callback = ofdRunDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +/**************************************************************************//** +\brief Closes serial interface. +******************************************************************************/ +void OFD_Close(void) +{ +} + +/**************************************************************************//** +\brief Erases image in the external memory. + +\param[in] + pos - image position in the external memory +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_EraseImage(OFD_Position_t pos, OFD_Callback_t cb) +{ + (void)pos; + ofdFuncCb = cb; + ofdCallbackRunner.callback = ofdRunDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +/**************************************************************************//** +\brief Writes data to the external memory. + +\param[in] + pos - image position for new data +\param[in] + accessParam - pointer to the access structure +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_Write(OFD_Position_t pos, OFD_MemoryAccessParam_t *accessParam, OFD_Callback_t cb) +{ + (void)pos; + (void)accessParam; + ofdFuncCb = cb; + ofdCallbackRunner.callback = ofdRunDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +/**************************************************************************//** +\brief Flushes data from internal buffer, checks image crc and saves it to +the external memory. + +\param[in] + pos - image position for new data +\param[in] + countBuff - pointer to the memory for internal data (memory size must be OFD_BLOCK_FOR_CHECK_CRC) +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_FlushAndCheckCrc(OFD_Position_t pos, uint8_t *countBuff, OFD_InfoCallback_t cb) +{ + (void)pos; + (void)countBuff; + ofdFuncInfoCb = cb; + ofdCallbackRunner.callback = ofdRunInfoDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +/**************************************************************************//** +\brief Saves current mcu flash and eeprom to the external memory, checks crc for its +and set command for bootloader. + +\param[in] + whereToSave - image position for current mcu flash and eeprom +\param[in] + from - new image position +\param[in] + copyBuff - pointer to the memory for internal data (memory size must be OFD_BLOCK_FOR_CHECK_CRC) +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_SwitchToNewImage(OFD_Position_t whereToSave, OFD_Position_t from, uint8_t *copyBuff, OFD_Callback_t cb) +{ + (void)whereToSave; + (void)from; + (void)copyBuff; + ofdFuncCb = cb; + ofdCallbackRunner.callback = ofdRunDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +/**************************************************************************//** +\brief Sets command for bootloader. + +\param[in] + from - image position +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_ChangeImage(OFD_Position_t from, OFD_Callback_t cb) +{ + (void)from; + ofdFuncCb = cb; + ofdCallbackRunner.callback = ofdRunDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +/**************************************************************************//** +\brief Reads image informations. + +\param[in] + pos - image position +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_ReadImageInfo(OFD_Position_t pos, OFD_InfoCallback_t cb) +{ + (void)pos; + ofdFuncInfoCb = cb; + ofdCallbackRunner.callback = ofdRunInfoDriverCb; + HAL_StartAppTimer(&ofdCallbackRunner); +} + +#endif // _OTAU_ +#endif // (APP_USE_OTAU == 1) +#endif // APP_USE_FAKE_OFD_DRIVER == 1 + +// eof ofdFakeDriver.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s new file mode 100644 index 00000000..b3267377 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s @@ -0,0 +1,40 @@ +/**************************************************************************//** + \file ofdIntFlashRead.s + + \brief Implementation of internal flash reading. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 13/08/09 A. Khromykh - Created +*******************************************************************************/ + +/******************************************************************************* +Reads byte from internal flash +Parameters: + R25:R24:R23:R22 - Byte address into flash. +Returns: + R24 - read byte from flash. +*******************************************************************************/ +.section .text +.global ofdReadInternalFlash +ofdReadInternalFlash: + push r31 ; Store Z to stack + push r30 ; Store Z to stack + in r25, 0x3B ; Save RAMPZ. + out 0x3B, r24 ; Load RAMPZ with the MSB of the address. + movw r30, r22 ; Move low bytes of address to ZH:ZL from R23:R22 + elpm r24, Z ; Extended load program memory from Z address + out 0x3B, r25 ; Restore RAMPZ register. + pop r30 ; Restore Z + pop r31 ; Restore Z + ret ; return from function + +; eof ofdIntFlashRead.s + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s90 new file mode 100644 index 00000000..9fc8e941 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdIntFlashRead.s90 @@ -0,0 +1,40 @@ +/**************************************************************************//** + \file ofdIntFlashRead.s90 + + \brief Implementation of internal flash reading. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 19/02/10 A. Khromykh - Created +*******************************************************************************/ + +/******************************************************************************* +Reads byte from internal flash +Parameters: + R19:R18:R17:R16 - Byte address into flash. +Returns: + R16 - read byte from flash. +*******************************************************************************/ +PUBLIC ofdReadInternalFlash +RSEG CODE +ofdReadInternalFlash: + push r31 ; Store Z to stack + push r30 ; Store Z to stack + in r19, 0x3B ; Save RAMPZ. + out 0x3B, r18 ; Load RAMPZ with the MSB of the address. + movw r31:r30, r17:r16 ; Move low bytes of address to ZH:ZL from R17:R16 + elpm r16, Z ; Extended load program memory from Z address + out 0x3B, r19 ; Restore RAMPZ register. + pop r30 ; Restore Z + pop r31 ; Restore Z + ret ; return from function + +; eof ofdIntFlashRead.s90 +END diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdSpiSerializer.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdSpiSerializer.c new file mode 100644 index 00000000..9994f2ed --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/OFD/src/ofdSpiSerializer.c @@ -0,0 +1,91 @@ +/**************************************************************************//** +\file ofdSerializer.c + +\brief Implementation of capturing of serial interface. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 7/08/09 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifdef _OTAU_ +#if (APP_USE_OTAU == 1) +#if APP_USE_FAKE_OFD_DRIVER == 0 + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + External variables section +******************************************************************************/ +extern OFD_Callback_t ofdCallback; + +/****************************************************************************** + Global variables section +******************************************************************************/ +HAL_SpiDescriptor_t spiDesc; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Opens serial interface and checks memory type. + +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_Open(OFD_Callback_t cb) +{ + ofdCallback = cb; + +#if defined(ATMEGA1281) || defined(ATMEGA128RFA1) + spiDesc.tty = SPI_CHANNEL_0; + spiDesc.baudRate = SPI_CLOCK_RATE_2000; +#elif defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + spiDesc.tty = SPI_CHANNEL_D; + spiDesc.baudRate = SPI_CLOCK_RATE_8000; +#endif + spiDesc.clockMode = SPI_CLOCK_MODE3; + spiDesc.dataOrder = SPI_DATA_MSB_FIRST; + spiDesc.callback = NULL; + + if (-1 == HAL_OpenSpi(&spiDesc)) + if (ofdCallback) + ofdCallback(OFD_SERIAL_INTERFACE_BUSY); + + GPIO_EXT_MEM_CS_set(); + GPIO_EXT_MEM_CS_make_out(); + ofdFindStorageSpace(); +#if EXTERNAL_MEMORY == AT25DF041A + ofdUnprotectMemorySectors(); +#endif +} + +/**************************************************************************//** +\brief Closes serial interface. +******************************************************************************/ +void OFD_Close(void) +{ + HAL_CloseSpi(&spiDesc); +} + +#endif // APP_USE_FAKE_OFD_DRIVER == 0 +#endif // (APP_USE_OTAU == 1) +#endif // _OTAU_ + +// eof ofdSerialize.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/include/dfuProtocol.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/include/dfuProtocol.h new file mode 100644 index 00000000..c525cfd1 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/include/dfuProtocol.h @@ -0,0 +1,81 @@ +/****************************************************************************//** + \file dfuProtocol.h + + \brief Declaration of Device firmware upgrade commands. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 08/09/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _DFUPROTOCOL_H +#define _DFUPROTOCOL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// data size in request structure +#define DFU_REQUEST_DATA_SIZE 6 +// request codes for mass storage class +#define DFU_DETACH 0x00 +#define DFU_GETSTATUS 0x03 +#define DFU_GETSTATE 0x05 + +/****************************************************************************** + Types section +******************************************************************************/ +BEGIN_PACK +// Usb host request +typedef struct PACK +{ + UsbRequest_t request; + uint8_t bData[DFU_REQUEST_DATA_SIZE]; +} UsbDfuRequest_t; + +// Usb dfu get status response +typedef struct PACK +{ + uint8_t bStatus; + uint8_t bPollTimeout[3]; + uint8_t bState; + uint8_t iString; +} DfuGetStatusResponse_t; + +// Usb dfu get state response +typedef struct PACK +{ + uint8_t bState; +} DfuGetStateResponse_t; + +typedef union PACK +{ + DfuGetStatusResponse_t getStatusResponse; + DfuGetStateResponse_t getStateResponse; +} UsbDfuResponse_t; + +END_PACK + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Device firmware upgrade request handler. +\param[in] + data - pointer to host's request. +******************************************************************************/ +void dfuRequestHandler(uint8_t *data); + +#endif /* _DFUPROTOCOL_H */ +// eof dfuProtocol.h \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/src/dfuProtocol.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/src/dfuProtocol.c new file mode 100644 index 00000000..c19f312b --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/DFU/src/dfuProtocol.c @@ -0,0 +1,135 @@ +/****************************************************************************//** + \file dfuProtocol.c + + \brief Implementation of Device firmware upgrade commands. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 08/09/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define DFU_STATUS_OK 0x00 +#define DFU_STATUS_MAX_POLL_TIMEOUT 0xFF +#define DFU_STATUS_NO_STRING 0x00 + +#define BOOTLOADER_FLAG_FLASH_OFFSET 5 + +/****************************************************************************** + Global variables section +******************************************************************************/ +static UsbDfuResponse_t dfuResponse; +static bool detachReceived = false; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief EEPROM write callback. +******************************************************************************/ +void dfuResetAction(void) +{ + HAL_WarmReset(); +} +/**************************************************************************//** +\brief DFU detach request handler. +******************************************************************************/ +static void dfuDetach(void) +{ + uint8_t bootloaderFlag = 0x5A; + HAL_EepromParams_t eepromParams = { + .address = (FLASH_BOOTLOADER_PAGES + FLASH_EEPROM_PAGES) * IFLASH_BYTES_PER_PAGE - + BOOTLOADER_FLAG_FLASH_OFFSET, + .data = &bootloaderFlag, + .length = 1 + }; + uint16_t page; + +#if defined(AT91SAM7X256) || defined(AT91SAM3S4C) + // Acknowledge the request + sendZLP(); +#endif + + detachReceived = true; + + halFlashPrepareForWrite(); + page = halFlashPreparePage(&eepromParams); + halFlashWritePage(page, false); + halFlashRestoreFromWrite(); + + HAL_RegisterEndOfBusResetHandler(dfuResetAction); +} +/**************************************************************************//** +\brief DFU get status request handler. +******************************************************************************/ +static void dfuGetStatus(void) +{ + uint8_t i = 2; + + dfuResponse.getStatusResponse.bStatus = DFU_STATUS_OK; + while(i--) + dfuResponse.getStatusResponse.bPollTimeout[i] = DFU_STATUS_MAX_POLL_TIMEOUT; + dfuResponse.getStatusResponse.bState = detachReceived; + dfuResponse.getStatusResponse.iString = DFU_STATUS_NO_STRING; + + HAL_UsbWrite(0, (void *)&dfuResponse, sizeof(DfuGetStatusResponse_t), NULL, NULL); +} + +/**************************************************************************//** +\brief DFU get state request handler. +******************************************************************************/ +static void dfuGetState(void) +{ + dfuResponse.getStateResponse.bState = detachReceived; + + HAL_UsbWrite(0, (void *)&dfuResponse, sizeof(DfuGetStateResponse_t), NULL, NULL); +} +/**************************************************************************//** +\brief Device firmware upgrade request handler. +\param[in] + data - pointer to host's request. +******************************************************************************/ +void dfuRequestHandler(uint8_t *data) +{ + UsbDfuRequest_t *pRequest = NULL; + + pRequest = (UsbDfuRequest_t *)data; + if (NULL == pRequest) + return; + + // Check request code + switch (pRequest->request.bRequest) + { + case DFU_DETACH: + dfuDetach(); + break; + case DFU_GETSTATUS: + dfuGetStatus(); + break; + case DFU_GETSTATE: + dfuGetState(); + break; + default: + HAL_Stall(0); + break; + } +} + +//eof dfuProtocol.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/abstractMemory.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/abstractMemory.h new file mode 100644 index 00000000..2eab5f00 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/abstractMemory.h @@ -0,0 +1,83 @@ +/****************************************************************************//** + \file abstactMemory.h + + \brief Declaration of abstract memory commands. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _ABSTRACT_MEMORY_H +#define _ABSTRACT_MEMORY_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + memorySuccessStatus, + memoryErrorStatus +} MemoryStatus_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Writes data to memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of blocks to write. + callback - pointer to function to nofity upper layer about end of write + procedure. +\return + status of write procedure. +******************************************************************************/ +MemoryStatus_t absMemWrite(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemoryStatus_t)); + +/**************************************************************************//** +\brief Reads data from memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of blocks to read. + callback - pointer to function to nofity upper layer about end of read + procedure. +\return + status of read procedure. +******************************************************************************/ +MemoryStatus_t absMemRead(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemoryStatus_t)); + +/**************************************************************************//** +\brief Performs memory initialization. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + status of initialization procedure. +******************************************************************************/ +MemoryStatus_t absMemInit(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Reads memory capacity. +\param[in] + descriptor - pointer to hsmci descriptor. +\param[out] + lastBlockNumber - number of last accessible block of memory. +\return + status of read capacity procedure. +******************************************************************************/ +MemoryStatus_t absMemCapacity(HAL_HsmciDescriptor_t *descriptor, uint32_t *lastBlockNumber); + +#endif /* _ABSTRACT_MEMORY_H */ +// eof abstactMemory.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mem.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mem.h new file mode 100644 index 00000000..0197f13a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mem.h @@ -0,0 +1,106 @@ +/****************************************************************************//** + \file mem.h + + \brief Declaration of memory commands. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _MEM_H +#define _MEM_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// block length +#define STANDARD_BLOCK_LENGTH 512 + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + memSuccess, + hsmciError, + voltageError, + commandError, + initTimeoutError, + stateError, + hsmciReadError, + hsmciWriteError, + setMaxFreqError +} MemStatus_t; + +typedef struct +{ + uint32_t lastLogicalBlock; + uint32_t logicalBlockLength; +} MemCapacityInfo_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Writes one data block to memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of block to write. +\return + status of write procedure. +******************************************************************************/ +MemStatus_t memWriteBlock(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemStatus_t)); + +/**************************************************************************//** +\brief Reads one data block from memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of block to read. +\return + status of read procedure. +******************************************************************************/ +MemStatus_t memReadBlock(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemStatus_t)); + +/**************************************************************************//** +\brief Performs memory initialization. +\param[in] + commandDescr - pointer to hsmci command descriptor. +\return + status of initialization procedure. +******************************************************************************/ +MemStatus_t memInit(HAL_HsmciDescriptor_t *commandDescr); + +/**************************************************************************//** +\brief Reads memory capacity. +\param[in] + descriptor - pointer to hsmci descriptor. +\param[out] + capInfo - pointer to memory capacity structure. +\return + status of read capacity procedure. +******************************************************************************/ +MemStatus_t memGetCapacityInfo(HAL_HsmciDescriptor_t *descriptor, MemCapacityInfo_t *capInfo); + +/**************************************************************************//** +\brief Checks if memory is ready for any data transfer. +\return + false - memory is busy; + true - memory is ready. +******************************************************************************/ +bool memIsBusy(void); + +#endif /* _MEM_H */ +// eof mem.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mscProtocol.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mscProtocol.h new file mode 100644 index 00000000..aa5964ad --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/mscProtocol.h @@ -0,0 +1,79 @@ +/****************************************************************************//** + \file mscProtocol.h + + \brief Declaration of mass storage device protocol command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _MSCPROTOCOL_H +#define _MSCPROTOCOL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// data size in request structure +#define MSC_REQUEST_DATA_SIZE 1 + +// request codes for mass storage class +#define BULK_ONLY_MASS_STORAGE_RESET 0xFF +#define GET_MAX_LUN 0xFE +// maximum size of CBW data +#define CBW_DATA_SIZE 16 + +/****************************************************************************** + Types section +******************************************************************************/ +BEGIN_PACK +typedef struct PACK +{ + UsbRequest_t request; + uint8_t bData[MSC_REQUEST_DATA_SIZE]; +} UsbMscRequest_t; +// MSC command block wrapper (CBW) +typedef struct PACK +{ + uint32_t dCBWSignature; + uint32_t cDBWTag; + uint32_t dCBWDataTransferLength; + uint8_t bmCBWFlags; + uint8_t bCBWLUN; + uint8_t bCBWCBLength; + uint8_t CBWCB[CBW_DATA_SIZE]; +} MscCBW_t; +// MSC command status wrapper (CSW) +typedef struct PACK +{ + uint32_t dCSWSignature; + uint32_t cDSWTag; + uint32_t dCSWDataResidue; + uint8_t bCSWStatus; +} MscCSW_t; +END_PACK + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Mass storage device request handler. +\param[in] + data - pointer to host's request. +******************************************************************************/ +void msdRequestHandler(uint8_t *data); + +#endif /* _MSCPROTOCOL_H */ +// eof msdProtocol.h \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/scsiProtocol.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/scsiProtocol.h new file mode 100644 index 00000000..6a10b4dc --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/include/scsiProtocol.h @@ -0,0 +1,114 @@ +/****************************************************************************//** + \file scsiProtocol.h + + \brief Declaration of scsi protocol commands. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _SCSIPROTOCOL_H +#define _SCSIPROTOCOL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// Maximum response length for scsi command +#define MAX_COMMAND_RESPONSE_LENGTH 36 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Checks if received scsi command is supported. +\param[in] + data - pointer to received command with parameters. +\return + false - command is not supported; + true - command is supported. +******************************************************************************/ +bool scsiIsValidCommand(uint8_t *data); + +/**************************************************************************//** +\brief Checks if any response or data transfer needed for received + scsi command. +\param[in] + command - received command. +\return + false - response is not needed; + true - response is needed. +******************************************************************************/ +bool scsiIsDataInOutPhaseNeeded(uint8_t *data); + +/**************************************************************************//** +\brief Checks if command is read or write command. +\param[in] + command - received command. +\return + false - command is not read/write command; + true - command is read/write command. +******************************************************************************/ +bool scsiIsReadWriteCommand(uint8_t *data); + +/**************************************************************************//** +\brief Checks if command is read command. +\param[in] + command - received command. +\return + false - command is not read command; + true - command is read command. +******************************************************************************/ +bool scsiIsReadCommand(uint8_t *data); + +/**************************************************************************//** +\brief Blocks for read/write command. +\param[in] + data - pointer to received command with parameters. +\return + number of blocks to read or write from memory. +******************************************************************************/ +uint16_t scsiBlocksAmount(uint8_t *data); + +/**************************************************************************//** +\brief Response for scsi command. +\param[in] + command - received command. +\param[out] + buffer - buffer with scsi command response. +\return + length of response +******************************************************************************/ +uint8_t scsiGetCommandResponse(uint8_t *data, uint8_t *buffer); + +/**************************************************************************//** +\brief Sets number of last available memory block for scsi response. +\param[in] + lastBlock - received command. +\param[out] + buffer - number of last available memory block +******************************************************************************/ +void scsiSetCapacity(uint32_t lastBlock); + +/**************************************************************************//** +\brief Block address for read/write command. +\param[in] + data - pointer to received command with parameters. +\return + block address for read or write from memory. +******************************************************************************/ +uint32_t scsiGetBlockAddress(uint8_t *data); + +#endif /* _SCSIPROTOCOL_H */ +// eof scsiProtocol.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/abstractMemory.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/abstractMemory.c new file mode 100644 index 00000000..dc11be63 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/abstractMemory.c @@ -0,0 +1,225 @@ +/****************************************************************************//** + \files abstractMemory.c + + \brief Implementation of amstract memory commands. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 30/08/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define RETRY_COUNT 5 + +/****************************************************************************** + External global variables section +******************************************************************************/ +/****************************************************************************** + Types section +******************************************************************************/ +typedef struct +{ + uint16_t transferLength; + uint16_t blocksToTransfer; + uint32_t logicalBlockAddress; + HAL_HsmciDescriptor_t *hsmciDescriptor; + uint8_t *dataBuffer; +} AbsMemInternal_t; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static void (*absMemCallback)(MemoryStatus_t status); +static AbsMemInternal_t apsMemInternal; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Current memory read callback. +\param[in] + status - status of read operation. +******************************************************************************/ +void absMemReadBlockCallback(MemStatus_t status) +{ + uint8_t i = RETRY_COUNT; + apsMemInternal.blocksToTransfer--; + uint16_t blocksRemaining = apsMemInternal.transferLength - apsMemInternal.blocksToTransfer; + HAL_HsmciDescriptor_t *descriptor = apsMemInternal.hsmciDescriptor; + + if (memSuccess != status) + absMemCallback(memoryErrorStatus); + if (0 == apsMemInternal.blocksToTransfer) + { + descriptor->dataTransferDescriptor->buffer = apsMemInternal.dataBuffer; + absMemCallback(memorySuccessStatus); + return; + } + + descriptor->dataTransferDescriptor->buffer += blocksRemaining * STANDARD_BLOCK_LENGTH; + + while(i--) + { + if (memSuccess == memReadBlock(descriptor, apsMemInternal.logicalBlockAddress + blocksRemaining, absMemReadBlockCallback)) + break; + } + if (0 == i) + absMemCallback(memoryErrorStatus); +} + +/**************************************************************************//** +\brief Current memory write callback. +\param[in] + status - status of write operation. +******************************************************************************/ +void absMemWriteBlockCallback(MemStatus_t status) +{ + uint8_t i = RETRY_COUNT; + apsMemInternal.blocksToTransfer--; + uint16_t blocksRemaining = apsMemInternal.transferLength - apsMemInternal.blocksToTransfer; + HAL_HsmciDescriptor_t *descriptor = apsMemInternal.hsmciDescriptor; + + if (memSuccess != status) + absMemCallback(memoryErrorStatus); + if (0 == apsMemInternal.blocksToTransfer) + { + descriptor->dataTransferDescriptor->buffer = apsMemInternal.dataBuffer; + absMemCallback(memorySuccessStatus); + return; + } + + descriptor->dataTransferDescriptor->buffer += blocksRemaining * STANDARD_BLOCK_LENGTH; + + while(i--) + { + if (memSuccess == memWriteBlock(descriptor, apsMemInternal.logicalBlockAddress + blocksRemaining, absMemWriteBlockCallback)) + break; + } + if (0 == i) + absMemCallback(memoryErrorStatus); +} + +/**************************************************************************//** +\brief Performs memory initialization. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + status of initialization procedure. +******************************************************************************/ +MemoryStatus_t absMemInit(HAL_HsmciDescriptor_t *descriptor) +{ + if (memSuccess != memInit(descriptor)) + return memoryErrorStatus; + + return memorySuccessStatus; +} + +/**************************************************************************//** +\brief Reads memory capacity. +\param[in] + descriptor - pointer to hsmci descriptor. +\param[out] + lastBlockNumber - number of last accessible block of memory. +\return + status of read capacity procedure. +******************************************************************************/ +MemoryStatus_t absMemCapacity(HAL_HsmciDescriptor_t *descriptor, uint32_t *lastBlockNumber) +{ + MemCapacityInfo_t capInfo; + uint8_t i = RETRY_COUNT; + MemStatus_t status; + + while(i--) + { + status = memGetCapacityInfo(descriptor, &capInfo); + if (memSuccess == status) + { + *lastBlockNumber = capInfo.lastLogicalBlock; + return memorySuccessStatus; + } + } + + return memoryErrorStatus; +} + +/**************************************************************************//** +\brief Writes data to memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of blocks to write. + callback - pointer to function to nofity upper layer about end of write + procedure. +\return + status of write procedure. +******************************************************************************/ +MemoryStatus_t absMemWrite(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemoryStatus_t)) +{ + HAL_HsmciDataTransferDescriptor_t *dataDescr = descriptor->dataTransferDescriptor; + uint8_t i; + absMemCallback = callback; + + apsMemInternal.logicalBlockAddress = address; + apsMemInternal.transferLength = dataDescr->length / STANDARD_BLOCK_LENGTH; + apsMemInternal.blocksToTransfer = apsMemInternal.transferLength; + apsMemInternal.dataBuffer = descriptor->dataTransferDescriptor->buffer; + + dataDescr->length = STANDARD_BLOCK_LENGTH; + + i = RETRY_COUNT; + while(i--) + { + if (memSuccess == memWriteBlock(descriptor, address, absMemWriteBlockCallback)) + return memorySuccessStatus; + } + + return memoryErrorStatus; +} + +/**************************************************************************//** +\brief Reads data from memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of blocks to read. + callback - pointer to function to nofity upper layer about end of read + procedure. +\return + status of read procedure. +******************************************************************************/ +MemoryStatus_t absMemRead(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemoryStatus_t)) +{ + HAL_HsmciDataTransferDescriptor_t *dataDescr = descriptor->dataTransferDescriptor; + uint8_t i; + absMemCallback = callback; + + apsMemInternal.logicalBlockAddress = address; + apsMemInternal.transferLength = dataDescr->length / STANDARD_BLOCK_LENGTH; + apsMemInternal.blocksToTransfer = apsMemInternal.transferLength; + apsMemInternal.dataBuffer = descriptor->dataTransferDescriptor->buffer; + + dataDescr->length = STANDARD_BLOCK_LENGTH; + + i = RETRY_COUNT; + while(i--) + { + if (memSuccess == memReadBlock(descriptor, address, absMemReadBlockCallback)) + return memorySuccessStatus; + } + + return memoryErrorStatus; +} + +//eof abstractMemory.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/massStorageDevice.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/massStorageDevice.c new file mode 100644 index 00000000..94c36c42 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/massStorageDevice.c @@ -0,0 +1,327 @@ +/****************************************************************************//** + \file massStorageDevice.c + + \brief Implementation of mass storage API. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define CBW_SIZE 31 +#define CBW_SIGNATURE 0x43425355 + +#define CSW_SIZE 13 +#define CSW_COMMAND_FAILED_STATUS 1 +#define CSW_COMMAND_SUCCESS_STATUS 0 + +/****************************************************************************** + Types section +******************************************************************************/ +typedef enum +{ + MSD_COMMAND_TRANSPORT, + MSD_SCSI_ANSWER, + MSD_DATA_INOUT, + MSD_STATUS_TRANSPORT +} MsdState_t; + +typedef struct +{ + uint32_t bufferOffset; + uint16_t buffersToTransfer; + uint32_t blockAddress; +} MsdReadWriteControl_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +static void msdBufferReadCallback(MemoryStatus_t status); +static void msdBufferWriteCallback(MemoryStatus_t status); + +/****************************************************************************** + External global variables section +******************************************************************************/ +static UsbMscRequest_t request; + +/****************************************************************************** + Global variables section +******************************************************************************/ +// pointer to application hsmci descriptor +static HAL_HsmciDescriptor_t msdDescr; +HAL_HsmciDescriptor_t *msdPointDescr; +static HAL_HsmciCommandDescriptor_t commandDescr; +static HAL_HsmciDataTransferDescriptor_t dataTransferDescr; +static MsdReadWriteControl_t rwControl; +static MscCSW_t csw; +static MsdState_t msdState; +static MSD_Callback_t msdCallback = NULL; + +void msdRcvCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining); + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Transmitting callback of usb. +\param[in] + pArg - pointer to some data; + status - result of the USB transfer.; + transferred - how much data are transferred; + remaining - how much data are not transferred. +******************************************************************************/ +void msdTmtCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining) +{ + (void)pArg; + (void)status; + (void)remaining; + (void)transferred; + + if (MSD_DATA_INOUT == msdState) + { + rwControl.buffersToTransfer--; + rwControl.blockAddress += msdDescr.dataTransferDescriptor->length / STANDARD_BLOCK_LENGTH; + if (0 == rwControl.buffersToTransfer) + { + csw.bCSWStatus = CSW_COMMAND_SUCCESS_STATUS; + msdState = MSD_STATUS_TRANSPORT; + memcpy(msdDescr.dataTransferDescriptor->buffer, (uint8_t*)&csw, CSW_SIZE); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, CSW_SIZE, msdTmtCallback, NULL); + return; + } + else + if (memorySuccessStatus != absMemRead(&msdDescr, rwControl.blockAddress, msdBufferReadCallback)) + msdCallback(MSD_READ_ERROR); + + } + if (MSD_SCSI_ANSWER == msdState) + { + csw.bCSWStatus = CSW_COMMAND_SUCCESS_STATUS; + msdState = MSD_STATUS_TRANSPORT; + memcpy(msdDescr.dataTransferDescriptor->buffer, (uint8_t*)&csw, CSW_SIZE); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, CSW_SIZE, msdTmtCallback, NULL); + return; + } + if (MSD_STATUS_TRANSPORT == msdState) + { + if (msdCallback) + msdCallback(MSD_STATUS_SUCCESS); + msdState = MSD_COMMAND_TRANSPORT; + HAL_UsbRead(MSD_RECEIVE_PIPE, msdDescr.dataTransferDescriptor->buffer, CBW_SIZE, msdRcvCallback, NULL); + return; + } +} + +/**************************************************************************//** +\brief Receiving callback of usb. +\param[in] + pArg - pointer to some data; + status - result of the USB transfer.; + transferred - how much data are transferred; + remaining - how much data are not transferred. +******************************************************************************/ +void msdRcvCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining) +{ + bool validAndMeaningful = true; + MscCBW_t *cbw = (MscCBW_t *)(msdDescr.dataTransferDescriptor->buffer); + uint8_t length; + + (void)pArg; + (void)status; + (void)remaining; + + if (MSD_COMMAND_TRANSPORT == msdState) + { + /* check that CBW is valid */ + if ((CBW_SIZE != transferred) || (CBW_SIGNATURE != cbw->dCBWSignature)) + validAndMeaningful = false; + if (!validAndMeaningful) + { + HAL_Stall(ADDRESS_MSC_BULKIN_PIPE & 0x03); + return; + } + /* check that CBW is meaningful */ + if ((cbw->bCBWLUN > 0x0F) || (cbw->bCBWCBLength == 0) || (cbw->bCBWCBLength > 0x10) || (cbw->bmCBWFlags & 0x7F)) + validAndMeaningful = false; + if (!validAndMeaningful) + return; + /* fill csw with parameters from cbw */ + csw.cDSWTag = cbw->cDBWTag; + csw.dCSWSignature = CBW_SIGNATURE; + /* check that command is valid */ + if (!scsiIsValidCommand(cbw->CBWCB)) + { + csw.bCSWStatus = CSW_COMMAND_FAILED_STATUS; + msdState = MSD_STATUS_TRANSPORT; + memcpy(msdDescr.dataTransferDescriptor->buffer, (uint8_t*)&csw, CSW_SIZE); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, CSW_SIZE, msdTmtCallback, NULL); + return; + } + /* check that no data in-out phase is needed */ + if (!scsiIsDataInOutPhaseNeeded(cbw->CBWCB)) + { + csw.bCSWStatus = CSW_COMMAND_SUCCESS_STATUS; + msdState = MSD_STATUS_TRANSPORT; + memcpy(msdDescr.dataTransferDescriptor->buffer, (uint8_t*)&csw, CSW_SIZE); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, CSW_SIZE, msdTmtCallback, NULL); + return; + } + /* check that command is no read-write command */ + if (!scsiIsReadWriteCommand(cbw->CBWCB)) + { + csw.bCSWStatus = CSW_COMMAND_SUCCESS_STATUS; + msdState = MSD_SCSI_ANSWER; + length = scsiGetCommandResponse(cbw->CBWCB, msdDescr.dataTransferDescriptor->buffer); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, length, msdTmtCallback, NULL); + return; + } + /* check that command is read command */ + rwControl.buffersToTransfer = scsiBlocksAmount(cbw->CBWCB) * (msdDescr.dataTransferDescriptor->length / STANDARD_BLOCK_LENGTH); + rwControl.blockAddress = scsiGetBlockAddress(cbw->CBWCB); + if (scsiIsReadCommand(cbw->CBWCB)) + { + if (memorySuccessStatus != absMemRead(&msdDescr, rwControl.blockAddress, msdBufferReadCallback)) + msdCallback(MSD_READ_ERROR); + } + else + HAL_UsbRead(MSD_RECEIVE_PIPE, msdDescr.dataTransferDescriptor->buffer, + BULK_SIZE, msdRcvCallback, NULL); + msdState = MSD_DATA_INOUT; + return; + } + if (MSD_DATA_INOUT == msdState) + { + /* increase internal write buffer offset*/ + rwControl.bufferOffset += transferred; + /* if buffer is full perform write to flash */ + if (rwControl.bufferOffset == msdDescr.dataTransferDescriptor->length) + { + if (memorySuccessStatus != absMemWrite(&msdDescr, rwControl.blockAddress, msdBufferWriteCallback)) + msdCallback(MSD_WRITE_ERROR); + /* wait for hsmci bus becomes free */ + rwControl.bufferOffset = 0; + rwControl.buffersToTransfer--; + rwControl.blockAddress += msdDescr.dataTransferDescriptor->length / STANDARD_BLOCK_LENGTH; + return; + } + if (0 != rwControl.buffersToTransfer) + HAL_UsbRead(MSD_RECEIVE_PIPE, msdDescr.dataTransferDescriptor->buffer + rwControl.bufferOffset, + BULK_SIZE, msdRcvCallback, NULL); + + } +} + +/**************************************************************************//** +\brief Opens mass storage device. +\param[in] + callback - pointer to function to notify about MSD errors and transactions; + responseBuffer - pointer to hsmci command response buffer; it should have + a size of four; + buffer - pointer to buffer for hsmci data transfer; it should be + a multiplier of 512; + length - length of buffer for data transfer. +******************************************************************************/ +void MSD_Open(MSD_Callback_t callback, uint32_t *responseBuffer, uint8_t *buffer, uint32_t length) +{ + uint32_t lastBlock; + + msdCallback = callback; + + msdDescr.dataTransferDescriptor = &dataTransferDescr; + msdDescr.commandDescriptor = &commandDescr; + msdDescr.dataTransferDescriptor->buffer = buffer; + msdDescr.dataTransferDescriptor->length = length; + msdDescr.commandDescriptor->responseBuffer = responseBuffer; + msdDescr.dataTransferDescriptor->commandDescr = &commandDescr; + + msdPointDescr = & msdDescr; + + if (-1 == HAL_OpenHsmci(&msdDescr)) + if (msdCallback) + msdCallback(MSD_INTERFACE_BUSY); + + if (memorySuccessStatus != absMemInit(&msdDescr)) + if (msdCallback) + msdCallback(MSD_MEMORY_INIT_ERROR); + + if (memorySuccessStatus != absMemCapacity(&msdDescr, &lastBlock)) + if (msdCallback) + msdCallback(MSD_READ_CAPACITY_ERROR); + + scsiSetCapacity(lastBlock); + + rwControl.bufferOffset = 0; + rwControl.buffersToTransfer = 0; + msdState = MSD_COMMAND_TRANSPORT; + csw.dCSWDataResidue = 0; + + HAL_RegisterEndOfBusResetHandler(usbBusResetAction); + if (DEVICE_POWERED != HAL_GetState()) + HAL_UsbInit((uint8_t *)&request); +} + +/**************************************************************************//** +\brief Closes mass storage device. +******************************************************************************/ +void MSD_Close(void) +{ + if (-1 == HAL_CloseHsmci(&msdDescr)) + if (msdCallback) + msdCallback(MSD_INTERFACE_BUSY); +} + +/**************************************************************************//** +\brief Memory read callback function. +\param[in] + status - status of memory read procedure. +******************************************************************************/ +static void msdBufferReadCallback(MemoryStatus_t status) +{ + if (memorySuccessStatus != status) + msdCallback(MSD_READ_ERROR); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, + msdDescr.dataTransferDescriptor->length, msdTmtCallback, NULL); +} + +/**************************************************************************//** +\brief Memory write callback function. +\param[in] + status - status of memory write procedure. +******************************************************************************/ +static void msdBufferWriteCallback(MemoryStatus_t status) +{ + if (memorySuccessStatus != status) + msdCallback(MSD_WRITE_ERROR); + if (0 == rwControl.buffersToTransfer) + { + csw.bCSWStatus = CSW_COMMAND_SUCCESS_STATUS; + msdState = MSD_STATUS_TRANSPORT; + memcpy(msdDescr.dataTransferDescriptor->buffer, (uint8_t*)&csw, CSW_SIZE); + HAL_UsbWrite(MSD_TRANSMIT_PIPE, msdDescr.dataTransferDescriptor->buffer, CSW_SIZE, msdTmtCallback, NULL); + } + else + HAL_UsbRead(MSD_RECEIVE_PIPE, msdDescr.dataTransferDescriptor->buffer, + BULK_SIZE, msdRcvCallback, NULL); +} + +// eof massStorageDevice.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mmc.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mmc.c new file mode 100644 index 00000000..b512bd04 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mmc.c @@ -0,0 +1,618 @@ +/****************************************************************************//** + \files mmc.c + + \brief Implementation of mmc protocol. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 30/08/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// card voltage ranges +#define OCR_VDD_16_17 (1 << 4) +#define OCR_VDD_17_18 (1 << 5) +#define OCR_VDD_18_19 (1 << 6) +#define OCR_VDD_19_20 (1 << 7) +#define OCR_VDD_20_21 (1 << 8) +#define OCR_VDD_21_22 (1 << 9) +#define OCR_VDD_22_23 (1 << 10) +#define OCR_VDD_23_24 (1 << 11) +#define OCR_VDD_24_25 (1 << 12) +#define OCR_VDD_25_26 (1 << 13) +#define OCR_VDD_26_27 (1 << 14) +#define OCR_VDD_27_28 (1 << 15) +#define OCR_VDD_28_29 (1 << 16) +#define OCR_VDD_29_30 (1 << 17) +#define OCR_VDD_30_31 (1 << 18) +#define OCR_VDD_31_32 (1 << 19) +#define OCR_VDD_32_33 (1 << 20) +#define OCR_VDD_33_34 (1 << 21) +#define OCR_VDD_34_35 (1 << 22) +#define OCR_VDD_35_36 (1 << 23) +// R1 response statuses +#define STATUS_APP_CMD (1UL << 5) +#define STATUS_SWITCH_ERROR (1UL << 7) +#define STATUS_READY_FOR_DATA (1UL << 8) +#define STATUS_IDLE (0UL << 9) +#define STATUS_READY (1UL << 9) +#define STATUS_IDENT (2UL << 9) +#define STATUS_STBY (3UL << 9) +#define STATUS_TRAN (4UL << 9) +#define STATUS_DATA (5UL << 9) +#define STATUS_RCV (6UL << 9) +#define STATUS_PRG (7UL << 9) +#define STATUS_DIS (8UL << 9) +#define STATUS_STATE (0xFUL << 9) +#define STATUS_ERASE_RESET (1UL << 13) +#define STATUS_WP_ERASE_SKIP (1UL << 15) +#define STATUS_CIDCSD_OVERWRITE (1UL << 16) +#define STATUS_OVERRUN (1UL << 17) +#define STATUS_UNERRUN (1UL << 18) +#define STATUS_ERROR (1UL << 19) +#define STATUS_CC_ERROR (1UL << 20) +#define STATUS_CARD_ECC_FAILED (1UL << 21) +#define STATUS_ILLEGAL_COMMAND (1UL << 22) +#define STATUS_COM_CRC_ERROR (1UL << 23) +#define STATUS_UN_LOCK_FAILED (1UL << 24) +#define STATUS_CARD_IS_LOCKED (1UL << 25) +#define STATUS_WP_VIOLATION (1UL << 26) +#define STATUS_ERASE_PARAM (1UL << 27) +#define STATUS_ERASE_SEQ_ERROR (1UL << 28) +#define STATUS_BLOCK_LEN_ERROR (1UL << 29) +#define STATUS_ADDRESS_MISALIGN (1UL << 30) +#define STATUS_ADDR_OUT_OR_RANGE (1UL << 31) +// R1 response sets +#define ERROR_STATUS (STATUS_ADDR_OUT_OR_RANGE | STATUS_ADDRESS_MISALIGN | STATUS_BLOCK_LEN_ERROR | STATUS_ERASE_SEQ_ERROR | \ + STATUS_ERASE_PARAM | STATUS_WP_VIOLATION | STATUS_CARD_IS_LOCKED | STATUS_UN_LOCK_FAILED | \ + STATUS_COM_CRC_ERROR | STATUS_ILLEGAL_COMMAND | STATUS_CARD_ECC_FAILED | STATUS_CC_ERROR | STATUS_ERROR | \ + STATUS_UNERRUN | STATUS_OVERRUN | STATUS_CIDCSD_OVERWRITE | STATUS_SWITCH_ERROR) +// command arguments +#define CMD0_IDLE_STATE_ARGUMENT 0 +#define CMD1_ACCESS_MODE_SECTOR (1UL << 30) +#define CMD1_HOST_VOLTAGE_RANGE (OCR_VDD_27_28 | OCR_VDD_28_29 | OCR_VDD_29_30 | OCR_VDD_30_31 | \ + OCR_VDD_31_32 | OCR_VDD_32_33 | OCR_VDD_33_34 | OCR_VDD_34_35 | \ + OCR_VDD_35_36) +#define CMD2_ARGUMENT 0 +#define CMD6_SET_4_LINE_BUS 0x03B70100 +#define CMD6_SET_HS_MODE 0x03B90100 +// relative card address +#define REVALITE_CARD_ADDRESS (1 << 16) +// command responses length +#define NO_RESPONSE_LENGTH 0 +#define R1_RESPONSE_LENGTH 1 +#define R2_RESPONSE_LENGTH 4 +#define R3_RESPONSE_LENGTH 1 +// retry amount of card initialization +#define RETRY_AMOUNT 10000 +// memory frequency masks for CDS memory register +#define FREQ_UNITS_MASK 0x07 +#define FREQ_MULTIPLIER_MASK 0x78 +#define FREQ_MULTIPLIER_OFFSET 0x03 +// csd register definitions +#define CSD_SPEC_VERS_FOUR 4 + +/****************************************************************************** + External global variables section +******************************************************************************/ +/****************************************************************************** + Types section +******************************************************************************/ +typedef union +{ + uint32_t reg; + struct + { + uint32_t reserved1 : 5; + uint32_t appCmd : 1; + uint32_t urgentBkops : 1; + uint32_t switchError : 1; + uint32_t readyForData : 1; + uint32_t currentState : 4; + uint32_t eraseReset : 1; + uint32_t reserved2 : 1; + uint32_t wpEraseSkip : 1; + uint32_t cidCsdOverwrite : 1; + uint32_t overrun : 1; + uint32_t underrun : 1; + uint32_t error : 1; + uint32_t ccEror : 1; + uint32_t cardEccFailed : 1; + uint32_t illegalCommand : 1; + uint32_t comCrcError : 1; + uint32_t lockUnlockFailed : 1; + uint32_t cardIsLocked : 1; + uint32_t wpViolation : 1; + uint32_t eraseParam : 1; + uint32_t eraseSeqError : 1; + uint32_t blockLenError : 1; + uint32_t addressMisalign : 1; + uint32_t addressOutOfRange: 1; + }; +} MmcCardStatus_t; + +typedef union +{ + uint32_t reg; + struct + { + uint32_t reserverd1 : 7; + uint32_t voltage170_195: 1; + uint32_t voltage20_26 : 7; + uint32_t voltage27_36 : 9; + uint32_t reserved2 : 5; + uint32_t accessMode : 2; + uint32_t busy : 1; + }; +} MmcOcrRegister_t; + +typedef struct +{ + uint8_t tranSpeed; + uint8_t nsac; + uint8_t taac; + uint8_t reserved3 : 2; + uint8_t specVersion : 4; + uint8_t csdStructure : 2; + uint32_t cSizeDown : 10; + uint32_t reserved2 : 2; + uint32_t dsrImp : 1; + uint32_t readBlkMisalign : 1; + uint32_t writeBlkMisalign: 1; + uint32_t readBlPartial : 1; + uint32_t readBlLen : 4; + uint32_t ccc : 12; + uint32_t wpGroupSize : 5; + uint32_t eraseGroupMult : 5; + uint32_t eraseGroupSize : 5; + uint32_t cSizeMult : 3; + uint32_t vddWCurrMax : 3; + uint32_t vddWCurrMin : 3; + uint32_t vddRCurrMax : 3; + uint32_t vddRCurrMin : 3; + uint32_t cSizeUp : 2; + uint8_t notUsed : 1; + uint8_t crc : 7; + uint8_t ecc : 2; + uint8_t fileFormat : 2; + uint8_t tmpWriteProtect : 1; + uint8_t permWriteProtect : 1; + uint8_t copy : 1; + uint8_t fileFormatGroup : 1; + uint16_t contentPropApp : 1; + uint16_t reserved1 : 4; + uint16_t writeBlPartial : 1; + uint16_t writeBlLen : 4; + uint16_t r2wFactor : 3; + uint16_t defaultEcc : 2; + uint16_t wpGroupEnable : 1; +} MmcCSDRegister_t; + +/****************************************************************************** + Constants section +******************************************************************************/ +static const uint32_t mmcFrequencyUnits[8] = {100, 1000, 10000, 100000, 0, 0, 0, 0}; +static const uint32_t mmcFrequencyMulptiplier[16] = {0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80}; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +static bool memSendCommand(HAL_HsmciDescriptor_t *descriptor, uint32_t command, uint32_t argument, uint8_t respLength); +static bool memCheckState(HAL_HsmciDescriptor_t *descriptor, uint16_t state); +static bool setMaximumCommunicationFrequency(HAL_HsmciDescriptor_t *descriptor, uint8_t freqCode, bool hsMode); +static MemStatus_t setBusWidthAndHsMode(HAL_HsmciDescriptor_t *descriptor, MmcCSDRegister_t *csdReg); +static void (*absMemoryCallback)(MemStatus_t) = NULL; +static HAL_HsmciDescriptor_t *memDescriptor = NULL; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief HSMCI write callback. +******************************************************************************/ +void memWriteCallback(void) +{ + MmcCardStatus_t *cardStatus; + + cardStatus = (MmcCardStatus_t *)(memDescriptor->commandDescriptor->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + absMemoryCallback(hsmciWriteError); + absMemoryCallback(memSuccess); +} + +/**************************************************************************//** +\brief HSMCI read callback. +******************************************************************************/ +void memReadCallback(void) +{ + MmcCardStatus_t *cardStatus; + + cardStatus = (MmcCardStatus_t *)(memDescriptor->commandDescriptor->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + absMemoryCallback(hsmciReadError); + absMemoryCallback(memSuccess); +} +/**************************************************************************//** +\brief Performs MMC memory initialization. +\param[in] + commandDescr - pointer to hsmci command descriptor. +\return + status of initialization procedure. +******************************************************************************/ +MemStatus_t memInit(HAL_HsmciDescriptor_t *descriptor) +{ + uint16_t i = RETRY_AMOUNT; + MmcCardStatus_t *cardStatus; + MmcOcrRegister_t *ocrRegister; + MmcCSDRegister_t *csdReg; + HAL_HsmciCommandDescriptor_t *commandDescr = descriptor->commandDescriptor; + uint32_t sendOpCondResponse; + MemStatus_t status; + + /* send first command - CMD0 with power init parameters */ + if (!memSendCommand(descriptor, POWER_ON_INIT, CMD0_IDLE_STATE_ARGUMENT, NO_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + /* send CMD0 command to go to idle mode */ + if (!memSendCommand(descriptor, GO_IDLE_STATE, CMD0_IDLE_STATE_ARGUMENT, NO_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + /* wait for internal initialization process */ + for (; i > 0; i--) + { + /* send CMD1 command to check host and device voltage correlation */ + if (!memSendCommand(descriptor, SEND_OP_COND, CMD1_HOST_VOLTAGE_RANGE | CMD1_ACCESS_MODE_SECTOR, R3_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + ocrRegister = (MmcOcrRegister_t *)(commandDescr->responseBuffer); + if (!(ocrRegister->reg & CMD1_HOST_VOLTAGE_RANGE)) + return voltageError; + if (0 == ocrRegister->busy) + continue; + break; + } + if (0 == i) + return initTimeoutError; + sendOpCondResponse = commandDescr->responseBuffer[0]; + i = RETRY_AMOUNT; + while (i--) + { + /* send CMD2 command to get card CID number */ + if (!memSendCommand(descriptor, ALL_SEND_CID, CMD2_ARGUMENT, R2_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + if (sendOpCondResponse != commandDescr->responseBuffer[0]) + break; + } + if (0 == i) + return stateError; + /* send CMD3 command to set card relative address */ + if (!memSendCommand(descriptor, SEND_RELATIVE_ADDR, REVALITE_CARD_ADDRESS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_STBY)) + return stateError; + /* send CMD9 command to read CSD register */ + if (!memSendCommand(descriptor, SEND_CSD, REVALITE_CARD_ADDRESS, R2_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + /* read allowed maximum communication frequency and set it */ + csdReg = (MmcCSDRegister_t *)(commandDescr->responseBuffer); + status = setBusWidthAndHsMode(descriptor, csdReg); + if (status != memSuccess) + return setMaxFreqError; + + return memSuccess; +} + +/**************************************************************************//** +\brief Reads MMC memory capacity. +\param[in] + descriptor - pointer to hsmci descriptor. +\param[out] + capInfo - pointer to memory capacity structure. +\return + status of read capacity procedure. +******************************************************************************/ +MemStatus_t memGetCapacityInfo(HAL_HsmciDescriptor_t *descriptor, MemCapacityInfo_t *capInfo) +{ + MmcCardStatus_t *cardStatus; + MmcCSDRegister_t *csdReg; + HAL_HsmciCommandDescriptor_t *commandDescr = descriptor->commandDescriptor; + + /* send CMD13 command to discover current state */ + if (!memSendCommand(descriptor, SEND_STATUS, REVALITE_CARD_ADDRESS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (STATUS_TRAN == (cardStatus->reg & STATUS_TRAN)) + { + /* send CMD7 command to switch to stand-by state*/ + if (!memSendCommand(descriptor, SELECT_CARD, ~REVALITE_CARD_ADDRESS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_STBY)) + return stateError; + } + /* send CMD9 command to read CSD register */ + if (!memSendCommand(descriptor, SEND_CSD, REVALITE_CARD_ADDRESS, R2_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + + capInfo->logicalBlockLength = STANDARD_BLOCK_LENGTH; + csdReg = (MmcCSDRegister_t *)(commandDescr->responseBuffer); + capInfo->lastLogicalBlock = (1 << (csdReg->cSizeMult + 2)) * (csdReg->cSizeUp + 1 + (csdReg->cSizeDown << 2)) * ((1 << csdReg->readBlLen) / STANDARD_BLOCK_LENGTH) - 1; + + if (!memCheckState(descriptor, STATUS_STBY)) + return stateError; + + /* send CMD7 command to switch to transfer state */ + if (!memSendCommand(descriptor, SELECT_CARD, REVALITE_CARD_ADDRESS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + return memSuccess; +} + +/**************************************************************************//** +\brief Checks MMC memory state. +\param[in] + descriptor - pointer to hsmci descriptor; + state - state in which MMC memory meant to be. +\return + false - check failed; + true - check success. +******************************************************************************/ +static bool memSendCommand(HAL_HsmciDescriptor_t *descriptor, uint32_t command, uint32_t argument, uint8_t respLength) +{ + descriptor->commandDescriptor->command = command; + descriptor->commandDescriptor->argument = argument; + descriptor->commandDescriptor->responseLength = respLength; + + if (-1 == HAL_WriteHsmciCommand(descriptor)) + return false; + + return true; +} + +/**************************************************************************//** +\brief Sends MMC command. +\param[in] + descriptor - pointer to hsmci descriptor; + command - command index and attributes; + argument - command argument; + respLength - command response length. +\return + false - command sent failed; + true - command sent success. +******************************************************************************/ +static bool memCheckState(HAL_HsmciDescriptor_t *descriptor, uint16_t state) +{ + MmcCardStatus_t *cardStatus; + /* send CMD13 command to discover current state */ + if (!memSendCommand(descriptor, SEND_STATUS, REVALITE_CARD_ADDRESS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(descriptor->commandDescriptor->responseBuffer); + + return (cardStatus->reg & STATUS_STATE) == state; +} + +/**************************************************************************//** +\brief Writes one data block to MMC memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of block to write. +\return + status of write procedure. +******************************************************************************/ +MemStatus_t memWriteBlock(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemStatus_t)) +{ + HAL_HsmciCommandDescriptor_t *commandDescr = descriptor->commandDescriptor; + HAL_HsmciDataTransferDescriptor_t *dataDescr = descriptor->dataTransferDescriptor; + + memDescriptor = descriptor; + + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + commandDescr->command = WRITE_BLOCK; + commandDescr->argument = address << 9; + commandDescr->responseLength = R1_RESPONSE_LENGTH; + + dataDescr->direction = HSMCI_WRITE; + dataDescr->blockSize = STANDARD_BLOCK_LENGTH; + absMemoryCallback = callback; + descriptor->callback = memWriteCallback; + + if (-1 == HAL_WriteHsmci(descriptor)) + return hsmciWriteError; + + return memSuccess; +} + +/**************************************************************************//** +\brief Reads one data block from MMC memory at "address". +\param[in] + descriptor - pointer to hsmci descriptor; + address - address of block to read. +\return + status of read procedure. +******************************************************************************/ +MemStatus_t memReadBlock(HAL_HsmciDescriptor_t *descriptor, uint32_t address, void (*callback)(MemStatus_t)) +{ + HAL_HsmciCommandDescriptor_t *commandDescr = descriptor->commandDescriptor; + HAL_HsmciDataTransferDescriptor_t *dataDescr = descriptor->dataTransferDescriptor; + + memDescriptor = descriptor; + + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + commandDescr->command = READ_SINGLE_BLOCK; + commandDescr->argument = address << 9; + commandDescr->responseLength = R1_RESPONSE_LENGTH; + + dataDescr->direction = HSMCI_READ; + dataDescr->blockSize = STANDARD_BLOCK_LENGTH; + absMemoryCallback = callback; + descriptor->callback = memReadCallback; + + if (-1 == HAL_ReadHsmci(descriptor)) + return hsmciReadError; + + return memSuccess; +} + +/**************************************************************************//** +\brief Checks if MMC memory is ready for any data transfer. +\return + false - memory is busy; + true - memory is ready. +******************************************************************************/ +bool memIsBusy(void) +{ + return HAL_HsmciCheckReady(); +} + +/**************************************************************************//** +\brief Sets maximum bus frequency for MMC memory. +\param[in] + descriptor - pointer to hsmci descriptor; + freqCode - frequency code. +\return + false - setting failed; + true - setting success. +******************************************************************************/ +static bool setMaximumCommunicationFrequency(HAL_HsmciDescriptor_t *descriptor, uint8_t freqCode, bool hsMode) +{ + uint32_t freqUnit = mmcFrequencyUnits[freqCode & FREQ_UNITS_MASK]; + uint32_t freqMult = mmcFrequencyMulptiplier[(freqCode & FREQ_MULTIPLIER_MASK) >> FREQ_MULTIPLIER_OFFSET]; + + descriptor->clockRate = freqUnit * freqMult * 100; + if (hsMode) + descriptor->clockRate *= 2; + if (-1 == HAL_SetHsmciSpeed(descriptor)) + return false; + + return true; +} + +/**************************************************************************//** +\brief Sets maximum 4-line dat bus and high speed mode if card supports it. +\param[in] + descriptor - pointer to hsmci descriptor; + csdReg - pointer to csd register structure. +\return + status of operation. +******************************************************************************/ +static MemStatus_t setBusWidthAndHsMode(HAL_HsmciDescriptor_t *descriptor, MmcCSDRegister_t *csdReg) +{ + MmcCardStatus_t *cardStatus; + uint8_t specVersion = csdReg->specVersion; + uint8_t tranSpeed = csdReg->tranSpeed; + HAL_HsmciCommandDescriptor_t *commandDescr = descriptor->commandDescriptor; + + /* send CMD7 command to switch to transfer state */ + if (!memSendCommand(descriptor, SELECT_CARD, REVALITE_CARD_ADDRESS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + /* send CMD16 command to set card block length */ + if (!memSendCommand(descriptor, SET_BLOCKLEN, STANDARD_BLOCK_LENGTH, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + if (specVersion < CSD_SPEC_VERS_FOUR) + { + if (!setMaximumCommunicationFrequency(descriptor, tranSpeed, false)) + return hsmciError; + else + return memSuccess; + } + + /* send CMD6 command to switch to 4-line bus */ + if (!memSendCommand(descriptor, SWITCH, CMD6_SET_4_LINE_BUS, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + descriptor->busWidth = HSMCI_BUS_WIDTH_4; + if (-1 == HAL_SetHsmciBusWidth(descriptor)) + return hsmciError; + + /* send CMD6 command to switch to high speed mode */ + if (!memSendCommand(descriptor, SWITCH, CMD6_SET_HS_MODE, R1_RESPONSE_LENGTH)) + return hsmciError; + /* wait for hsmci bus becomes free */ + while (!HAL_HsmciCheckReady()); + cardStatus = (MmcCardStatus_t *)(commandDescr->responseBuffer); + if (0 != (cardStatus->reg & ERROR_STATUS)) + return commandError; + if (!memCheckState(descriptor, STATUS_TRAN)) + return stateError; + + descriptor->highSpeedMode = true; + if (-1 == HAL_SetHsmciHighSpeedMode(descriptor)) + return hsmciError; + + if (!setMaximumCommunicationFrequency(descriptor, tranSpeed, false)) + return hsmciError; + + return memSuccess; +} + +//eof mmc.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mscProtocol.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mscProtocol.c new file mode 100644 index 00000000..47e5c2d8 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/mscProtocol.c @@ -0,0 +1,53 @@ +/****************************************************************************//** + \file mscProtocol.c + + \brief Implementation of communication device protocol command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Mass storage device request handler. +\param[in] + data - pointer to host's request. +******************************************************************************/ +void msdRequestHandler(uint8_t *data) +{ + UsbMscRequest_t *pRequest = NULL; + + pRequest = (UsbMscRequest_t *)data; + if (NULL == pRequest) + return; + + // Check request code + switch (pRequest->request.bRequest) + { + case BULK_ONLY_MASS_STORAGE_RESET: + break; + case GET_MAX_LUN: + HAL_Stall(0); + break; + default: + HAL_Stall(0); + break; + } +} + +//eof mscProtocol.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/scsiProtocol.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/scsiProtocol.c new file mode 100644 index 00000000..68c3cfb6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/MSD/src/scsiProtocol.c @@ -0,0 +1,398 @@ +/****************************************************************************//** + \files scsiProtocol.h + + \brief Implementation of communication device protocol command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 30/08/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// scsi commands +#define INQUIRY 0x12 +#define READ_CAPACITY_10 0x25 +#define READ_10 0x28 +#define REQUEST_SENSE 0x03 +#define TEST_UNIT_READY 0x00 +#define WRITE_10 0x2A +#define PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E +#define MODE_SENSE_6 0x1A +#define READ_FORMAT_CAPACITIES 0x23 +#define VERIFY_10 0x2F + +// capacity definitions +#define BLOCK_SIZE 512 + +//inquiry definitions +#define INQUIRY_PERIPHERAL 0x00 +#define INQUIRY_REMOVABLE 0x80 +#define INQUIRY_VERSION 0x04 +#define INQUIRY_RESPONSE_FORMAT 0x02 +#define INQUIRY_ADDITIONAL_LENGTH 0x20 +#define INQUIRY_FLAGS 0x00 +#define INQUIRY_VENDOR_ID "Atmel " +#define INQUIRY_PRODUCT_ID "Mass Storage " +#define INQUIRY_PRODUCT_REVISION "0001" + +// request sense definitions +#define REQUEST_SENSE_CODE 0xF0 +#define REQUEST_SENSE_OBSOLETE 0x00 +#define REQUEST_SENSE_NORMAL_FLAGS 0x00 +#define REQUEST_SENSE_ERROR_FLAGS 0x05 +#define REQUEST_SENSE_INFO 0x00 +#define REQUEST_SENSE_ADDITIONAL_SENSE_LENGTH 0x0A +#define REQUEST_SENSE_CMD_SPECIFIC_INFO 0x00 +#define REQUEST_SENSE_NORMAL_ADDITIONAL_SENSE_CODE 0x00 +#define REQUEST_SENSE_ERROR_ADDITIONAL_SENSE_CODE 0x20 +#define REQUEST_SENSE_ADDITIONAL_SENSE_CODE_QUALIFIER 0x00 +#define REQUEST_SENSE_FIELD_REPLACABLE_UNIT_CODE 0x00 +#define REQUEST_SENSE_SENSE_KEY_SPECIFIC_VALID 0x80 +#define REQUEST_SENSE_SENSE_KEY_SPECIFIC 0x00 + +// mode sense definitions +#define MODE_SENSE_LENGTH 0x03 +#define MODE_SENSE_MEDIA_TYPE 0x00 +#define MODE_SENSE_DEVICE_SPECIFIC 0x00 +#define MODE_SENSE_BLOCK_DESC_LENGTH 0x00 + +// format capacities definitions +#define FORMAT_CAPACITIES_RESERVED 0x00 +#define FORMAT_CAPACITIES_LENGTH 0x08 +#define FORMAT_CAPACITIES_DESC_TYPE 0x01 + +/****************************************************************************** + Types section +******************************************************************************/ +BEGIN_PACK +typedef struct PACK +{ + uint32_t lastLogicalBlock; + uint32_t logicalBlockLength; +} ScsiReadCapacityResponse_t; + +typedef struct PACK +{ + uint8_t peripheral; + uint8_t removable; + uint8_t version; + uint8_t responseDataFormat; + uint8_t additionalLength; + uint8_t flags[3]; + uint8_t vendorId[8]; + uint8_t productId[16]; + uint8_t productRevision[4]; +} ScsiInquiryResponse_t; + +typedef struct PACK +{ + uint8_t responseCodeAndValid; + uint8_t obsolete; + uint8_t flags; + uint32_t information; + uint8_t addSenseLen; + uint32_t cmdSpecificInfo; + uint8_t additionalSenseCode; + uint8_t additionalSenseCodeQualifier; + uint8_t fieldReplacableUnitCode; + uint8_t senseKeySpecific[3]; +} ScsiRequestSenseResponse_t; + +typedef struct PACK +{ + uint8_t modeDataLength; + uint8_t mediumType; + uint8_t deviceSpecific; + uint8_t blockDescriptorLength; +} ScsiModeSense6Response_t; + +typedef struct PACK +{ + uint8_t reserved[3]; + uint8_t length; + uint32_t blocksNumber; + uint8_t descType; + uint8_t blockLengthUp; + uint16_t blockLengthDown; +} ScsiReadFormatCapacities_t; + +typedef struct PACK +{ + uint8_t flags; + uint32_t logicalBlockAddress; + uint8_t groupNumber; + uint16_t transferLength; + uint8_t control; +} ScsiReadWriteCommand_t; + +typedef struct PACK +{ + uint8_t index; + union + { + ScsiReadWriteCommand_t rwCommand; + }; +} ScsiCommand_t; +END_PACK + +/****************************************************************************** + Global variables section +******************************************************************************/ +static bool defaultRequestSenseResponse; +static uint32_t lastLogicalBlockNum; + +/****************************************************************************** + Constants section +******************************************************************************/ +const ScsiInquiryResponse_t inquiryResponse = { + INQUIRY_PERIPHERAL, + INQUIRY_REMOVABLE, + INQUIRY_VERSION, + INQUIRY_RESPONSE_FORMAT, + INQUIRY_ADDITIONAL_LENGTH, + {INQUIRY_FLAGS, INQUIRY_FLAGS, INQUIRY_FLAGS}, + INQUIRY_VENDOR_ID, + INQUIRY_PRODUCT_ID, + INQUIRY_PRODUCT_REVISION +}; + +const ScsiRequestSenseResponse_t normalRequestSenseResponse = { + REQUEST_SENSE_CODE, + REQUEST_SENSE_OBSOLETE, + REQUEST_SENSE_NORMAL_FLAGS, + SWAP32(REQUEST_SENSE_INFO), + REQUEST_SENSE_ADDITIONAL_SENSE_LENGTH, + SWAP32(REQUEST_SENSE_CMD_SPECIFIC_INFO), + REQUEST_SENSE_NORMAL_ADDITIONAL_SENSE_CODE, + REQUEST_SENSE_ADDITIONAL_SENSE_CODE_QUALIFIER, + REQUEST_SENSE_FIELD_REPLACABLE_UNIT_CODE, + {REQUEST_SENSE_SENSE_KEY_SPECIFIC_VALID, REQUEST_SENSE_SENSE_KEY_SPECIFIC, REQUEST_SENSE_SENSE_KEY_SPECIFIC} +}; + +const ScsiRequestSenseResponse_t errorRequestSenseResponse = { + REQUEST_SENSE_CODE, + REQUEST_SENSE_OBSOLETE, + REQUEST_SENSE_ERROR_FLAGS, + SWAP32(REQUEST_SENSE_INFO), + REQUEST_SENSE_ADDITIONAL_SENSE_LENGTH, + SWAP32(REQUEST_SENSE_CMD_SPECIFIC_INFO), + REQUEST_SENSE_ERROR_ADDITIONAL_SENSE_CODE, + REQUEST_SENSE_ADDITIONAL_SENSE_CODE_QUALIFIER, + REQUEST_SENSE_FIELD_REPLACABLE_UNIT_CODE, + {REQUEST_SENSE_SENSE_KEY_SPECIFIC_VALID, REQUEST_SENSE_SENSE_KEY_SPECIFIC, REQUEST_SENSE_SENSE_KEY_SPECIFIC} +}; + +const ScsiModeSense6Response_t modeSense6Response = { + MODE_SENSE_LENGTH, + MODE_SENSE_MEDIA_TYPE, + MODE_SENSE_DEVICE_SPECIFIC, + MODE_SENSE_BLOCK_DESC_LENGTH +}; + +/****************************************************************************** + Implementations section +******************************************************************************/ + +/**************************************************************************//** +\brief Checks if received scsi command is supported. +\param[in] + data - pointer to received command with parameters. +\return + false - command is not supported; + true - command is supported. +******************************************************************************/ +bool scsiIsValidCommand(uint8_t *data) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + + command->rwCommand.transferLength = SWAP16(command->rwCommand.transferLength); + command->rwCommand.logicalBlockAddress = SWAP32(command->rwCommand.logicalBlockAddress); + + switch (command->index) + { + case INQUIRY: + case READ_CAPACITY_10: + case TEST_UNIT_READY: + case PREVENT_ALLOW_MEDIUM_REMOVAL: + case READ_10: + case WRITE_10: + case MODE_SENSE_6: + case READ_FORMAT_CAPACITIES: + case VERIFY_10: + defaultRequestSenseResponse = true; + break; + case REQUEST_SENSE: + return true; + default: + defaultRequestSenseResponse = false; + break; + } + + return defaultRequestSenseResponse; +} + +/**************************************************************************//** +\brief Checks if any response or data transfer needed for received + scsi command. +\param[in] + command - received command. +\return + false - response is not needed; + true - response is needed. +******************************************************************************/ +bool scsiIsDataInOutPhaseNeeded(uint8_t *data) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + + if ((TEST_UNIT_READY == command->index) || (PREVENT_ALLOW_MEDIUM_REMOVAL == command->index) + || (VERIFY_10 == command->index)) + return false; + if ((READ_10 == command->index) || (WRITE_10 == command->index)) + if (0 == command->rwCommand.transferLength) + return false; + return true; +} + +/**************************************************************************//** +\brief Checks if command is read or write command. +\param[in] + command - received command. +\return + false - command is not read/write command; + true - command is read/write command. +******************************************************************************/ +bool scsiIsReadWriteCommand(uint8_t *data) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + + return ((READ_10 == command->index) || (WRITE_10 == command->index)); +} + +/**************************************************************************//** +\brief Checks if command is read command. +\param[in] + command - received command. +\return + false - command is not read command; + true - command is read command. +******************************************************************************/ +bool scsiIsReadCommand(uint8_t *data) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + + return (READ_10 == command->index); +} + +/**************************************************************************//** +\brief Blocks for read/write command. +\param[in] + data - pointer to received command with parameters. +\return + number of blocks to read or write from memory. +******************************************************************************/ +uint16_t scsiBlocksAmount(uint8_t *data) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + + if ((READ_10 == command->index) || (WRITE_10 == command->index)) + return command->rwCommand.transferLength; + + return 0; +} + +/**************************************************************************//** +\brief Response for scsi command. +\param[in] + command - received command. +\param[out] + buffer - buffer with scsi command response. +\return + length of response +******************************************************************************/ +uint8_t scsiGetCommandResponse(uint8_t *data, uint8_t *buffer) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + ScsiReadCapacityResponse_t readCapacityResponse = { + .lastLogicalBlock = SWAP32(lastLogicalBlockNum), + .logicalBlockLength = SWAP32(BLOCK_SIZE) + }; + ScsiReadFormatCapacities_t readFormatCapacitiesResponse = { + .reserved = {FORMAT_CAPACITIES_RESERVED, FORMAT_CAPACITIES_RESERVED, FORMAT_CAPACITIES_RESERVED}, + .length = FORMAT_CAPACITIES_LENGTH, + .blocksNumber = SWAP32(lastLogicalBlockNum + 1), + .descType = FORMAT_CAPACITIES_DESC_TYPE, + .blockLengthUp = 0, + .blockLengthDown = SWAP16(BLOCK_SIZE) + }; + + if (INQUIRY == command->index) + { + memcpy(buffer, (uint8_t *)&inquiryResponse, sizeof(ScsiInquiryResponse_t)); + return sizeof(ScsiInquiryResponse_t); + } + if (READ_CAPACITY_10 == command->index) + { + memcpy(buffer, (uint8_t *)&readCapacityResponse, sizeof(ScsiReadCapacityResponse_t)); + return sizeof(ScsiReadCapacityResponse_t); + } + if (REQUEST_SENSE == command->index) + { + if (defaultRequestSenseResponse) + memcpy(buffer, (uint8_t *)&normalRequestSenseResponse, sizeof(ScsiRequestSenseResponse_t)); + else + memcpy(buffer, (uint8_t *)&errorRequestSenseResponse, sizeof(ScsiRequestSenseResponse_t)); + return sizeof(ScsiRequestSenseResponse_t); + } + if (MODE_SENSE_6 == command->index) + { + memcpy(buffer, (uint8_t *)&modeSense6Response, sizeof(ScsiModeSense6Response_t)); + return sizeof(ScsiModeSense6Response_t); + } + if (READ_FORMAT_CAPACITIES == command->index) + { + memcpy(buffer, (uint8_t *)&readFormatCapacitiesResponse, sizeof(ScsiReadFormatCapacities_t)); + return sizeof(ScsiReadFormatCapacities_t); + } + return 0; +} + +/**************************************************************************//** +\brief Sets number of last available memory block for scsi response. +\param[in] + lastBlock - received command. +\param[out] + buffer - number of last available memory block +******************************************************************************/ +void scsiSetCapacity(uint32_t lastBlock) +{ + lastLogicalBlockNum = lastBlock; +} + +/**************************************************************************//** +\brief Block address for read/write command. +\param[in] + data - pointer to received command with parameters. +\return + block address for read or write from memory. +******************************************************************************/ +uint32_t scsiGetBlockAddress(uint8_t *data) +{ + ScsiCommand_t *command = (ScsiCommand_t *)data; + + return command->rwCommand.logicalBlockAddress; +} + +//eof scsiProtocol.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/Makefile b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/Makefile new file mode 100644 index 00000000..604aa147 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/Makefile @@ -0,0 +1,71 @@ +COMPONENTS_PATH = ../../../.. +#include $(COMPONENTS_PATH)/Makerules +include $(MAKERULES) + +DEBUG = NO + +# Hardware flags. +CFLAGS += $(CFLAGS_HW) + +##### PATHS FLAGS OF INCLUDES ######### +CFLAGS += -I./include +CFLAGS += -I$(HAL_PATH)/include +CFLAGS += -I./../common/include +CFLAGS += -I$(SE_PATH)/include +CFLAGS += -I$(HAL_PATH)/drivers/include +CFLAGS += -I$(HAL_HWD_COMMON_PATH)/include + +#### DEFINES FLAGS ####### +ifeq ($(DEBUG), YES) + CFLAGS += -DUSB_TRACE +endif + +###### LIB ########## +BUILDDIR = . +COMMONBUILDDIR = ./../common + +LIBDIR = ./../../lib +LDFLAGS = -L$(LIBDIR) +PROG = VCP.elf +LIBS = $(LIBDIR)/lib$(VCP_LIB).a + +driver_label: + @echo + @echo ---------------------------------------------------- + @echo VCP library creation. + @echo ---------------------------------------------------- + +modules = \ + vcpCdcProtocol \ + vcpVirtualUsart + +commonModules = \ + usbDescriptors \ + usbEnumeration \ + usbSetupProcess + +objects = $(addsuffix .o,$(addprefix $(BUILDDIR)/objs/,$(modules))) +sources = $(addsuffix .c,$(addprefix $(BUILDDIR)/src/,$(modules))) + +commonObjects = $(addsuffix .o,$(addprefix $(COMMONBUILDDIR)/objs/,$(commonModules))) +CommonSources = $(addsuffix .c,$(addprefix $(COMMONBUILDDIR)/src/,$(commonModules))) + +OBJS = $(objects) +OBJS += $(commonObjects) + +###### TARGETS ################ +all: driver_label LIB_VCP +################ +$(BUILDDIR)/objs/%.o: $(BUILDDIR)/src/%.c + $(CC) $(CFLAGS) $^ -o $@ +$(COMMONBUILDDIR)/objs/%.o: $(COMMONBUILDDIR)/src/%.c + $(CC) $(CFLAGS) $^ -o $@ + +################ +LIB_VCP : $(OBJS) + $(AR) $(AR_KEYS) $(LIBDIR)/lib$(VCP_LIB).a $(OBJS) + $(SIZE) -td $(LIBDIR)/lib$(VCP_LIB).a +################ +clean: + rm -f $(objects) $(LIBS) $(BUILDDIR)/list/*.* + rm -f $(commonObjects) $(LIBS) $(COMMONBUILDDIR)/list/*.* \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/include/vcpCdcProtocol.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/include/vcpCdcProtocol.h new file mode 100644 index 00000000..e8044c41 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/include/vcpCdcProtocol.h @@ -0,0 +1,119 @@ +/****************************************************************************//** + \file vcpCdcProtocol.h + + \brief Declaration of communication device protocol command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 05/09/08 A. Khromykh - Created +*******************************************************************************/ +#ifndef _VCPCDCPROTOCOL_H +#define _VCPCDCPROTOCOL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// data size in request structure +#define CDC_REQUEST_DATA_SIZE 7 +// data size in notification structure +#define NOTIFICATION_DATA_SIZE 2 + +// request codes for communication interface class +#define SEND_ENCAPSULATED_COMMAND 0x00 +#define GET_ENCAPSULATED_RESPONSE 0x01 +#define SET_COMM_FEATURE 0x02 +#define GET_COMM_FEATURE 0x03 +#define CLEAR_COMM_FEATURE 0x04 +#define SET_AUX_LINE_STATE 0x10 +#define SET_HOOK_STATE 0x11 +#define PULSE_SETUP 0x12 +#define SEND_PULSE 0x13 +#define SET_PULSE_TIME 0x14 +#define RING_AUX_JACK 0x15 +#define SET_LINE_CODING 0x20 +#define GET_LINE_CODING 0x21 +#define SET_CONTROL_LINE_STATE 0x22 +#define SEND_BREAK 0x23 +#define SET_RINGER_PARMS 0x30 +#define GET_RINGER_PARMS 0x31 +#define SET_OPERATION_PARMS 0x32 +#define GET_OPERATION_PARMS 0x33 +#define SET_LINE_PARMS 0x34 +#define GET_LINE_PARMS 0x35 +#define DIAL_DIGITS 0x36 +#define SET_UNIT_PARAMETER 0x37 +#define GET_UNIT_PARAMETER 0x38 +#define CLEAR_UNIT_PARAMETER 0x39 +#define GET_PROFILE 0x3A +#define SET_ETHERNET_MULTICAST_FILTERS 0x40 +#define SET_ETHERNET_POWER_MANAGEMENT_PATTERNFILTER 0x41 +#define GET_ETHERNET_POWER_MANAGEMENT_PATTERNFILTER 0x42 +#define SET_ETHERNET_PACKET_FILTER 0x43 +#define GET_ETHERNET_STATISTIC 0x44 +#define SET_ATM_DATA_FORMAT 0x50 +#define GET_ATM_DEVICE_STATISTICS 0x51 +#define SET_ATM_DEFAULT_VC 0x52 +#define GET_ATM_VC_STATISTICS 0x53 + +/****************************************************************************** + Types section +******************************************************************************/ +BEGIN_PACK +// Usb host request +typedef struct PACK +{ + UsbRequest_t request; + uint8_t bData[CDC_REQUEST_DATA_SIZE]; +} UsbCdcRequest_t; + +// Usb GetLineCoding device response +typedef struct PACK +{ + uint32_t dwDTERate; + uint8_t bCharFormat; + uint8_t bParityType; + uint8_t bDataBits; +} GetLineCodingResponse_t; + +typedef union PACK +{ + GetLineCodingResponse_t getLineCoding; +} UsbCdcResponse_t; + +// Usb VCP notification +typedef struct PACK +{ + uint8_t bmRequestType; + uint8_t bNotification; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; + uint8_t bData[NOTIFICATION_DATA_SIZE]; +} UsbNotification_t; +END_PACK + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +communication device request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void vcpRequestHandler(uint8_t *data); + +#endif /* _VCPCDCPROTOCOL_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpCdcProtocol.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpCdcProtocol.c new file mode 100644 index 00000000..6ea63557 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpCdcProtocol.c @@ -0,0 +1,226 @@ +/****************************************************************************//** + \file vcpCdcProtocol.h + + \brief Implementation of communication device protocol command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 11/09/08 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// virtual uart speed +#define VU_1200 0x4B0 +#define VU_2400 0x960 +#define VU_4800 0x12C0 +#define VU_9600 0x2580 +#define VU_19200 0x4B00 +#define VU_38400 0x9600 +#define VU_57600 0xE100 +#define VU_115200 0x1C200 + +// char size +#define VU_1STOPBIT 0 +#define VU_1d5STOPBITS 1 +#define VU_2STOPBITS 2 + +// parity +#define VU_NONE 0 +#define VU_ODD 1 +#define VU_EVEN 2 +#define VU_MARK 3 +#define VU_SPACE 4 + +// data bits number +#define VU_5DATABITS 5 +#define VU_6DATABITS 6 +#define VU_7DATABITS 7 +#define VU_8DATABITS 8 +#define VU_16DATABITS 16 + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern HAL_UsartDescriptor_t *vcpPointDescrip; + +/****************************************************************************** + Global variables section +******************************************************************************/ +UsbCdcRequest_t request; +UsbCdcResponse_t response; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Get baud rate meaning for cdc response. + +Parameters: + baudRate - virtual uart baudRate +******************************************************************************/ +void vcpGetBaudRate(uint32_t baudRate) +{ + (void)baudRate; + response.getLineCoding.dwDTERate = VU_115200; +} + +/****************************************************************************** +Get number of stop bits meaning for cdc response. + +Parameters: + stopBits - virtual uart stop bits +******************************************************************************/ +void vcpGetStopBits(uint8_t stopBits) +{ + (void)stopBits; + response.getLineCoding.bCharFormat = VU_1STOPBIT; +} + +/****************************************************************************** +Get parity meaning for cdc response. + +Parameters: + parity - virtual uart parity +******************************************************************************/ +void vcpGetParity(uint8_t parity) +{ + (void)parity; + response.getLineCoding.bParityType = VU_NONE; +} + +/****************************************************************************** +Get data length meaning for cdc response. + +Parameters: + dataLength - virtual uart data length +******************************************************************************/ +void vcpGetDataLength(uint8_t dataLength) +{ + (void)dataLength; + response.getLineCoding.bDataBits = VU_8DATABITS; +} + +/****************************************************************************** +Get virtual uart data and send answer to host. +******************************************************************************/ +void vcpResponseGetLineCoding(void) +{ + vcpGetBaudRate(vcpPointDescrip->baudrate); + vcpGetStopBits(vcpPointDescrip->stopbits); + vcpGetParity(vcpPointDescrip->parity); + vcpGetDataLength(vcpPointDescrip->dataLength); + + HAL_UsbWrite(0, (void *)&response, sizeof(GetLineCodingResponse_t), 0, 0); +} + +/****************************************************************************** +Set baud rate meaning to virtual port. + +Parameters: + baudRate - virtual uart baud rate +******************************************************************************/ +void vcpSetBaudRate(uint32_t baudRate) +{ + (void)baudRate; +} + +/****************************************************************************** +Set number stop bits to virtual port. + +Parameters: + stopBits - virtual uart stop bits +******************************************************************************/ +void vcpSetStopBits(uint8_t stopBits) +{ + (void)stopBits; +} + +/****************************************************************************** +Set parity meaning to virtual port. + +Parameters: + parity - virtual uart parity +******************************************************************************/ +void vcpSetParity(uint8_t parity) +{ + (void)parity; +} + +/****************************************************************************** +Set data length to virtual port. + +Parameters: + dataLength - virtual uart data length +******************************************************************************/ +void vcpSetDataLength(uint8_t dataLength) +{ + (void)dataLength; +} + +/****************************************************************************** +Set virtual uart data and send response to host. +******************************************************************************/ +void vcpResponseSetLineCoding(void) +{ + vcpSetBaudRate(response.getLineCoding.dwDTERate); + vcpSetStopBits(response.getLineCoding.bCharFormat); + vcpSetParity(response.getLineCoding.bParityType); + vcpSetDataLength(response.getLineCoding.bDataBits); + +#if defined(AT91SAM7X256) || defined(AT91SAM3S4C) + sendZLP(); +#endif +} + +/****************************************************************************** +communication device request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void vcpRequestHandler(uint8_t *data) +{ + UsbCdcRequest_t *pRequest = NULL; + + pRequest = (UsbCdcRequest_t *)data; + if (NULL == pRequest) + return; + + // Check request code + switch (pRequest->request.bRequest) + { + case SET_LINE_CODING: + HAL_UsbRead(0, (void *)&response, sizeof(GetLineCodingResponse_t), (TransferCallback_t)vcpResponseSetLineCoding, 0); + break; + case GET_LINE_CODING: + vcpResponseGetLineCoding(); + break; + case SET_CONTROL_LINE_STATE: + //vcpReadDataFromSetControlLineState(pRequest->wValue); // possible in the future + #if defined(AT91SAM7X256) || defined(AT91SAM3S4C) + sendZLP(); + #endif + break; + default: + HAL_Stall(0); + break; + } +} + +//eof vcpCdcProtocol.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpVirtualUsart.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpVirtualUsart.c new file mode 100644 index 00000000..29469576 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/VCP/src/vcpVirtualUsart.c @@ -0,0 +1,498 @@ +/****************************************************************************//** + \file vcpVirtualUart.c + + \brief Implementation of virtual uart API. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 11/09/08 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +// usart control +typedef struct +{ + uint16_t rxUnusedRemaining; +} VcpControl_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Tuning of received buffer and enable received pipe if there is free place +in the buffer. +Parameters: + descriptor - pointer to HAL_UartDescriptor_t structure; +Returns: + none. +******************************************************************************/ +void vcpEnableReadPipe(void); + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern UsbCdcRequest_t request; +extern UsbCdcResponse_t response; + +/****************************************************************************** + Global variables section +******************************************************************************/ +// pointer to application uart descriptor +HAL_UsartDescriptor_t *vcpPointDescrip = NULL; +// structure for internal ring buffer +VcpControl_t vcpControl; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Transmitting callback of virtual uart +Parameters: + pArg - pointer to some data. + status - result of the USB transfer. + transferred - how much data are transferred + remaining - how much data are not transferred +Returns: + none. +******************************************************************************/ +void vcpTmtCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining) +{ + (void)pArg; + (void)status; + (void)remaining; + uint16_t copyPor = vcpPointDescrip->service.txPointOfRead; + uint16_t copyPow = vcpPointDescrip->service.txPointOfWrite; + bool endOfTransferring = true; + + if (NULL != vcpPointDescrip) + { + if (NULL != vcpPointDescrip->txBuffer) + { /* polling mode */ + copyPor += transferred; + if (copyPor == vcpPointDescrip->txBufferLength) + copyPor = 0; + + if (copyPor != copyPow) + { + if (copyPor > copyPow) + { + HAL_UsbWrite(VCP_TRANSMIT_PIPE, &vcpPointDescrip->txBuffer[copyPor], + (vcpPointDescrip->txBufferLength - copyPor), vcpTmtCallback, NULL); + } + else + { + HAL_UsbWrite(VCP_TRANSMIT_PIPE, &vcpPointDescrip->txBuffer[copyPor], + (copyPow - copyPor), vcpTmtCallback, NULL); + } + } + endOfTransferring = false; + vcpPointDescrip->service.txPointOfRead = copyPor; + } /* polling mode */ + + if (!endOfTransferring) + return; + + if (!(transferred % BULK_SIZE) && transferred) + { + /* + Universal Serial Bus Class Definitions for Communication Devices + 3.8.1.1 Segment Delineation + This positive delineation is done using a USB short packet mechanism. When a segment spans N USB packets, the + first packet through packet N-1 shall be the maximum packet size defined for the USB endpoint. If the Nth packet is + less than maximum packet size the USB transfer of this short packet will identify the end of the segment. If the Nth + packet is exactly maximum packet size, it shall be followed by a zero-length packet (which is a short packet) to assure + the end of segment is properly identified. + When transmitting data to the networking device, it is assumed that the client of the host USB driver takes the + appropriate actions to cause a short packet to be sent to the networking device. For segments with lengths that are an + even multiple of the pipe’s “max packet size”, the ability to write a buffer of zero length is required to generate this + short packet. + */ + HAL_UsbWrite(VCP_TRANSMIT_PIPE, NULL, 0, vcpTmtCallback, NULL); + } + else + { + if (NULL != vcpPointDescrip->txCallback) + vcpPointDescrip->txCallback(); + } + + } +} + +/****************************************************************************** +Receiving callback of virtual uart +Parameters: + pArg - pointer to something data. + status - result of the USB transfer. + transferred - how much data are transferred + remaining - how much data are not transferred +Returns: + none. +******************************************************************************/ +void vcpRcvCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining) +{ + (void)pArg; + (void)status; + (void)remaining; + uint16_t number; + uint16_t copyPor; + uint16_t copyPow; + uint16_t copyUnr; + + vcpPointDescrip->service.rxPointOfWrite += transferred; + copyPor = vcpPointDescrip->service.rxPointOfRead; + copyPow = vcpPointDescrip->service.rxPointOfWrite; + copyUnr = vcpControl.rxUnusedRemaining; + + if (NULL != vcpPointDescrip) + { + if (NULL != vcpPointDescrip->rxCallback) + { + if (copyPow < copyPor) + number = copyUnr - (copyPor - copyPow); + else + number = copyPow - copyPor; + + vcpPointDescrip->rxCallback(number); + vcpEnableReadPipe(); + } + } +} + +/****************************************************************************** +Open virtual com port and register uart's event handlers. + +Parameters: + descriptor - pointer to HAL_UartDescriptor_t structure + +Returns: + Returns positive uart descriptor on success or -1 in cases: + - bad uart channel; + - there are not enough resources; + - receiving buffer is less bulk endpoint size; +******************************************************************************/ +int VCP_OpenUsart(HAL_UsartDescriptor_t *descriptor) +{ + if (NULL == descriptor) + return -1; + + if (USART_CHANNEL_VCP != descriptor->tty) + return -1; + + if (NULL != vcpPointDescrip) + return -1; /* source was opened */ + + vcpPointDescrip = descriptor; + + vcpPointDescrip->service.rxPointOfRead = 0; + vcpPointDescrip->service.rxPointOfWrite = 0; + vcpControl.rxUnusedRemaining = vcpPointDescrip->rxBufferLength; + vcpPointDescrip->service.txPointOfRead = 0; + vcpPointDescrip->service.txPointOfWrite = 0; + HAL_RegisterEndOfBusResetHandler(usbBusResetAction); + if (DEVICE_POWERED != HAL_GetState()) + HAL_UsbInit((uint8_t *)&request); + + return (int)descriptor->tty; +} + +/****************************************************************************** +Frees the virtual uart channel. +Parameters: + descriptor - the uart descriptor. +Returns: + Returns 0 on success or -1 if bad descriptor. +******************************************************************************/ +int VCP_CloseUsart(HAL_UsartDescriptor_t *descriptor) +{ + if (NULL == descriptor) + return -1; + + if (vcpPointDescrip != descriptor) + return -1; + + vcpPointDescrip = NULL; + + return 0; +} + +/****************************************************************************** +Writes a number of bytes to a virtual uart channel. +txCallback function will be used to notify when the transmission is finished. +Parameters: + descriptor - pointer to HAL_UartDescriptor_t structure; + buffer - pointer to the application data buffer; + length - number of bytes to transfer; +Returns: + -1 - bad descriptor; + Number of bytes placed to the buffer - success. +******************************************************************************/ +int VCP_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint16_t copyPow = vcpPointDescrip->service.txPointOfWrite; + uint16_t copyPor = vcpPointDescrip->service.txPointOfRead; + uint16_t freePlace; + uint16_t wasWrote = 0; + + if (NULL == descriptor) + return -1; + + if (vcpPointDescrip != descriptor) + return -1; + + if (!buffer || !length) + return -1; + + if (NULL == descriptor->txBuffer) + { /* callback mode */ + if (STATUS_SUCCESS != HAL_UsbWrite(VCP_TRANSMIT_PIPE, buffer, length, vcpTmtCallback, NULL)) + return -1; // there is unsent data + return length; + } /* callback mode */ + else + { /* polling mode */ + if (copyPor > copyPow) + { + freePlace = copyPor - copyPow; + if (freePlace < length) + return -1; // there is unsent data + memcpy(&descriptor->txBuffer[copyPow], buffer, length); + HAL_UsbWrite(VCP_TRANSMIT_PIPE, buffer, length, vcpTmtCallback, NULL); + copyPow += length; + + } + else // point of write more or equal point of read + { + freePlace = descriptor->txBufferLength - copyPow + copyPor; + if (freePlace < length) + return -1; // there is unsent data + + uint16_t tempValue = descriptor->txBufferLength - copyPow; + if (length > tempValue) + { + memcpy(&descriptor->txBuffer[copyPow], buffer, tempValue); + HAL_UsbWrite(VCP_TRANSMIT_PIPE, buffer, tempValue, vcpTmtCallback, NULL); + buffer += tempValue; + length -= tempValue; + memcpy(descriptor->txBuffer, buffer, length); + copyPow = length; + } + else + { + memcpy(&descriptor->txBuffer[copyPow], buffer, length); + HAL_UsbWrite(VCP_TRANSMIT_PIPE, buffer, length, vcpTmtCallback, NULL); + copyPow += length; + } + } + + if (copyPow == descriptor->txBufferLength) + copyPow = 0; + vcpPointDescrip->service.txPointOfWrite = copyPow; + wasWrote = length; + + return wasWrote; + } /* polling mode */ +} + +/****************************************************************************** +Tuning of received buffer and enable received pipe if there is free place +in the buffer. +Parameters: + none; +Returns: + none. +******************************************************************************/ +void vcpEnableReadPipe(void) +{ + uint16_t copyPor = vcpPointDescrip->service.rxPointOfRead; + uint16_t copyPow = vcpPointDescrip->service.rxPointOfWrite; + uint16_t copyUnr = vcpControl.rxUnusedRemaining; + uint8_t usbResult = STATUS_SUCCESS; + + do + { + if (copyPor < copyPow) + { + if ((vcpPointDescrip->rxBufferLength - copyPow) < BULK_SIZE) + { + copyUnr = copyPow; + if (0 == copyPor) + { + usbResult = STATUS_BUSY; + break; + } + copyPow = 0; + } + else + { + usbResult = HAL_UsbRead(VCP_RECEIVE_PIPE, &vcpPointDescrip->rxBuffer[copyPow], BULK_SIZE, vcpRcvCallback, NULL); + break; + } + } + else + { + // empty buffer + if (copyPow == copyPor) + { + if ((vcpPointDescrip->rxBufferLength - copyPow) < BULK_SIZE) + { + copyUnr = vcpPointDescrip->rxBufferLength; + copyPor = 0; + copyPow = 0; + } + usbResult = HAL_UsbRead(VCP_RECEIVE_PIPE, &vcpPointDescrip->rxBuffer[copyPow], BULK_SIZE, vcpRcvCallback, NULL); + } // copyPor > copyPow + else + { + if ((copyPor - copyPow) >= BULK_SIZE) + usbResult = HAL_UsbRead(VCP_RECEIVE_PIPE, &vcpPointDescrip->rxBuffer[copyPow], BULK_SIZE, vcpRcvCallback, NULL); + else + usbResult = STATUS_BUSY; + } + break; + } + } while(1); + + if (STATUS_SUCCESS == usbResult) + { + vcpPointDescrip->service.rxPointOfRead = copyPor; + vcpPointDescrip->service.rxPointOfWrite = copyPow; + vcpControl.rxUnusedRemaining = copyUnr; + } +} + +/***************************************************************************** +Reads length bytes from uart and places ones to buffer. +Parameters: + descriptor - uart descriptor; + buffer - pointer to a application buffer; + length - the number of bytes which should be placed to buffer +Returns: + -1 - bad descriptor, bad number to read; + number of bytes that were placed to buffer. +*****************************************************************************/ +int VCP_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint16_t wasRead = 0; + uint16_t firstPart = 0; + uint16_t copyPor = vcpPointDescrip->service.rxPointOfRead; + uint16_t copyPow = vcpPointDescrip->service.rxPointOfWrite; + uint16_t copyUnr = vcpControl.rxUnusedRemaining; + + if (NULL == descriptor) + return -1; + + if (vcpPointDescrip != descriptor) + return -1; + + if (!buffer || !length) + return -1; + + do + { + // buffer is empty + if (copyPow == copyPor) + break; + + // [----**********---------] --- empty **** busy + // por pow + // [*****---------*******###] ### unused at the current moment + // pow por ur + // por - point of read(user read from buffer) + // pow - point of write(HAL write to buffer) + // ur - unused remaining(because remaining less then max packet size at the start read moment.) + if (copyPor < copyPow) + { + wasRead = copyPow - copyPor; + + if (wasRead > length) + { + wasRead = length; + memcpy(buffer, &vcpPointDescrip->rxBuffer[copyPor], wasRead); + copyPor += length; + } + else + { + memcpy(buffer, &vcpPointDescrip->rxBuffer[copyPor], wasRead); + copyPor = copyPow; + } + break; + } + else //copyPor > copyPow + { + if ((copyPor + length) < copyUnr) + { + wasRead = length; + memcpy(buffer, &vcpPointDescrip->rxBuffer[copyPor], wasRead); + copyPor += length; + break; + } + else + { + firstPart = copyUnr - copyPor; + memcpy(buffer, &vcpPointDescrip->rxBuffer[copyPor], firstPart); + buffer += firstPart; + length -= firstPart; + copyUnr = vcpPointDescrip->rxBufferLength; + copyPor = 0; + } + } + } while(1); + + vcpPointDescrip->service.rxPointOfRead = copyPor; + vcpPointDescrip->service.rxPointOfWrite = copyPow; + vcpControl.rxUnusedRemaining = copyUnr; + + vcpEnableReadPipe(); + wasRead += firstPart; + + return wasRead; +} + +/**************************************************************************//** +\brief Checks the status of tx buffer. + +\param[in] descriptor - pointer to HAL_UsartDescriptor_t structure; +\return -1 - bad descriptor, no tx buffer; \n + 1 - tx buffer is empty; \n + 0 - tx buffer is not empty; +******************************************************************************/ +int VCP_IsTxEmpty(HAL_UsartDescriptor_t *descriptor) +{ + HalUsartService_t *halUsartControl; + uint16_t copyPow; + uint16_t copyPor; + + if (NULL == descriptor) + return -1; + + if (vcpPointDescrip != descriptor) + return -1; + + halUsartControl = &descriptor->service; + copyPow = halUsartControl->txPointOfWrite; + copyPor = halUsartControl->txPointOfRead; + + if (copyPow == copyPor) + return 1; + else + return 0; +} + +// eof vcpVirtualUart.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbDescriptors.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbDescriptors.h new file mode 100644 index 00000000..6c07c4cb --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbDescriptors.h @@ -0,0 +1,184 @@ +/****************************************************************************//** + \file usbDescriptors.h + + \brief Declaration of descriptors structures. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 05/09/08 A. Khromykh - Created + 26/08/11 N. Fomin - Modified (MSD support) +*******************************************************************************/ +#ifndef _USBDESCRIPTORS_H +#define _USBDESCRIPTORS_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define VCP_INTERFACE_ENDPOINTS_NUMBER 2 +#define MSD_INTERFACE_ENDPOINTS_NUMBER 2 + +#define NUMBER_OF_FIRST_INTERFACE 0x00 +#define NUMBER_OF_SECOND_INTERFACE 0x01 +#define NUMBER_OF_THIRD_INTERFACE 0x02 +#define NUMBER_OF_FOURTH_INTERFACE 0x03 + +#define BULK_SIZE 0x0040 + +#define ADDRESS_MSC_BULKIN_PIPE 0x85 +#define ADDRESS_MSC_BULKOUT_PIPE 0x06 + +/****************************************************************************** + Types section +******************************************************************************/ +// USB standard device descriptor structure. +BEGIN_PACK +typedef struct PACK +{ + uint8_t bLength; // Size of this descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint16_t bcdUSB; // USB specification release number in BCD format + uint8_t bDeviceClass; // Device class code + uint8_t bDeviceSubClass; // Device subclass code + uint8_t bDeviceProtocol; // Device protocol code + uint8_t bMaxPacketSize0; // Maximum packet size of endpoint 0 (in bytes) + uint16_t idVendor; // Vendor ID + uint16_t idProduct; // Product ID + uint16_t bcdDevice; // Device release number in BCD format + uint8_t iManufacturer; // Index of the manufacturer string descriptor + uint8_t iProduct; // Index of the product string descriptor + uint8_t iSerialNumber; // Index of the serial number string descriptor + uint8_t bNumConfigurations; // Number of possible configurations for the device +} DeviceDescriptor_t; + +// USB standard configuration descriptor structure. +typedef struct PACK +{ + uint8_t bLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint16_t wTotalLength; // Length of all descriptors returned along with this configuration descriptor + uint8_t bNumInterfaces; // Number of interfaces in this configuration + uint8_t bConfigurationValue; // Value for selecting this configuration + uint8_t iConfiguration; // Index of the configuration string descriptor + uint8_t bmAttributes; // Configuration characteristics + uint8_t bMaxPower; // Maximum power consumption of the device when in this configuration +} ConfigurationDescriptor_t; + +// USB standard interface descriptor structure. +typedef struct PACK +{ + uint8_t bLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bInterfaceNumber; // Number of the interface in its configuration + uint8_t bAlternateSetting; // Value to select this alternate interface setting + uint8_t bNumEndpoints; // Number of endpoints used by the interface (excluding endpoint 0) + uint8_t bInterfaceClass; // Interface class code + uint8_t bInterfaceSubClass; // Interface subclass code + uint8_t bInterfaceProtocol; // Interface protocol code + uint8_t iInterface; // Index of the interface string descriptor +} InterfaceDescriptor_t; + +// USB header functional descriptor. +typedef struct PACK +{ + uint8_t bFunctionalLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bDescriptorSubtype; // Header functional descriptor subtype + uint16_t bcdCDC; // USB Class Definitions for Communication + // Devices Specification release number in binary-coded decimal. +} HeaderFunctionalDescriptor_t; + +// USB Abstract Control Management Functional Descriptor. +typedef struct PACK +{ + uint8_t bFunctionalLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bDescriptorSubtype; // ACM descriptor subtype + uint8_t bmCapabilities; // The capabilities that this configuration supports +} AbstractControlManagmentDescriptor_t; + +// USB Union Functional Descriptor. +typedef struct PACK +{ + uint8_t bFunctionalLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bDescriptorSubtype; // Union functional descriptor subtype + uint8_t bMasterInterface; // The interface number of the Communication or Data Class interface, designated as the master or controlling interface for the union + uint8_t bSlaveInterface0; // Interface number of first slave or associated interface in the union +} UnionFunctionalDescriptor_t; + +// USB Call Management Functional Descriptor. +typedef struct PACK +{ + uint8_t bFunctionalLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bDescriptorSubtype; // Union functional descriptor subtype + uint8_t bmCapabilities; // The capabilities that this configuration supports + uint8_t bDataInterface; // Interface number of Data Class interface optionally used for call management +} CallManagmentFunctionalDescriptor_t; + +// USB Interface Association Descriptor. +typedef struct PACK +{ + uint8_t bLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bFirstInterface; // Interface number of the first interface that is associated with this function + uint8_t bInterfaceCount; // Number of contiguous interfaces that are associated with this function + uint8_t bFunctionClass; // Class code + uint8_t bFunctionSubClass; // Subclass code + uint8_t bFunctionProtocol; // Protocol code + uint8_t iFunction; // Index of string descriptor describing this function +} InterfaceAssociationDescriptor_t; + +typedef struct PACK +{ + uint8_t bLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bmAttributes; // Descriptor attributes + uint16_t wDetachTimeOut; // Wait timeout of USB reset after DFU_DETACH request recieption + uint16_t wTransferSize; // Maximum number of bytes that the device can accept per control-write transaction + uint16_t bcdDFUVersion; // DFU Version +} DfuFunctionalDescriptor_t; + +// USB frame for interface request. +typedef struct PACK +{ + ConfigurationDescriptor_t config; +#if (APP_INTERFACE == APP_INTERFACE_VCP) +#if (MSD_SUPPORT == 1) || (DFU_SUPPORT == 1) + InterfaceAssociationDescriptor_t cdcIAD; +#endif // (MSD_SUPPORT == 1) || (DFU_SUPPORT == 1) + InterfaceDescriptor_t interface1; + HeaderFunctionalDescriptor_t headerFunctional; + CallManagmentFunctionalDescriptor_t cmFunctionak; + AbstractControlManagmentDescriptor_t acmFunctional; + UnionFunctionalDescriptor_t unionFunctional; + HAL_UsbEndPointDescptr_t endpointIfc1; + InterfaceDescriptor_t interface2; + HAL_UsbEndPointDescptr_t endpointIfc2[VCP_INTERFACE_ENDPOINTS_NUMBER]; +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) +#if (MSD_SUPPORT == 1) + InterfaceDescriptor_t interface3; + HAL_UsbEndPointDescptr_t endpointIfc3[MSD_INTERFACE_ENDPOINTS_NUMBER]; +#endif // (MSD_SUPPORT == 1) +#if (DFU_SUPPORT == 1) + InterfaceDescriptor_t interface4; + DfuFunctionalDescriptor_t dfuFuncional; +#endif // (MSD_SUPPORT == 1) +} ConfigurationFrameResponse_t; +END_PACK + +#endif /* _VCPDESCRIPTORS_H */ +// eof usbDescriptors.h \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbEnumeration.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbEnumeration.h new file mode 100644 index 00000000..8c04756b --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbEnumeration.h @@ -0,0 +1,53 @@ +/****************************************************************************//** + \file usbEnumeration.h + + \brief Declaration of enumeration process command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 12/09/08 A. Khromykh - Created + 26/08/11 N. Fomin - Modified (MSD support) +*******************************************************************************/ +#ifndef _USBENUMERATION_H +#define _USBENUMERATION_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Standard usb request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void runtimeRequestHandler(uint8_t *data); + +/****************************************************************************** +Standard usb request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void usbBusResetAction(void); + +#if defined(AT91SAM7X256) || defined(AT91SAM3S4C) +/****************************************************************************** +send zero-length packet through control pipe +******************************************************************************/ +void sendZLP(void); +#endif + +#endif /* _USBENUMERATION_H */ +// eof usbEnumeration.h \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbSetupProcess.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbSetupProcess.h new file mode 100644 index 00000000..f499a80e --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/include/usbSetupProcess.h @@ -0,0 +1,51 @@ +/****************************************************************************//** + \file usbSetupProcess.h + + \brief Declaration of setup (after numeration) process command. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 26/08/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _USBESETUPPROCESS_H +#define _USBESETUPPROCESS_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +BEGIN_PACK +// Usb host request +typedef struct PACK +{ + uint8_t bmRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} UsbRequest_t; +END_PACK +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Usb setup process request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void setupProcessRequestHandler(uint8_t *data); + +#endif /* _USBESETUPPROCESS_H */ +// eof usbSetupProcess.h \ No newline at end of file diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbDescriptors.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbDescriptors.c new file mode 100644 index 00000000..663beeee --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbDescriptors.c @@ -0,0 +1,424 @@ +/****************************************************************************//** + \file usbDescriptors.c + + \brief Virtual communication port descriptors. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 11/09/08 A. Khromykh - Created + 26/08/11 N. Fomin - Modified (MSD support) +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// Descriptor's type definitions. +#define DESCRIPTOR_TYPE_DEVICE 0x01 +#define DESCRIPTOR_TYPE_CONFIGURATION 0x02 +#define DESCRIPTOR_TYPE_STRING 0x03 +#define DESCRIPTOR_TYPE_INTERFACE 0x04 +#define DESCRIPTOR_TYPE_CS_INTERFACE 0x24 +#define DESCRIPTOR_TYPE_ENDPOINT 0x05 +#define DESCRIPTOR_TYPE_DEVICE_QUALIFIER 0x06 +#define DESCRIPTOR_TYPE_OTHER_SPEED_CFG 0x07 +#define DESCRIPTOR_TYPE_INTERFACE_POWER 0x08 +#define DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION 0x0B +#define DESCRIPTOR_TYPE_DFU_FUNCTIONAL 0x21 + +// String definitions' indexes. +#define MANUFACTURER_STRING_INDEX 0 +#define PRODUCT_STRING_INDEX 0 +#define SERIAL_NUMBER_STRING_INDEX 0 +#define CONFIGURATION_STRING_INDEX 0 +#define FIRST_INTERFACE_STRING_INDEX 0 +#define SECOND_INTERFACE_STRING_INDEX 0 +#define THIRD_INTERFACE_STRING_INDEX 0 +#define FOURTH_INTERFACE_STRING_INDEX 0 + +#define VENDOR_ID 0x03EB // Atmel +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #define PRODUCT_ID 0x6122 + #else + #define PRODUCT_ID 0x6121 + #endif // (DFU_SUPPORT == 1) + #else // (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #define PRODUCT_ID 0x6120 + #else + #define PRODUCT_ID 0x6119 + #endif // (DFU_SUPPORT == 1) + #endif // (MSD_SUPPORT == 1) +#else // (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #define PRODUCT_ID 0x6124 + #else + #define PRODUCT_ID 0x6123 + #endif // (DFU_SUPPORT == 1) + #else // (MSD_SUPPORT == 1) + #define PRODUCT_ID 0x6119 + #endif // (MSD_SUPPORT == 1) +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) + +#define DEVICE_RELEASE 0x0001 +#define USB_BUS_RELEASE 0x0200 + +// Number of possible configurations for the device. +#define NUMBER_OF_CONFIGURATIONS 0x01 + +// Class specification parameters of communication device. +#define CDC_DEVICE_CLASS 0x02 +#define CDC_DEVICE_SUBCLASS 0x00 +#define CDC_DEVICE_PROTOCOL 0x00 + +// Class specification parameters of mass storage device. +#define MSC_DEVICE_CLASS 0x00 +#define MSC_DEVICE_SUBCLASS 0x00 +#define MSC_DEVICE_PROTOCOL 0x00 + +// Class specification parameters of composite device with CDC. +#define COMB_DEVICE_CLASS 0xef +#define COMB_DEVICE_SUBCLASS 0x02 +#define COMB_DEVICE_PROTOCOL 0x01 + +// Endpoint definitions' sizes. +#if defined(AT91SAM7X256) + #define SZ_CONTROL_ENDPOINT 0x08 // endpoint 0 is control pipe +#elif defined(AT90USB1287) || defined(AT91SAM3S4C) + #define SZ_CONTROL_ENDPOINT 0x40 // endpoint 0 is control pipe +#endif +#define SZ_ACM_INT_ENDPOINT 0x0008 // endpoint 3 is interrupt pipe for abstraction control model +#define SZ_CDC_BULKIN_ENDPOINT BULK_SIZE // endpoint 2 is bulk pipe for input communication data +#define SZ_CDC_BULKOUT_ENDPOINT BULK_SIZE // endpoint 1 is bulk pipe for output communication data +#define SZ_MSC_BULKIN_ENDPOINT BULK_SIZE // endpoint 2 is bulk pipe for input communication data +#define SZ_MSC_BULKOUT_ENDPOINT BULK_SIZE // endpoint 1 is bulk pipe for output communication data + +// Configuration descriptor parameters. +// Common size of all descriptors in the vcp configuration besides configuration descriptor +#define COMMON_VCP_CFG_SIZE (sizeof(InterfaceDescriptor_t) + \ + sizeof(HeaderFunctionalDescriptor_t) + \ + sizeof(CallManagmentFunctionalDescriptor_t) + \ + sizeof(AbstractControlManagmentDescriptor_t) + \ + sizeof(UnionFunctionalDescriptor_t) + \ + sizeof(HAL_UsbEndPointDescptr_t) + \ + sizeof(InterfaceDescriptor_t) + \ + sizeof(HAL_UsbEndPointDescptr_t) + \ + sizeof(HAL_UsbEndPointDescptr_t)) +// Common size of all descriptors in the msd configuration besides configuration descriptor +#define COMMON_MSD_CFG_SIZE (sizeof(InterfaceDescriptor_t) + \ + sizeof(HAL_UsbEndPointDescptr_t) + \ + sizeof(HAL_UsbEndPointDescptr_t)) +// Commom size of all descriptors for DFU besides configuration descriptor +#define COMMON_DFU_CFG_SIZE (sizeof(InterfaceDescriptor_t) + \ + sizeof(DfuFunctionalDescriptor_t)) + +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #define CFG_SIZE (COMMON_DFU_CFG_SIZE + COMMON_MSD_CFG_SIZE + COMMON_VCP_CFG_SIZE + sizeof(ConfigurationDescriptor_t) + \ + sizeof(InterfaceAssociationDescriptor_t)) + #else // (DFU_SUPPORT == 1) + #define CFG_SIZE (COMMON_MSD_CFG_SIZE + COMMON_VCP_CFG_SIZE + sizeof(ConfigurationDescriptor_t) + \ + sizeof(InterfaceAssociationDescriptor_t)) + #endif // (DFU_SUPPORT == 1) + #else // (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #define CFG_SIZE (COMMON_DFU_CFG_SIZE + COMMON_VCP_CFG_SIZE + sizeof(ConfigurationDescriptor_t) + \ + sizeof(InterfaceAssociationDescriptor_t)) + #else // (DFU_SUPPORT == 1) + #define CFG_SIZE (COMMON_VCP_CFG_SIZE + sizeof(ConfigurationDescriptor_t)) + #endif // (DFU_SUPPORT == 1) + #endif +#else // (APP_INTERFACE == APP_INTERFACE_VCP) + #if (DFU_SUPPORT == 1) + #define CFG_SIZE (COMMON_DFU_CFG_SIZE + COMMON_MSD_CFG_SIZE + sizeof(ConfigurationDescriptor_t)) + #else // (DFU_SUPPORT == 1) + #define CFG_SIZE (COMMON_MSD_CFG_SIZE + sizeof(ConfigurationDescriptor_t)) + #endif // (DFU_SUPPORT == 1) +#endif + +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #define NUMBER_OF_INTERFACES 0x04 + #else + #define NUMBER_OF_INTERFACES 0x03 + #endif + #else + #define NUMBER_OF_INTERFACES 0x02 + #endif +#else + #if (DFU_SUPPORT == 1) + #define NUMBER_OF_INTERFACES 0x02 + #else + #define NUMBER_OF_INTERFACES 0x01 + #endif +#endif + +#define CFG_SELECTING_VALUE 0x01 +#define CFG_CHARACTERISTICS 0x80 // D7 is reserved and must be set to one for historical reasons. +#define MAXIMUM_POWER_CONSUMPTION 0x32 // Step is 2 mA. + +// Parameters for interfaces descriptors +#define ALTERNATIVE_SETTING 0x00 +#define NUMBER_USING_ENDPOINTS_FIRST_IFC 0x01 +#define NUMBER_USING_ENDPOINTS_SECOND_IFC 0x02 +#define NUMBER_USING_ENDPOINTS_THIRD_IFC 0x02 +#define NUMBER_USING_ENDPOINTS_FOURTH_IFC 0x00 +#define FIRST_IFC_CLASS 0x02 +#define FIRST_IFC_SUBCLASS 0x02 +#define FIRST_IFC_PROTOCOL 0x00 +#define SECOND_IFC_CLASS 0x0A +#define SECOND_IFC_SUBCLASS 0x00 +#define SECOND_IFC_PROTOCOL 0x00 +#define THIRD_IFC_CLASS 0x08 +#define THIRD_IFC_SUBCLASS 0x06 +#define THIRD_IFC_PROTOCOL 0x50 +#define FOURTH_IFC_CLASS 0xFE +#define FOURTH_IFC_SUBCLASS 0x01 +#define FOURTH_IFC_PROTOCOL 0x01 + +// Header descriptor parameters. +#define HEADER_SUBTYPE 0x00 +#define CDC_CLASS_DEFINITION 0x0110 + +// call management functional descriptor parameters. +#define CALL_MNGMT_SUBTYPE 0x01 +#define CALL_MNGMT_CAPABILITIES 0x01 // See cdc specification. +#define NUMBER_OF_CALL_MNGMT 0x00 + +// abstract control management functional descriptor parameters. +#define ACM_SUBTYPE 0x02 +#define ACM_CAPABILITIES 0x02 // see cdc specification + +// Union functional descriptor parameters. +#define UNION_SUBTYPE 0x06 +#define MASTER_IFC_TYPE 0x00 +#define SLAVE0_IFC_TYPE 0x01 + +// Endpoints descriptor parameters. +#define ADDRESS_CDC_INTERRUPT_PIPE 0x83 +#define ADDRESS_CDC_BULKIN_PIPE 0x82 +#define ADDRESS_CDC_BULKOUT_PIPE 0x01 +#define INTERRUPT_TYPE_PIPE 0x03 +#define BULK_TYPE_PIPE 0x02 +#define INTERRUPT_PIPE_POLLING 0x0A // step is 1 ms +#define BULK_MAX_SPEED 0x00 + +// dfu functional descriptor parameters +#define DFU_ATTRIBUTES 0x01 +#define DFU_DETACH_TIMEOUT 0xFFFF +#define DFU_TRANSFER_SIZE SZ_CONTROL_ENDPOINT +#define DFU_VERSION 0x0101 + +/****************************************************************************** + Constants section +******************************************************************************/ +const DeviceDescriptor_t deviceDescr = { + sizeof(DeviceDescriptor_t), // Size of this descriptor in bytes + DESCRIPTOR_TYPE_DEVICE, // Descriptor type + USB_BUS_RELEASE, // USB specification release number in BCD format +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT != 1) && (DFU_SUPPORT != 1) + CDC_DEVICE_CLASS, // Device class code + CDC_DEVICE_SUBCLASS, // Device subclass code + CDC_DEVICE_PROTOCOL, // Device protocol code + #else // (MSD_SUPPORT != 1) && (DFU_SUPPORT != 1) + COMB_DEVICE_CLASS, // Device class code + COMB_DEVICE_SUBCLASS, // Device subclass code + COMB_DEVICE_PROTOCOL, // Device protocol code + #endif // (MSD_SUPPORT != 1) && (DFU_SUPPORT != 1) +#else // (APP_INTERFACE == APP_INTERFACE_VCP) + MSC_DEVICE_CLASS, // Device class code + MSC_DEVICE_SUBCLASS, // Device subclass code + MSC_DEVICE_PROTOCOL, // Device protocol code +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) + SZ_CONTROL_ENDPOINT, // Maximum packet size of endpoint 0 (in bytes) + VENDOR_ID, // Vendor ID + PRODUCT_ID, // Product ID + DEVICE_RELEASE, // Device release number in BCD format + MANUFACTURER_STRING_INDEX, // Index of the manufacturer string descriptor + PRODUCT_STRING_INDEX, // Index of the product string descriptor + SERIAL_NUMBER_STRING_INDEX, // Index of the serial number string descriptor + NUMBER_OF_CONFIGURATIONS // Number of possible configurations for the device +}; + +const ConfigurationFrameResponse_t usbConfigDescr = { + { // configuration + sizeof(ConfigurationDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_CONFIGURATION, // Descriptor type + CFG_SIZE, // Length of all descriptors returned along with this configuration descriptor + NUMBER_OF_INTERFACES, // Number of interfaces in this configuration + CFG_SELECTING_VALUE, // Value for selecting this configuration + CONFIGURATION_STRING_INDEX, // Index of the configuration string descriptor + CFG_CHARACTERISTICS, // Configuration characteristics + MAXIMUM_POWER_CONSUMPTION // Maximum power consumption of the device when in this configuration + }, +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) || (DFU_SUPPORT == 1) + { // cdcIAD + sizeof(InterfaceAssociationDescriptor_t), // Size of this descriptor in bytes + DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION, // Descriptor type + NUMBER_OF_FIRST_INTERFACE, // Interface number of the first interface that is associated with this function + 2, // Number of contiguous interfaces that are associated with this function + CDC_DEVICE_CLASS, // Class code + CDC_DEVICE_SUBCLASS, // Subclass code + CDC_DEVICE_PROTOCOL, // Protocol code + FIRST_INTERFACE_STRING_INDEX //Index of string descriptor describing this function + }, + #endif // (MSD_SUPPORT == 1) || (DFU_SUPPORT == 1) + { // interface 1 + sizeof(InterfaceDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_INTERFACE, // Descriptor type + NUMBER_OF_FIRST_INTERFACE, // Number of the interface in its configuration + ALTERNATIVE_SETTING, // Value to select this alternate interface setting + NUMBER_USING_ENDPOINTS_FIRST_IFC, // Number of endpoints used by the interface (excluding endpoint 0) + FIRST_IFC_CLASS, // Interface class code + FIRST_IFC_SUBCLASS, // Interface subclass code + FIRST_IFC_PROTOCOL, // Interface protocol code + FIRST_INTERFACE_STRING_INDEX // Index of the interface string descriptor + }, + { // header functional descriptor + sizeof(HeaderFunctionalDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_CS_INTERFACE, // Descriptor type + HEADER_SUBTYPE, // Header functional descriptor subtype + CDC_CLASS_DEFINITION // USB Class Definitions for Communication + }, + { // Call Management Functional Descriptor + sizeof(CallManagmentFunctionalDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_CS_INTERFACE, // Descriptor type + CALL_MNGMT_SUBTYPE, // bDescriptor subtype: Call Management Func + CALL_MNGMT_CAPABILITIES, // bmCapabilities: D1 + D0 + NUMBER_OF_CALL_MNGMT // bDataInterface: Data Class Interface 1 + }, + { // Abstract Control Management Functional Descriptor + sizeof(AbstractControlManagmentDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_CS_INTERFACE, // Descriptor type + ACM_SUBTYPE, // Abstract Control Management Functional descriptor subtype + ACM_CAPABILITIES // bmCapabilities: see cdc specification (support command type) + }, + { // Union Functional Descriptor + sizeof(UnionFunctionalDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_CS_INTERFACE, // Descriptor type + UNION_SUBTYPE, // Union Functional descriptor subtype + MASTER_IFC_TYPE, // bMasterInterface: CDC Interface + SLAVE0_IFC_TYPE // bSlaveInterface0: Data Class Interface + }, + { // endpoint 3 + sizeof(HAL_UsbEndPointDescptr_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_ENDPOINT, // Descriptor type + ADDRESS_CDC_INTERRUPT_PIPE, // Address and direction of the endpoint + INTERRUPT_TYPE_PIPE, // Endpoint type and additional characteristics (for isochronous endpoints) + SZ_ACM_INT_ENDPOINT, // Maximum packet size (in bytes) of the endpoint + INTERRUPT_PIPE_POLLING // Polling rate of the endpoint + }, + { // interface 2 + sizeof(InterfaceDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_INTERFACE, // Descriptor type + NUMBER_OF_SECOND_INTERFACE, // Number of the interface in its configuration + ALTERNATIVE_SETTING, // Value to select this alternate interface setting + NUMBER_USING_ENDPOINTS_SECOND_IFC, // Number of endpoints used by the interface (excluding endpoint 0) + SECOND_IFC_CLASS, // Interface class code + SECOND_IFC_SUBCLASS, // Interface subclass code + SECOND_IFC_PROTOCOL, // Interface protocol code + SECOND_INTERFACE_STRING_INDEX // Index of the interface string descriptor + }, + {{ // endpoint 1 + sizeof(HAL_UsbEndPointDescptr_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_ENDPOINT, // Descriptor type + ADDRESS_CDC_BULKOUT_PIPE, // Address and direction of the endpoint + BULK_TYPE_PIPE, // Endpoint type and additional characteristics (for isochronous endpoints) + SZ_CDC_BULKOUT_ENDPOINT, // Maximum packet size (in bytes) of the endpoint + BULK_MAX_SPEED // Polling rate of the endpoint + }, + { // endpoint 2 + sizeof(HAL_UsbEndPointDescptr_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_ENDPOINT, // Descriptor type + ADDRESS_CDC_BULKIN_PIPE, // Address and direction of the endpoint + BULK_TYPE_PIPE, // Endpoint type and additional characteristics (for isochronous endpoints) + SZ_CDC_BULKIN_ENDPOINT, // Maximum packet size (in bytes) of the endpoint + BULK_MAX_SPEED // Polling rate of the endpoint + }}, +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) +#if (MSD_SUPPORT == 1) + { // interface 3 + sizeof(InterfaceDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_INTERFACE, // Descriptor type +#if (APP_INTERFACE == APP_INTERFACE_VCP) + NUMBER_OF_THIRD_INTERFACE, // Number of the interface in its configuration +#else + NUMBER_OF_FIRST_INTERFACE, // Number of the interface in its configuration +#endif + ALTERNATIVE_SETTING, // Value to select this alternate interface setting + NUMBER_USING_ENDPOINTS_THIRD_IFC, // Number of endpoints used by the interface (excluding endpoint 0) + THIRD_IFC_CLASS, // Interface class code + THIRD_IFC_SUBCLASS, // Interface subclass code + THIRD_IFC_PROTOCOL, // Interface protocol code + THIRD_INTERFACE_STRING_INDEX // Index of the interface string descriptor + }, + {{ // endpoint 6 + sizeof(HAL_UsbEndPointDescptr_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_ENDPOINT, // Descriptor type + ADDRESS_MSC_BULKOUT_PIPE, // Address and direction of the endpoint + BULK_TYPE_PIPE, // Endpoint type and additional characteristics (for isochronous endpoints) + SZ_MSC_BULKOUT_ENDPOINT, // Maximum packet size (in bytes) of the endpoint + BULK_MAX_SPEED // Polling rate of the endpoint + }, + { // endpoint 5 + sizeof(HAL_UsbEndPointDescptr_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_ENDPOINT, // Descriptor type + ADDRESS_MSC_BULKIN_PIPE, // Address and direction of the endpoint + BULK_TYPE_PIPE, // Endpoint type and additional characteristics (for isochronous endpoints) + SZ_MSC_BULKIN_ENDPOINT, // Maximum packet size (in bytes) of the endpoint + BULK_MAX_SPEED // Polling rate of the endpoint + }}, +#endif // (MSD_SUPPORT == 1) +#if (DFU_SUPPORT == 1) + { // interface 4 + sizeof(InterfaceDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_INTERFACE, // Descriptor type +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + NUMBER_OF_FOURTH_INTERFACE, // Number of the interface in its configuration + #else + NUMBER_OF_THIRD_INTERFACE, // Number of the interface in its configuration + #endif // (MSD_SUPPORT == 1) +#else + #if (MSD_SUPPORT == 1) + NUMBER_OF_SECOND_INTERFACE, // Number of the interface in its configuration + #else + #error + #endif // (MSD_SUPPORT == 1) +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) + ALTERNATIVE_SETTING, // Value to select this alternate interface setting + NUMBER_USING_ENDPOINTS_FOURTH_IFC, // Number of endpoints used by the interface (excluding endpoint 0) + FOURTH_IFC_CLASS, // Interface class code + FOURTH_IFC_SUBCLASS, // Interface subclass code + FOURTH_IFC_PROTOCOL, // Interface protocol code + FOURTH_INTERFACE_STRING_INDEX // Index of the interface string descriptor + }, + { // Functional descriptor + sizeof(DfuFunctionalDescriptor_t), // Size of the descriptor in bytes + DESCRIPTOR_TYPE_DFU_FUNCTIONAL, // Descriptor type + DFU_ATTRIBUTES, // Descriptor attributes + DFU_DETACH_TIMEOUT, // Wait timeout of USB reset after DFU_DETACH request recieption + DFU_TRANSFER_SIZE, // Maximum number of bytes that the device can accept per control-write transaction + DFU_VERSION // DFU Version + } +#endif // (DFU_SUPPORT == 1) +}; + +// eof usbDescriptors.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbEnumeration.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbEnumeration.c new file mode 100644 index 00000000..f430b08d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbEnumeration.c @@ -0,0 +1,231 @@ +/****************************************************************************//** + \file usbEnumeration.c + + \brief Implementation of enumeration proccess. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 11/09/08 A. Khromykh - Created + 26/08/11 N. Fomin - Modified (MSD support) +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #include +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) +#if (MSD_SUPPORT == 1) + #include +#endif // (MSD_SUPPORT == 1) +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// request codes for runtime work +#define USB_GET_STATUS 0 +#define USB_CLEAR_FEATURE 1 +#define USB_SET_FEATURE 3 +#define USB_SET_ADDRESS 5 +#define USB_GET_DESCRIPTOR 6 +#define USB_SET_DESCRIPTOR 7 +#define USB_GET_CONFIGURATION 8 +#define USB_SET_CONFIGURATION 9 +#define USB_GET_INTERFACE 10 +#define USB_SET_INTERFACE 11 +#define USB_SYNCH_FRAME 12 + +// Descriptor type definitions. +#define DESCRIPTOR_TYPE_DEVICE 0x01 +#define DESCRIPTOR_TYPE_CONFIGURATION 0x02 +#define DESCRIPTOR_TYPE_STRING 0x03 +#define DESCRIPTOR_TYPE_INTERFACE 0x04 +#define DESCRIPTOR_TYPE_CS_INTERFACE 0x24 +#define DESCRIPTOR_TYPE_ENDPOINT 0x05 +#define DESCRIPTOR_TYPE_DEVICE_QUALIFIER 0x06 +#define DESCRIPTOR_TYPE_OTHER_SPEED_CFG 0x07 +#define DESCRIPTOR_TYPE_INTERFACE_POWER 0x08 + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern const ConfigurationFrameResponse_t usbConfigDescr; +extern const DeviceDescriptor_t deviceDescr; +#if (APP_INTERFACE == APP_INTERFACE_VCP) + extern HAL_UsartDescriptor_t *vcpPointDescrip; +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) +#if (MSD_SUPPORT == 1) + extern HAL_HsmciDescriptor_t *msdPointDescr; +#endif // (MSD_SUPPORT == 1) + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +usb bulk out receiving callbacks + +Parameters: + pArg - argument + status - index of the requested descriptor + length - maximum number of bytes to return +******************************************************************************/ +void vcpRcvCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining); +void msdRcvCallback(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining); + +/****************************************************************************** + Global variables section +******************************************************************************/ +// virtual communication port address on usb +static uint16_t usbAddress = 0; + +/****************************************************************************** + Implementations section +******************************************************************************/ +#if defined(AT91SAM7X256) || defined(AT91SAM3S4C) +/****************************************************************************** +send zero-length packet through control pipe +******************************************************************************/ +void sendZLP(void) +{ + // Acknowledge the request + HAL_UsbWrite(0, NULL, 0, NULL, NULL); +} +#endif + +/****************************************************************************** +Configures the device by setting it into the Configured state. + +Parameters: + cfgnum - configuration number to set +******************************************************************************/ +void runtimeSetConfiguration(uint8_t cfgnum) +{ + // Set & save the desired configuration + HAL_SetConfiguration(cfgnum); + + #if defined(AT91SAM7X256) || defined(AT91SAM3S4C) + // Acknowledge the request + sendZLP(); + #endif +} + +/****************************************************************************** +runtime get descriptor command handler + +Parameters: + type - type of the requested descriptor + index - index of the requested descriptor + length - maximum number of bytes to return +******************************************************************************/ +void runtimeGetDescriptorHandler(uint8_t type, uint8_t index, uint16_t length) +{ + (void)index; + + // Check the descriptor type + switch (type) + { + case DESCRIPTOR_TYPE_DEVICE: + // Adjust length and send descriptor + if (length > deviceDescr.bLength) + length = deviceDescr.bLength; + HAL_UsbWrite(0, (void *)&deviceDescr, length, 0, 0); + break; + case DESCRIPTOR_TYPE_CONFIGURATION: + // Adjust length and send descriptor + if (length > usbConfigDescr.config.wTotalLength) + length = usbConfigDescr.config.wTotalLength; + HAL_UsbWrite(0, (void *)&usbConfigDescr, length, 0, 0); + break; + case DESCRIPTOR_TYPE_INTERFACE: + HAL_Stall(0); + break; + case DESCRIPTOR_TYPE_DEVICE_QUALIFIER: + HAL_Stall(0); + break; + case DESCRIPTOR_TYPE_OTHER_SPEED_CFG: + HAL_Stall(0); + break; + case DESCRIPTOR_TYPE_ENDPOINT: + HAL_Stall(0); + break; + case DESCRIPTOR_TYPE_STRING: + HAL_Stall(0); + break; + default: + HAL_Stall(0); + break; + } +} + +/****************************************************************************** +Standard usb request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void runtimeRequestHandler(uint8_t *data) +{ + UsbRequest_t *pRequest = NULL; + + pRequest = (UsbRequest_t *)data; + if (NULL == pRequest) + return; + + // Check request code + switch (pRequest->bRequest) + { + case USB_GET_DESCRIPTOR: + // Send the requested descriptor + runtimeGetDescriptorHandler((uint8_t)(pRequest->wValue >> 8), (uint8_t)(pRequest->wValue), pRequest->wLength); + break; + case USB_SET_ADDRESS: + usbAddress = pRequest->wValue & 0x7F; + #if defined(AT91SAM7X256) || defined(AT91SAM3S4C) + HAL_UsbWrite(0, 0, 0, (TransferCallback_t) HAL_SetAddress, (void *)&usbAddress); + #elif defined(AT90USB1287) + HAL_SetAddress((uint8_t *)&usbAddress); + #endif + break; + case USB_SET_CONFIGURATION: + // Set the requested configuration + runtimeSetConfiguration((uint8_t)pRequest->wValue); + #if (APP_INTERFACE == APP_INTERFACE_VCP) + HAL_ConfigureEndpoint((void *)&(usbConfigDescr.endpointIfc1)); + HAL_ConfigureEndpoint((void *)&(usbConfigDescr.endpointIfc2[0])); + HAL_ConfigureEndpoint((void *)&(usbConfigDescr.endpointIfc2[1])); + HAL_UsbRead(VCP_RECEIVE_PIPE, vcpPointDescrip->rxBuffer, BULK_SIZE, vcpRcvCallback, NULL); + #endif // (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + HAL_ConfigureEndpoint((void *)&(usbConfigDescr.endpointIfc3[0])); + HAL_ConfigureEndpoint((void *)&(usbConfigDescr.endpointIfc3[1])); + HAL_UsbRead(MSD_RECEIVE_PIPE, msdPointDescr->dataTransferDescriptor->buffer, BULK_SIZE, msdRcvCallback, NULL); + #endif // (MSD_SUPPORT == 1) + break; + default: + setupProcessRequestHandler(data); + break; + } +} + +/****************************************************************************** +Standard usb request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void usbBusResetAction(void) +{ + HAL_RegisterRequestHandler(runtimeRequestHandler); +} + +// eof usbEnumeration.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbSetupProcess.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbSetupProcess.c new file mode 100644 index 00000000..2a3b305e --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBClasses/common/src/usbSetupProcess.c @@ -0,0 +1,90 @@ +/****************************************************************************//** + \file usbSetupProcess.c + + \brief Implementation of setup (after numeration) proccess. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 26/08/11 N. Fomin - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#if (APP_INTERFACE == APP_INTERFACE_VCP) + #include + #if (MSD_SUPPORT == 1) + #include + #endif // (MSD_SUPPORT == 1) +#else + #if (MSD_SUPPORT == 1) + #include + #else + #include + #endif // (MSD_SUPPORT == 1) +#endif // (APP_INTERFACE == APP_INTERFACE_VCP) +#if (DFU_SUPPORT == 1) + #include + #if (APP_INTERFACE != APP_INTERFACE_VCP) && (MSD_SUPPORT != 1) + #error + #endif // (APP_INTERFACE != APP_INTERFACE_VCP) || (MSD_SUPPORT != 1) +#endif // (DFU_SUPPORT == 1) + +/****************************************************************************** +Usb setup process request handler + +Parameters: + data - pointer to host's request +******************************************************************************/ +void setupProcessRequestHandler(uint8_t *data) +{ + UsbRequest_t *pRequest = NULL; + + pRequest = (UsbRequest_t *)data; + if (NULL == pRequest) + return; + + switch (pRequest->wIndex) + { + #if (APP_INTERFACE == APP_INTERFACE_VCP) + case NUMBER_OF_FIRST_INTERFACE: + vcpRequestHandler(data); + break; + #endif // (APP_INTERFACE == APP_INTERFACE_VCP) + /* MSC commands */ + #if (MSD_SUPPORT == 1) + #if (APP_INTERFACE == APP_INTERFACE_VCP) + case NUMBER_OF_THIRD_INTERFACE: + #else + case NUMBER_OF_FIRST_INTERFACE: + #endif + msdRequestHandler(data); + break; + #endif // (MSD_SUPPORT == 1) + #if (DFU_SUPPORT == 1) + #if (APP_INTERFACE == APP_INTERFACE_VCP) + #if (MSD_SUPPORT == 1) + case NUMBER_OF_FOURTH_INTERFACE: + #else + case NUMBER_OF_THIRD_INTERFACE: + #endif + #else + case NUMBER_OF_SECOND_INTERFACE: + #endif // (APP_INTERFACE == APP_INTERFACE_VCP) + dfuRequestHandler(data); + break; + #endif // (DFU_SUPPORT == 1) + default: + HAL_Stall(0); + break; + } +} + +// eof usbSetupProcess.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/include/usbFifoVirtualUsart.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/include/usbFifoVirtualUsart.h new file mode 100644 index 00000000..7b000818 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/include/usbFifoVirtualUsart.h @@ -0,0 +1,69 @@ +/**************************************************************************//** +\file usbFifoVirtualUsart.h + +\brief The declaration of interfunction interface. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 15.07.11 A. Khromykh - Created +*******************************************************************************/ +#ifndef _USBFIFOVIRTUALUSART_H +#define _USBFIFOVIRTUALUSART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +#if defined(ATMEGA128RFA1) + +// the macros for the manipulation by PC6 for binary decoder +HAL_ASSIGN_PIN(PC6, D, 6); +// the macros for the manipulation by PC7 for binary decoder +HAL_ASSIGN_PIN(PC7, D, 7); +// the macros for the manipulation by RD +HAL_ASSIGN_PIN(RD, E, 5); +// the macros for the manipulation by WR +HAL_ASSIGN_PIN(WR, E, 4); + +#elif defined(ATMEGA1281) || defined(ATMEGA2561) + +// the macros for the manipulation by PC6 for binary decoder +HAL_ASSIGN_PIN(PC6, C, 6); +// the macros for the manipulation by PC7 for binary decoder +HAL_ASSIGN_PIN(PC7, C, 7); +// the macros for the manipulation by RD +HAL_ASSIGN_PIN(RD, G, 1); +// the macros for the manipulation by WR +HAL_ASSIGN_PIN(WR, G, 0); + +#else + #error 'USB FIFO is not supported for this mcu.' +#endif + +/**************************************************************************//** +\brief Startup initialization. +******************************************************************************/ +void usbfifoInit(void); + +/**************************************************************************//** +\brief Clear startup initialization parameters +******************************************************************************/ +void usbfifoUnInit(void); + +/**************************************************************************//** +\brief USB FIFO driver task handler. +******************************************************************************/ +void usbfifoHandler(void); + +#endif /* _USBFIFOVIRTUALUSART_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoFT245RL.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoFT245RL.c new file mode 100644 index 00000000..8ba0d9c5 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoFT245RL.c @@ -0,0 +1,290 @@ +/**************************************************************************//** +\file usbFifoFT245RL.c + +\brief Implementation of FT245RL driver. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 12.07.11 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(ATMEGA128RFA1) +// data port +#define USB_DATA_PORT PORTB +#define USB_DATA_DDR DDRB +#define USB_DATA_PIN PINB + +#elif defined(ATMEGA1281) || defined(ATMEGA2561) +// data port +#define USB_DATA_PORT PORTA +#define USB_DATA_DDR DDRA +#define USB_DATA_PIN PINA + +#endif + +#define HANDLERS_GET(A, I) memcpy_P(A, &usbfifoHandlers[I], sizeof(UsbfifoTask_t)) + +/****************************************************************************** + Types section +******************************************************************************/ +typedef volatile uint8_t UsbfifoTaskBitMask_t; +typedef void (* UsbfifoTask_t)(void); + +// USB FIFO task IDs. +typedef enum +{ + USB_FIFO_TASK_RX, + USB_FIFO_TASK_TX, + USB_FIFO_TASKS_NUMBER +} UsbfifoTaskId_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +static void usbfifoRxBufferFiller(void); +static void usbfifoTxBufferCleaner(void); +static void usbfifoPostTask(UsbfifoTaskId_t taskId); +static void usbfifoTxComplete(void); +static void usbfifoRxComplete(void); + +/****************************************************************************** + External global variables section +******************************************************************************/ +// pointer to application uart descriptor +extern HAL_UsartDescriptor_t *usbfifoPointDescrip; + +/****************************************************************************** + Global variables section +******************************************************************************/ +static volatile UsbfifoTaskBitMask_t usbfifoTaskBitMask = 0; // USB FIFO tasks' bit mask. +static const UsbfifoTask_t PROGMEM_DECLARE(usbfifoHandlers[USB_FIFO_TASKS_NUMBER]) = +{ + usbfifoRxComplete, + usbfifoTxComplete +}; // List Of possible USB FIFO tasks. + +/****************************************************************************** + Implementations section +******************************************************************************/ +/**************************************************************************//** +\brief Startup initialization. +******************************************************************************/ +void usbfifoInit(void) +{ + // init decoder input pins + GPIO_PC6_make_out(); + GPIO_PC7_make_out(); + // set pins to zero to select usb FIFO + GPIO_PC6_clr(); + GPIO_PC7_clr(); + + // setup default value + GPIO_RD_set(); + GPIO_WR_set(); + // init R\W pins + GPIO_RD_make_out(); + GPIO_WR_make_out(); + + // register RXF interrupt + HAL_RegisterIrq(IRQ_7, IRQ_LOW_LEVEL, usbfifoRxBufferFiller); + // register TXE interrupt + HAL_RegisterIrq(IRQ_6, IRQ_LOW_LEVEL, usbfifoTxBufferCleaner); + + USB_DATA_DDR = 0; +} + +/**************************************************************************//** +\brief Clear startup initialization parameters +******************************************************************************/ +void usbfifoUnInit(void) +{ + GPIO_PC6_make_in(); + GPIO_PC7_make_in(); + + GPIO_RD_make_in(); + GPIO_WR_make_in(); + + HAL_DisableIrq(IRQ_7); + HAL_UnregisterIrq(IRQ_7); + + HAL_DisableIrq(IRQ_6); + HAL_UnregisterIrq(IRQ_6); +} + +/**************************************************************************//** +\brief Puts the byte received to the cyclic buffer. +******************************************************************************/ +static void usbfifoRxBufferFiller(void) +{ + uint16_t old; + uint16_t poW; + uint16_t poR; + uint8_t *buffer; + HalUsartService_t *control; + + if (!usbfifoPointDescrip) + { // unregistered intrrupt is occurred + HAL_DisableIrq(IRQ_7); + return; + } + + control = &usbfifoPointDescrip->service; + poW = control->rxPointOfWrite; + poR = control->rxPointOfRead; + buffer = usbfifoPointDescrip->rxBuffer; + + if (!buffer) + { + HAL_DisableIrq(IRQ_7); + return; + } + + old = poW; + + if (++poW == usbfifoPointDescrip->rxBufferLength) + poW = 0; + + if (poW == poR) + { // Buffer full. + HAL_DisableIrq(IRQ_7); + return; + } // Buffer full. + + control->rxPointOfWrite = poW; + GPIO_RD_clr(); + NOP; + buffer[old] = USB_DATA_PIN; + GPIO_RD_set(); + control->rxBytesInBuffer++; + usbfifoPostTask(USB_FIFO_TASK_RX); +} + +/**************************************************************************//** +\brief Reads byte from tx buffer and sends it to fifo. +******************************************************************************/ +static void usbfifoTxBufferCleaner(void) +{ + HalUsartService_t *control; + uint16_t poW; + uint16_t poR; + + if (!usbfifoPointDescrip) + { // unregistered intrrupt is occurred + HAL_DisableIrq(IRQ_6); + return; + } + + control = &usbfifoPointDescrip->service; + poW = control->txPointOfWrite; + poR = control->txPointOfRead; + + if (poW != poR) + { + // set port as output + USB_DATA_DDR = 0xFF; + NOP; + USB_DATA_PORT = usbfifoPointDescrip->txBuffer[poR++]; + GPIO_WR_clr(); + GPIO_WR_set(); + USB_DATA_DDR = 0; + + if (poR == usbfifoPointDescrip->txBufferLength) + poR = 0; + + control->txPointOfRead = poR; + } + else + { // tx buffer is empty + HAL_DisableIrq(IRQ_6); + usbfifoPostTask(USB_FIFO_TASK_TX); + } +} + +/**************************************************************************//** +\brief Transmitting complete handler +******************************************************************************/ +static void usbfifoTxComplete(void) +{ + if (NULL == usbfifoPointDescrip) + return; + + if (0 == usbfifoPointDescrip->txBufferLength) + usbfifoPointDescrip->txBuffer = NULL; // nulling pointer for callback mode + + if (usbfifoPointDescrip->txCallback) + usbfifoPointDescrip->txCallback(); +} + +/**************************************************************************//** +\brief Byte is received handler +******************************************************************************/ +static void usbfifoRxComplete(void) +{ + HalUsartService_t *control; + uint16_t number; + + if (NULL == usbfifoPointDescrip) + return; + + control = &usbfifoPointDescrip->service; + ATOMIC_SECTION_ENTER + number = control->rxBytesInBuffer; + ATOMIC_SECTION_LEAVE + + if (number) + if (NULL != usbfifoPointDescrip->rxCallback) + usbfifoPointDescrip->rxCallback(number); +} + +/**************************************************************************//** +\brief USB FIFO driver task handler. +******************************************************************************/ +void usbfifoHandler(void) +{ + UsbfifoTask_t handler; + uint8_t mask = 1; + UsbfifoTaskId_t index = 0; + + for ( ; index < USB_FIFO_TASKS_NUMBER; index++, mask <<= 1) + { + if (usbfifoTaskBitMask & mask) + { + ATOMIC_SECTION_ENTER + usbfifoTaskBitMask ^= mask; + ATOMIC_SECTION_LEAVE + HANDLERS_GET(&handler, index); + handler(); + } + } +} + +/**************************************************************************//** +\brief Posts specific USART task. + +\param[in] + taskId - unique identifier of the task to be posted. +******************************************************************************/ +static void usbfifoPostTask(UsbfifoTaskId_t taskId) +{ + usbfifoTaskBitMask |= (UsbfifoTaskBitMask_t)1 << taskId; + halPostTask4(HAL_EXT_HANDLER); +} + +// eof usbFifoFT245RL.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoVirtualUsart.c b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoVirtualUsart.c new file mode 100644 index 00000000..1a909d38 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/USBFIFO/src/usbFifoVirtualUsart.c @@ -0,0 +1,250 @@ +/****************************************************************************//** + \file usbFifoVirtualUart.c + + \brief Implementation of virtual uart API. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 11/09/08 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + External global variables section +******************************************************************************/ +extern void (* extHandler)(void); + +/****************************************************************************** + Global variables section +******************************************************************************/ +// pointer to application uart descriptor +HAL_UsartDescriptor_t *usbfifoPointDescrip = NULL; + +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Open virtual com port and register uart's event handlers. + +Parameters: + descriptor - pointer to HAL_UartDescriptor_t structure + +Returns: + Returns positive uart descriptor on success or -1 in cases: + - bad uart channel; + - there are not enough resources; + - receiving buffer is less bulk endpoint size; +******************************************************************************/ +int USBFIFO_OpenUsart(HAL_UsartDescriptor_t *descriptor) +{ + if (NULL == descriptor) + return -1; + + if (USART_CHANNEL_USBFIFO != descriptor->tty) + return -1; + + if (NULL != usbfifoPointDescrip) + return -1; /* source was opened */ + + extHandler = usbfifoHandler; + usbfifoPointDescrip = descriptor; + + usbfifoPointDescrip->service.rxPointOfRead = 0; + usbfifoPointDescrip->service.rxPointOfWrite = 0; + usbfifoPointDescrip->service.txPointOfRead = 0; + usbfifoPointDescrip->service.txPointOfWrite = 0; + usbfifoInit(); + // enable receiver + HAL_EnableIrq(IRQ_7); + + return (int)descriptor->tty; +} + +/****************************************************************************** +Frees the virtual uart channel. +Parameters: + descriptor - the uart descriptor. +Returns: + Returns 0 on success or -1 if bad descriptor. +******************************************************************************/ +int USBFIFO_CloseUsart(HAL_UsartDescriptor_t *descriptor) +{ + if (NULL == descriptor) + return -1; + + if (usbfifoPointDescrip != descriptor) + return -1; + + usbfifoPointDescrip = NULL; + extHandler = NULL; + usbfifoUnInit(); + + return 0; +} + +/****************************************************************************** +Writes a number of bytes to a virtual uart channel. +txCallback function will be used to notify when the transmission is finished. +Parameters: + descriptor - pointer to HAL_UartDescriptor_t structure; + buffer - pointer to the application data buffer; + length - number of bytes to transfer; +Returns: + -1 - bad descriptor; + Number of bytes placed to the buffer - success. +******************************************************************************/ +int USBFIFO_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint16_t poW; + uint16_t poR; + uint16_t old; + uint16_t wasWrote = 0; + HalUsartService_t *control; + + if (NULL == descriptor) + return -1; + + if (usbfifoPointDescrip != descriptor) + return -1; + + if (!buffer || !length) + return -1; + + control = &descriptor->service; + ATOMIC_SECTION_ENTER + poW = control->txPointOfWrite; + poR = control->txPointOfRead; + ATOMIC_SECTION_LEAVE + + if (0 == descriptor->txBufferLength) + { // Callback mode + if (poW != poR) + return -1; // there is unsent data + descriptor->txBuffer = buffer; + control->txPointOfWrite = length; + control->txPointOfRead = 0; + wasWrote = length; + } // Callback mode. + else + { // Polling mode. + while (wasWrote < length) + { + old = poW; + + if (++poW == descriptor->txBufferLength) + poW = 0; + + if (poW == poR) + { // Buffer full. + poW = old; + break; + } // Buffer full. + + descriptor->txBuffer[old] = buffer[wasWrote++]; + } + + ATOMIC_SECTION_ENTER + control->txPointOfWrite = poW; + ATOMIC_SECTION_LEAVE + } // Polling mode + + HAL_EnableIrq(IRQ_6); + + return wasWrote; +} + +/***************************************************************************** +Reads length bytes from uart and places ones to buffer. +Parameters: + descriptor - uart descriptor; + buffer - pointer to a application buffer; + length - the number of bytes which should be placed to buffer +Returns: + -1 - bad descriptor, bad number to read; + number of bytes that were placed to buffer. +*****************************************************************************/ +int USBFIFO_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length) +{ + uint16_t wasRead = 0; + uint16_t poW; + uint16_t poR; + HalUsartService_t *control; + + if (NULL == descriptor) + return -1; + + if (!buffer || !length) + return -1; + + if (descriptor != usbfifoPointDescrip) + return -1; // Channel is not opened. + + control = &usbfifoPointDescrip->service; + ATOMIC_SECTION_ENTER + poW = control->rxPointOfWrite; + poR = control->rxPointOfRead; + ATOMIC_SECTION_LEAVE + + while ((poR != poW) && (wasRead < length)) + { + buffer[wasRead] = descriptor->rxBuffer[poR]; + if (++poR == descriptor->rxBufferLength) + poR = 0; + wasRead++; + } + + ATOMIC_SECTION_ENTER + control->rxPointOfRead = poR; + control->rxBytesInBuffer -= wasRead; + ATOMIC_SECTION_LEAVE + + HAL_EnableIrq(IRQ_7); + + return wasRead; +} + +/**************************************************************************//** +\brief Checks the status of tx buffer. + +\param[in] descriptor - pointer to HAL_UsartDescriptor_t structure; +\return -1 - bad descriptor, no tx buffer; \n + 1 - tx buffer is empty; \n + 0 - tx buffer is not empty; +******************************************************************************/ +int USBFIFO_IsTxEmpty(HAL_UsartDescriptor_t *descriptor) +{ + HalUsartService_t *control; + uint16_t poW; + uint16_t poR; + + if (NULL == descriptor) + return -1; + + if (descriptor != usbfifoPointDescrip) + return -1; // Channel is not opened. + + control = &usbfifoPointDescrip->service; + ATOMIC_SECTION_ENTER + poW = control->txPointOfWrite; + poR = control->txPointOfRead; + ATOMIC_SECTION_LEAVE + if (poW == poR) + return 1; + + return 0; +} + +// eof usbFifoVirtualUart.c diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/isdImageStorage.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/isdImageStorage.h new file mode 100644 index 00000000..c5631189 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/isdImageStorage.h @@ -0,0 +1,89 @@ +/**************************************************************************//** +\file isdImageStorage.h + +\brief The public API of image storage driver. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 25.05.11 A. Khromykh - Created +*******************************************************************************/ + +#ifndef _ISDIMAGESTORAGE_H +#define _ISDIMAGESTORAGE_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief Status which is returned by driver */ +typedef enum +{ + ISD_SUCCESS, + ISD_HARDWARE_FAULT, + ISD_COMMUNICATION_LOST +} ISD_Status_t; + +typedef void (* IsdOpenCb_t)(ISD_Status_t); +typedef void (* IsdQueryNextImageCb_t)(ZCL_OtauQueryNextImageResp_t *); +typedef void (* IsdImageBlockCb_t)(ZCL_OtauImageBlockResp_t *); +typedef void (* IsdUpgradeEndCb_t)(ZCL_OtauUpgradeEndResp_t *); + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Open image storage driver + +\param[in] cb - callback about driver actions +******************************************************************************/ +void ISD_Open(IsdOpenCb_t cb); + +/**************************************************************************//** +\brief Close image storage driver +******************************************************************************/ +void ISD_Close(void); + +/**************************************************************************//** +\brief Send query next image request to storage system + +\param[in] addressing - pointer to structure that include client network information; \n +\param[in] data - data payload; \n +\param[in] cd - callback about response receiving from storage system. +******************************************************************************/ +void ISD_QueryNextImageReq(ZCL_Addressing_t *addressing, ZCL_OtauQueryNextImageReq_t *data, IsdQueryNextImageCb_t cb); + +/**************************************************************************//** +\brief Send image block request to storage system + +\param[in] addressing - pointer to structure that include client network information; \n +\param[in] data - data payload; \n +\param[in] cd - callback about response receiving from storage system. +******************************************************************************/ +void ISD_ImageBlockReq(ZCL_Addressing_t *addressing, ZCL_OtauImageBlockReq_t *data, IsdImageBlockCb_t cb); + +/**************************************************************************//** +\brief Send upgrade end request to storage system + +\param[in] addressing - pointer to structure that include client network information; \n +\param[in] data - data payload; \n +\param[in] cd - callback about response receiving from storage system. +******************************************************************************/ +void ISD_UpgradeEndReq(ZCL_Addressing_t *addressing, ZCL_OtauUpgradeEndReq_t *data, IsdUpgradeEndCb_t cb); + +#endif /* _ISDIMAGESTORAGE_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/massStorageDevice.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/massStorageDevice.h new file mode 100644 index 00000000..f8957a90 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/massStorageDevice.h @@ -0,0 +1,71 @@ +/****************************************************************************//** + \file massStorageDevice.h + + \brief The header file describes the interface of the mass storage device + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/08/11 N. Fomin - Created +*******************************************************************************/ +#ifndef _MASSSTORAGEDEVICE_H +#define _MASSSTORAGEDEVICE_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define MSD_TRANSMIT_PIPE 5 +#define MSD_RECEIVE_PIPE 6 + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief Status messages for upper layer about msd status */ +typedef enum +{ + MSD_STATUS_SUCCESS = 0, + MSD_INTERFACE_BUSY, + MSD_MEMORY_INIT_ERROR, + MSD_READ_CAPACITY_ERROR, + MSD_READ_ERROR, + MSD_WRITE_ERROR +} MSD_Status_t; + +typedef void (* MSD_Callback_t)(MSD_Status_t); + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Opens mass storage device. +\param[in] + callback - pointer to function to notify about MSD errors and transactions; + responseBuffer - pointer to hsmci command response buffer; it should have + a size of four; + buffer - pointer to buffer for hsmci data transfer; it should be + a multiplier of 512; + length - length of buffer for data transfer. +\return + nothing +******************************************************************************/ +void MSD_Open(MSD_Callback_t callback, uint32_t *responseBuffer, uint8_t *buffer, uint32_t length); + +/**************************************************************************//** +\brief Closes mass storage device. +\return + nothing +******************************************************************************/ +void MSD_Close(void); + +#endif /* _MASSSTORAGEDEVICE_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/ofdExtMemory.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/ofdExtMemory.h new file mode 100644 index 00000000..e15ed8fd --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/ofdExtMemory.h @@ -0,0 +1,175 @@ +/**************************************************************************//** +\file ofdExtMemory.h + +\brief The public API of external flash driver. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 31/07/09 A. Khromykh - Created +*******************************************************************************/ + +#ifndef _OFDEXTMEMORY_H +#define _OFDEXTMEMORY_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief Size of memory block for internal ofd algorithms */ +#define OFD_BLOCK_FOR_CHECK_CRC 64 +#define OFD_BLOCK_SIZE OFD_BLOCK_FOR_CHECK_CRC + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief Status messages for upper component about ofd state */ +typedef enum +{ + OFD_STATUS_SUCCESS = 0, + OFD_STATUS_SERIAL_BUSY, + OFD_STATUS_UNKNOWN_EXTERNAL_FLASH_TYPE, + OFD_STATUS_INCORRECT_API_PARAMETER, + OFD_STATUS_INCORRECT_EEPROM_PARAMETER, + OFD_SERIAL_INTERFACE_BUSY +} OFD_Status_t ; + +/** \brief Number of position for image in the external flash */ +typedef enum +{ + OFD_POSITION_1, + OFD_POSITION_2, + OFD_POSITION_MAX +} OFD_Position_t; + +/** \brief Source type which was been initiator of image saving. */ +typedef enum +{ + OFD_IMAGE_WAS_SAVED_FROM_MCU, + OFD_IMAGE_WAS_WRITTEN_THROUGH_API, +} OFD_ImageSource_t; + +/** \brief Parameters for access to external memory \n + offset - offset from start address \n + data - pointer to mcu ram area with\for data for\from external memory \n + length - size of mcu ram area with\for data. */ +typedef struct +{ + uint32_t offset; + uint8_t *data; + uint32_t length; +} OFD_MemoryAccessParam_t; + +/** \brief image crc */ +typedef uint8_t OFD_Crc_t; + +/** \brief Image information. Crc and image type. */ +typedef struct +{ + OFD_ImageSource_t type; + OFD_Crc_t crc; +} OFD_ImageInfo_t; + +/** \brief callback methods for OFD API. \n + ATTENTION!!!! Callback functions must not call public OFD API directly. + */ +typedef void (* OFD_Callback_t)(OFD_Status_t); +typedef void (* OFD_InfoCallback_t)(OFD_Status_t, OFD_ImageInfo_t *); + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Opens serial interface and checks memory type. + +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_Open(OFD_Callback_t cb); + +/**************************************************************************//** +\brief Closes serial interface. +******************************************************************************/ +void OFD_Close(void); + +/**************************************************************************//** +\brief Erases image in the external memory. + +\param[in] + pos - image position in the external memory +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_EraseImage(OFD_Position_t pos, OFD_Callback_t cb); + +/**************************************************************************//** +\brief Writes data to the external memory. + +\param[in] + pos - image position for new data +\param[in] + accessParam - pointer to the access structure +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_Write(OFD_Position_t pos, OFD_MemoryAccessParam_t *accessParam, OFD_Callback_t cb); + +/**************************************************************************//** +\brief Flushes data from internal buffer, checks image crc and saves it to +the external memory. + +\param[in] + pos - image position for new data +\param[in] + countBuff - pointer to the memory for internal data (memory size must be OFD_BLOCK_FOR_CHECK_CRC) +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_FlushAndCheckCrc(OFD_Position_t pos, uint8_t *countBuff, OFD_InfoCallback_t cb); + +/**************************************************************************//** +\brief Saves current mcu flash and eeprom to the external memory, checks crc for its +and set command for bootloader. + +\param[in] + whereToSave - image position for current mcu flash and eeprom +\param[in] + from - new image position +\param[in] + copyBuff - pointer to the memory for internal data (memory size must be OFD_BLOCK_FOR_CHECK_CRC) +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_SwitchToNewImage(OFD_Position_t whereToSave, OFD_Position_t from, uint8_t *copyBuff, OFD_Callback_t cb); + +/**************************************************************************//** +\brief Sets command for bootloader. + +\param[in] + from - image position +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_ChangeImage(OFD_Position_t from, OFD_Callback_t cb); + +/**************************************************************************//** +\brief Reads image informations. + +\param[in] + pos - image position +\param[in] + cb - pointer to callback +******************************************************************************/ +void OFD_ReadImageInfo(OFD_Position_t pos, OFD_InfoCallback_t cb); + +#endif /* _OFDEXTMEMORY_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/usbFifoUsart.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/usbFifoUsart.h new file mode 100644 index 00000000..8725d322 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/usbFifoUsart.h @@ -0,0 +1,109 @@ +/**************************************************************************//** +\file usbFifoUsart.h + +\brief The public API of usb fifo vitual COM port driver based on FTDI FT245RL. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 12.07.11 A. Khromykh - Created +*******************************************************************************/ +#ifndef _USBFIFOUSART_H +#define _USBFIFOUSART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define USART_CHANNEL_USBFIFO ((UsartChannel_t)6) + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Opens driver and registers event handlers. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure + +\return + Returns positive uart descriptor on success or -1 in cases: \n + - bad uart channel; \n + - there are not enough resources; \n + - receiving buffer is less bulk endpoint size; +******************************************************************************/ +int USBFIFO_OpenUsart(HAL_UsartDescriptor_t *descriptor); + +/*************************************************************************//** +\brief Releases the driver. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure + +\return + -1 - bad descriptor; \n + 0 - success. +*****************************************************************************/ +int USBFIFO_CloseUsart(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Writes a number of bytes to driver. +txCallback function will be used to notify when the transmission is finished. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure; + +\param[in] + buffer - pointer to the application data buffer; + +\param[in] + length - number of bytes to transfer; + +\return + -1 - bad descriptor; \n + Number of bytes placed to the buffer - success. +******************************************************************************/ +int USBFIFO_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/*************************************************************************//** +\brief Reads a number of bytes from driver and places them to the buffer. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure; + +\param[in] + buffer - pointer to the application buffer; + +\param[in] + length - number of bytes to be placed to the buffer; + +\return + -1 - bad descriptor, or bad number of bytes to read; \n + Number of bytes placed to the buffer - success. +*****************************************************************************/ +int USBFIFO_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/**************************************************************************//** +\brief Checks the status of tx buffer (for polling mode). + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; +\return + -1 - bad descriptor, no tx buffer; \n + 1 - tx buffer is empty; \n + 0 - tx buffer is not empty; +******************************************************************************/ +int USBFIFO_IsTxEmpty(HAL_UsartDescriptor_t *descriptor); + +#endif /* _USBFIFOUSART_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/vcpVirtualUsart.h b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/vcpVirtualUsart.h new file mode 100644 index 00000000..0c54d8d1 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/drivers/include/vcpVirtualUsart.h @@ -0,0 +1,111 @@ +/****************************************************************************//** + \file vcpVirtualUsart.h + + \brief The header file describes the interface of the virtual uart based on USB + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 05/09/08 A. Khromykh - Created +*******************************************************************************/ +#ifndef _VCPVIRTUALUART_H +#define _VCPVIRTUALUART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define USART_CHANNEL_VCP ((UsartChannel_t)5) +#define VCP_TRANSMIT_PIPE 2 +#define VCP_RECEIVE_PIPE 1 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Registers uart's event handlers. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure + +\return + Returns positive uart descriptor on success or -1 in cases: \n + - bad uart channel; \n + - there are not enough resources; \n + - receiving buffer is less bulk endpoint size; +******************************************************************************/ +int VCP_OpenUsart(HAL_UsartDescriptor_t *descriptor); + +/*************************************************************************//** +\brief Releases the uart channel. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure + +\return + -1 - bad descriptor; \n + 0 - success. +*****************************************************************************/ +int VCP_CloseUsart(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Writes a number of bytes to uart channel. +txCallback function will be used to notify when the transmission is finished. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure; + +\param[in] + buffer - pointer to the application data buffer; + +\param[in] + length - number of bytes to transfer; + +\return + -1 - bad descriptor; \n + Number of bytes placed to the buffer - success. +******************************************************************************/ +int VCP_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/*************************************************************************//** +\brief Reads a number of bytes from uart and places them to the buffer. + +\param[in] + descriptor - pointer to HAL_UartDescriptor_t structure; + +\param[in] + buffer - pointer to the application buffer; + +\param[in] + length - number of bytes to be placed to the buffer; + +\return + -1 - bad descriptor, or bad number of bytes to read; \n + Number of bytes placed to the buffer - success. +*****************************************************************************/ +int VCP_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/**************************************************************************//** +\brief Checks the status of tx buffer (for polling mode). + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; +\return + -1 - bad descriptor, no tx buffer; \n + 1 - tx buffer is empty; \n + 0 - tx buffer is not empty; +******************************************************************************/ +int VCP_IsTxEmpty(HAL_UsartDescriptor_t *descriptor); + +#endif /* _VCPVIRTUALUART_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h new file mode 100644 index 00000000..fddde028 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h @@ -0,0 +1,229 @@ +/**************************************************************************//** + \file adc.h + + \brief The header file describes the ADC interface + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 22.11.07 A. Khromykh - Created. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _ADC_H +#define _ADC_H + +// \cond +/****************************************************************************** + Includes section +******************************************************************************/ +#include +// \endcond + +/** \brief adc resolution */ +#define RESOLUTION_8_BIT 0 +#define RESOLUTION_10_BIT 1 + +/****************************************************************************** + Types section +******************************************************************************/ +/**************************************************************************//** +\brief adc sample rate +******************************************************************************/ +#if defined(AT91SAM7X256) + typedef enum + { + ADC_533KSPS, + ADC_429KSPS, + ADC_369KSPS, + ADC_250KSPS, + ADC_136KSPS, + ADC_68KSPS, + ADC_34KSPS + } HAL_AdcSampleRate_t; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + typedef enum + { + ADC_77KSPS, + ADC_39KSPS, + ADC_19200SPS, + ADC_9600SPS, + ADC_4800SPS + } HAL_AdcSampleRate_t; +#endif + +/**************************************************************************//** +\brief adc voltage reference +******************************************************************************/ +typedef enum +{ + /** \brief AREF, Internal Vref turned off. \n + If 10x or 200x gain is selected, only 2.56 V should be used as Internal Voltage Reference. \n + For differential conversion, only 1.1V cannot be used as internal voltage reference. */ + AREF = (0 << 6), + /** \brief AVCC with external capacitor at AREF pin */ + AVCC = (1 << 6), + /** \brief Internal 1.1V Voltage Reference with external capacitor at AREF pin */ + INTERNAL_1d1V = (2 << 6), + /** \brief Internal 2.56V Voltage Reference with external capacitor at AREF pin */ + INTERNAL_2d56V = (3 << 6) +} HAL_AdcVoltageReference_t; + +/**************************************************************************//** +\brief adc structure of parameters +******************************************************************************/ +typedef struct +{ + /** \brief conversion resolution */ + uint8_t resolution; + /** \brief adc sample rate */ + HAL_AdcSampleRate_t sampleRate; + /** \brief adc voltage reference selections (only for avr) */ + HAL_AdcVoltageReference_t voltageReference; + /** \brief pointer to the application data */ + void *bufferPointer; + /** \brief amount of samples (buffer cells) */ + uint16_t selectionsAmount; + /** \brief pointer to callback method */ + void (*callback)(); +} HAL_AdcParams_t; + +/**************************************************************************//** +\brief channel number. \n +Note for avr: +If 10x gain is used, 8 bit resolution can be expected. \n +If 200x gain is used, 7 bit resolution can be expected. \n +If the user wants to perform a quick polarity check of the result, \n +it is sufficient to read the MSB of the result. If the bit is one, \n +the result is negative, and if this bit is zero, the result is positive. \n +To reach the given accuracy, 10x or 200x Gain should not be used \n +for operating voltage below 2.7V. +******************************************************************************/ +#if defined(AT91SAM7X256) + typedef enum + { + HAL_ADC_CHANNEL0 = (1 << 0), + HAL_ADC_CHANNEL1 = (1 << 1), + HAL_ADC_CHANNEL2 = (1 << 2), + HAL_ADC_CHANNEL3 = (1 << 3), + HAL_ADC_CHANNEL4 = (1 << 4), + HAL_ADC_CHANNEL5 = (1 << 5), + HAL_ADC_CHANNEL6 = (1 << 6), + HAL_ADC_CHANNEL7 = (1 << 7) + } HAL_AdcChannelNumber_t; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + typedef enum + { + /** \brief channel ADC0 */ + HAL_ADC_CHANNEL0 = 0, + /** \brief channel ADC1 */ + HAL_ADC_CHANNEL1 = 1, + /** \brief channel ADC2 */ + HAL_ADC_CHANNEL2 = 2, + /** \brief channel ADC3 */ + HAL_ADC_CHANNEL3 = 3, + /** \brief ADC0 - ADC0 with gain 10x */ + HAL_ADC_DIFF_CHANNEL0 = 8, + /** \brief ADC1 - ADC0 with gain 10x */ + HAL_ADC_DIFF_CHANNEL1 = 9, + /** \brief ADC0 - ADC0 with gain 200x */ + HAL_ADC_DIFF_CHANNEL2 = 10, + /** \brief ADC1 - ADC0 with gain 200x */ + HAL_ADC_DIFF_CHANNEL3 = 11, + /** \brief ADC2 - ADC2 with gain 10x */ + HAL_ADC_DIFF_CHANNEL4 = 12, + /** \brief ADC3 - ADC2 with gain 10x */ + HAL_ADC_DIFF_CHANNEL5 = 13, + /** \brief ADC2 - ADC2 with gain 200x */ + HAL_ADC_DIFF_CHANNEL6 = 14, + /** \brief ADC3 - ADC2 with gain 200x */ + HAL_ADC_DIFF_CHANNEL7 = 15 + } HAL_AdcChannelNumber_t; +#endif + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Opens the ADC to make the measurement on the ADC channel. + + \param[in] param - address of HAL_AdcParams_t structure. \n + fields of structure set by user: \n + resolution - conversion resolution. Must be chosen from: \n + RESOLUTION_8_BIT \n + RESOLUTION_10_BIT \n + sampleRate - sample rate. Must be chosen from: \n + for avr hardware platform \n + ADC_77KSPS \n + ADC_39KSPS \n + ADC_19200SPS \n + ADC_9600SPS \n + ADC_4800SPS \n + for arm hardware platform \n + ADC_533KSPS \n + ADC_429KSPS \n + ADC_369KSPS \n + ADC_250KSPS \n + ADC_136KSPS \n + ADC_68KSPS \n + ADC_34KSPS \n + bufferPointer - pointer to the application data buffer. \n + Buffer cell is one byte for 8-bit resolution. \n + Buffer cell is two bytes for 10-bit resolution. \n + selectionsAmount - amount of samples (buffer cells). \n + callback - pointer to the function that will notify about measurement completion. +\return + -1 - unsupported parameter or ADC is busy. \n + 0 - success. +******************************************************************************/ +int HAL_OpenAdc(HAL_AdcParams_t *param); + +/**************************************************************************//** +\brief Starts ADC with the parameters defined in HAL_OpenAdc. + + \param[in] channel - number of ADC channel. Must be chosen from:\n + HAL_ADC_CHANNEL0 \n + HAL_ADC_CHANNEL1 \n + HAL_ADC_CHANNEL2 \n + HAL_ADC_CHANNEL3 \n + next four channels only for arm hardware platform \n + HAL_ADC_CHANNEL4 \n + HAL_ADC_CHANNEL5 \n + HAL_ADC_CHANNEL6 \n + HAL_ADC_CHANNEL7 \n + next eight channels only for avr hardware platform \n + HAL_ADC_DIFF_CHANNEL0 \n + HAL_ADC_DIFF_CHANNEL1 \n + HAL_ADC_DIFF_CHANNEL2 \n + HAL_ADC_DIFF_CHANNEL3 \n + HAL_ADC_DIFF_CHANNEL4 \n + HAL_ADC_DIFF_CHANNEL5 \n + HAL_ADC_DIFF_CHANNEL6 \n + HAL_ADC_DIFF_CHANNEL7 \n + +\return + -1 - unable to open ADC (unsupported channel number). \n + 0 - success. +******************************************************************************/ +int HAL_ReadAdc(HAL_AdcChannelNumber_t channel); + +/**************************************************************************//** +\brief Closes the ADC. + +\return + -1 - the module was not open. \n + 0 - success. +******************************************************************************/ +int HAL_CloseAdc(void); + +#endif /* _ADC_H */ +// eof adc.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h new file mode 100644 index 00000000..9c241ab6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h @@ -0,0 +1,81 @@ +/***************************************************************************//** + \file appTimer.h + + \brief The header file describes the appTimer interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _APPTIMER_H +#define _APPTIMER_H + +// \cond +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +// \endcond + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief fields of structure: \n + uint32_t interval - timer firing interval. Interval must be more than 10 ms (set by user) \n + TimerMode_t mode - timer work mode (set by user). Must be chosen from: \n + TIMER_REPEAT_MODE \n + TIMER_ONE_SHOT_MODE \n + void (*callback)(void) - pointer to timer callback function (set by user). */ +typedef Timer_t HAL_AppTimer_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Starts to count an interval (starts user timer). + +\param[in] + appTimer - pointer to the timer structure (HAL_AppTimer_t is typedef Timer_t) + +\return + -1 - pointer is NULL + 0 - success +******************************************************************************/ +int HAL_StartAppTimer(HAL_AppTimer_t *appTimer); + +/**************************************************************************//** +\brief Stops the user timer. + +\param[in] + appTimer - pointer to the timer structure. + +\return + -1 - there is no appTimer started or pointer is NULL + 0 - success +******************************************************************************/ +int HAL_StopAppTimer(HAL_AppTimer_t *appTimer); + +/**************************************************************************//** +\brief Gets system time. + +\return + time since power up in milliseconds(8 bytes). +******************************************************************************/ +BcTime_t HAL_GetSystemTime(void); + +#endif /*_APPTIMER_H*/ +//eof appTimer.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h new file mode 100644 index 00000000..ada41d9c --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h @@ -0,0 +1,72 @@ +/**************************************************************************//** + \file atomic.h + + \brief The header file describes the atomic sections + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 20/08/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _ATOMIC_H +#define _ATOMIC_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#if defined(AT91SAM7X256) || defined(AT32UC3A0512) || defined(AT91SAM3S4C) + #include +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \ + || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) + #include +#endif + +#if defined(AT91SAM7X256) || defined(AT32UC3A0512) || defined(AT91SAM3S4C) +/****************************************************************************** + Types section +******************************************************************************/ +typedef uint32_t atomic_t; + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/****************************************************************************** + Disables global interrupt. Enter atomic section. +******************************************************************************/ +void halStartAtomic(atomic_t volatile *pAtomic); + +/****************************************************************************** + Exit atomic section +******************************************************************************/ +void halEndAtomic(atomic_t volatile *pAtomic); + /** \brief Marks the begin of atomic section */ + #define ATOMIC_SECTION_ENTER {volatile atomic_t __atomic; halStartAtomic(&__atomic); + /** \brief Marks the end of atomic section */ + #define ATOMIC_SECTION_LEAVE halEndAtomic(&__atomic);} +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \ + || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) + /** \brief Marks the begin of atomic section */ + #define ATOMIC_SECTION_ENTER {atomic_t __atomic = halStartAtomic(); + /** \brief Marks the end of atomic section */ + #define ATOMIC_SECTION_LEAVE halEndAtomic(__atomic);} +#elif defined(SIMULATOR) + /** \brief Marks the begin of atomic section */ + #define ATOMIC_SECTION_ENTER do {} while (0); + /** \brief Marks the end of atomic section */ + #define ATOMIC_SECTION_LEAVE do {} while (0); +#endif + +#endif // _ATOMIC_H + +// eof atomic.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h new file mode 100644 index 00000000..88ce15c8 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h @@ -0,0 +1,98 @@ +/**************************************************************************//** + \file bcTimer.h + + \brief Declaration of timer queue interface, hardware-independent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 7/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _MNHALTIMER_H +#define _MNHALTIMER_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief mode of timers */ +typedef enum +{ + TIMER_REPEAT_MODE, + TIMER_ONE_SHOT_MODE +} TimerMode_t; + +/** \brief fields of structure: \n + uint32_t interval - timer firing interval (set by user) \n + TimerMode_t mode - timer work mode (set by user). Must be chosen from: \n + TIMER_REPEAT_MODE \n + TIMER_ONE_SHOT_MODE \n + void (*callback)(void) - pointer to timer callback function (set by user). \n + next - pointer to next cell of list \n + intervalLeft - absolute fired time */ +typedef struct _Timer_t +{ + struct + { + struct _Timer_t *next; + uint32_t sysTimeLabel; + } service; + uint32_t interval; + TimerMode_t mode; + void (*callback)(void); +} Timer_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Adds timer to the timer's list. Timers sorted by remaining time. +\param[in] + head - address of pointer to head of the timers list. +\param[in] + timer - address of timer that must be added to the list. +\param[in] + sysTime - current time, used for sorting. +******************************************************************************/ +void halAddTimer(Timer_t **head, Timer_t *timer, uint32_t sysTime); + +/**************************************************************************//** +\brief Removes timer from the timers list. +\param[in] + head - address of pointer to head of the timers list. +\param[in] + prev - address of the timer before the timer that must be removed from the list. +\param[in] + p - address of timer that must be removed from the list. + +\return pointer to next cell or pointer to head if deleting is head +******************************************************************************/ +Timer_t* halRemoveTimer(Timer_t **head, Timer_t *prev, Timer_t *p); + +/**************************************************************************//** +\brief The search of the timer in the timers list before one. +\param[in] + head - address of pointer to head of the timers list. + +\return pointer to saerching timer +******************************************************************************/ +Timer_t *halFindPrevTimer(Timer_t **head, Timer_t *p); + +#endif /* _MNHALTIMER_H */ + +// eof bcTimer.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h new file mode 100644 index 00000000..3bfca393 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h @@ -0,0 +1,31 @@ +/**************************************************************************//** + \file calibration.h + + \brief Interface to calibrate the internal RC generator. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _CALIBRATION_H +#define _CALIBRATION_H +/**************************************************************************//** +\brief Performs calibration of the main clock generator \n +(only for AVR and internal RC oscillator). +******************************************************************************/ +void HAL_CalibrateMainClock(void); + +#endif /* _CALIBRATION_H */ +// eof calibration.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h new file mode 100644 index 00000000..44f76ca4 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h @@ -0,0 +1,41 @@ +/**************************************************************************//** + \file dbgu.h + + \brief Declarations of debug message interface (feature only for atmel arm). + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 11/11/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _DBGU_H +#define _DBGU_H + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Open dbgu port (115200 baud, 8N1 format). +******************************************************************************/ +void HAL_OpenDbgu(void); + +/**************************************************************************//** +\brief Send string trough dbgu port. + +\param[in] + buffer - pointer to the string +******************************************************************************/ +void HAL_SendDbguMessage(const char *buffer); + +#endif /* _DBGU_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h new file mode 100644 index 00000000..a4a21966 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h @@ -0,0 +1,113 @@ +/**************************************************************************//** + \file eeprom.h + + \brief The header file describes the EEPROM interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _EEPROM_H +#define _EEPROM_H + +// \cond +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(AT91SAM7X256) + #define EEPROM_DATA_MEMORY_SIZE 0x400u +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \ + || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) \ + || defined(AT91SAM3S4C) + #define EEPROM_DATA_MEMORY_SIZE 0x1000u +#elif defined(ATXMEGA128A1) + #define EEPROM_DATA_MEMORY_SIZE 0x800u +#endif +// \endcond + +/****************************************************************************** + Types section +******************************************************************************/ +/**************************************************************************//** +\brief eeprom access control structure +******************************************************************************/ +typedef struct +{ + /** \brief EEPROM address */ + uint16_t address; + /** \brief pointer to data memory */ + uint8_t *data; + /** \brief number of bytes */ + uint16_t length; +} HAL_EepromParams_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +\brief Reads a number of bytes defined by HAL_EepromParams_t from the EEPROM. +\param[in] + param - address of HAL_EepromParams_t structure. \n + fields of structure set by user: \n + address - eeprom address \n + data - pointer to data memory \n + length - number of bytes +\param[in] + readDone - pointer to the function that will notify about reading completion. +\return + 0 - success, \n + -1 - the number of bytes to read is too large, \n + -2 - the previous EEPROM request is not completed yet. +******************************************************************************/ +int HAL_ReadEeprom(HAL_EepromParams_t *params, void (*readDone)()); + +/****************************************************************************** +\brief Writes a number of bytes defined by HAL_EepromParams_t to EEPROM. +By writeDone parameter user can control if write operation will be asynchronous +or synchronous. +\param[in] + param - address of HAL_EepromParams_t structure. \n + fields of structure set by user: \n + address - eeprom address \n + data - pointer to data memory \n + length - number of bytes +\param[in] + writeDone - pointer to the function that will notify about writing completion. \n + Only for avr: \n + if writeDone is NULL write operation will be synchronous. +\return + 0 - success, \n + -1 - the number of bytes to write is too large, \n + -2 - the previous EEPROM request is not completed yet. +******************************************************************************/ +int HAL_WriteEeprom(HAL_EepromParams_t *params, void (*writeDone)()); + +/**************************************************************************//** +\brief Checks the eeprom state. + +\return + true - eeprom is busy; \n + false - eeprom is free; +******************************************************************************/ +bool HAL_IsEepromBusy(void); + +#endif /*_EEPROM_H*/ + +//eof eeprom.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h new file mode 100644 index 00000000..765df7d4 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h @@ -0,0 +1,31 @@ +/**************************************************************************//** + \file halInit.h + + \brief HAL start up module interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALINIT_H +#define _HALINIT_H + +/**************************************************************************//** +\brief Performs start up HAL initialization. +******************************************************************************/ +void HAL_Init(void); + +#endif /* _HALINIT_H */ +// eof halInit.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h new file mode 100644 index 00000000..48738c9a --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h @@ -0,0 +1,335 @@ +/**************************************************************************//** + \file halTaskManager.h + + \brief Declarations of enums and functions of HAL task manager. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALTASKHANDLER_H +#define _HALTASKHANDLER_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(AT91SAM7X256) +/*! \brief task ID for hal task manager. HAL_FIRST_X are free ID. */ +enum +{ + HAL_USB_ENDPOINTS = 1ul << 0, + HAL_USB_SUSPEND = 1ul << 1, + HAL_USB_RESUME = 1ul << 2, + HAL_USB_BUS_RESET = 1ul << 3, + HAL_TASK_USART = 1ul << 4, + HAL_TIMER4_COMPA = 1ul << 5, /** timer interrupt is happened */ + HAL_TWI = 1ul << 6, /** twi bus interrupt is happened */ + HAL_SPI0_TXBUFE = 1ul << 7, /** spi0 dma buffer is empty */ + HAL_SPI0_RXBUFF = 1ul << 8, /** spi0 dma buffer is full */ + HAL_SPI1_TXBUFE = 1ul << 9, /** spi1 dma buffer is empty */ + HAL_SPI1_RXBUFF = 1ul << 10, /** timer interrupt is happened */ + HAL_ADC = 1ul << 11, /** adc measurement is ready */ + HAL_FIRST_12 = 1ul << 12, + HAL_FIRST_13 = 1ul << 13, + HAL_FIRST_14 = 1ul << 14, + HAL_FIRST_15 = 1ul << 15, + HAL_FIRST_16 = 1ul << 16, + HAL_FIRST_17 = 1ul << 17, + HAL_FIRST_18 = 1ul << 18, + HAL_FIRST_19 = 1ul << 19, + HAL_FIRST_20 = 1ul << 20, + HAL_FIRST_21 = 1ul << 21, + HAL_FIRST_22 = 1ul << 22, + HAL_FIRST_23 = 1ul << 23, + HAL_FIRST_24 = 1ul << 24, + HAL_FIRST_25 = 1ul << 25, + HAL_FIRST_26 = 1ul << 26, + HAL_FIRST_27 = 1ul << 27, + HAL_FIRST_28 = 1ul << 28, + HAL_FIRST_29 = 1ul << 29, + HAL_FIRST_30 = 1ul << 30, + HAL_FIRST_31 = 1ul << 31 +}; + +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \ + || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) +/**************************************************************************//** + \brief halTaskFlags0 flags definitions. +******************************************************************************/ +enum +{ + HAL_ASYNC_TIMER = (uint8_t)1 << 0, + HAL_SYNC_SLEEP_TIME = (uint8_t)1 << 1, + HAL_EMPTY_TASK_0_2 = (uint8_t)1 << 2, + HAL_EMPTY_TASK_0_3 = (uint8_t)1 << 3, + HAL_EMPTY_TASK_0_4 = (uint8_t)1 << 4, + HAL_EMPTY_TASK_0_5 = (uint8_t)1 << 5, + HAL_EMPTY_TASK_0_6 = (uint8_t)1 << 6, + HAL_EMPTY_TASK_0_7 = (uint8_t)1 << 7 +}; + +/**************************************************************************//** + \brief halTaskFlags1 flags definitions. +******************************************************************************/ +enum +{ + HAL_EMPTY_TASK_1_0 = (uint8_t)1 << 0, + HAL_EMPTY_TASK_1_1 = (uint8_t)1 << 1, + HAL_EMPTY_TASK_1_2 = (uint8_t)1 << 2, + HAL_EMPTY_TASK_1_3 = (uint8_t)1 << 3, + HAL_EMPTY_TASK_1_4 = (uint8_t)1 << 4, + HAL_EMPTY_TASK_1_5 = (uint8_t)1 << 5, + HAL_EMPTY_TASK_1_6 = (uint8_t)1 << 6, + HAL_EMPTY_TASK_1_7 = (uint8_t)1 << 7 +}; + +/**************************************************************************//** + \brief halTaskFlags2 flags definitions. +******************************************************************************/ +enum +{ + HAL_EMPTY_TASK_2_0 = (uint8_t)1 << 0, + HAL_EMPTY_TASK_2_1 = (uint8_t)1 << 1, + HAL_EMPTY_TASK_2_2 = (uint8_t)1 << 2, + HAL_EMPTY_TASK_2_3 = (uint8_t)1 << 3, + HAL_EMPTY_TASK_2_4 = (uint8_t)1 << 4, + HAL_EMPTY_TASK_2_5 = (uint8_t)1 << 5, + HAL_TASK_SPI = (uint8_t)1 << 6, + HAL_TASK_USART = (uint8_t)1 << 7 +}; + +/**************************************************************************//** + \brief halTaskFlags3 flags definitions. +******************************************************************************/ +enum +{ + HAL_SM_REQ = (uint8_t)1 << 0, + HAL_ADC = (uint8_t)1 << 1, + HAL_EE_READY = (uint8_t)1 << 2, + HAL_USB_ENDPOINTS = (uint8_t)1 << 3, + HAL_USB_SUSPEND = (uint8_t)1 << 4, + HAL_USB_RESUME = (uint8_t)1 << 5, + HAL_USB_BUS_RESET = (uint8_t)1 << 6, + HAL_EMPTY_TASK_3_7 = (uint8_t)1 << 7 +}; + +/**************************************************************************//** + \brief halTaskFlags4 flags definitions. +******************************************************************************/ +enum +{ + HAL_WAKEUP = (uint8_t)1 << 0, + HAL_TWI = (uint8_t)1 << 1, + HAL_TIMER4_COMPA = (uint8_t)1 << 2, + HAL_SLEEP = (uint8_t)1 << 3, + HAL_EXT_HANDLER = (uint8_t)1 << 4, + HAL_EMPTY_TASK_4_4 = (uint8_t)1 << 5, + HAL_EMPTY_TASK_4_6 = (uint8_t)1 << 6, + HAL_EMPTY_TASK_4_7 = (uint8_t)1 << 7 +}; + +#elif defined(AT32UC3A0512) +/*! \brief task ID for hal task manager. HAL_FIRST_X are free ID. */ +enum +{ + HAL_APPTIMER = 1ul << 0, + HAL_TASK_USART = 1ul << 1, + HAL_FIRST_2 = 1ul << 2, + HAL_FIRST_3 = 1ul << 3, + HAL_FIRST_4 = 1ul << 4, + HAL_FIRST_5 = 1ul << 5, + HAL_FIRST_6 = 1ul << 6, + HAL_FIRST_7 = 1ul << 7, + HAL_FIRST_8 = 1ul << 8, + HAL_FIRST_9 = 1ul << 9, + HAL_FIRST_10 = 1ul << 10, + HAL_FIRST_11 = 1ul << 11, + HAL_FIRST_12 = 1ul << 12, + HAL_FIRST_13 = 1ul << 13, + HAL_FIRST_14 = 1ul << 14, + HAL_FIRST_15 = 1ul << 15, + HAL_FIRST_16 = 1ul << 16, + HAL_FIRST_17 = 1ul << 17, + HAL_FIRST_18 = 1ul << 18, + HAL_FIRST_19 = 1ul << 19, + HAL_FIRST_20 = 1ul << 20, + HAL_FIRST_21 = 1ul << 21, + HAL_FIRST_22 = 1ul << 22, + HAL_FIRST_23 = 1ul << 23, + HAL_FIRST_24 = 1ul << 24, + HAL_FIRST_25 = 1ul << 25, + HAL_FIRST_26 = 1ul << 26, + HAL_FIRST_27 = 1ul << 27, + HAL_FIRST_28 = 1ul << 28, + HAL_FIRST_29 = 1ul << 29, + HAL_FIRST_30 = 1ul << 30, + HAL_FIRST_31 = 1ul << 31 +}; + +#elif defined(AT91SAM3S4C) +/*! \brief task ID for hal task manager. HAL_FIRST_X are free ID. */ +enum +{ + HAL_APPTIMER = 1ul << 0, + HAL_TASK_USART = 1ul << 1, + HAL_USB_ENDPOINTS = 1ul << 2, + HAL_USB_SUSPEND = 1ul << 3, + HAL_USB_RESUME = 1ul << 4, + HAL_USB_BUS_RESET = 1ul << 5, + HAL_TASK_UART = 1ul << 6, + HAL_EE_READY = 1ul << 7, + HAL_HSMCI = 1ul << 8, + HAL_ASYNC_TIMER = 1ul << 9, + HAL_WAKEUP = 1ul << 10, + HAL_SLEEP = 1ul << 11, + HAL_FIRST_12 = 1ul << 12, + HAL_FIRST_13 = 1ul << 13, + HAL_FIRST_14 = 1ul << 14, + HAL_FIRST_15 = 1ul << 15, + HAL_FIRST_16 = 1ul << 16, + HAL_FIRST_17 = 1ul << 17, + HAL_FIRST_18 = 1ul << 18, + HAL_FIRST_19 = 1ul << 19, + HAL_FIRST_20 = 1ul << 20, + HAL_FIRST_21 = 1ul << 21, + HAL_FIRST_22 = 1ul << 22, + HAL_FIRST_23 = 1ul << 23, + HAL_FIRST_24 = 1ul << 24, + HAL_FIRST_25 = 1ul << 25, + HAL_FIRST_26 = 1ul << 26, + HAL_FIRST_27 = 1ul << 27, + HAL_FIRST_28 = 1ul << 28, + HAL_FIRST_29 = 1ul << 29, + HAL_FIRST_30 = 1ul << 30, + HAL_FIRST_31 = 1ul << 31 +}; +#endif + +/****************************************************************************** + External variables section +******************************************************************************/ +#if defined(AT91SAM7X256) +extern volatile uint32_t halTaskFlags; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \ + || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) +extern volatile uint8_t halTaskFlags0; +extern volatile uint8_t halTaskFlags1; +extern volatile uint8_t halTaskFlags2; +extern volatile uint8_t halTaskFlags3; +extern volatile uint8_t halTaskFlags4; +#elif defined(AT32UC3A0512) || defined(AT91SAM3S4C) +extern volatile uint32_t halTaskFlags; +#endif + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +#if defined(AT91SAM7X256) +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask +******************************************************************************/ +INLINE void halPostTask(uint32_t flag) +{ + halTaskFlags |= flag; + SYS_PostTask(HAL_TASK_ID); +} + +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \ + || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask 0 +******************************************************************************/ +INLINE void halPostTask0(uint8_t flag) +{ + halTaskFlags0 |= flag; + SYS_PostTask(HAL_TASK_ID); +} + +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask 1 +******************************************************************************/ +INLINE void halPostTask1(uint8_t flag) +{ + halTaskFlags1 |= flag; + SYS_PostTask(HAL_TASK_ID); +} + +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask 2 +******************************************************************************/ +INLINE void halPostTask2(uint8_t flag) +{ + halTaskFlags2 |= flag; + SYS_PostTask(HAL_TASK_ID); +} + +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask 3 +******************************************************************************/ +INLINE void halPostTask3(uint8_t flag) +{ + halTaskFlags3 |= flag; + SYS_PostTask(HAL_TASK_ID); +} + +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask 4 +******************************************************************************/ +INLINE void halPostTask4(uint8_t flag) +{ + halTaskFlags4 |= flag; + SYS_PostTask(HAL_TASK_ID); +} + +#elif defined(AT32UC3A0512) || defined(AT91SAM3S4C) +/**************************************************************************//** +\brief Set task for task manager. + +\param[in] + flag task for task mask +******************************************************************************/ +INLINE void halPostTask(uint32_t flag) +{ + halTaskFlags |= flag; + SYS_PostTask(HAL_TASK_ID); +} +#endif + +#endif /*_HALTASKHANDLER_H*/ + +// eof halTaskManager.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h new file mode 100644 index 00000000..6e9dd2ea --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h @@ -0,0 +1,142 @@ +/****************************************************************************//** + \file hsmci.h + + \brief The header file describes the HSMCI interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 24/08/11 N. Fomin - Created + ******************************************************************************/ +#ifndef _HSMCI_H +#define _HSMCI_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief Hsmci descriptor */ +typedef struct +{ + /** \brief HSMCI bus clock rate. */ + HsmciClockRate_t clockRate; + /** \brief HSMCI bus width. */ + HsmciBusWidth_t busWidth; + /** \brief HSMCI high speed mode. */ + bool highSpeedMode; + /** \brief HSMCI command desciptor. + Take a look into halHsmci.h platform specific file fore more details. */ + HAL_HsmciCommandDescriptor_t *commandDescriptor; + /** \brief HSMCI data transfer descriptor. + Take a look into halHsmci.h platform specific file fore more details. */ + HAL_HsmciDataTransferDescriptor_t *dataTransferDescriptor; + /** \brief Address of the function to notify the upper layer when + a transfer was completed. */ + void (*callback)(void); +} HAL_HsmciDescriptor_t; + +/**************************************************************************//** +\brief Open the HSMCI interface and configure pins. +\param[in] + descriptor - pointer to the hsmci descriptor. +\return + -1 - there are no free resources; + 0 - HSMCI is ready. +******************************************************************************/ +int HAL_OpenHsmci(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Close the HSMCI interface. +\param[in] + descriptor - pointer to the hsmci descriptor. +\return + Returns 0 on success or -1 if interface was not opened. +******************************************************************************/ +int HAL_CloseHsmci(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sends HSMCI command. + Callback function will be used to notify about the finishing transmitting. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + -1 - hsmci interface was not opened, there is unsent data, + or command response buffer is zero; + 0 - on succes. +******************************************************************************/ +int HAL_WriteHsmciCommand(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Writes data to the HSMCI. + Callback function will be used to notify about the finishing transmitting. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + -1 - hsmci interface was not opened, there is unsent data, pointer to the data, + the length are zero or command response buffer is zero; + 0 - on success. +******************************************************************************/ +int HAL_WriteHsmci(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Reads data from the HSMCI. + Callback function will be used to notify about the finishing transmitting. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + -1 - hsmci module was not opened, there is unsent data, pointer to the data, + the interface are zero or command response buffer is zero; + 0 - on success. +******************************************************************************/ +int HAL_ReadHsmci(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sets HSMCI bus speed. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + -1 - hsmci interface was not opened or there is unsent data; + 0 - on success. +******************************************************************************/ +int HAL_SetHsmciSpeed(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sets HSMCI bus width. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + -1 - hsmci interface was not opened or there is unsent data; + 0 - on success. +******************************************************************************/ +int HAL_SetHsmciBusWidth(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sets HSMCI high speed mode. +\param[in] + descriptor - pointer to hsmci descriptor. +\return + -1 - hsmci interface was not opened or there is unsent data; + 0 - on success. +******************************************************************************/ +int HAL_SetHsmciHighSpeedMode(HAL_HsmciDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Checks if HSMCI interface is free and ready. +\return + false - hsmci interface was not opened or there is unsent data; + true - hsmci interface is ready. +******************************************************************************/ +bool HAL_HsmciCheckReady(void); + +#endif /* _HSMCI_H */ +// eof hsmci.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h new file mode 100644 index 00000000..102f2cd6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h @@ -0,0 +1,165 @@ +/**************************************************************************//** + \file i2cPacket.h + + \brief The header file describes the i2cPacket interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _I2CPACKET_H +#define _I2CPACKET_H + +/****************************************************************************** + Includes section +******************************************************************************/ +// \cond +#include +#include +// \endcond + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief i2c bus prescaler */ +#define HAL_I2C_PRESCALER 0ul +// \cond +/** \brief internal address size */ +#if defined(AT91SAM7X256) + /* AT91C_TWI_IADRSZ_NO */ + #define HAL_NO_INTERNAL_ADDRESS (0x0 << 8) + /* AT91C_TWI_IADRSZ_1_BYTE */ + #define HAL_ONE_BYTE_SIZE (0x1 << 8) + /* AT91C_TWI_IADRSZ_2_BYTE */ + #define HAL_TWO_BYTE_SIZE (0x2 << 8) + /* AT91C_TWI_IADRSZ_3_BYTE */ + #define HAL_THREE_BYTE_SIZE (0x3 << 8) +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + #define HAL_NO_INTERNAL_ADDRESS 0x0 + #define HAL_ONE_BYTE_SIZE 0x1 + #define HAL_TWO_BYTE_SIZE 0x2 + #define HAL_THREE_BYTE_SIZE 0x3 +#endif +// \endcond + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief i2c baud rate */ +#if defined(AT91SAM7X256) + typedef enum + { + I2C_CLOCK_RATE_250 = F_CPU/(2*250000) - 3, // 200 Kb/s clock rate + I2C_CLOCK_RATE_125 = F_CPU/(2*125000) - 3, // 125 Kb/s clock rate + I2C_CLOCK_RATE_100 = F_CPU/(2*100000) - 3, // 100 Kb/s clock rate + I2C_CLOCK_RATE_62 = F_CPU/(2*62500) - 3 // 62.5 Kb/s clock rate + } I2cClockRate_t; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + typedef enum + { + I2C_CLOCK_RATE_250 = ((F_CPU/250000ul) - 16ul)/(2ul * (1ul << HAL_I2C_PRESCALER) * (1ul << HAL_I2C_PRESCALER)), // 250 Kb/s clock rate + I2C_CLOCK_RATE_125 = ((F_CPU/125000ul) - 16ul)/(2ul * (1ul << HAL_I2C_PRESCALER) * (1ul << HAL_I2C_PRESCALER)), // 125 Kb/s clock rate + I2C_CLOCK_RATE_62 = ((F_CPU/62500ul) - 16ul)/(2ul * (1ul << HAL_I2C_PRESCALER) * (1ul << HAL_I2C_PRESCALER)) // 62.5 Kb/s clock rate + } I2cClockRate_t; +#endif + +/** \brief TWI clock rate */ +typedef struct +{ + I2cClockRate_t clockrate; // clock rate +} HAL_i2cMode_t; + +/**************************************************************************//** +\brief i2c access control structure +******************************************************************************/ +typedef struct +{ + /** \brief slave address */ + uint8_t id; + /** \brief number of bytes to be written to the bus */ + uint16_t length; + /** \brief pointer to the data */ + uint8_t *data; + /** \brief internal device address size conditions: + HAL_NO_INTERNAL_ADDRESS - byte command condition \n + HAL_ONE_BYTE_SIZE \n + HAL_TWO_BYTE_SIZE \n + HAL_THREE_BYTE_SIZE */ +#if defined(AT91SAM7X256) + uint32_t lengthAddr; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + uint8_t lengthAddr; +#endif + /** \brief internal device address */ + uint32_t internalAddr; + /** \brief callback function */ + void (*f)(bool result); +} HAL_I2cParams_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Opens twi resource.\n +field of i2cMode structure \n +i2cClockRate_t clockrate (set by user). Must be chosen from:\n + I2C_CLOCK_RATE_250 - 250 Kb/s clock rate \n + I2C_CLOCK_RATE_125 - 125 Kb/s clock rate \n + I2C_CLOCK_RATE_62 - 62.5 Kb/s clock rate \n + +\param[in] + i2cMode - pointer to the mode structure. + +\return + -1 - resource was already open or pointer is NULL. \n + 0 - success. +******************************************************************************/ +int HAL_OpenI2cPacket(HAL_i2cMode_t *i2cMode); + +/**************************************************************************//** +\brief Closes resource. + +\return + -1 - resource was not open. \n + 0 - success. +******************************************************************************/ +int HAL_CloseI2cPacket(void); + +/**************************************************************************//** +\brief Writes a series of bytes out to the TWI bus. Operation result will be +sent to the callback function of the HAL_I2cParams_t structure. + +\param[in] + param - pointer to HAL_I2cParams_t structure +\return + 0 - the bus is free and the request is accepted. \n + -1 - otherwise. +******************************************************************************/ +int HAL_WriteI2cPacket(HAL_I2cParams_t *param); + +/**************************************************************************//** +\brief Reads the series of bytes from the TWI bus. Operation result will be +sent to the callback function of the HAL_I2cParams_t structure. + +\param[in] + param - pointer to HAL_I2cParams_t structure +\return + 0 - the bus is free and the request is accepted. \n + -1 - otherwise. +******************************************************************************/ +int HAL_ReadI2cPacket(HAL_I2cParams_t *param); + +#endif /* _I2CPACKET_H */ +// eof i2cPacket.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h new file mode 100644 index 00000000..bc2a36df --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h @@ -0,0 +1,203 @@ +/**************************************************************************//** + \file irq.h + + \brief The header file describes the IRQ interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _IRQ_H +#define _IRQ_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief The low level generates an interrupt request. */ +#define IRQ_LOW_LEVEL 0 +/** \brief The high level generates an interrupt request (valid only for arm and avr32). */ +#define IRQ_HIGH_LEVEL 1 +/** \brief Any edge generates an interrupt request (valid only for avr and xmega). */ +#define IRQ_ANY_EDGE 2 +/** \brief Falling edge generates an interrupt request. */ +#define IRQ_FALLING_EDGE 3 +/** \brief Rising edge generates an interrupt request. */ +#define IRQ_RISING_EDGE 4 +/** \brief interrupt is disabled. (valid only for xmega)*/ +#define IRQ_IS_DISABLED 5 +/** \brief interrupt is not changed previous state. (valid only for xmega)*/ +#define IRQ_IS_NOT_CHANGED 6 + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief numbers of possible interrupt. */ +typedef enum +{ +#if defined(AT91SAM7X256) || defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \ + defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(AT32UC3A0512) +/** \brief number of valid interrupt for arm and avr32. */ + IRQ_0 = 0, +/** \brief number of valid interrupt for arm and avr32. */ + IRQ_1 = 1, +/** \brief number of valid interrupt for avr32. */ + IRQ_2 = 2, +/** \brief number of valid interrupt for avr32. */ + IRQ_3 = 3, +/** \brief number of valid interrupt for avr32. */ + IRQ_4 = 4, +/** \brief number of valid interrupt for avr(only rcb platform) and avr32. */ + IRQ_5 = 5, +/** \brief number of valid interrupt for avr and avr32. */ + IRQ_6 = 6, +/** \brief number of valid interrupt for avr and avr32. */ + IRQ_7 = 7, +#endif +#if defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + IRQ_A0, + IRQ_A1, + IRQ_B0, + IRQ_B1, + IRQ_C0, + IRQ_C1, + IRQ_D0, + IRQ_D1, + IRQ_E0, + IRQ_E1, + IRQ_F0, + IRQ_F1, +#if defined(ATXMEGA128A1) + IRQ_H0, + IRQ_H1, + IRQ_J0, + IRQ_J1, + IRQ_K0, + IRQ_K1, +#endif +#endif +#if defined(AT91SAM3S4C) + IRQ_PORT_A, + IRQ_PORT_B, + IRQ_PORT_C, +#endif + IRQ_LIMIT +} HAL_IrqNumber_t; + +#if defined(AT91SAM7X256) || defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \ + defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(AT32UC3A0512) +/** \brief interrupt activation condition. */ +typedef uint8_t HAL_IrqMode_t; +#endif +#if defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) +/** \brief interrupt activation condition. */ +typedef struct +{ + uint32_t pin0 : 3; + uint32_t pin1 : 3; + uint32_t pin2 : 3; + uint32_t pin3 : 3; + uint32_t pin4 : 3; + uint32_t pin5 : 3; + uint32_t pin6 : 3; + uint32_t pin7 : 3; +} HAL_IrqMode_t; +#endif +#if defined(AT91SAM3S4C) +typedef uint8_t HAL_IrqMode_t[32]; +#endif + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Registers the user's irqNumber external interrupt + +\param[in] + irqNumber - IRQ number. Must be chosen from: \n + IRQ_0 (for arm and avr32) \n + IRQ_1 (for arm and avr32) \n + IRQ_2 (for avr32) \n + IRQ_3 (for avr32) \n + IRQ_4 (for avr32) \n + IRQ_5 (for avr (only rcb platform) and avr32) \n + IRQ_6 (for avr and avr32) \n + IRQ_7 (for avr and avr32) \n + IRQ_PC (for xmega. P - port name, C - interrupt number. For example: IRQ_D1) \n + IRQ_PORT_x (for cortex m3, x stands for port name) \n +\param[in] + irqMode - Controls the sort of interrupt. For avr and arm must be chosen from: \n + IRQ_LOW_LEVEL // The low level generates an interrupt request. \n + IRQ_HIGH_LEVEL // The high level generates an interrupt request (valid for arm, avr32, cortex m3). \n + IRQ_ANY_EDGE // Any edge generates an interrupt request (valid for avr and cortex m3). \n + IRQ_FALLING_EDGE // Falling edge generates an interrupt request. \n + IRQ_RISING_EDGE // Rising edge generates an interrupt request. \n + + irqMode is bit field for xmega . Bit field includes members pinX (X - pin number of selected port). \n + All members that bit field must have value: + + IRQ_LOW_LEVEL // The low level generates an interrupt request. \n + IRQ_ANY_EDGE // Any edge generates an interrupt request. \n + IRQ_FALLING_EDGE // Falling edge generates an interrupt request. \n + IRQ_RISING_EDGE // Rising edge generates an interrupt request. \n + IRQ_IS_DISABLED // Pin is disabled for interrupt request. \n + IRQ_IS_NOT_CHANGED // Pin is not changed previous state. + +\param[in] + f - user's interrupt handler. Handler must be executed less than 100 us. +\return + -1 - if irqNumber is out of range, \n + not valid irq mode, \n + such interrupt has been already registered. \n + 0 - otherwise. +******************************************************************************/ +int HAL_RegisterIrq(HAL_IrqNumber_t irqNumber, HAL_IrqMode_t irqMode, void (*f)(void)); + +/**************************************************************************//** +\brief Enables the irqNumber interrupt. +\param[in] + irqNumber - IRQ number +\return + -1 - if irqNumber is out of range or has not been registered yet. \n + 0 - otherwise. +******************************************************************************/ +int HAL_EnableIrq(HAL_IrqNumber_t irqNumber); + +/**************************************************************************//** +\brief Disables the irqNumber interrupt. +\param[in] + irqNumber - IRQ number +\return + -1 - if irqNumber is out of range or has not been registered yet. \n + 0 - otherwise. +******************************************************************************/ +int HAL_DisableIrq(HAL_IrqNumber_t irqNumber); + +/**************************************************************************//** +\brief Unregisters the user's irqNumber interrupt +\param[in] + irqNumber - IRQ number +\return + -1 - if irqNumber is out of range or has not been registered yet. \n + 0 - otherwise. +******************************************************************************/ +int HAL_UnregisterIrq(HAL_IrqNumber_t irqNumber); + +#endif /* _IRQ_H */ +//eof irq.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h new file mode 100644 index 00000000..d2b18cff --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h @@ -0,0 +1,193 @@ +/**************************************************************************//** + \file pwm.h + + \brief Description of the PWM interface + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/11/08 A. Taradov - Created + 5/04/11 A.Razinkov - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _PWM_H +#define _PWM_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define TCCRnA(pwmUnit) MMIO_BYTE(pwmUnit) +#define TCCRnB(pwmUnit) MMIO_BYTE(pwmUnit + 1U) +#define TCCRnC(pwmUnit) MMIO_BYTE(pwmUnit + 2U) +#define TCNTn(pwmUnit) MMIO_WORD(pwmUnit + 4U) +#define ICRn(pwmUnit) MMIO_WORD(pwmUnit + 6U) +#define OCRnA(pwmUnit) MMIO_WORD(pwmUnit + 8U) +#define OCRnB(pwmUnit) MMIO_WORD(pwmUnit + 10U) +#define OCRnC(pwmUnit) MMIO_WORD(pwmUnit + 12U) + +#define PWM_SUCCESS_STATUS 0 +#define PWM_INVALID_UNIT_STATUS -1 +#define PWM_INVALID_CHANNEL_STATUS -2 +#define PWM_INVALID_PRESCALER_STATUS -3 + +/****************************************************************************** + Types section +******************************************************************************/ +/**************************************************************************//** +\brief PWM prescaler +******************************************************************************/ +typedef enum +{ + PWM_STOPPED, + PWM_PRESCALER_1, + PWM_PRESCALER_8, + PWM_PRESCALER_64, + PWM_PRESCALER_256, + PWM_PRESCALER_1024, + PWM_PRESCALER_EXT_CLOCK_ON_FALLING_EDGE, + PWM_PRESCALER_EXT_CLOCK_ON_RISING_EDGE, + PWM_PRESCALER_INVALID +} HAL_PwmPrescaler_t; + +/**************************************************************************//** +\brief PWM channel +******************************************************************************/ +typedef enum +{ + PWM_CHANNEL_0, + PWM_CHANNEL_1, +#ifndef ATMEGA1284 + PWM_CHANNEL_2, +#endif /* ATMEGA1284 */ + PWM_INVALID_CHANNEL +} HAL_PwmChannel_t; + +/**************************************************************************//** +\brief PWM impulse polarity +******************************************************************************/ +typedef enum +{ + /** \brief PWM output is low when duty cycle = 0% */ + PWM_POLARITY_NON_INVERTED, + /** \brief PWM output is high when duty cycle = 0% */ + PWM_POLARITY_INVERTED +} HAL_PwmPolarity_t; + +/**************************************************************************//** +\brief PWM unit number. Relative to corresponding Timer/Counter. +******************************************************************************/ +typedef enum +{ + /* Base address of T/C1 PWM related registers */ + PWM_UNIT_1 = 0x80, + /* Base address of T/C3 PWM related registers */ + PWM_UNIT_3 = 0x90 +} HAL_PwmUnit_t; + +/**************************************************************************//** +\brief PWM module descriptor +******************************************************************************/ +typedef struct _HAL_PwmDescriptor_t +{ + /* Service fields for internal use. */ + struct + { + /* Pointer to Data Direction Register. PWM port dependent. */ + volatile uint8_t *DDRn; + /* PWN channel pin number. PWM port dependent. */ + uint8_t pwmBaseChannelPin; + /* Compare Output Mode low bit position. PWM channel dependent. */ + uint8_t COMnx0; + /* Output Compare Register. PWM channel dependent. */ + volatile uint16_t *OCRnx; + } service; + /* PWM unit number. Equal to ID of Timer/Counter witch serves PWM module. */ + HAL_PwmUnit_t unit; + /* PWM channel */ + HAL_PwmChannel_t channel; + /* PWM polarity */ + HAL_PwmPolarity_t polarity; +} HAL_PwmDescriptor_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initializes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. + +\return operation status +******************************************************************************/ +int HAL_OpenPwm(HAL_PwmUnit_t pwmUnit); + +/**************************************************************************//** +\brief Starts PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. + +\return operation status +******************************************************************************/ +int HAL_StartPwm(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Stops PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. + +\return operation status +******************************************************************************/ +int HAL_StopPwm(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sets base frequency of module. Common for all module channels. + +\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID. +\param [in] top - value for the TOP register. +\param [in] prescaler - clock prescaler. + +\return operation status +******************************************************************************/ +int HAL_SetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler); + + +/**************************************************************************//** +\brief Sets compare value for the PWM channel. + +\param [in] descriptor - PWM channel descriptor. + +\return operation status +******************************************************************************/ +int HAL_SetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue); + +/**************************************************************************//** +\brief Closes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. + +\return operation status +******************************************************************************/ +int HAL_ClosePwm(HAL_PwmUnit_t pwmUnit); + +#endif /* _PWM_H */ + +// eof pwm.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h new file mode 100644 index 00000000..b531f963 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h @@ -0,0 +1,33 @@ +/**************************************************************************//** + \file reducePower.h + + \brief The header file describes the power reducing interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 6/10/09 A. Khromykh - Created. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +#ifndef _REDUCEPOWER_H +#define _REDUCEPOWER_H + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +\brief Stops the clock to all peripherals, which are not used by BitCloud. \n +(implemented only for atxmega128a1 & atxmega256a3). +******************************************************************************/ +void HAL_SwitchOffPeripherals(void); + +#endif /* _REDUCEPOWER_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h new file mode 100644 index 00000000..25311296 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h @@ -0,0 +1,153 @@ +/**************************************************************************//** + \file resetReason.h + + \brief The header file describes the the reset reason interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created. + 2/09/09 M. Gekk - Platform XMega is supported. + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _RESETREASON_H +#define _RESETREASON_H + +/* \cond */ +/****************************************************************************** + Define(s) section + ******************************************************************************/ +#define TEMP_WARM_RESET 0x12 +/* \endcond */ + +/****************************************************************************** + Types section + ******************************************************************************/ +/** \brief The reset reason types. */ +#if defined(AT91SAM7X256) + typedef enum + { + /** \brief VDDCORE rising */ + POWER_ON_RESET = 0x00, + /** \brief Watchdog fault occurred */ + WDT_RESET = 0x02, + /** \brief Processor reset required by the software */ + WARM_RESET = 0x03, + /** \brief NRST pin detected low */ + EXTERNAL_RESET = 0x04, + /** \brief BrownOut reset occurred */ + BROWN_OUT_RESET = 0x05 + } HAL_ResetReason_t; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + typedef enum + { + /** \brief jump to the NULL pointer was issued. */ + NULL_PTR_DEREF_RESET = 0x0, + /** \brief the supply voltage was below reset threshold. */ + POWER_ON_RESET = 0x1, + /** \brief a low level was present on RESET pin. */ + EXTERNAL_RESET = 0x2, + /** \brief the supply voltage was below Brown-out reset threshold. Set by fuses.*/ + BROWN_OUT_RESET = 0x4, + /** \brief Watch Dog Timer period expired. */ + WDT_RESET = 0x8, + /** \brief MCU was reset by JTAG. */ + JTAG_RESET = 0x10, + /** \brief software reset. */ + WARM_RESET = 0x11 + } HAL_ResetReason_t; +#elif defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + typedef enum + { + /** \brief jump to the NULL pointer was issued. */ + NULL_PTR_DEREF_RESET = 0x00, + /** \brief Power-on reset is released when the VCC stops rising or when + * the VCC level has reached the Power-on Threshold Voltage (VPOT) level. */ + POWER_ON_RESET = (1U << 0), + /** \brief The external reset will trigger when the RESET pin is driven + * below the RESET pin threshold voltage, VRST. */ + EXTERNAL_RESET = (1U << 1), + /** \brief The VCC level falls bellow the trigger level for a minimum time. */ + BROWN_OUT_RESET = (1U << 2), + /** \brief Watchdog reset will be given if the WDT is not reset from t + * he software within a programmable timout period, */ + WATCHDOG_RESET = (1U << 3), + /** \brief The Program and Debug Interface reset contains a separate reset source + * that is used to reset the device during external programming and debugging. */ + DEBUG_RESET = (1U << 4), + /** \brief The Software reset makes it possible to issue a system reset from + * software by writing to the Software Reset bit in the Reset Control Register. */ + WARM_RESET = (1U << 5) + } HAL_ResetReason_t; +#elif defined(AT32UC3A0512) + typedef enum + { + /** \brief The CPU was reset due to the supply voltage + * being lower than the power-on threshold level. */ + POWER_ON_RESET = (1U << 0), + /** \brief The CPU was reset due to the supply voltage + * being lower than the brown-out threshold level. */ + BROWN_OUT_RESET = (1U << 1), + /** \brief The CPU was reset due to the RESET pin being asserted. */ + EXTERNAL_RESET = (1U << 2), + /** \brief CPU reset caused by watchdog. */ + WDT_RESET = (1U << 3), + /** \brief The CPU was reset by setting the bit RC_CPU in the JTAG reset register. */ + DEBUG_RESET = (1U << 4), + /** \brief The CPU was reset because it had detected an illegal access. */ + CPUERR_RESET = (1U << 7), + /** \brief The CPU was reset because the RES strobe in + * the OCD Development Control register has been written to one. */ + OCDRST_RESET = (1U << 8), + /** \brief The chip was reset by setting the bit RC_OCD in the + * JTAG reset register or by using the JTAG HALT instruction.*/ + JTAGHARD_RESET = (1U << 9), + /** \brief CPU reset caused by call to halSoftwareReset. */ + WARM_RESET = (1U << 10), + } HAL_ResetReason_t; +#elif defined(AT91SAM3S4C) + typedef enum + { + /** \brief A general reset occurs when a Power-on-reset is detected, + a Brownout or a Voltage regulation loss is detected by the Supply controller. */ + GENERAL_RESET = 0x00, + /** \brief A Backup reset occurs when the chip returns from Backup mode. + The core_backup_reset signal is asserted by the Supply Controller when a Backup reset occurs. */ + BACKUP_RESET = 0x01, + /** \brief CPU reset caused by watchdog. */ + WDT_RESET = 0x02, + /** \brief CPU reset caused by call to halSoftwareReset. */ + WARM_RESET = 0x03, + /** \brief The CPU was reset due to the RESET pin being asserted. */ + EXTERNAL_RESET = 0x04 + } HAL_ResetReason_t; +#else + #error 'unsupported cpu' +#endif + +/****************************************************************************** + Prototypes section + ******************************************************************************/ +/****************************************************************************** + \brief Returns the reset reason. + \return The reason of reset. + ******************************************************************************/ +HAL_ResetReason_t HAL_ReadResetReason(void); + +/**************************************************************************//** + \brief Software reset. + ******************************************************************************/ +void HAL_WarmReset(void); + +#endif /* _RESETREASON_H */ +/* resetReason.h */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h new file mode 100644 index 00000000..dc5c55b1 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h @@ -0,0 +1,71 @@ +/**************************************************************************//** + \file sleep.h + + \brief The header file describes the sleep interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/12/09 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +#ifndef _SLEEP_H +#define _SLEEP_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +typedef void (* HAL_WakeUpCallback_t)(void); + +/** \brief fields of structure \n + \brief uint32_t sleepTime - time of mcu+radio sleeping \n + \brief HAL_WakeUpCallback_t callback - pointer to wake up callback function */ +typedef struct +{ + uint32_t sleepTime; + HAL_WakeUpCallback_t callback; +} HAL_Sleep_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Starts sleep timer and HAL sleep. When system is wake up send callback +\param[in] + sleepParam - pointer to sleep structure. +\return + -1 - bad parameters, \n + -2 - sleep timer busy, \n + -3 - sleep system has been started. + 0 - success. +******************************************************************************/ +int HAL_StartSystemSleep(HAL_Sleep_t *sleepParam); + +/**************************************************************************//** +\brief Prepares mcu for power-save, power-down. + Power-down the mode is possible only when internal RC is used +\return + -1 - there is no possibility to sleep. +******************************************************************************/ +int HAL_Sleep(void); + +/***************************************************************************//** +\brief Makes MCU enter Idle mode. +*******************************************************************************/ +void HAL_IdleMode(void); + +#endif /* _SLEEP_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h new file mode 100644 index 00000000..87c29632 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h @@ -0,0 +1,69 @@ +/**************************************************************************//** + \file sleepTimer.h + + \brief The header file describes the sleepTimer interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _SLEEPTIMER_H +#define _SLEEPTIMER_H + +// \cond +/****************************************************************************** + Includes section +******************************************************************************/ +#include +// \endcond + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief fields of structure \n + \brief uint32_t interval - timer firing interval (set by user) \n + \brief TimerMode_t mode - timer work mode (set by user). Must be chosen from: \n + TIMER_REPEAT_MODE \n + TIMER_ONE_SHOT_MODE \n + \brief void (*callback)() - pointer to the timer callback function (set by user) \n */ +typedef Timer_t HAL_SleepTimer_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Starts sleep timer. Interval must be greater one time of sleep timer tick. +\param[in] + sleepTimer - pointer to sleep timer structure. +\return + -1 - NULL pointer, \n + -2 - interval can not be counted out, \n + -3 - sleep timer has already started, \n + 0 - otherwise. +******************************************************************************/ +int HAL_StartSleepTimer(HAL_SleepTimer_t *sleepTimer); + +/**************************************************************************//** +\brief Removes timer. +\param[in] + sleepTimer - address of the timer to be removed from the list +\return + -1 - there is no active sleep timer, \n + 0 - otherwise. +******************************************************************************/ +int HAL_StopSleepTimer(HAL_SleepTimer_t *sleepTimer); + +#endif /* _SLEEPTIMER_H */ +// eof sleepTimer.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h new file mode 100644 index 00000000..c34f5dcd --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h @@ -0,0 +1,173 @@ +/****************************************************************************//** + \file spi.h + + \brief The header file describes the USART SPI mode (for avr) and SPI1 bus (for arm). + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _SPI_H +#define _SPI_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#if defined(AT91SAM7X256) + #include +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \ + defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(ATXMEGA128A1) || \ + defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + #include +#endif + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief Spi descriptor */ +typedef struct +{ + /** \brief tty - SPI_CHANNEL_n to be used. "n" range depends on the platform. + Take a look into halSpi.h platform specific file fore more details. */ + SpiChannel_t tty; + /** \brief SpiClockMode_t clockMode - spi clock mode (set by user). Must be chosen from: \n + SPI_CLOCK_MODE0 \n + SPI_CLOCK_MODE1 \n + SPI_CLOCK_MODE2 \n + SPI_CLOCK_MODE3 \n */ + SpiClockMode_t clockMode; +#if defined(AT91SAM7X256) + /** \brief parameters are valid only for arm: */ + /** \brief symbol size (bits) (set by user). Must be set: \n + SPI_8BITS_SYMBOL \n + SPI_9BITS_SYMBOL \n + SPI_10BITS_SYMBOL \n + SPI_11BITS_SYMBOL \n + SPI_12BITS_SYMBOL \n + SPI_13BITS_SYMBOL \n + SPI_14BITS_SYMBOL \n + SPI_15BITS_SYMBOL \n + SPI_16BITS_SYMBOL \n */ + SpiSymbolSize_t symbolSize; + /** \brief Must be use macros HAL_SPI_PACK_PARAMETER(freq_value, valid_delay_value, cons_delay_value). \n + Where is: \n + freq_value - spi frequency (Hz) \n + valid_delay_value - delay between setting CS and clock start (sec) \n + cons_delay_value - delay between consecutive transfers (sec) \n */ + uint32_t pack_parameter; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || \ + defined(ATMEGA128RFA1) || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + /** \brief parameters are valid only for avr:*/ + /** \brief spi data order (set by user). Must be chosen from: \n + SPI_DATA_MSB_FIRST \n + SPI_DATA_LSB_FIRST \n */ + SpiDataOrder_t dataOrder; + /** \brief spi clock rate (set by user). Must be chosen from: \n + for atmega \n + SPI_CLOCK_RATE_62 \n + SPI_CLOCK_RATE_125 \n + SPI_CLOCK_RATE_250 \n + SPI_CLOCK_RATE_500 \n + + for xmega mcu clock \n + SPI_CLOCK_RATE_125 (4 MHz) \n + SPI_CLOCK_RATE_250 (4, 8 MHz) \n + SPI_CLOCK_RATE_500 (4, 8, 16 MHz) \n + SPI_CLOCK_RATE_750 (12 MHz ) \n + SPI_CLOCK_RATE_1000 (4, 8, 16, 32 MHz) \n + SPI_CLOCK_RATE_1500 (12 MHz) \n + SPI_CLOCK_RATE_2000 (4, 8, 16, 32 MHz) \n + SPI_CLOCK_RATE_3000 (12 MHz) \n + SPI_CLOCK_RATE_4000 (8, 16, 32 MHz) \n + SPI_CLOCK_RATE_6000 (12 MHz) \n + SPI_CLOCK_RATE_8000 (16, 32 MHz) \n + SPI_CLOCK_RATE_16000 (32 MHz) */ + SpiBaudRate_t baudRate; + /** \brief HAL USART service field - contains variables for HAL USART module + internal needs */ + HAL_UsartDescriptor_t spiDescriptor; +#endif + union + { + /** \brief address of the function to notify the application when a transmission was completed. \n + When the synchronous method is used, callback must be NULL. \n */ + void (* callback)(void); + /** \brief address of the function to notify the application when a byte was received. \n + Slave mode uses only asynchronous method. \n */ + void (* slave_callback)(uint16_t); + }; +} HAL_SpiDescriptor_t; + +/**************************************************************************//** +\brief Open the SPI interface and configure pins. +\param[in] + descriptor - pointer to the spi descriptor. +\return + -1 - there not are free resources. + 0 - SPI channel is ready. +******************************************************************************/ +int HAL_OpenSpi(HAL_SpiDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Close the SPI channel and pins. +\param[in] + descriptor - pointer to the spi descriptor. +\return + Returns 0 on success or -1 if channel was not opened. +******************************************************************************/ +int HAL_CloseSpi(HAL_SpiDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Writes a length bytes to the SPI. \n + Callback function will be used to notify about the finishing transmitting. + (only for master spi) +\param[in] + descriptor - pointer to spi descriptor +\param[in] + buffer - pointer to application data buffer; +\param[in] + length - number bytes for transfer; +\return + -1 - spi module was not opened, there is unsent data, pointer to the data or + the length are zero; \n + 0 - on success or a number; \n + Number of written bytes if the synchronous method is used(callback is NULL), \n + only for master spi. +******************************************************************************/ +int HAL_WriteSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/**************************************************************************//** +\brief For master : writes a number of bytes to the spi.\n + Callback function will be used to notify when the activity is finished.\n + The read data is placed to the buffer. \n + For slave: reads a number of bytes from internal spi buffer and writes them \n + to application buffer. +\param[in] + descriptor - pointer to HAL_SpiDescriptor_t structure +\param[in] + buffer - pointer to the application data buffer +\param[in] + length - number of bytes to transfer +\return + -1 - spi module was not opened, or there is unsent data, or the pointer to + data or the length are NULL; \n + 0 - success for master; \n + Number of written bytes if the synchronous method is used(callback is NULL) for master \n + or number of read bytes from internal buffer to the application buffer for slave. +******************************************************************************/ +int HAL_ReadSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +#endif /* _SPI_H */ +// eof spi.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h new file mode 100644 index 00000000..a2a52d38 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h @@ -0,0 +1,118 @@ +/************************************************************************//** + \file uart.h + + \brief + UART interface + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 17.11.2010 D. Loskutnikov - Created. +******************************************************************************/ +#ifndef _UART_H +#define _UART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Functions prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Open UART + +\param[in] desc UART descriptor +\return 1 if success, -1 if error +******************************************************************************/ +int HAL_OpenUart(HAL_UartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Close UART + +\param[in] desc UART descriptor +\return +******************************************************************************/ +int HAL_CloseUart(HAL_UartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Send contents of buffer over UART + +\param[in] desc UART descriptor +\param[in] buffer buffer to be sent +\param[in] length buffer length +\return number of sent bytes or -1 if error +******************************************************************************/ +int HAL_WriteUart(HAL_UartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/**************************************************************************//** +\brief Copy received by UART bytes to user-supplied buffer + +\param[in] desc UART descriptor +\param[in] buffer buffer to store data +\param[in] length maximum length of buffer +\return number of actually copied bytes or -1 if error +******************************************************************************/ +int HAL_ReadUart(HAL_UartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/**************************************************************************//** +\brief Check if any bytes are pending for transmission over UART + +\param[in] desc descriptor +\return -1 if error, 0 if not, 1 if yes +******************************************************************************/ +int HAL_IsUartTxEmpty(HAL_UartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Store UART error conditions + +\param[in] desc UART descriptor +\param[in] err error condition +******************************************************************************/ +void halUartStoreError(HAL_UartDescriptor_t *desc, uint8_t err); + +/**************************************************************************//** +\brief Send byte from FIFO over UART + +\param[in] desc UART descriptor +******************************************************************************/ +void halUartTx(HAL_UartDescriptor_t *desc); + +/**************************************************************************//** +\brief Store received byte to FIFO + +\param[in] desc UART descriptor +******************************************************************************/ +void halUartStoreRx(HAL_UartDescriptor_t *desc); + +/**************************************************************************//** +\brief UART transmission complete handler + +\param[in] desc UART descriptor +******************************************************************************/ +void halSigUartTransmissionComplete(HAL_UartDescriptor_t *desc); + +/**************************************************************************//** +\brief UART reception complete handler + +\param[in] desc UART descriptor +******************************************************************************/ +void halSigUartReceptionComplete(HAL_UartDescriptor_t *desc); + +/**************************************************************************//** +\brief UART error handler + +\param[in] desc UART descriptor +******************************************************************************/ +void halSigUartErrorOccurred(HAL_UartDescriptor_t *desc); + +#endif /* _UART_H */ +// eof uart.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h new file mode 100644 index 00000000..1adbaeb6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h @@ -0,0 +1,48 @@ +/**************************************************************************//** + \file uid.h + + \brief The header file describes the UID interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 7/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _UID_H +#define _UID_H + +/****************************************************************************** + Includes section +******************************************************************************/ +// \cond +#include +// \endcond + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/************************************************************//** +\brief UID discovery. +\param[in] + id - UID buffer pointer. \n + Attention! Memory size must equal (Number of devices) * 8 bytes +\return + 0 - if UID of DS2411 has been found successfully; \n + -1 - if some error occured during UID discovery. +****************************************************************/ +int HAL_ReadUid(uint64_t *id); + +#endif /* _UID_H */ + +// eof uid.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h new file mode 100644 index 00000000..f81a5de7 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h @@ -0,0 +1,289 @@ +/****************************************************************************//** + \file usart.h + + \brief The header file describes the usart interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 22/08/07 A. Khromykh - Created +*******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +#ifndef _USART_H +#define _USART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +// \cond +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define USART_FLOW_CONTROL_NONE 0 +#define USART_FLOW_CONTROL_HARDWARE (1 << 0) +#define USART_DTR_CONTROL (1 << 1) + +#if defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \ + defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(ATXMEGA128A1) || \ + defined(ATXMEGA256A3) || defined(ATXMEGA256D3) + // this define is used only by HAL. + #define USART_SPI_READ_MODE (1 << 4) + #define USART_SPI_WRITE_MODE (1 << 3) +#endif +// \endcond + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief Usart descriptor*/ +typedef struct +{ + /** \brief HAL USART service field - contains variables for HAL USART module + internal needs */ + HalUsartService_t service; + /** \brief tty - USART_CHANNEL_n to be used. "n" range depends on the platform. + Take a look into halUsart.h platform specific file fore more details. */ + UsartChannel_t tty; + /** \brief Sets synchronous or asynchronous routine. \n + Must be chosen from: \n + USART_MODE_ASYNC \n + USART_MODE_RS485 (only for arm)\n + USART_MODE_SYNC \n */ + UsartMode_t mode; + /** \brief baudrate - USART baud rate. Must be chosen from: \n + USART_BAUDRATE_1200 \n + USART_BAUDRATE_2400 \n + USART_BAUDRATE_4800 \n + USART_BAUDRATE_9600 \n + USART_BAUDRATE_19200 \n + USART_BAUDRATE_38400 \n + USART_SYNC_BAUDRATE_1200 \n + USART_SYNC_BAUDRATE_2400 \n + USART_SYNC_BAUDRATE_4800 \n + USART_SYNC_BAUDRATE_9600 \n + USART_SYNC_BAUDRATE_38400 \n + USART_SYNC_BAUDRATE_57600 \n + USART_SYNC_BAUDRATE_115200 \n */ + UsartBaudRate_t baudrate; + /** \brief data - USART data length. Must be chosen from: \n + USART_DATA5 \n + USART_DATA6 \n + USART_DATA7 \n + USART_DATA8 \n */ + UsartData_t dataLength; + /** \brief parity - USART parity mode. Must be chosen from: \n + USART_PARITY_NONE \n + USART_PARITY_EVEN \n + USART_PARITY_ODD \n */ + UsartParity_t parity; + /** \brief stopbits - USART stop bits number. Must be chosen from: \n + USART_STOPBIT_1 \n + USART_STOPBIT_2 \n */ + UsartStopBits_t stopbits; + /** \brief edge - data received edge (only for usart). Must be chosen from: \n + USART_EDGE_MODE_FALLING \n + USART_EDGE_MODE_RISING \n */ + UsartEdgeMode_t edge; + /** \brief master or slave on usart (only for usart). Must be chosen from: + USART_CLK_MODE_MASTER \n + USART_CLK_MODE_SLAVE \n */ + UsartClkMode_t syncMode; + /** \brief It's pointer to receive buffer. \n + If rxBuffer is NULL then transactions are discarded. \n + Size of buffer depends on user application. */ + uint8_t *rxBuffer; + /** \brief length of receive buffer */ + uint16_t rxBufferLength; + /** \brief It's pointer to transmit buffer. \n + If txBuffer is NULL then callback method is used. \n + If txBuffer isn't NULL then polling method is used. */ + uint8_t *txBuffer; + /** \brief length of transmit buffer */ + uint16_t txBufferLength; + /** \brief It's receive usart callback. \n + If rxCallback is NULL then polling method is used. \n + If rxCallback isn't NULL then callback method is used.*/ + void (*rxCallback)(uint16_t); + /** \brief It's transmitting was completed usart callback. \n + If txBuffer isn't NULL then txCallback notify about end of bytes sending. */ + void (*txCallback)(void); + #if defined(_USE_USART_ERROR_EVENT_) + /** \brief It's error was occurred usart callback. \n + If receiver error is issued then errCallback notify about issue with reason. \n + Reason must be: \n + FRAME_ERROR \n + DATA_OVERRUN \n + PARITY_ERROR */ + void (*errCallback)(UsartErrorReason_t); + #endif + /** \brief flow control of usart. One of the defines \n + USART_FLOW_CONTROL_NONE, \n + USART_FLOW_CONTROL_HARDWARE, USART_DTR_CONTROL, it is possible to combine by logical OR. \n + RS485 mode needs for USART_FLOW_CONTROL_NONE. \n + The RTS pin is driven high when the transmitter is operating. */ + uint8_t flowControl; +} HAL_UsartDescriptor_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Registers usart's event handlers. Performs configuration +of usart registers. Performs configuration of RTS, CTS and DTR pins. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure + +\return + Returns positive usart descriptor on success or -1 in cases: \n + - bad usart channel; \n + - there are not enough resources; \n +******************************************************************************/ +int HAL_OpenUsart(HAL_UsartDescriptor_t *descriptor); + +/*************************************************************************//** +\brief Releases the usart channel and pins, if hardware flow control was used. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure + +\return + -1 - bad descriptor or channel is already closed; \n + 0 - success. +*****************************************************************************/ +int HAL_CloseUsart(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Writes a number of bytes to usart channel. +txCallback function will be used to notify when the transmission is finished. +If hardware flow control is used for transmitting then RTS and DTR pins will +be tested during transmission. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\param[in] + buffer - pointer to the application data buffer; + +\param[in] + length - number of bytes to transfer; + +\return + -1 - bad descriptor; \n + Number of bytes placed to the buffer - success. +******************************************************************************/ +int HAL_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/*************************************************************************//** +\brief Reads a number of bytes from usart and places them to the buffer. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\param[in] + buffer - pointer to the application buffer; + +\param[in] + length - number of bytes to be placed to the buffer; + +\return + -1 - bad descriptor, or bad number of bytes to read; \n + Number of bytes placed to the buffer - success. +*****************************************************************************/ +int HAL_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length); + +/**************************************************************************//** +\brief Forbids the host to transmit data. +Only USART_CHANNEL_1 can be used for hardware flow control for avr. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\return + -1 - bad descriptor, bad usart, or unsupported mode; \n + 0 - success. +******************************************************************************/ +int HAL_OnUsartCts(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Allows the host to transmit data. +Only USART_CHANNEL_1 can be used for hardware flow control for avr. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\return + -1 - bad descriptor, bad usart, or unsupported mode; \n + 0 - success. +******************************************************************************/ +int HAL_OffUsartCts(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Reads RTS pin state. +Only USART_CHANNEL_1 can be used for hardware flow control for avr. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\return + -1 - bad descriptor, bad usart, or unsupported mode; \n + 0 - RTS is low level; \n + 1 - RTS is high level; +******************************************************************************/ +int HAL_ReadUsartRts(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Reads DTR pin state. +Only USART_CHANNEL_1 can be used for hardware flow control for avr. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\return + -1 - bad descriptor, bad usart, or unsupported mode; \n + 0 - DTR is low level; \n + 1 - DTR is high level; +******************************************************************************/ +int HAL_ReadUsartDtr(HAL_UsartDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Checks the status of tx buffer. + +\param[in] + descriptor - pointer to HAL_UsartDescriptor_t structure; + +\return + -1 - bad descriptor, no tx buffer; \n + 1 - tx buffer is empty; \n + 0 - tx buffer is not empty; +******************************************************************************/ +int HAL_IsTxEmpty(HAL_UsartDescriptor_t *descriptor); + +#if defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) +/**************************************************************************//** +\brief Enables DTR wake up. + +\param[in] + callback - pointer to callback method; +******************************************************************************/ +void HAL_EnableDtrWakeUp(void (* callback)(void)); + +/**************************************************************************//** +\brief Disables DTR wake up. +******************************************************************************/ +void HAL_DisableDtrWakeUp(void); +#endif + +#endif /* _USART_H */ +// eof usart.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h new file mode 100644 index 00000000..d561d8b5 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h @@ -0,0 +1,245 @@ +/**************************************************************************//** + \file usb.h + + \brief The header file describes the usb interface + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 17/07/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _USB_H +#define _USB_H + +/****************************************************************************** + Define(s) section +******************************************************************************/ +// \cond +// USB device API return values +// Indicates the operation was successful +#define STATUS_SUCCESS 0 +// Endpoint/device is already busy +#define STATUS_BUSY 1 +// Operation has been aborted +#define STATUS_ABORTED 2 +// Operation has been aborted because the device was configured +#define STATUS_RESET 3 + +// USB device states +// The device is currently suspended +#define DEVICE_SUSPENDED 0 +// USB cable is plugged into the device +#define DEVICE_ATTACHED 1 +// Host is providing +5V through the USB cable +#define DEVICE_POWERED 2 +// Device has been reset +#define DEVICE_DEFAULT 3 +// The device has been given an address on the bus +#define DEVICE_ADDRESS 5 +// A valid configuration has been selected +#define DEVICE_CONFIGURED 6 +// \endcond + +/****************************************************************************** + Types section +******************************************************************************/ +// transaction callback type +typedef void (* TransferCallback_t)(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining); + +BEGIN_PACK +// Usb endpoint descriptor +typedef struct PACK +{ + uint8_t bLength; // Size of the descriptor in bytes + uint8_t bDescriptorType; // Descriptor type + uint8_t bEndpointAddress; // Address and direction of the endpoint + uint8_t bmAttributes; // Endpoint type and additional characteristics (for isochronous endpoints) + uint16_t wMaxPacketSize; // Maximum packet size (in bytes) of the endpoint + uint8_t bInterval; // Polling rate of the endpoint +} HAL_UsbEndPointDescptr_t; +END_PACK + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Registers user's request handler + +\param[in] + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterRequestHandler(void (* f)(uint8_t *req)); + +/**************************************************************************//** +\brief Registers user's end of bus reset handler + +\param[in] + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterEndOfBusResetHandler(void (* f)(void)); + +/**************************************************************************//** +\brief Registers user's resume handler + +\param[in] + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterResumeHandler(void (* f)(void)); + +/**************************************************************************//** +\brief Registers user's suspend handler + +\param[in] + f - pointer to user's callback +******************************************************************************/ +void HAL_RegisterSuspendHandler(void (* f)(void)); + +/**************************************************************************//** +\brief Configures an endpoint according to its Endpoint Descriptor. + +\param[in] + descriptor - Pointer to an Endpoint descriptor. +******************************************************************************/ +void HAL_ConfigureEndpoint(HAL_UsbEndPointDescptr_t *descriptor); + +/**************************************************************************//** +\brief Sends data through a USB endpoint. Sets up the transfer descriptor, +writes one or two data payloads (depending on the number of FIFO bank +for the endpoint) and then starts the actual transfer. The operation is +complete when all the data has been sent. + +*If the size of the buffer is greater than the size of the endpoint +(or twice the size if the endpoint has two FIFO banks), then the buffer +must be kept allocated until the transfer is finished*. This means that +it is not possible to declare it on the stack (i.e. as a local variable +of a function which returns after starting a transfer). + +\param[in] + eptnum - Endpoint number. +\param[in] + data - Pointer to a buffer with the data to send. +\param[in] + size - Size of the data buffer. +\param[in] + callback - Optional callback function to invoke when the transfer is complete. +\param[in] + argument - Optional argument to the callback function. + +\return + STATUS_SUCCESS if the transfer has been started; otherwise, the + corresponding error status code. +******************************************************************************/ +uint8_t HAL_UsbWrite(uint8_t eptnum, void *data, uint32_t size, TransferCallback_t callback, void *argument); + +/**************************************************************************//** +\brief Reads incoming data on an USB endpoint This methods sets the transfer +descriptor and activate the endpoint interrupt. The actual transfer is +then carried out by the endpoint interrupt handler. The Read operation +finishes either when the buffer is full, or a short packet (inferior to +endpoint maximum size) is received. + +*The buffer must be kept allocated until the transfer is finished*. + +\param[in] + eptnum - Endpoint number. +\param[in] + data - Pointer to a data buffer. +\param[in] + size - Size of the data buffer in bytes. +\param[in] + callback - Optional end-of-transfer callback function. +\param[in] + argument - Optional argument to the callback function. + +\return + STATUS_SUCCESS if the read operation has been started; otherwise, + the corresponding error code. +******************************************************************************/ +uint8_t HAL_UsbRead(uint8_t eptnum, void *data, uint32_t size, TransferCallback_t callback, void *argument); + +/**************************************************************************//** +\brief Sets the HALT feature on the given endpoint (if not already in this state). + +\param[in] + eptnum - Endpoint number. +******************************************************************************/ +void HAL_Halt(uint8_t eptnum); + +/**************************************************************************//** +\brief Clears the Halt feature on the given endpoint. + +\param[in] + eptnum - Endpoint number. +******************************************************************************/ +void HAL_Unhalt(uint8_t eptnum); + +/**************************************************************************//** +\brief Returns the current Halt status of an endpoint. + +\param[in] + eptnum - Endpoint number. + +\return + 1 - if the endpoint is currently halted; + 0 - otherwise. +******************************************************************************/ +uint8_t HAL_IsHalted(uint8_t eptnum); + +/**************************************************************************//** +\brief Causes the given endpoint to acknowledge the next packet it receives with +a STALL handshake. + +\param[in] + eptnum - Endpoint number. + +\return + STATUS_SUCCESS or STATUS_BUSY. +******************************************************************************/ +uint8_t HAL_Stall(uint8_t eptnum); + +/**************************************************************************//** +\brief Sets the device address to the given value. + +\param[in] + address - New device address. +******************************************************************************/ +void HAL_SetAddress(uint8_t *address); + +/**************************************************************************//** +\brief Sets the current device configuration. + +\param[in] + cfgnum - Configuration number to set. +******************************************************************************/ +void HAL_SetConfiguration(uint8_t cfgnum); + +/**************************************************************************//** +\brief Initializes the USB driver. This function must be called before host +bus reset and after pull up is connected to D+. After pull up was connected +to D+ host resets device with 100ms delay. + +\param[in] + reqMem - Memory for usb request. Memory is allocated by user. +******************************************************************************/ +void HAL_UsbInit(uint8_t *reqMem); + +/**************************************************************************//** +\brief Returns the current state of the USB device. + +\return + Device current state. +******************************************************************************/ +uint8_t HAL_GetState(void); + +#endif /* _USB_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h new file mode 100644 index 00000000..7f26d39c --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h @@ -0,0 +1,109 @@ +/**************************************************************************//** + \file w1.h + + \brief The header file describes the 1-Wire interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _W1_H +#define _W1_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define W1_ANY_FAMILY 0x00 +#define DS2411 0x01 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/*************************************************************************//** +\brief 1-Wire search procedure with search ROM command only +\param[in] + family - 8-bit family code. +\param[in] + data - pointer of SRAM where the 8-bytes ROM codes returned by the + devices are stored. \n + Attention! Memory size must be equal to (Number of devices) * 8 bytes +\param[in] + count - number of devices we wish to find. +\param[in] + actCount - number of devices actually found. +\return + W1_SUCCESS_STATUS - if at least one device has been found. \n + W1_NO_DEVICE_STATUS - if there are no any devices presented + on the bus with specified family code. \n + W1_INVALID_CRC - if an invalid CRC has been read during the search and + no devices with specified family code was found. +******************************************************************************/ +W1Status_t HAL_SearchW1Device(uint8_t family, + uint8_t *data, + uint8_t count, + uint8_t *actCount); + +/**************************************************************************//** +\brief 1-Wire search procedure with alarm search command only +\param[in] + family - 8-bit family code. +\param[in] + data - pointer of SRAM where the 8-bytes ROM codes returned by the + devices are stored. \n +\param[in] + count - number of devices we wish to find. +\param[in] + actCount - number of devices actually found. +\return + W1_SUCCESS_STATUS - if at least one device has been found. \n + W1_NO_DEVICE_STATUS - if there are no any devices presented + on the bus with specified family code. \n + W1_INVALID_CRC - if an invalid CRC has been read during the search and + no devices with specified family code was found. +******************************************************************************/ +W1Status_t HAL_AlarmSearchW1Device(uint8_t family, + uint8_t *data, + uint8_t count, + uint8_t *actCount); + +/***************************************************************************//** +\brief Resets all devices connected to the bus. +\return + 0 - there are some devices at the bus. \n + 1 - there are no devices at the bus. +*******************************************************************************/ +uint8_t HAL_ResetW1(void); + +/***************************************************************************//** +\brief Writes a single byte to the bus +\param[in] + value - byte to write. +*******************************************************************************/ +void HAL_WriteW1(uint8_t value); + +/***************************************************************************//** +\brief Reads a single byte from the bus. +\return + byte read from the bus. +*******************************************************************************/ +uint8_t HAL_ReadW1(void); + +#endif /* _W1_H */ +// eof w1.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h new file mode 100644 index 00000000..06d259ae --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h @@ -0,0 +1,122 @@ +/**************************************************************************//** + \file wdtCtrl.h + + \brief The header file describes the WDT interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _WDTCTRL_H +#define _WDTCTRL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +// \cond +// an interval before WDT will expire +#if defined(AT91SAM7X256) + typedef enum + { + WDT_INTERVAL_4 = 0xFFE, // 4 ms + WDT_INTERVAL_16 = 0xFFB, // 16 ms + WDT_INTERVAL_32 = 0xFF9, // 32 ms + WDT_INTERVAL_64 = 0xFEF, // 64 ms + WDT_INTERVAL_125 = 0xFDF, // 125 ms + WDT_INTERVAL_250 = 0xFBF, // 250 ms + WDT_INTERVAL_500 = 0xF7F, // 500 ms + WDT_INTERVAL_1000 = 0xEFF, // 1 second + WDT_INTERVAL_2000 = 0xDFF, // 2 seconds + WDT_INTERVAL_4000 = 0xBFF, // 4 seconds + WDT_INTERVAL_8000 = 0x7FF // 8 seconds + } HAL_WdtInterval_t; +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) + typedef enum + { + WDT_INTERVAL_16 = 0x00, // 16 ms + WDT_INTERVAL_32 = 0x01, // 32 ms + WDT_INTERVAL_64 = 0x02, // 64 ms + WDT_INTERVAL_125 = 0x03, // 125 ms + WDT_INTERVAL_250 = 0x04, // 250 ms + WDT_INTERVAL_500 = 0x05, // 500 ms + WDT_INTERVAL_1000 = 0x06, // 1 second + WDT_INTERVAL_2000 = 0x07, // 2 seconds + WDT_INTERVAL_4000 = 0x20, // 4 seconds + WDT_INTERVAL_8000 = 0x21 // 8 seconds + }HAL_WdtInterval_t; +#endif +// \endcond + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/***************************************************************************//** +\brief Starts WDT within a given interval. + +\param[in] + interval - interval. Must be chosen from: \n + WDT_INTERVAL_16 // 16 ms \n + WDT_INTERVAL_32 // 32 ms \n + WDT_INTERVAL_64 // 64 ms \n + WDT_INTERVAL_125 // 125 ms \n + WDT_INTERVAL_250 // 250 ms \n + WDT_INTERVAL_500 // 500 ms \n + WDT_INTERVAL_1000 // 1 second \n + WDT_INTERVAL_2000 // 2 seconds \n + WDT_INTERVAL_4000 // 4 seconds \n + WDT_INTERVAL_8000 // 8 seconds \n +*******************************************************************************/ +void HAL_StartWdt(HAL_WdtInterval_t interval); + +/***************************************************************************//** +\brief Registers WDT fired callback. + +\param[in] + wdtCallback - pointer to the callback function. +*******************************************************************************/ +void HAL_RegisterWdtCallback(void (*wdtCallback)(void)); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +#if defined(AT91SAM7X256) +/**************************************************************************//** +\brief reset and reload wdt counter +******************************************************************************/ +INLINE void HAL_ResetWdt(void) +{ + halResetWdt(); +} + +#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1) +/*******************************************************************//** +\brief stops the WDT +***********************************************************************/ +#define HAL_StopWdt() wdt_disable() + +/*******************************************************************//** +\brief resets the WDT +***********************************************************************/ +#define HAL_ResetWdt() wdt_reset() +#endif + +#endif /*_WDTCTRL_H*/ + +// eof wdtCtrl.h -- cgit v1.2.3