From b24866225a6301d3a663f874725e83c012dc25d3 Mon Sep 17 00:00:00 2001 From: Florent Duchon Date: Wed, 26 Dec 2012 17:36:00 +0100 Subject: digital/beacon: add bitcloud stack into common directory digital/zigbit --- .../HAL/avr/atmega1281/common/src/halEeprom.c | 66 ++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c (limited to 'digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c') diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c new file mode 100644 index 00000000..0dfda94e --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c @@ -0,0 +1,66 @@ +/**************************************************************************//** + \file halEeprom.c + + \brief Implementation of the hardware dependent the EEPROM module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +/****************************************************************************** + Implementations section +******************************************************************************/ +/****************************************************************************** +Writes a byte to EEPROM. +Parameters: + EECRMask - mask that define capability of interrupt after byte writing. + address - address of byte + data - data. +Returns: + none. +******************************************************************************/ +void halEepromWrite(uint8_t EECRMask, uint16_t address, uint8_t data) +{ + while (EECR & (1 << EEPE)); // wait for completion of previous eeprom write + while (SPMCSR & (1 << SPMEN)); // wait for completion of previous program memory write + EEAR = address; + EEDR = data; + ATOMIC_SECTION_ENTER + BEGIN_MEASURE + EECR = EECRMask; + EECR |= (1 << EEPE); + END_MEASURE(HALISR_EEPROM_WRITE_TIME_LIMIT) + ATOMIC_SECTION_LEAVE +} + +/****************************************************************************** +Interrupt handler. +******************************************************************************/ +ISR(EE_READY_vect) +{ + BEGIN_MEASURE + EECR &= ~(1 << EERIE); //disable interrupt + halSigEepromReadyInterrupt(); + END_MEASURE(HALISR_EEPROM_READY_TIME_LIMIT) +} + +// eof helEeprom.c -- cgit v1.2.3