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-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h229
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h81
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h72
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h98
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h31
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h41
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h113
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h31
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h335
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h142
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h165
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h203
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h193
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h33
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h153
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h71
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h69
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h173
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h118
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h48
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h289
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h245
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h109
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h122
24 files changed, 3164 insertions, 0 deletions
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h
new file mode 100644
index 00000000..fddde028
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/adc.h
@@ -0,0 +1,229 @@
+/**************************************************************************//**
+ \file adc.h
+
+ \brief The header file describes the ADC interface
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 22.11.07 A. Khromykh - Created.
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _ADC_H
+#define _ADC_H
+
+// \cond
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+// \endcond
+
+/** \brief adc resolution */
+#define RESOLUTION_8_BIT 0
+#define RESOLUTION_10_BIT 1
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/**************************************************************************//**
+\brief adc sample rate
+******************************************************************************/
+#if defined(AT91SAM7X256)
+ typedef enum
+ {
+ ADC_533KSPS,
+ ADC_429KSPS,
+ ADC_369KSPS,
+ ADC_250KSPS,
+ ADC_136KSPS,
+ ADC_68KSPS,
+ ADC_34KSPS
+ } HAL_AdcSampleRate_t;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ typedef enum
+ {
+ ADC_77KSPS,
+ ADC_39KSPS,
+ ADC_19200SPS,
+ ADC_9600SPS,
+ ADC_4800SPS
+ } HAL_AdcSampleRate_t;
+#endif
+
+/**************************************************************************//**
+\brief adc voltage reference
+******************************************************************************/
+typedef enum
+{
+ /** \brief AREF, Internal Vref turned off. \n
+ If 10x or 200x gain is selected, only 2.56 V should be used as Internal Voltage Reference. \n
+ For differential conversion, only 1.1V cannot be used as internal voltage reference. */
+ AREF = (0 << 6),
+ /** \brief AVCC with external capacitor at AREF pin */
+ AVCC = (1 << 6),
+ /** \brief Internal 1.1V Voltage Reference with external capacitor at AREF pin */
+ INTERNAL_1d1V = (2 << 6),
+ /** \brief Internal 2.56V Voltage Reference with external capacitor at AREF pin */
+ INTERNAL_2d56V = (3 << 6)
+} HAL_AdcVoltageReference_t;
+
+/**************************************************************************//**
+\brief adc structure of parameters
+******************************************************************************/
+typedef struct
+{
+ /** \brief conversion resolution */
+ uint8_t resolution;
+ /** \brief adc sample rate */
+ HAL_AdcSampleRate_t sampleRate;
+ /** \brief adc voltage reference selections (only for avr) */
+ HAL_AdcVoltageReference_t voltageReference;
+ /** \brief pointer to the application data */
+ void *bufferPointer;
+ /** \brief amount of samples (buffer cells) */
+ uint16_t selectionsAmount;
+ /** \brief pointer to callback method */
+ void (*callback)();
+} HAL_AdcParams_t;
+
+/**************************************************************************//**
+\brief channel number. \n
+Note for avr:
+If 10x gain is used, 8 bit resolution can be expected. \n
+If 200x gain is used, 7 bit resolution can be expected. \n
+If the user wants to perform a quick polarity check of the result, \n
+it is sufficient to read the MSB of the result. If the bit is one, \n
+the result is negative, and if this bit is zero, the result is positive. \n
+To reach the given accuracy, 10x or 200x Gain should not be used \n
+for operating voltage below 2.7V.
+******************************************************************************/
+#if defined(AT91SAM7X256)
+ typedef enum
+ {
+ HAL_ADC_CHANNEL0 = (1 << 0),
+ HAL_ADC_CHANNEL1 = (1 << 1),
+ HAL_ADC_CHANNEL2 = (1 << 2),
+ HAL_ADC_CHANNEL3 = (1 << 3),
+ HAL_ADC_CHANNEL4 = (1 << 4),
+ HAL_ADC_CHANNEL5 = (1 << 5),
+ HAL_ADC_CHANNEL6 = (1 << 6),
+ HAL_ADC_CHANNEL7 = (1 << 7)
+ } HAL_AdcChannelNumber_t;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ typedef enum
+ {
+ /** \brief channel ADC0 */
+ HAL_ADC_CHANNEL0 = 0,
+ /** \brief channel ADC1 */
+ HAL_ADC_CHANNEL1 = 1,
+ /** \brief channel ADC2 */
+ HAL_ADC_CHANNEL2 = 2,
+ /** \brief channel ADC3 */
+ HAL_ADC_CHANNEL3 = 3,
+ /** \brief ADC0 - ADC0 with gain 10x */
+ HAL_ADC_DIFF_CHANNEL0 = 8,
+ /** \brief ADC1 - ADC0 with gain 10x */
+ HAL_ADC_DIFF_CHANNEL1 = 9,
+ /** \brief ADC0 - ADC0 with gain 200x */
+ HAL_ADC_DIFF_CHANNEL2 = 10,
+ /** \brief ADC1 - ADC0 with gain 200x */
+ HAL_ADC_DIFF_CHANNEL3 = 11,
+ /** \brief ADC2 - ADC2 with gain 10x */
+ HAL_ADC_DIFF_CHANNEL4 = 12,
+ /** \brief ADC3 - ADC2 with gain 10x */
+ HAL_ADC_DIFF_CHANNEL5 = 13,
+ /** \brief ADC2 - ADC2 with gain 200x */
+ HAL_ADC_DIFF_CHANNEL6 = 14,
+ /** \brief ADC3 - ADC2 with gain 200x */
+ HAL_ADC_DIFF_CHANNEL7 = 15
+ } HAL_AdcChannelNumber_t;
+#endif
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Opens the ADC to make the measurement on the ADC channel.
+
+ \param[in] param - address of HAL_AdcParams_t structure. \n
+ fields of structure set by user: \n
+ resolution - conversion resolution. Must be chosen from: \n
+ RESOLUTION_8_BIT \n
+ RESOLUTION_10_BIT \n
+ sampleRate - sample rate. Must be chosen from: \n
+ for avr hardware platform \n
+ ADC_77KSPS \n
+ ADC_39KSPS \n
+ ADC_19200SPS \n
+ ADC_9600SPS \n
+ ADC_4800SPS \n
+ for arm hardware platform \n
+ ADC_533KSPS \n
+ ADC_429KSPS \n
+ ADC_369KSPS \n
+ ADC_250KSPS \n
+ ADC_136KSPS \n
+ ADC_68KSPS \n
+ ADC_34KSPS \n
+ bufferPointer - pointer to the application data buffer. \n
+ Buffer cell is one byte for 8-bit resolution. \n
+ Buffer cell is two bytes for 10-bit resolution. \n
+ selectionsAmount - amount of samples (buffer cells). \n
+ callback - pointer to the function that will notify about measurement completion.
+\return
+ -1 - unsupported parameter or ADC is busy. \n
+ 0 - success.
+******************************************************************************/
+int HAL_OpenAdc(HAL_AdcParams_t *param);
+
+/**************************************************************************//**
+\brief Starts ADC with the parameters defined in HAL_OpenAdc.
+
+ \param[in] channel - number of ADC channel. Must be chosen from:\n
+ HAL_ADC_CHANNEL0 \n
+ HAL_ADC_CHANNEL1 \n
+ HAL_ADC_CHANNEL2 \n
+ HAL_ADC_CHANNEL3 \n
+ next four channels only for arm hardware platform \n
+ HAL_ADC_CHANNEL4 \n
+ HAL_ADC_CHANNEL5 \n
+ HAL_ADC_CHANNEL6 \n
+ HAL_ADC_CHANNEL7 \n
+ next eight channels only for avr hardware platform \n
+ HAL_ADC_DIFF_CHANNEL0 \n
+ HAL_ADC_DIFF_CHANNEL1 \n
+ HAL_ADC_DIFF_CHANNEL2 \n
+ HAL_ADC_DIFF_CHANNEL3 \n
+ HAL_ADC_DIFF_CHANNEL4 \n
+ HAL_ADC_DIFF_CHANNEL5 \n
+ HAL_ADC_DIFF_CHANNEL6 \n
+ HAL_ADC_DIFF_CHANNEL7 \n
+
+\return
+ -1 - unable to open ADC (unsupported channel number). \n
+ 0 - success.
+******************************************************************************/
+int HAL_ReadAdc(HAL_AdcChannelNumber_t channel);
+
+/**************************************************************************//**
+\brief Closes the ADC.
+
+\return
+ -1 - the module was not open. \n
+ 0 - success.
+******************************************************************************/
+int HAL_CloseAdc(void);
+
+#endif /* _ADC_H */
+// eof adc.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h
new file mode 100644
index 00000000..9c241ab6
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/appTimer.h
@@ -0,0 +1,81 @@
+/***************************************************************************//**
+ \file appTimer.h
+
+ \brief The header file describes the appTimer interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _APPTIMER_H
+#define _APPTIMER_H
+
+// \cond
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+#include <bcTimer.h>
+#include <halAppClock.h>
+// \endcond
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief fields of structure: \n
+ uint32_t interval - timer firing interval. Interval must be more than 10 ms (set by user) \n
+ TimerMode_t mode - timer work mode (set by user). Must be chosen from: \n
+ TIMER_REPEAT_MODE \n
+ TIMER_ONE_SHOT_MODE \n
+ void (*callback)(void) - pointer to timer callback function (set by user). */
+typedef Timer_t HAL_AppTimer_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Starts to count an interval (starts user timer).
+
+\param[in]
+ appTimer - pointer to the timer structure (HAL_AppTimer_t is typedef Timer_t)
+
+\return
+ -1 - pointer is NULL
+ 0 - success
+******************************************************************************/
+int HAL_StartAppTimer(HAL_AppTimer_t *appTimer);
+
+/**************************************************************************//**
+\brief Stops the user timer.
+
+\param[in]
+ appTimer - pointer to the timer structure.
+
+\return
+ -1 - there is no appTimer started or pointer is NULL
+ 0 - success
+******************************************************************************/
+int HAL_StopAppTimer(HAL_AppTimer_t *appTimer);
+
+/**************************************************************************//**
+\brief Gets system time.
+
+\return
+ time since power up in milliseconds(8 bytes).
+******************************************************************************/
+BcTime_t HAL_GetSystemTime(void);
+
+#endif /*_APPTIMER_H*/
+//eof appTimer.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h
new file mode 100644
index 00000000..ada41d9c
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/atomic.h
@@ -0,0 +1,72 @@
+/**************************************************************************//**
+ \file atomic.h
+
+ \brief The header file describes the atomic sections
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 20/08/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _ATOMIC_H
+#define _ATOMIC_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#if defined(AT91SAM7X256) || defined(AT32UC3A0512) || defined(AT91SAM3S4C)
+ #include <inttypes.h>
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \
+ || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1)
+ #include <halAtomic.h>
+#endif
+
+#if defined(AT91SAM7X256) || defined(AT32UC3A0512) || defined(AT91SAM3S4C)
+/******************************************************************************
+ Types section
+******************************************************************************/
+typedef uint32_t atomic_t;
+
+/******************************************************************************
+ Inline static functions section
+******************************************************************************/
+/******************************************************************************
+ Disables global interrupt. Enter atomic section.
+******************************************************************************/
+void halStartAtomic(atomic_t volatile *pAtomic);
+
+/******************************************************************************
+ Exit atomic section
+******************************************************************************/
+void halEndAtomic(atomic_t volatile *pAtomic);
+ /** \brief Marks the begin of atomic section */
+ #define ATOMIC_SECTION_ENTER {volatile atomic_t __atomic; halStartAtomic(&__atomic);
+ /** \brief Marks the end of atomic section */
+ #define ATOMIC_SECTION_LEAVE halEndAtomic(&__atomic);}
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \
+ || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1)
+ /** \brief Marks the begin of atomic section */
+ #define ATOMIC_SECTION_ENTER {atomic_t __atomic = halStartAtomic();
+ /** \brief Marks the end of atomic section */
+ #define ATOMIC_SECTION_LEAVE halEndAtomic(__atomic);}
+#elif defined(SIMULATOR)
+ /** \brief Marks the begin of atomic section */
+ #define ATOMIC_SECTION_ENTER do {} while (0);
+ /** \brief Marks the end of atomic section */
+ #define ATOMIC_SECTION_LEAVE do {} while (0);
+#endif
+
+#endif // _ATOMIC_H
+
+// eof atomic.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h
new file mode 100644
index 00000000..88ce15c8
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/bcTimer.h
@@ -0,0 +1,98 @@
+/**************************************************************************//**
+ \file bcTimer.h
+
+ \brief Declaration of timer queue interface, hardware-independent module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 7/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _MNHALTIMER_H
+#define _MNHALTIMER_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief mode of timers */
+typedef enum
+{
+ TIMER_REPEAT_MODE,
+ TIMER_ONE_SHOT_MODE
+} TimerMode_t;
+
+/** \brief fields of structure: \n
+ uint32_t interval - timer firing interval (set by user) \n
+ TimerMode_t mode - timer work mode (set by user). Must be chosen from: \n
+ TIMER_REPEAT_MODE \n
+ TIMER_ONE_SHOT_MODE \n
+ void (*callback)(void) - pointer to timer callback function (set by user). \n
+ next - pointer to next cell of list \n
+ intervalLeft - absolute fired time */
+typedef struct _Timer_t
+{
+ struct
+ {
+ struct _Timer_t *next;
+ uint32_t sysTimeLabel;
+ } service;
+ uint32_t interval;
+ TimerMode_t mode;
+ void (*callback)(void);
+} Timer_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Adds timer to the timer's list. Timers sorted by remaining time.
+\param[in]
+ head - address of pointer to head of the timers list.
+\param[in]
+ timer - address of timer that must be added to the list.
+\param[in]
+ sysTime - current time, used for sorting.
+******************************************************************************/
+void halAddTimer(Timer_t **head, Timer_t *timer, uint32_t sysTime);
+
+/**************************************************************************//**
+\brief Removes timer from the timers list.
+\param[in]
+ head - address of pointer to head of the timers list.
+\param[in]
+ prev - address of the timer before the timer that must be removed from the list.
+\param[in]
+ p - address of timer that must be removed from the list.
+
+\return pointer to next cell or pointer to head if deleting is head
+******************************************************************************/
+Timer_t* halRemoveTimer(Timer_t **head, Timer_t *prev, Timer_t *p);
+
+/**************************************************************************//**
+\brief The search of the timer in the timers list before one.
+\param[in]
+ head - address of pointer to head of the timers list.
+
+\return pointer to saerching timer
+******************************************************************************/
+Timer_t *halFindPrevTimer(Timer_t **head, Timer_t *p);
+
+#endif /* _MNHALTIMER_H */
+
+// eof bcTimer.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h
new file mode 100644
index 00000000..3bfca393
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/calibration.h
@@ -0,0 +1,31 @@
+/**************************************************************************//**
+ \file calibration.h
+
+ \brief Interface to calibrate the internal RC generator.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/06/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _CALIBRATION_H
+#define _CALIBRATION_H
+/**************************************************************************//**
+\brief Performs calibration of the main clock generator \n
+(only for AVR and internal RC oscillator).
+******************************************************************************/
+void HAL_CalibrateMainClock(void);
+
+#endif /* _CALIBRATION_H */
+// eof calibration.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h
new file mode 100644
index 00000000..44f76ca4
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/dbgu.h
@@ -0,0 +1,41 @@
+/**************************************************************************//**
+ \file dbgu.h
+
+ \brief Declarations of debug message interface (feature only for atmel arm).
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 11/11/08 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _DBGU_H
+#define _DBGU_H
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Open dbgu port (115200 baud, 8N1 format).
+******************************************************************************/
+void HAL_OpenDbgu(void);
+
+/**************************************************************************//**
+\brief Send string trough dbgu port.
+
+\param[in]
+ buffer - pointer to the string
+******************************************************************************/
+void HAL_SendDbguMessage(const char *buffer);
+
+#endif /* _DBGU_H */
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h
new file mode 100644
index 00000000..a4a21966
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/eeprom.h
@@ -0,0 +1,113 @@
+/**************************************************************************//**
+ \file eeprom.h
+
+ \brief The header file describes the EEPROM interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _EEPROM_H
+#define _EEPROM_H
+
+// \cond
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+#if defined(AT91SAM7X256)
+ #define EEPROM_DATA_MEMORY_SIZE 0x400u
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \
+ || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1) \
+ || defined(AT91SAM3S4C)
+ #define EEPROM_DATA_MEMORY_SIZE 0x1000u
+#elif defined(ATXMEGA128A1)
+ #define EEPROM_DATA_MEMORY_SIZE 0x800u
+#endif
+// \endcond
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/**************************************************************************//**
+\brief eeprom access control structure
+******************************************************************************/
+typedef struct
+{
+ /** \brief EEPROM address */
+ uint16_t address;
+ /** \brief pointer to data memory */
+ uint8_t *data;
+ /** \brief number of bytes */
+ uint16_t length;
+} HAL_EepromParams_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/******************************************************************************
+\brief Reads a number of bytes defined by HAL_EepromParams_t from the EEPROM.
+\param[in]
+ param - address of HAL_EepromParams_t structure. \n
+ fields of structure set by user: \n
+ address - eeprom address \n
+ data - pointer to data memory \n
+ length - number of bytes
+\param[in]
+ readDone - pointer to the function that will notify about reading completion.
+\return
+ 0 - success, \n
+ -1 - the number of bytes to read is too large, \n
+ -2 - the previous EEPROM request is not completed yet.
+******************************************************************************/
+int HAL_ReadEeprom(HAL_EepromParams_t *params, void (*readDone)());
+
+/******************************************************************************
+\brief Writes a number of bytes defined by HAL_EepromParams_t to EEPROM.
+By writeDone parameter user can control if write operation will be asynchronous
+or synchronous.
+\param[in]
+ param - address of HAL_EepromParams_t structure. \n
+ fields of structure set by user: \n
+ address - eeprom address \n
+ data - pointer to data memory \n
+ length - number of bytes
+\param[in]
+ writeDone - pointer to the function that will notify about writing completion. \n
+ Only for avr: \n
+ if writeDone is NULL write operation will be synchronous.
+\return
+ 0 - success, \n
+ -1 - the number of bytes to write is too large, \n
+ -2 - the previous EEPROM request is not completed yet.
+******************************************************************************/
+int HAL_WriteEeprom(HAL_EepromParams_t *params, void (*writeDone)());
+
+/**************************************************************************//**
+\brief Checks the eeprom state.
+
+\return
+ true - eeprom is busy; \n
+ false - eeprom is free;
+******************************************************************************/
+bool HAL_IsEepromBusy(void);
+
+#endif /*_EEPROM_H*/
+
+//eof eeprom.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h
new file mode 100644
index 00000000..765df7d4
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/halInit.h
@@ -0,0 +1,31 @@
+/**************************************************************************//**
+ \file halInit.h
+
+ \brief HAL start up module interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/06/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _HALINIT_H
+#define _HALINIT_H
+
+/**************************************************************************//**
+\brief Performs start up HAL initialization.
+******************************************************************************/
+void HAL_Init(void);
+
+#endif /* _HALINIT_H */
+// eof halInit.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h
new file mode 100644
index 00000000..48738c9a
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/halTaskManager.h
@@ -0,0 +1,335 @@
+/**************************************************************************//**
+ \file halTaskManager.h
+
+ \brief Declarations of enums and functions of HAL task manager.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 10/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _HALTASKHANDLER_H
+#define _HALTASKHANDLER_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <taskManager.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+#if defined(AT91SAM7X256)
+/*! \brief task ID for hal task manager. HAL_FIRST_X are free ID. */
+enum
+{
+ HAL_USB_ENDPOINTS = 1ul << 0,
+ HAL_USB_SUSPEND = 1ul << 1,
+ HAL_USB_RESUME = 1ul << 2,
+ HAL_USB_BUS_RESET = 1ul << 3,
+ HAL_TASK_USART = 1ul << 4,
+ HAL_TIMER4_COMPA = 1ul << 5, /** timer interrupt is happened */
+ HAL_TWI = 1ul << 6, /** twi bus interrupt is happened */
+ HAL_SPI0_TXBUFE = 1ul << 7, /** spi0 dma buffer is empty */
+ HAL_SPI0_RXBUFF = 1ul << 8, /** spi0 dma buffer is full */
+ HAL_SPI1_TXBUFE = 1ul << 9, /** spi1 dma buffer is empty */
+ HAL_SPI1_RXBUFF = 1ul << 10, /** timer interrupt is happened */
+ HAL_ADC = 1ul << 11, /** adc measurement is ready */
+ HAL_FIRST_12 = 1ul << 12,
+ HAL_FIRST_13 = 1ul << 13,
+ HAL_FIRST_14 = 1ul << 14,
+ HAL_FIRST_15 = 1ul << 15,
+ HAL_FIRST_16 = 1ul << 16,
+ HAL_FIRST_17 = 1ul << 17,
+ HAL_FIRST_18 = 1ul << 18,
+ HAL_FIRST_19 = 1ul << 19,
+ HAL_FIRST_20 = 1ul << 20,
+ HAL_FIRST_21 = 1ul << 21,
+ HAL_FIRST_22 = 1ul << 22,
+ HAL_FIRST_23 = 1ul << 23,
+ HAL_FIRST_24 = 1ul << 24,
+ HAL_FIRST_25 = 1ul << 25,
+ HAL_FIRST_26 = 1ul << 26,
+ HAL_FIRST_27 = 1ul << 27,
+ HAL_FIRST_28 = 1ul << 28,
+ HAL_FIRST_29 = 1ul << 29,
+ HAL_FIRST_30 = 1ul << 30,
+ HAL_FIRST_31 = 1ul << 31
+};
+
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \
+ || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1)
+/**************************************************************************//**
+ \brief halTaskFlags0 flags definitions.
+******************************************************************************/
+enum
+{
+ HAL_ASYNC_TIMER = (uint8_t)1 << 0,
+ HAL_SYNC_SLEEP_TIME = (uint8_t)1 << 1,
+ HAL_EMPTY_TASK_0_2 = (uint8_t)1 << 2,
+ HAL_EMPTY_TASK_0_3 = (uint8_t)1 << 3,
+ HAL_EMPTY_TASK_0_4 = (uint8_t)1 << 4,
+ HAL_EMPTY_TASK_0_5 = (uint8_t)1 << 5,
+ HAL_EMPTY_TASK_0_6 = (uint8_t)1 << 6,
+ HAL_EMPTY_TASK_0_7 = (uint8_t)1 << 7
+};
+
+/**************************************************************************//**
+ \brief halTaskFlags1 flags definitions.
+******************************************************************************/
+enum
+{
+ HAL_EMPTY_TASK_1_0 = (uint8_t)1 << 0,
+ HAL_EMPTY_TASK_1_1 = (uint8_t)1 << 1,
+ HAL_EMPTY_TASK_1_2 = (uint8_t)1 << 2,
+ HAL_EMPTY_TASK_1_3 = (uint8_t)1 << 3,
+ HAL_EMPTY_TASK_1_4 = (uint8_t)1 << 4,
+ HAL_EMPTY_TASK_1_5 = (uint8_t)1 << 5,
+ HAL_EMPTY_TASK_1_6 = (uint8_t)1 << 6,
+ HAL_EMPTY_TASK_1_7 = (uint8_t)1 << 7
+};
+
+/**************************************************************************//**
+ \brief halTaskFlags2 flags definitions.
+******************************************************************************/
+enum
+{
+ HAL_EMPTY_TASK_2_0 = (uint8_t)1 << 0,
+ HAL_EMPTY_TASK_2_1 = (uint8_t)1 << 1,
+ HAL_EMPTY_TASK_2_2 = (uint8_t)1 << 2,
+ HAL_EMPTY_TASK_2_3 = (uint8_t)1 << 3,
+ HAL_EMPTY_TASK_2_4 = (uint8_t)1 << 4,
+ HAL_EMPTY_TASK_2_5 = (uint8_t)1 << 5,
+ HAL_TASK_SPI = (uint8_t)1 << 6,
+ HAL_TASK_USART = (uint8_t)1 << 7
+};
+
+/**************************************************************************//**
+ \brief halTaskFlags3 flags definitions.
+******************************************************************************/
+enum
+{
+ HAL_SM_REQ = (uint8_t)1 << 0,
+ HAL_ADC = (uint8_t)1 << 1,
+ HAL_EE_READY = (uint8_t)1 << 2,
+ HAL_USB_ENDPOINTS = (uint8_t)1 << 3,
+ HAL_USB_SUSPEND = (uint8_t)1 << 4,
+ HAL_USB_RESUME = (uint8_t)1 << 5,
+ HAL_USB_BUS_RESET = (uint8_t)1 << 6,
+ HAL_EMPTY_TASK_3_7 = (uint8_t)1 << 7
+};
+
+/**************************************************************************//**
+ \brief halTaskFlags4 flags definitions.
+******************************************************************************/
+enum
+{
+ HAL_WAKEUP = (uint8_t)1 << 0,
+ HAL_TWI = (uint8_t)1 << 1,
+ HAL_TIMER4_COMPA = (uint8_t)1 << 2,
+ HAL_SLEEP = (uint8_t)1 << 3,
+ HAL_EXT_HANDLER = (uint8_t)1 << 4,
+ HAL_EMPTY_TASK_4_4 = (uint8_t)1 << 5,
+ HAL_EMPTY_TASK_4_6 = (uint8_t)1 << 6,
+ HAL_EMPTY_TASK_4_7 = (uint8_t)1 << 7
+};
+
+#elif defined(AT32UC3A0512)
+/*! \brief task ID for hal task manager. HAL_FIRST_X are free ID. */
+enum
+{
+ HAL_APPTIMER = 1ul << 0,
+ HAL_TASK_USART = 1ul << 1,
+ HAL_FIRST_2 = 1ul << 2,
+ HAL_FIRST_3 = 1ul << 3,
+ HAL_FIRST_4 = 1ul << 4,
+ HAL_FIRST_5 = 1ul << 5,
+ HAL_FIRST_6 = 1ul << 6,
+ HAL_FIRST_7 = 1ul << 7,
+ HAL_FIRST_8 = 1ul << 8,
+ HAL_FIRST_9 = 1ul << 9,
+ HAL_FIRST_10 = 1ul << 10,
+ HAL_FIRST_11 = 1ul << 11,
+ HAL_FIRST_12 = 1ul << 12,
+ HAL_FIRST_13 = 1ul << 13,
+ HAL_FIRST_14 = 1ul << 14,
+ HAL_FIRST_15 = 1ul << 15,
+ HAL_FIRST_16 = 1ul << 16,
+ HAL_FIRST_17 = 1ul << 17,
+ HAL_FIRST_18 = 1ul << 18,
+ HAL_FIRST_19 = 1ul << 19,
+ HAL_FIRST_20 = 1ul << 20,
+ HAL_FIRST_21 = 1ul << 21,
+ HAL_FIRST_22 = 1ul << 22,
+ HAL_FIRST_23 = 1ul << 23,
+ HAL_FIRST_24 = 1ul << 24,
+ HAL_FIRST_25 = 1ul << 25,
+ HAL_FIRST_26 = 1ul << 26,
+ HAL_FIRST_27 = 1ul << 27,
+ HAL_FIRST_28 = 1ul << 28,
+ HAL_FIRST_29 = 1ul << 29,
+ HAL_FIRST_30 = 1ul << 30,
+ HAL_FIRST_31 = 1ul << 31
+};
+
+#elif defined(AT91SAM3S4C)
+/*! \brief task ID for hal task manager. HAL_FIRST_X are free ID. */
+enum
+{
+ HAL_APPTIMER = 1ul << 0,
+ HAL_TASK_USART = 1ul << 1,
+ HAL_USB_ENDPOINTS = 1ul << 2,
+ HAL_USB_SUSPEND = 1ul << 3,
+ HAL_USB_RESUME = 1ul << 4,
+ HAL_USB_BUS_RESET = 1ul << 5,
+ HAL_TASK_UART = 1ul << 6,
+ HAL_EE_READY = 1ul << 7,
+ HAL_HSMCI = 1ul << 8,
+ HAL_ASYNC_TIMER = 1ul << 9,
+ HAL_WAKEUP = 1ul << 10,
+ HAL_SLEEP = 1ul << 11,
+ HAL_FIRST_12 = 1ul << 12,
+ HAL_FIRST_13 = 1ul << 13,
+ HAL_FIRST_14 = 1ul << 14,
+ HAL_FIRST_15 = 1ul << 15,
+ HAL_FIRST_16 = 1ul << 16,
+ HAL_FIRST_17 = 1ul << 17,
+ HAL_FIRST_18 = 1ul << 18,
+ HAL_FIRST_19 = 1ul << 19,
+ HAL_FIRST_20 = 1ul << 20,
+ HAL_FIRST_21 = 1ul << 21,
+ HAL_FIRST_22 = 1ul << 22,
+ HAL_FIRST_23 = 1ul << 23,
+ HAL_FIRST_24 = 1ul << 24,
+ HAL_FIRST_25 = 1ul << 25,
+ HAL_FIRST_26 = 1ul << 26,
+ HAL_FIRST_27 = 1ul << 27,
+ HAL_FIRST_28 = 1ul << 28,
+ HAL_FIRST_29 = 1ul << 29,
+ HAL_FIRST_30 = 1ul << 30,
+ HAL_FIRST_31 = 1ul << 31
+};
+#endif
+
+/******************************************************************************
+ External variables section
+******************************************************************************/
+#if defined(AT91SAM7X256)
+extern volatile uint32_t halTaskFlags;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \
+ || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1)
+extern volatile uint8_t halTaskFlags0;
+extern volatile uint8_t halTaskFlags1;
+extern volatile uint8_t halTaskFlags2;
+extern volatile uint8_t halTaskFlags3;
+extern volatile uint8_t halTaskFlags4;
+#elif defined(AT32UC3A0512) || defined(AT91SAM3S4C)
+extern volatile uint32_t halTaskFlags;
+#endif
+
+/******************************************************************************
+ Inline static functions section
+******************************************************************************/
+#if defined(AT91SAM7X256)
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask
+******************************************************************************/
+INLINE void halPostTask(uint32_t flag)
+{
+ halTaskFlags |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) \
+ || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3) || defined(ATMEGA128RFA1)
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask 0
+******************************************************************************/
+INLINE void halPostTask0(uint8_t flag)
+{
+ halTaskFlags0 |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask 1
+******************************************************************************/
+INLINE void halPostTask1(uint8_t flag)
+{
+ halTaskFlags1 |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask 2
+******************************************************************************/
+INLINE void halPostTask2(uint8_t flag)
+{
+ halTaskFlags2 |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask 3
+******************************************************************************/
+INLINE void halPostTask3(uint8_t flag)
+{
+ halTaskFlags3 |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask 4
+******************************************************************************/
+INLINE void halPostTask4(uint8_t flag)
+{
+ halTaskFlags4 |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+
+#elif defined(AT32UC3A0512) || defined(AT91SAM3S4C)
+/**************************************************************************//**
+\brief Set task for task manager.
+
+\param[in]
+ flag task for task mask
+******************************************************************************/
+INLINE void halPostTask(uint32_t flag)
+{
+ halTaskFlags |= flag;
+ SYS_PostTask(HAL_TASK_ID);
+}
+#endif
+
+#endif /*_HALTASKHANDLER_H*/
+
+// eof halTaskManager.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h
new file mode 100644
index 00000000..6e9dd2ea
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/hsmci.h
@@ -0,0 +1,142 @@
+/****************************************************************************//**
+ \file hsmci.h
+
+ \brief The header file describes the HSMCI interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 24/08/11 N. Fomin - Created
+ ******************************************************************************/
+#ifndef _HSMCI_H
+#define _HSMCI_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halHsmci.h>
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief Hsmci descriptor */
+typedef struct
+{
+ /** \brief HSMCI bus clock rate. */
+ HsmciClockRate_t clockRate;
+ /** \brief HSMCI bus width. */
+ HsmciBusWidth_t busWidth;
+ /** \brief HSMCI high speed mode. */
+ bool highSpeedMode;
+ /** \brief HSMCI command desciptor.
+ Take a look into halHsmci.h platform specific file fore more details. */
+ HAL_HsmciCommandDescriptor_t *commandDescriptor;
+ /** \brief HSMCI data transfer descriptor.
+ Take a look into halHsmci.h platform specific file fore more details. */
+ HAL_HsmciDataTransferDescriptor_t *dataTransferDescriptor;
+ /** \brief Address of the function to notify the upper layer when
+ a transfer was completed. */
+ void (*callback)(void);
+} HAL_HsmciDescriptor_t;
+
+/**************************************************************************//**
+\brief Open the HSMCI interface and configure pins.
+\param[in]
+ descriptor - pointer to the hsmci descriptor.
+\return
+ -1 - there are no free resources;
+ 0 - HSMCI is ready.
+******************************************************************************/
+int HAL_OpenHsmci(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Close the HSMCI interface.
+\param[in]
+ descriptor - pointer to the hsmci descriptor.
+\return
+ Returns 0 on success or -1 if interface was not opened.
+******************************************************************************/
+int HAL_CloseHsmci(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Sends HSMCI command.
+ Callback function will be used to notify about the finishing transmitting.
+\param[in]
+ descriptor - pointer to hsmci descriptor.
+\return
+ -1 - hsmci interface was not opened, there is unsent data,
+ or command response buffer is zero;
+ 0 - on succes.
+******************************************************************************/
+int HAL_WriteHsmciCommand(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Writes data to the HSMCI.
+ Callback function will be used to notify about the finishing transmitting.
+\param[in]
+ descriptor - pointer to hsmci descriptor.
+\return
+ -1 - hsmci interface was not opened, there is unsent data, pointer to the data,
+ the length are zero or command response buffer is zero;
+ 0 - on success.
+******************************************************************************/
+int HAL_WriteHsmci(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Reads data from the HSMCI.
+ Callback function will be used to notify about the finishing transmitting.
+\param[in]
+ descriptor - pointer to hsmci descriptor.
+\return
+ -1 - hsmci module was not opened, there is unsent data, pointer to the data,
+ the interface are zero or command response buffer is zero;
+ 0 - on success.
+******************************************************************************/
+int HAL_ReadHsmci(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Sets HSMCI bus speed.
+\param[in]
+ descriptor - pointer to hsmci descriptor.
+\return
+ -1 - hsmci interface was not opened or there is unsent data;
+ 0 - on success.
+******************************************************************************/
+int HAL_SetHsmciSpeed(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Sets HSMCI bus width.
+\param[in]
+ descriptor - pointer to hsmci descriptor.
+\return
+ -1 - hsmci interface was not opened or there is unsent data;
+ 0 - on success.
+******************************************************************************/
+int HAL_SetHsmciBusWidth(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Sets HSMCI high speed mode.
+\param[in]
+ descriptor - pointer to hsmci descriptor.
+\return
+ -1 - hsmci interface was not opened or there is unsent data;
+ 0 - on success.
+******************************************************************************/
+int HAL_SetHsmciHighSpeedMode(HAL_HsmciDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Checks if HSMCI interface is free and ready.
+\return
+ false - hsmci interface was not opened or there is unsent data;
+ true - hsmci interface is ready.
+******************************************************************************/
+bool HAL_HsmciCheckReady(void);
+
+#endif /* _HSMCI_H */
+// eof hsmci.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h
new file mode 100644
index 00000000..102f2cd6
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/i2cPacket.h
@@ -0,0 +1,165 @@
+/**************************************************************************//**
+ \file i2cPacket.h
+
+ \brief The header file describes the i2cPacket interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _I2CPACKET_H
+#define _I2CPACKET_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+// \cond
+#include <halClkCtrl.h>
+#include <types.h>
+// \endcond
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+/** \brief i2c bus prescaler */
+#define HAL_I2C_PRESCALER 0ul
+// \cond
+/** \brief internal address size */
+#if defined(AT91SAM7X256)
+ /* AT91C_TWI_IADRSZ_NO */
+ #define HAL_NO_INTERNAL_ADDRESS (0x0 << 8)
+ /* AT91C_TWI_IADRSZ_1_BYTE */
+ #define HAL_ONE_BYTE_SIZE (0x1 << 8)
+ /* AT91C_TWI_IADRSZ_2_BYTE */
+ #define HAL_TWO_BYTE_SIZE (0x2 << 8)
+ /* AT91C_TWI_IADRSZ_3_BYTE */
+ #define HAL_THREE_BYTE_SIZE (0x3 << 8)
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ #define HAL_NO_INTERNAL_ADDRESS 0x0
+ #define HAL_ONE_BYTE_SIZE 0x1
+ #define HAL_TWO_BYTE_SIZE 0x2
+ #define HAL_THREE_BYTE_SIZE 0x3
+#endif
+// \endcond
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief i2c baud rate */
+#if defined(AT91SAM7X256)
+ typedef enum
+ {
+ I2C_CLOCK_RATE_250 = F_CPU/(2*250000) - 3, // 200 Kb/s clock rate
+ I2C_CLOCK_RATE_125 = F_CPU/(2*125000) - 3, // 125 Kb/s clock rate
+ I2C_CLOCK_RATE_100 = F_CPU/(2*100000) - 3, // 100 Kb/s clock rate
+ I2C_CLOCK_RATE_62 = F_CPU/(2*62500) - 3 // 62.5 Kb/s clock rate
+ } I2cClockRate_t;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ typedef enum
+ {
+ I2C_CLOCK_RATE_250 = ((F_CPU/250000ul) - 16ul)/(2ul * (1ul << HAL_I2C_PRESCALER) * (1ul << HAL_I2C_PRESCALER)), // 250 Kb/s clock rate
+ I2C_CLOCK_RATE_125 = ((F_CPU/125000ul) - 16ul)/(2ul * (1ul << HAL_I2C_PRESCALER) * (1ul << HAL_I2C_PRESCALER)), // 125 Kb/s clock rate
+ I2C_CLOCK_RATE_62 = ((F_CPU/62500ul) - 16ul)/(2ul * (1ul << HAL_I2C_PRESCALER) * (1ul << HAL_I2C_PRESCALER)) // 62.5 Kb/s clock rate
+ } I2cClockRate_t;
+#endif
+
+/** \brief TWI clock rate */
+typedef struct
+{
+ I2cClockRate_t clockrate; // clock rate
+} HAL_i2cMode_t;
+
+/**************************************************************************//**
+\brief i2c access control structure
+******************************************************************************/
+typedef struct
+{
+ /** \brief slave address */
+ uint8_t id;
+ /** \brief number of bytes to be written to the bus */
+ uint16_t length;
+ /** \brief pointer to the data */
+ uint8_t *data;
+ /** \brief internal device address size conditions:
+ HAL_NO_INTERNAL_ADDRESS - byte command condition \n
+ HAL_ONE_BYTE_SIZE \n
+ HAL_TWO_BYTE_SIZE \n
+ HAL_THREE_BYTE_SIZE */
+#if defined(AT91SAM7X256)
+ uint32_t lengthAddr;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ uint8_t lengthAddr;
+#endif
+ /** \brief internal device address */
+ uint32_t internalAddr;
+ /** \brief callback function */
+ void (*f)(bool result);
+} HAL_I2cParams_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Opens twi resource.\n
+field of i2cMode structure \n
+i2cClockRate_t clockrate (set by user). Must be chosen from:\n
+ I2C_CLOCK_RATE_250 - 250 Kb/s clock rate \n
+ I2C_CLOCK_RATE_125 - 125 Kb/s clock rate \n
+ I2C_CLOCK_RATE_62 - 62.5 Kb/s clock rate \n
+
+\param[in]
+ i2cMode - pointer to the mode structure.
+
+\return
+ -1 - resource was already open or pointer is NULL. \n
+ 0 - success.
+******************************************************************************/
+int HAL_OpenI2cPacket(HAL_i2cMode_t *i2cMode);
+
+/**************************************************************************//**
+\brief Closes resource.
+
+\return
+ -1 - resource was not open. \n
+ 0 - success.
+******************************************************************************/
+int HAL_CloseI2cPacket(void);
+
+/**************************************************************************//**
+\brief Writes a series of bytes out to the TWI bus. Operation result will be
+sent to the callback function of the HAL_I2cParams_t structure.
+
+\param[in]
+ param - pointer to HAL_I2cParams_t structure
+\return
+ 0 - the bus is free and the request is accepted. \n
+ -1 - otherwise.
+******************************************************************************/
+int HAL_WriteI2cPacket(HAL_I2cParams_t *param);
+
+/**************************************************************************//**
+\brief Reads the series of bytes from the TWI bus. Operation result will be
+sent to the callback function of the HAL_I2cParams_t structure.
+
+\param[in]
+ param - pointer to HAL_I2cParams_t structure
+\return
+ 0 - the bus is free and the request is accepted. \n
+ -1 - otherwise.
+******************************************************************************/
+int HAL_ReadI2cPacket(HAL_I2cParams_t *param);
+
+#endif /* _I2CPACKET_H */
+// eof i2cPacket.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h
new file mode 100644
index 00000000..bc2a36df
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/irq.h
@@ -0,0 +1,203 @@
+/**************************************************************************//**
+ \file irq.h
+
+ \brief The header file describes the IRQ interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _IRQ_H
+#define _IRQ_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+/** \brief The low level generates an interrupt request. */
+#define IRQ_LOW_LEVEL 0
+/** \brief The high level generates an interrupt request (valid only for arm and avr32). */
+#define IRQ_HIGH_LEVEL 1
+/** \brief Any edge generates an interrupt request (valid only for avr and xmega). */
+#define IRQ_ANY_EDGE 2
+/** \brief Falling edge generates an interrupt request. */
+#define IRQ_FALLING_EDGE 3
+/** \brief Rising edge generates an interrupt request. */
+#define IRQ_RISING_EDGE 4
+/** \brief interrupt is disabled. (valid only for xmega)*/
+#define IRQ_IS_DISABLED 5
+/** \brief interrupt is not changed previous state. (valid only for xmega)*/
+#define IRQ_IS_NOT_CHANGED 6
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief numbers of possible interrupt. */
+typedef enum
+{
+#if defined(AT91SAM7X256) || defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \
+ defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(AT32UC3A0512)
+/** \brief number of valid interrupt for arm and avr32. */
+ IRQ_0 = 0,
+/** \brief number of valid interrupt for arm and avr32. */
+ IRQ_1 = 1,
+/** \brief number of valid interrupt for avr32. */
+ IRQ_2 = 2,
+/** \brief number of valid interrupt for avr32. */
+ IRQ_3 = 3,
+/** \brief number of valid interrupt for avr32. */
+ IRQ_4 = 4,
+/** \brief number of valid interrupt for avr(only rcb platform) and avr32. */
+ IRQ_5 = 5,
+/** \brief number of valid interrupt for avr and avr32. */
+ IRQ_6 = 6,
+/** \brief number of valid interrupt for avr and avr32. */
+ IRQ_7 = 7,
+#endif
+#if defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3)
+ IRQ_A0,
+ IRQ_A1,
+ IRQ_B0,
+ IRQ_B1,
+ IRQ_C0,
+ IRQ_C1,
+ IRQ_D0,
+ IRQ_D1,
+ IRQ_E0,
+ IRQ_E1,
+ IRQ_F0,
+ IRQ_F1,
+#if defined(ATXMEGA128A1)
+ IRQ_H0,
+ IRQ_H1,
+ IRQ_J0,
+ IRQ_J1,
+ IRQ_K0,
+ IRQ_K1,
+#endif
+#endif
+#if defined(AT91SAM3S4C)
+ IRQ_PORT_A,
+ IRQ_PORT_B,
+ IRQ_PORT_C,
+#endif
+ IRQ_LIMIT
+} HAL_IrqNumber_t;
+
+#if defined(AT91SAM7X256) || defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \
+ defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(AT32UC3A0512)
+/** \brief interrupt activation condition. */
+typedef uint8_t HAL_IrqMode_t;
+#endif
+#if defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3)
+/** \brief interrupt activation condition. */
+typedef struct
+{
+ uint32_t pin0 : 3;
+ uint32_t pin1 : 3;
+ uint32_t pin2 : 3;
+ uint32_t pin3 : 3;
+ uint32_t pin4 : 3;
+ uint32_t pin5 : 3;
+ uint32_t pin6 : 3;
+ uint32_t pin7 : 3;
+} HAL_IrqMode_t;
+#endif
+#if defined(AT91SAM3S4C)
+typedef uint8_t HAL_IrqMode_t[32];
+#endif
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Registers the user's irqNumber external interrupt
+
+\param[in]
+ irqNumber - IRQ number. Must be chosen from: \n
+ IRQ_0 (for arm and avr32) \n
+ IRQ_1 (for arm and avr32) \n
+ IRQ_2 (for avr32) \n
+ IRQ_3 (for avr32) \n
+ IRQ_4 (for avr32) \n
+ IRQ_5 (for avr (only rcb platform) and avr32) \n
+ IRQ_6 (for avr and avr32) \n
+ IRQ_7 (for avr and avr32) \n
+ IRQ_PC (for xmega. P - port name, C - interrupt number. For example: IRQ_D1) \n
+ IRQ_PORT_x (for cortex m3, x stands for port name) \n
+\param[in]
+ irqMode - Controls the sort of interrupt. For avr and arm must be chosen from: \n
+ IRQ_LOW_LEVEL // The low level generates an interrupt request. \n
+ IRQ_HIGH_LEVEL // The high level generates an interrupt request (valid for arm, avr32, cortex m3). \n
+ IRQ_ANY_EDGE // Any edge generates an interrupt request (valid for avr and cortex m3). \n
+ IRQ_FALLING_EDGE // Falling edge generates an interrupt request. \n
+ IRQ_RISING_EDGE // Rising edge generates an interrupt request. \n
+
+ irqMode is bit field for xmega . Bit field includes members pinX (X - pin number of selected port). \n
+ All members that bit field must have value:
+
+ IRQ_LOW_LEVEL // The low level generates an interrupt request. \n
+ IRQ_ANY_EDGE // Any edge generates an interrupt request. \n
+ IRQ_FALLING_EDGE // Falling edge generates an interrupt request. \n
+ IRQ_RISING_EDGE // Rising edge generates an interrupt request. \n
+ IRQ_IS_DISABLED // Pin is disabled for interrupt request. \n
+ IRQ_IS_NOT_CHANGED // Pin is not changed previous state.
+
+\param[in]
+ f - user's interrupt handler. Handler must be executed less than 100 us.
+\return
+ -1 - if irqNumber is out of range, \n
+ not valid irq mode, \n
+ such interrupt has been already registered. \n
+ 0 - otherwise.
+******************************************************************************/
+int HAL_RegisterIrq(HAL_IrqNumber_t irqNumber, HAL_IrqMode_t irqMode, void (*f)(void));
+
+/**************************************************************************//**
+\brief Enables the irqNumber interrupt.
+\param[in]
+ irqNumber - IRQ number
+\return
+ -1 - if irqNumber is out of range or has not been registered yet. \n
+ 0 - otherwise.
+******************************************************************************/
+int HAL_EnableIrq(HAL_IrqNumber_t irqNumber);
+
+/**************************************************************************//**
+\brief Disables the irqNumber interrupt.
+\param[in]
+ irqNumber - IRQ number
+\return
+ -1 - if irqNumber is out of range or has not been registered yet. \n
+ 0 - otherwise.
+******************************************************************************/
+int HAL_DisableIrq(HAL_IrqNumber_t irqNumber);
+
+/**************************************************************************//**
+\brief Unregisters the user's irqNumber interrupt
+\param[in]
+ irqNumber - IRQ number
+\return
+ -1 - if irqNumber is out of range or has not been registered yet. \n
+ 0 - otherwise.
+******************************************************************************/
+int HAL_UnregisterIrq(HAL_IrqNumber_t irqNumber);
+
+#endif /* _IRQ_H */
+//eof irq.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h
new file mode 100644
index 00000000..d2b18cff
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/pwm.h
@@ -0,0 +1,193 @@
+/**************************************************************************//**
+ \file pwm.h
+
+ \brief Description of the PWM interface
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 10/11/08 A. Taradov - Created
+ 5/04/11 A.Razinkov - Refactored
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _PWM_H
+#define _PWM_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+#include <atomic.h>
+#include <mnUtils.h>
+
+/******************************************************************************
+ Defines section
+******************************************************************************/
+#define TCCRnA(pwmUnit) MMIO_BYTE(pwmUnit)
+#define TCCRnB(pwmUnit) MMIO_BYTE(pwmUnit + 1U)
+#define TCCRnC(pwmUnit) MMIO_BYTE(pwmUnit + 2U)
+#define TCNTn(pwmUnit) MMIO_WORD(pwmUnit + 4U)
+#define ICRn(pwmUnit) MMIO_WORD(pwmUnit + 6U)
+#define OCRnA(pwmUnit) MMIO_WORD(pwmUnit + 8U)
+#define OCRnB(pwmUnit) MMIO_WORD(pwmUnit + 10U)
+#define OCRnC(pwmUnit) MMIO_WORD(pwmUnit + 12U)
+
+#define PWM_SUCCESS_STATUS 0
+#define PWM_INVALID_UNIT_STATUS -1
+#define PWM_INVALID_CHANNEL_STATUS -2
+#define PWM_INVALID_PRESCALER_STATUS -3
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/**************************************************************************//**
+\brief PWM prescaler
+******************************************************************************/
+typedef enum
+{
+ PWM_STOPPED,
+ PWM_PRESCALER_1,
+ PWM_PRESCALER_8,
+ PWM_PRESCALER_64,
+ PWM_PRESCALER_256,
+ PWM_PRESCALER_1024,
+ PWM_PRESCALER_EXT_CLOCK_ON_FALLING_EDGE,
+ PWM_PRESCALER_EXT_CLOCK_ON_RISING_EDGE,
+ PWM_PRESCALER_INVALID
+} HAL_PwmPrescaler_t;
+
+/**************************************************************************//**
+\brief PWM channel
+******************************************************************************/
+typedef enum
+{
+ PWM_CHANNEL_0,
+ PWM_CHANNEL_1,
+#ifndef ATMEGA1284
+ PWM_CHANNEL_2,
+#endif /* ATMEGA1284 */
+ PWM_INVALID_CHANNEL
+} HAL_PwmChannel_t;
+
+/**************************************************************************//**
+\brief PWM impulse polarity
+******************************************************************************/
+typedef enum
+{
+ /** \brief PWM output is low when duty cycle = 0% */
+ PWM_POLARITY_NON_INVERTED,
+ /** \brief PWM output is high when duty cycle = 0% */
+ PWM_POLARITY_INVERTED
+} HAL_PwmPolarity_t;
+
+/**************************************************************************//**
+\brief PWM unit number. Relative to corresponding Timer/Counter.
+******************************************************************************/
+typedef enum
+{
+ /* Base address of T/C1 PWM related registers */
+ PWM_UNIT_1 = 0x80,
+ /* Base address of T/C3 PWM related registers */
+ PWM_UNIT_3 = 0x90
+} HAL_PwmUnit_t;
+
+/**************************************************************************//**
+\brief PWM module descriptor
+******************************************************************************/
+typedef struct _HAL_PwmDescriptor_t
+{
+ /* Service fields for internal use. */
+ struct
+ {
+ /* Pointer to Data Direction Register. PWM port dependent. */
+ volatile uint8_t *DDRn;
+ /* PWN channel pin number. PWM port dependent. */
+ uint8_t pwmBaseChannelPin;
+ /* Compare Output Mode low bit position. PWM channel dependent. */
+ uint8_t COMnx0;
+ /* Output Compare Register. PWM channel dependent. */
+ volatile uint16_t *OCRnx;
+ } service;
+ /* PWM unit number. Equal to ID of Timer/Counter witch serves PWM module. */
+ HAL_PwmUnit_t unit;
+ /* PWM channel */
+ HAL_PwmChannel_t channel;
+ /* PWM polarity */
+ HAL_PwmPolarity_t polarity;
+} HAL_PwmDescriptor_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Initializes the PWM.
+
+\param [in] pwmUnit - PWM unit number.
+ Equal to ID of Timer/Counter witch serves PWM module.
+
+\return operation status
+******************************************************************************/
+int HAL_OpenPwm(HAL_PwmUnit_t pwmUnit);
+
+/**************************************************************************//**
+\brief Starts PWM on specified channel.
+
+\param [in] descriptor - PWM channel descriptor.
+
+\return operation status
+******************************************************************************/
+int HAL_StartPwm(HAL_PwmDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Stops PWM on specified channel.
+
+\param [in] descriptor - PWM channel descriptor.
+
+\return operation status
+******************************************************************************/
+int HAL_StopPwm(HAL_PwmDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Sets base frequency of module. Common for all module channels.
+
+\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID.
+\param [in] top - value for the TOP register.
+\param [in] prescaler - clock prescaler.
+
+\return operation status
+******************************************************************************/
+int HAL_SetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler);
+
+
+/**************************************************************************//**
+\brief Sets compare value for the PWM channel.
+
+\param [in] descriptor - PWM channel descriptor.
+
+\return operation status
+******************************************************************************/
+int HAL_SetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue);
+
+/**************************************************************************//**
+\brief Closes the PWM.
+
+\param [in] pwmUnit - PWM unit number.
+ Equal to ID of Timer/Counter witch serves PWM module.
+
+\return operation status
+******************************************************************************/
+int HAL_ClosePwm(HAL_PwmUnit_t pwmUnit);
+
+#endif /* _PWM_H */
+
+// eof pwm.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h
new file mode 100644
index 00000000..b531f963
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/reducePower.h
@@ -0,0 +1,33 @@
+/**************************************************************************//**
+ \file reducePower.h
+
+ \brief The header file describes the power reducing interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 6/10/09 A. Khromykh - Created.
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+#ifndef _REDUCEPOWER_H
+#define _REDUCEPOWER_H
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/******************************************************************************
+\brief Stops the clock to all peripherals, which are not used by BitCloud. \n
+(implemented only for atxmega128a1 & atxmega256a3).
+******************************************************************************/
+void HAL_SwitchOffPeripherals(void);
+
+#endif /* _REDUCEPOWER_H */
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h
new file mode 100644
index 00000000..25311296
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/resetReason.h
@@ -0,0 +1,153 @@
+/**************************************************************************//**
+ \file resetReason.h
+
+ \brief The header file describes the the reset reason interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created.
+ 2/09/09 M. Gekk - Platform XMega is supported.
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _RESETREASON_H
+#define _RESETREASON_H
+
+/* \cond */
+/******************************************************************************
+ Define(s) section
+ ******************************************************************************/
+#define TEMP_WARM_RESET 0x12
+/* \endcond */
+
+/******************************************************************************
+ Types section
+ ******************************************************************************/
+/** \brief The reset reason types. */
+#if defined(AT91SAM7X256)
+ typedef enum
+ {
+ /** \brief VDDCORE rising */
+ POWER_ON_RESET = 0x00,
+ /** \brief Watchdog fault occurred */
+ WDT_RESET = 0x02,
+ /** \brief Processor reset required by the software */
+ WARM_RESET = 0x03,
+ /** \brief NRST pin detected low */
+ EXTERNAL_RESET = 0x04,
+ /** \brief BrownOut reset occurred */
+ BROWN_OUT_RESET = 0x05
+ } HAL_ResetReason_t;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ typedef enum
+ {
+ /** \brief jump to the NULL pointer was issued. */
+ NULL_PTR_DEREF_RESET = 0x0,
+ /** \brief the supply voltage was below reset threshold. */
+ POWER_ON_RESET = 0x1,
+ /** \brief a low level was present on RESET pin. */
+ EXTERNAL_RESET = 0x2,
+ /** \brief the supply voltage was below Brown-out reset threshold. Set by fuses.*/
+ BROWN_OUT_RESET = 0x4,
+ /** \brief Watch Dog Timer period expired. */
+ WDT_RESET = 0x8,
+ /** \brief MCU was reset by JTAG. */
+ JTAG_RESET = 0x10,
+ /** \brief software reset. */
+ WARM_RESET = 0x11
+ } HAL_ResetReason_t;
+#elif defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3)
+ typedef enum
+ {
+ /** \brief jump to the NULL pointer was issued. */
+ NULL_PTR_DEREF_RESET = 0x00,
+ /** \brief Power-on reset is released when the VCC stops rising or when
+ * the VCC level has reached the Power-on Threshold Voltage (VPOT) level. */
+ POWER_ON_RESET = (1U << 0),
+ /** \brief The external reset will trigger when the RESET pin is driven
+ * below the RESET pin threshold voltage, VRST. */
+ EXTERNAL_RESET = (1U << 1),
+ /** \brief The VCC level falls bellow the trigger level for a minimum time. */
+ BROWN_OUT_RESET = (1U << 2),
+ /** \brief Watchdog reset will be given if the WDT is not reset from t
+ * he software within a programmable timout period, */
+ WATCHDOG_RESET = (1U << 3),
+ /** \brief The Program and Debug Interface reset contains a separate reset source
+ * that is used to reset the device during external programming and debugging. */
+ DEBUG_RESET = (1U << 4),
+ /** \brief The Software reset makes it possible to issue a system reset from
+ * software by writing to the Software Reset bit in the Reset Control Register. */
+ WARM_RESET = (1U << 5)
+ } HAL_ResetReason_t;
+#elif defined(AT32UC3A0512)
+ typedef enum
+ {
+ /** \brief The CPU was reset due to the supply voltage
+ * being lower than the power-on threshold level. */
+ POWER_ON_RESET = (1U << 0),
+ /** \brief The CPU was reset due to the supply voltage
+ * being lower than the brown-out threshold level. */
+ BROWN_OUT_RESET = (1U << 1),
+ /** \brief The CPU was reset due to the RESET pin being asserted. */
+ EXTERNAL_RESET = (1U << 2),
+ /** \brief CPU reset caused by watchdog. */
+ WDT_RESET = (1U << 3),
+ /** \brief The CPU was reset by setting the bit RC_CPU in the JTAG reset register. */
+ DEBUG_RESET = (1U << 4),
+ /** \brief The CPU was reset because it had detected an illegal access. */
+ CPUERR_RESET = (1U << 7),
+ /** \brief The CPU was reset because the RES strobe in
+ * the OCD Development Control register has been written to one. */
+ OCDRST_RESET = (1U << 8),
+ /** \brief The chip was reset by setting the bit RC_OCD in the
+ * JTAG reset register or by using the JTAG HALT instruction.*/
+ JTAGHARD_RESET = (1U << 9),
+ /** \brief CPU reset caused by call to halSoftwareReset. */
+ WARM_RESET = (1U << 10),
+ } HAL_ResetReason_t;
+#elif defined(AT91SAM3S4C)
+ typedef enum
+ {
+ /** \brief A general reset occurs when a Power-on-reset is detected,
+ a Brownout or a Voltage regulation loss is detected by the Supply controller. */
+ GENERAL_RESET = 0x00,
+ /** \brief A Backup reset occurs when the chip returns from Backup mode.
+ The core_backup_reset signal is asserted by the Supply Controller when a Backup reset occurs. */
+ BACKUP_RESET = 0x01,
+ /** \brief CPU reset caused by watchdog. */
+ WDT_RESET = 0x02,
+ /** \brief CPU reset caused by call to halSoftwareReset. */
+ WARM_RESET = 0x03,
+ /** \brief The CPU was reset due to the RESET pin being asserted. */
+ EXTERNAL_RESET = 0x04
+ } HAL_ResetReason_t;
+#else
+ #error 'unsupported cpu'
+#endif
+
+/******************************************************************************
+ Prototypes section
+ ******************************************************************************/
+/******************************************************************************
+ \brief Returns the reset reason.
+ \return The reason of reset.
+ ******************************************************************************/
+HAL_ResetReason_t HAL_ReadResetReason(void);
+
+/**************************************************************************//**
+ \brief Software reset.
+ ******************************************************************************/
+void HAL_WarmReset(void);
+
+#endif /* _RESETREASON_H */
+/* resetReason.h */
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h
new file mode 100644
index 00000000..dc5c55b1
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleep.h
@@ -0,0 +1,71 @@
+/**************************************************************************//**
+ \file sleep.h
+
+ \brief The header file describes the sleep interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 1/12/09 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+#ifndef _SLEEP_H
+#define _SLEEP_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+typedef void (* HAL_WakeUpCallback_t)(void);
+
+/** \brief fields of structure \n
+ \brief uint32_t sleepTime - time of mcu+radio sleeping \n
+ \brief HAL_WakeUpCallback_t callback - pointer to wake up callback function */
+typedef struct
+{
+ uint32_t sleepTime;
+ HAL_WakeUpCallback_t callback;
+} HAL_Sleep_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Starts sleep timer and HAL sleep. When system is wake up send callback
+\param[in]
+ sleepParam - pointer to sleep structure.
+\return
+ -1 - bad parameters, \n
+ -2 - sleep timer busy, \n
+ -3 - sleep system has been started.
+ 0 - success.
+******************************************************************************/
+int HAL_StartSystemSleep(HAL_Sleep_t *sleepParam);
+
+/**************************************************************************//**
+\brief Prepares mcu for power-save, power-down.
+ Power-down the mode is possible only when internal RC is used
+\return
+ -1 - there is no possibility to sleep.
+******************************************************************************/
+int HAL_Sleep(void);
+
+/***************************************************************************//**
+\brief Makes MCU enter Idle mode.
+*******************************************************************************/
+void HAL_IdleMode(void);
+
+#endif /* _SLEEP_H */
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h
new file mode 100644
index 00000000..87c29632
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/sleepTimer.h
@@ -0,0 +1,69 @@
+/**************************************************************************//**
+ \file sleepTimer.h
+
+ \brief The header file describes the sleepTimer interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _SLEEPTIMER_H
+#define _SLEEPTIMER_H
+
+// \cond
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <bcTimer.h>
+// \endcond
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief fields of structure \n
+ \brief uint32_t interval - timer firing interval (set by user) \n
+ \brief TimerMode_t mode - timer work mode (set by user). Must be chosen from: \n
+ TIMER_REPEAT_MODE \n
+ TIMER_ONE_SHOT_MODE \n
+ \brief void (*callback)() - pointer to the timer callback function (set by user) \n */
+typedef Timer_t HAL_SleepTimer_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Starts sleep timer. Interval must be greater one time of sleep timer tick.
+\param[in]
+ sleepTimer - pointer to sleep timer structure.
+\return
+ -1 - NULL pointer, \n
+ -2 - interval can not be counted out, \n
+ -3 - sleep timer has already started, \n
+ 0 - otherwise.
+******************************************************************************/
+int HAL_StartSleepTimer(HAL_SleepTimer_t *sleepTimer);
+
+/**************************************************************************//**
+\brief Removes timer.
+\param[in]
+ sleepTimer - address of the timer to be removed from the list
+\return
+ -1 - there is no active sleep timer, \n
+ 0 - otherwise.
+******************************************************************************/
+int HAL_StopSleepTimer(HAL_SleepTimer_t *sleepTimer);
+
+#endif /* _SLEEPTIMER_H */
+// eof sleepTimer.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h
new file mode 100644
index 00000000..c34f5dcd
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/spi.h
@@ -0,0 +1,173 @@
+/****************************************************************************//**
+ \file spi.h
+
+ \brief The header file describes the USART SPI mode (for avr) and SPI1 bus (for arm).
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/08 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _SPI_H
+#define _SPI_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#if defined(AT91SAM7X256)
+ #include <halMemSpi.h>
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \
+ defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(ATXMEGA128A1) || \
+ defined(ATXMEGA256A3) || defined(ATXMEGA256D3)
+ #include <halSpi.h>
+#endif
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief Spi descriptor */
+typedef struct
+{
+ /** \brief tty - SPI_CHANNEL_n to be used. "n" range depends on the platform.
+ Take a look into halSpi.h platform specific file fore more details. */
+ SpiChannel_t tty;
+ /** \brief SpiClockMode_t clockMode - spi clock mode (set by user). Must be chosen from: \n
+ SPI_CLOCK_MODE0 \n
+ SPI_CLOCK_MODE1 \n
+ SPI_CLOCK_MODE2 \n
+ SPI_CLOCK_MODE3 \n */
+ SpiClockMode_t clockMode;
+#if defined(AT91SAM7X256)
+ /** \brief parameters are valid only for arm: */
+ /** \brief symbol size (bits) (set by user). Must be set: \n
+ SPI_8BITS_SYMBOL \n
+ SPI_9BITS_SYMBOL \n
+ SPI_10BITS_SYMBOL \n
+ SPI_11BITS_SYMBOL \n
+ SPI_12BITS_SYMBOL \n
+ SPI_13BITS_SYMBOL \n
+ SPI_14BITS_SYMBOL \n
+ SPI_15BITS_SYMBOL \n
+ SPI_16BITS_SYMBOL \n */
+ SpiSymbolSize_t symbolSize;
+ /** \brief Must be use macros HAL_SPI_PACK_PARAMETER(freq_value, valid_delay_value, cons_delay_value). \n
+ Where is: \n
+ freq_value - spi frequency (Hz) \n
+ valid_delay_value - delay between setting CS and clock start (sec) \n
+ cons_delay_value - delay between consecutive transfers (sec) \n */
+ uint32_t pack_parameter;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || \
+ defined(ATMEGA128RFA1) || defined(ATXMEGA128A1) || defined(ATXMEGA256A3) || defined(ATXMEGA256D3)
+ /** \brief parameters are valid only for avr:*/
+ /** \brief spi data order (set by user). Must be chosen from: \n
+ SPI_DATA_MSB_FIRST \n
+ SPI_DATA_LSB_FIRST \n */
+ SpiDataOrder_t dataOrder;
+ /** \brief spi clock rate (set by user). Must be chosen from: \n
+ for atmega \n
+ SPI_CLOCK_RATE_62 \n
+ SPI_CLOCK_RATE_125 \n
+ SPI_CLOCK_RATE_250 \n
+ SPI_CLOCK_RATE_500 \n
+
+ for xmega mcu clock \n
+ SPI_CLOCK_RATE_125 (4 MHz) \n
+ SPI_CLOCK_RATE_250 (4, 8 MHz) \n
+ SPI_CLOCK_RATE_500 (4, 8, 16 MHz) \n
+ SPI_CLOCK_RATE_750 (12 MHz ) \n
+ SPI_CLOCK_RATE_1000 (4, 8, 16, 32 MHz) \n
+ SPI_CLOCK_RATE_1500 (12 MHz) \n
+ SPI_CLOCK_RATE_2000 (4, 8, 16, 32 MHz) \n
+ SPI_CLOCK_RATE_3000 (12 MHz) \n
+ SPI_CLOCK_RATE_4000 (8, 16, 32 MHz) \n
+ SPI_CLOCK_RATE_6000 (12 MHz) \n
+ SPI_CLOCK_RATE_8000 (16, 32 MHz) \n
+ SPI_CLOCK_RATE_16000 (32 MHz) */
+ SpiBaudRate_t baudRate;
+ /** \brief HAL USART service field - contains variables for HAL USART module
+ internal needs */
+ HAL_UsartDescriptor_t spiDescriptor;
+#endif
+ union
+ {
+ /** \brief address of the function to notify the application when a transmission was completed. \n
+ When the synchronous method is used, callback must be NULL. \n */
+ void (* callback)(void);
+ /** \brief address of the function to notify the application when a byte was received. \n
+ Slave mode uses only asynchronous method. \n */
+ void (* slave_callback)(uint16_t);
+ };
+} HAL_SpiDescriptor_t;
+
+/**************************************************************************//**
+\brief Open the SPI interface and configure pins.
+\param[in]
+ descriptor - pointer to the spi descriptor.
+\return
+ -1 - there not are free resources.
+ 0 - SPI channel is ready.
+******************************************************************************/
+int HAL_OpenSpi(HAL_SpiDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Close the SPI channel and pins.
+\param[in]
+ descriptor - pointer to the spi descriptor.
+\return
+ Returns 0 on success or -1 if channel was not opened.
+******************************************************************************/
+int HAL_CloseSpi(HAL_SpiDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Writes a length bytes to the SPI. \n
+ Callback function will be used to notify about the finishing transmitting.
+ (only for master spi)
+\param[in]
+ descriptor - pointer to spi descriptor
+\param[in]
+ buffer - pointer to application data buffer;
+\param[in]
+ length - number bytes for transfer;
+\return
+ -1 - spi module was not opened, there is unsent data, pointer to the data or
+ the length are zero; \n
+ 0 - on success or a number; \n
+ Number of written bytes if the synchronous method is used(callback is NULL), \n
+ only for master spi.
+******************************************************************************/
+int HAL_WriteSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length);
+
+/**************************************************************************//**
+\brief For master : writes a number of bytes to the spi.\n
+ Callback function will be used to notify when the activity is finished.\n
+ The read data is placed to the buffer. \n
+ For slave: reads a number of bytes from internal spi buffer and writes them \n
+ to application buffer.
+\param[in]
+ descriptor - pointer to HAL_SpiDescriptor_t structure
+\param[in]
+ buffer - pointer to the application data buffer
+\param[in]
+ length - number of bytes to transfer
+\return
+ -1 - spi module was not opened, or there is unsent data, or the pointer to
+ data or the length are NULL; \n
+ 0 - success for master; \n
+ Number of written bytes if the synchronous method is used(callback is NULL) for master \n
+ or number of read bytes from internal buffer to the application buffer for slave.
+******************************************************************************/
+int HAL_ReadSpi(HAL_SpiDescriptor_t *descriptor, uint8_t *buffer, uint16_t length);
+
+#endif /* _SPI_H */
+// eof spi.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h
new file mode 100644
index 00000000..a2a52d38
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/uart.h
@@ -0,0 +1,118 @@
+/************************************************************************//**
+ \file uart.h
+
+ \brief
+ UART interface
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 17.11.2010 D. Loskutnikov - Created.
+******************************************************************************/
+#ifndef _UART_H
+#define _UART_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <usart.h>
+#include <halUart.h>
+
+/******************************************************************************
+ Functions prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Open UART
+
+\param[in] desc UART descriptor
+\return 1 if success, -1 if error
+******************************************************************************/
+int HAL_OpenUart(HAL_UartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Close UART
+
+\param[in] desc UART descriptor
+\return
+******************************************************************************/
+int HAL_CloseUart(HAL_UartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Send contents of buffer over UART
+
+\param[in] desc UART descriptor
+\param[in] buffer buffer to be sent
+\param[in] length buffer length
+\return number of sent bytes or -1 if error
+******************************************************************************/
+int HAL_WriteUart(HAL_UartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length);
+
+/**************************************************************************//**
+\brief Copy received by UART bytes to user-supplied buffer
+
+\param[in] desc UART descriptor
+\param[in] buffer buffer to store data
+\param[in] length maximum length of buffer
+\return number of actually copied bytes or -1 if error
+******************************************************************************/
+int HAL_ReadUart(HAL_UartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length);
+
+/**************************************************************************//**
+\brief Check if any bytes are pending for transmission over UART
+
+\param[in] desc descriptor
+\return -1 if error, 0 if not, 1 if yes
+******************************************************************************/
+int HAL_IsUartTxEmpty(HAL_UartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Store UART error conditions
+
+\param[in] desc UART descriptor
+\param[in] err error condition
+******************************************************************************/
+void halUartStoreError(HAL_UartDescriptor_t *desc, uint8_t err);
+
+/**************************************************************************//**
+\brief Send byte from FIFO over UART
+
+\param[in] desc UART descriptor
+******************************************************************************/
+void halUartTx(HAL_UartDescriptor_t *desc);
+
+/**************************************************************************//**
+\brief Store received byte to FIFO
+
+\param[in] desc UART descriptor
+******************************************************************************/
+void halUartStoreRx(HAL_UartDescriptor_t *desc);
+
+/**************************************************************************//**
+\brief UART transmission complete handler
+
+\param[in] desc UART descriptor
+******************************************************************************/
+void halSigUartTransmissionComplete(HAL_UartDescriptor_t *desc);
+
+/**************************************************************************//**
+\brief UART reception complete handler
+
+\param[in] desc UART descriptor
+******************************************************************************/
+void halSigUartReceptionComplete(HAL_UartDescriptor_t *desc);
+
+/**************************************************************************//**
+\brief UART error handler
+
+\param[in] desc UART descriptor
+******************************************************************************/
+void halSigUartErrorOccurred(HAL_UartDescriptor_t *desc);
+
+#endif /* _UART_H */
+// eof uart.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h
new file mode 100644
index 00000000..1adbaeb6
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/uid.h
@@ -0,0 +1,48 @@
+/**************************************************************************//**
+ \file uid.h
+
+ \brief The header file describes the UID interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 7/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _UID_H
+#define _UID_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+// \cond
+#include <types.h>
+// \endcond
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/************************************************************//**
+\brief UID discovery.
+\param[in]
+ id - UID buffer pointer. \n
+ Attention! Memory size must equal <i> (Number of devices) * 8 bytes </i>
+\return
+ 0 - if UID of DS2411 has been found successfully; \n
+ -1 - if some error occured during UID discovery.
+****************************************************************/
+int HAL_ReadUid(uint64_t *id);
+
+#endif /* _UID_H */
+
+// eof uid.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h
new file mode 100644
index 00000000..f81a5de7
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/usart.h
@@ -0,0 +1,289 @@
+/****************************************************************************//**
+ \file usart.h
+
+ \brief The header file describes the usart interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 22/08/07 A. Khromykh - Created
+*******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+#ifndef _USART_H
+#define _USART_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+// \cond
+#include <halUsart.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+#define USART_FLOW_CONTROL_NONE 0
+#define USART_FLOW_CONTROL_HARDWARE (1 << 0)
+#define USART_DTR_CONTROL (1 << 1)
+
+#if defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || \
+ defined(AT90USB1287) || defined(ATMEGA128RFA1) || defined(ATXMEGA128A1) || \
+ defined(ATXMEGA256A3) || defined(ATXMEGA256D3)
+ // this define is used only by HAL.
+ #define USART_SPI_READ_MODE (1 << 4)
+ #define USART_SPI_WRITE_MODE (1 << 3)
+#endif
+// \endcond
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+/** \brief Usart descriptor*/
+typedef struct
+{
+ /** \brief HAL USART service field - contains variables for HAL USART module
+ internal needs */
+ HalUsartService_t service;
+ /** \brief tty - USART_CHANNEL_n to be used. "n" range depends on the platform.
+ Take a look into halUsart.h platform specific file fore more details. */
+ UsartChannel_t tty;
+ /** \brief Sets synchronous or asynchronous routine. \n
+ Must be chosen from: \n
+ USART_MODE_ASYNC \n
+ USART_MODE_RS485 (only for arm)\n
+ USART_MODE_SYNC \n */
+ UsartMode_t mode;
+ /** \brief baudrate - USART baud rate. Must be chosen from: \n
+ USART_BAUDRATE_1200 \n
+ USART_BAUDRATE_2400 \n
+ USART_BAUDRATE_4800 \n
+ USART_BAUDRATE_9600 \n
+ USART_BAUDRATE_19200 \n
+ USART_BAUDRATE_38400 \n
+ USART_SYNC_BAUDRATE_1200 \n
+ USART_SYNC_BAUDRATE_2400 \n
+ USART_SYNC_BAUDRATE_4800 \n
+ USART_SYNC_BAUDRATE_9600 \n
+ USART_SYNC_BAUDRATE_38400 \n
+ USART_SYNC_BAUDRATE_57600 \n
+ USART_SYNC_BAUDRATE_115200 \n */
+ UsartBaudRate_t baudrate;
+ /** \brief data - USART data length. Must be chosen from: \n
+ USART_DATA5 \n
+ USART_DATA6 \n
+ USART_DATA7 \n
+ USART_DATA8 \n */
+ UsartData_t dataLength;
+ /** \brief parity - USART parity mode. Must be chosen from: \n
+ USART_PARITY_NONE \n
+ USART_PARITY_EVEN \n
+ USART_PARITY_ODD \n */
+ UsartParity_t parity;
+ /** \brief stopbits - USART stop bits number. Must be chosen from: \n
+ USART_STOPBIT_1 \n
+ USART_STOPBIT_2 \n */
+ UsartStopBits_t stopbits;
+ /** \brief edge - data received edge (only for usart). Must be chosen from: \n
+ USART_EDGE_MODE_FALLING \n
+ USART_EDGE_MODE_RISING \n */
+ UsartEdgeMode_t edge;
+ /** \brief master or slave on usart (only for usart). Must be chosen from:
+ USART_CLK_MODE_MASTER \n
+ USART_CLK_MODE_SLAVE \n */
+ UsartClkMode_t syncMode;
+ /** \brief It's pointer to receive buffer. \n
+ If rxBuffer is NULL then transactions are discarded. \n
+ Size of buffer depends on user application. */
+ uint8_t *rxBuffer;
+ /** \brief length of receive buffer */
+ uint16_t rxBufferLength;
+ /** \brief It's pointer to transmit buffer. \n
+ If txBuffer is NULL then callback method is used. \n
+ If txBuffer isn't NULL then polling method is used. */
+ uint8_t *txBuffer;
+ /** \brief length of transmit buffer */
+ uint16_t txBufferLength;
+ /** \brief It's receive usart callback. \n
+ If rxCallback is NULL then polling method is used. \n
+ If rxCallback isn't NULL then callback method is used.*/
+ void (*rxCallback)(uint16_t);
+ /** \brief It's transmitting was completed usart callback. \n
+ If txBuffer isn't NULL then txCallback notify about end of bytes sending. */
+ void (*txCallback)(void);
+ #if defined(_USE_USART_ERROR_EVENT_)
+ /** \brief It's error was occurred usart callback. \n
+ If receiver error is issued then errCallback notify about issue with reason. \n
+ Reason must be: \n
+ FRAME_ERROR \n
+ DATA_OVERRUN \n
+ PARITY_ERROR */
+ void (*errCallback)(UsartErrorReason_t);
+ #endif
+ /** \brief flow control of usart. One of the defines \n
+ USART_FLOW_CONTROL_NONE, \n
+ USART_FLOW_CONTROL_HARDWARE, USART_DTR_CONTROL, it is possible to combine by logical OR. \n
+ RS485 mode needs for USART_FLOW_CONTROL_NONE. \n
+ The RTS pin is driven high when the transmitter is operating. */
+ uint8_t flowControl;
+} HAL_UsartDescriptor_t;
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Registers usart's event handlers. Performs configuration
+of usart registers. Performs configuration of RTS, CTS and DTR pins.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure
+
+\return
+ Returns positive usart descriptor on success or -1 in cases: \n
+ - bad usart channel; \n
+ - there are not enough resources; \n
+******************************************************************************/
+int HAL_OpenUsart(HAL_UsartDescriptor_t *descriptor);
+
+/*************************************************************************//**
+\brief Releases the usart channel and pins, if hardware flow control was used.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure
+
+\return
+ -1 - bad descriptor or channel is already closed; \n
+ 0 - success.
+*****************************************************************************/
+int HAL_CloseUsart(HAL_UsartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Writes a number of bytes to usart channel.
+txCallback function will be used to notify when the transmission is finished.
+If hardware flow control is used for transmitting then RTS and DTR pins will
+be tested during transmission.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\param[in]
+ buffer - pointer to the application data buffer;
+
+\param[in]
+ length - number of bytes to transfer;
+
+\return
+ -1 - bad descriptor; \n
+ Number of bytes placed to the buffer - success.
+******************************************************************************/
+int HAL_WriteUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length);
+
+/*************************************************************************//**
+\brief Reads a number of bytes from usart and places them to the buffer.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\param[in]
+ buffer - pointer to the application buffer;
+
+\param[in]
+ length - number of bytes to be placed to the buffer;
+
+\return
+ -1 - bad descriptor, or bad number of bytes to read; \n
+ Number of bytes placed to the buffer - success.
+*****************************************************************************/
+int HAL_ReadUsart(HAL_UsartDescriptor_t *descriptor, uint8_t *buffer, uint16_t length);
+
+/**************************************************************************//**
+\brief Forbids the host to transmit data.
+Only USART_CHANNEL_1 can be used for hardware flow control for avr.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\return
+ -1 - bad descriptor, bad usart, or unsupported mode; \n
+ 0 - success.
+******************************************************************************/
+int HAL_OnUsartCts(HAL_UsartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Allows the host to transmit data.
+Only USART_CHANNEL_1 can be used for hardware flow control for avr.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\return
+ -1 - bad descriptor, bad usart, or unsupported mode; \n
+ 0 - success.
+******************************************************************************/
+int HAL_OffUsartCts(HAL_UsartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Reads RTS pin state.
+Only USART_CHANNEL_1 can be used for hardware flow control for avr.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\return
+ -1 - bad descriptor, bad usart, or unsupported mode; \n
+ 0 - RTS is low level; \n
+ 1 - RTS is high level;
+******************************************************************************/
+int HAL_ReadUsartRts(HAL_UsartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Reads DTR pin state.
+Only USART_CHANNEL_1 can be used for hardware flow control for avr.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\return
+ -1 - bad descriptor, bad usart, or unsupported mode; \n
+ 0 - DTR is low level; \n
+ 1 - DTR is high level;
+******************************************************************************/
+int HAL_ReadUsartDtr(HAL_UsartDescriptor_t *descriptor);
+
+/**************************************************************************//**
+\brief Checks the status of tx buffer.
+
+\param[in]
+ descriptor - pointer to HAL_UsartDescriptor_t structure;
+
+\return
+ -1 - bad descriptor, no tx buffer; \n
+ 1 - tx buffer is empty; \n
+ 0 - tx buffer is not empty;
+******************************************************************************/
+int HAL_IsTxEmpty(HAL_UsartDescriptor_t *descriptor);
+
+#if defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+/**************************************************************************//**
+\brief Enables DTR wake up.
+
+\param[in]
+ callback - pointer to callback method;
+******************************************************************************/
+void HAL_EnableDtrWakeUp(void (* callback)(void));
+
+/**************************************************************************//**
+\brief Disables DTR wake up.
+******************************************************************************/
+void HAL_DisableDtrWakeUp(void);
+#endif
+
+#endif /* _USART_H */
+// eof usart.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h
new file mode 100644
index 00000000..d561d8b5
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/usb.h
@@ -0,0 +1,245 @@
+/**************************************************************************//**
+ \file usb.h
+
+ \brief The header file describes the usb interface
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 17/07/08 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _USB_H
+#define _USB_H
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+// \cond
+// USB device API return values
+// Indicates the operation was successful
+#define STATUS_SUCCESS 0
+// Endpoint/device is already busy
+#define STATUS_BUSY 1
+// Operation has been aborted
+#define STATUS_ABORTED 2
+// Operation has been aborted because the device was configured
+#define STATUS_RESET 3
+
+// USB device states
+// The device is currently suspended
+#define DEVICE_SUSPENDED 0
+// USB cable is plugged into the device
+#define DEVICE_ATTACHED 1
+// Host is providing +5V through the USB cable
+#define DEVICE_POWERED 2
+// Device has been reset
+#define DEVICE_DEFAULT 3
+// The device has been given an address on the bus
+#define DEVICE_ADDRESS 5
+// A valid configuration has been selected
+#define DEVICE_CONFIGURED 6
+// \endcond
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+// transaction callback type
+typedef void (* TransferCallback_t)(void *pArg, uint8_t status, uint16_t transferred, uint16_t remaining);
+
+BEGIN_PACK
+// Usb endpoint descriptor
+typedef struct PACK
+{
+ uint8_t bLength; // Size of the descriptor in bytes
+ uint8_t bDescriptorType; // Descriptor type
+ uint8_t bEndpointAddress; // Address and direction of the endpoint
+ uint8_t bmAttributes; // Endpoint type and additional characteristics (for isochronous endpoints)
+ uint16_t wMaxPacketSize; // Maximum packet size (in bytes) of the endpoint
+ uint8_t bInterval; // Polling rate of the endpoint
+} HAL_UsbEndPointDescptr_t;
+END_PACK
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Registers user's request handler
+
+\param[in]
+ f - pointer to user's callback
+******************************************************************************/
+void HAL_RegisterRequestHandler(void (* f)(uint8_t *req));
+
+/**************************************************************************//**
+\brief Registers user's end of bus reset handler
+
+\param[in]
+ f - pointer to user's callback
+******************************************************************************/
+void HAL_RegisterEndOfBusResetHandler(void (* f)(void));
+
+/**************************************************************************//**
+\brief Registers user's resume handler
+
+\param[in]
+ f - pointer to user's callback
+******************************************************************************/
+void HAL_RegisterResumeHandler(void (* f)(void));
+
+/**************************************************************************//**
+\brief Registers user's suspend handler
+
+\param[in]
+ f - pointer to user's callback
+******************************************************************************/
+void HAL_RegisterSuspendHandler(void (* f)(void));
+
+/**************************************************************************//**
+\brief Configures an endpoint according to its Endpoint Descriptor.
+
+\param[in]
+ descriptor - Pointer to an Endpoint descriptor.
+******************************************************************************/
+void HAL_ConfigureEndpoint(HAL_UsbEndPointDescptr_t *descriptor);
+
+/**************************************************************************//**
+\brief Sends data through a USB endpoint. Sets up the transfer descriptor,
+writes one or two data payloads (depending on the number of FIFO bank
+for the endpoint) and then starts the actual transfer. The operation is
+complete when all the data has been sent.
+
+*If the size of the buffer is greater than the size of the endpoint
+(or twice the size if the endpoint has two FIFO banks), then the buffer
+must be kept allocated until the transfer is finished*. This means that
+it is not possible to declare it on the stack (i.e. as a local variable
+of a function which returns after starting a transfer).
+
+\param[in]
+ eptnum - Endpoint number.
+\param[in]
+ data - Pointer to a buffer with the data to send.
+\param[in]
+ size - Size of the data buffer.
+\param[in]
+ callback - Optional callback function to invoke when the transfer is complete.
+\param[in]
+ argument - Optional argument to the callback function.
+
+\return
+ STATUS_SUCCESS if the transfer has been started; otherwise, the
+ corresponding error status code.
+******************************************************************************/
+uint8_t HAL_UsbWrite(uint8_t eptnum, void *data, uint32_t size, TransferCallback_t callback, void *argument);
+
+/**************************************************************************//**
+\brief Reads incoming data on an USB endpoint This methods sets the transfer
+descriptor and activate the endpoint interrupt. The actual transfer is
+then carried out by the endpoint interrupt handler. The Read operation
+finishes either when the buffer is full, or a short packet (inferior to
+endpoint maximum size) is received.
+
+*The buffer must be kept allocated until the transfer is finished*.
+
+\param[in]
+ eptnum - Endpoint number.
+\param[in]
+ data - Pointer to a data buffer.
+\param[in]
+ size - Size of the data buffer in bytes.
+\param[in]
+ callback - Optional end-of-transfer callback function.
+\param[in]
+ argument - Optional argument to the callback function.
+
+\return
+ STATUS_SUCCESS if the read operation has been started; otherwise,
+ the corresponding error code.
+******************************************************************************/
+uint8_t HAL_UsbRead(uint8_t eptnum, void *data, uint32_t size, TransferCallback_t callback, void *argument);
+
+/**************************************************************************//**
+\brief Sets the HALT feature on the given endpoint (if not already in this state).
+
+\param[in]
+ eptnum - Endpoint number.
+******************************************************************************/
+void HAL_Halt(uint8_t eptnum);
+
+/**************************************************************************//**
+\brief Clears the Halt feature on the given endpoint.
+
+\param[in]
+ eptnum - Endpoint number.
+******************************************************************************/
+void HAL_Unhalt(uint8_t eptnum);
+
+/**************************************************************************//**
+\brief Returns the current Halt status of an endpoint.
+
+\param[in]
+ eptnum - Endpoint number.
+
+\return
+ 1 - if the endpoint is currently halted;
+ 0 - otherwise.
+******************************************************************************/
+uint8_t HAL_IsHalted(uint8_t eptnum);
+
+/**************************************************************************//**
+\brief Causes the given endpoint to acknowledge the next packet it receives with
+a STALL handshake.
+
+\param[in]
+ eptnum - Endpoint number.
+
+\return
+ STATUS_SUCCESS or STATUS_BUSY.
+******************************************************************************/
+uint8_t HAL_Stall(uint8_t eptnum);
+
+/**************************************************************************//**
+\brief Sets the device address to the given value.
+
+\param[in]
+ address - New device address.
+******************************************************************************/
+void HAL_SetAddress(uint8_t *address);
+
+/**************************************************************************//**
+\brief Sets the current device configuration.
+
+\param[in]
+ cfgnum - Configuration number to set.
+******************************************************************************/
+void HAL_SetConfiguration(uint8_t cfgnum);
+
+/**************************************************************************//**
+\brief Initializes the USB driver. This function must be called before host
+bus reset and after pull up is connected to D+. After pull up was connected
+to D+ host resets device with 100ms delay.
+
+\param[in]
+ reqMem - Memory for usb request. Memory is allocated by user.
+******************************************************************************/
+void HAL_UsbInit(uint8_t *reqMem);
+
+/**************************************************************************//**
+\brief Returns the current state of the USB device.
+
+\return
+ Device current state.
+******************************************************************************/
+uint8_t HAL_GetState(void);
+
+#endif /* _USB_H */
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h
new file mode 100644
index 00000000..7f26d39c
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/w1.h
@@ -0,0 +1,109 @@
+/**************************************************************************//**
+ \file w1.h
+
+ \brief The header file describes the 1-Wire interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 10/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _W1_H
+#define _W1_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halW1.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+#define W1_ANY_FAMILY 0x00
+#define DS2411 0x01
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/*************************************************************************//**
+\brief 1-Wire search procedure with search ROM command only
+\param[in]
+ family - 8-bit family code.
+\param[in]
+ data - pointer of SRAM where the 8-bytes ROM codes returned by the
+ devices are stored. \n
+ Attention! Memory size must be equal to (Number of devices) * 8 bytes
+\param[in]
+ count - number of devices we wish to find.
+\param[in]
+ actCount - number of devices actually found.
+\return
+ W1_SUCCESS_STATUS - if at least one device has been found. \n
+ W1_NO_DEVICE_STATUS - if there are no any devices presented
+ on the bus with specified family code. \n
+ W1_INVALID_CRC - if an invalid CRC has been read during the search and
+ no devices with specified family code was found.
+******************************************************************************/
+W1Status_t HAL_SearchW1Device(uint8_t family,
+ uint8_t *data,
+ uint8_t count,
+ uint8_t *actCount);
+
+/**************************************************************************//**
+\brief 1-Wire search procedure with alarm search command only
+\param[in]
+ family - 8-bit family code.
+\param[in]
+ data - pointer of SRAM where the 8-bytes ROM codes returned by the
+ devices are stored. \n
+\param[in]
+ count - number of devices we wish to find.
+\param[in]
+ actCount - number of devices actually found.
+\return
+ W1_SUCCESS_STATUS - if at least one device has been found. \n
+ W1_NO_DEVICE_STATUS - if there are no any devices presented
+ on the bus with specified family code. \n
+ W1_INVALID_CRC - if an invalid CRC has been read during the search and
+ no devices with specified family code was found.
+******************************************************************************/
+W1Status_t HAL_AlarmSearchW1Device(uint8_t family,
+ uint8_t *data,
+ uint8_t count,
+ uint8_t *actCount);
+
+/***************************************************************************//**
+\brief Resets all devices connected to the bus.
+\return
+ 0 - there are some devices at the bus. \n
+ 1 - there are no devices at the bus.
+*******************************************************************************/
+uint8_t HAL_ResetW1(void);
+
+/***************************************************************************//**
+\brief Writes a single byte to the bus
+\param[in]
+ value - byte to write.
+*******************************************************************************/
+void HAL_WriteW1(uint8_t value);
+
+/***************************************************************************//**
+\brief Reads a single byte from the bus.
+\return
+ byte read from the bus.
+*******************************************************************************/
+uint8_t HAL_ReadW1(void);
+
+#endif /* _W1_H */
+// eof w1.h
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h
new file mode 100644
index 00000000..06d259ae
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/include/wdtCtrl.h
@@ -0,0 +1,122 @@
+/**************************************************************************//**
+ \file wdtCtrl.h
+
+ \brief The header file describes the WDT interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 10/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#ifndef _WDTCTRL_H
+#define _WDTCTRL_H
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halWdt.h>
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+// \cond
+// an interval before WDT will expire
+#if defined(AT91SAM7X256)
+ typedef enum
+ {
+ WDT_INTERVAL_4 = 0xFFE, // 4 ms
+ WDT_INTERVAL_16 = 0xFFB, // 16 ms
+ WDT_INTERVAL_32 = 0xFF9, // 32 ms
+ WDT_INTERVAL_64 = 0xFEF, // 64 ms
+ WDT_INTERVAL_125 = 0xFDF, // 125 ms
+ WDT_INTERVAL_250 = 0xFBF, // 250 ms
+ WDT_INTERVAL_500 = 0xF7F, // 500 ms
+ WDT_INTERVAL_1000 = 0xEFF, // 1 second
+ WDT_INTERVAL_2000 = 0xDFF, // 2 seconds
+ WDT_INTERVAL_4000 = 0xBFF, // 4 seconds
+ WDT_INTERVAL_8000 = 0x7FF // 8 seconds
+ } HAL_WdtInterval_t;
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+ typedef enum
+ {
+ WDT_INTERVAL_16 = 0x00, // 16 ms
+ WDT_INTERVAL_32 = 0x01, // 32 ms
+ WDT_INTERVAL_64 = 0x02, // 64 ms
+ WDT_INTERVAL_125 = 0x03, // 125 ms
+ WDT_INTERVAL_250 = 0x04, // 250 ms
+ WDT_INTERVAL_500 = 0x05, // 500 ms
+ WDT_INTERVAL_1000 = 0x06, // 1 second
+ WDT_INTERVAL_2000 = 0x07, // 2 seconds
+ WDT_INTERVAL_4000 = 0x20, // 4 seconds
+ WDT_INTERVAL_8000 = 0x21 // 8 seconds
+ }HAL_WdtInterval_t;
+#endif
+// \endcond
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/***************************************************************************//**
+\brief Starts WDT within a given interval.
+
+\param[in]
+ interval - interval. Must be chosen from: \n
+ WDT_INTERVAL_16 // 16 ms \n
+ WDT_INTERVAL_32 // 32 ms \n
+ WDT_INTERVAL_64 // 64 ms \n
+ WDT_INTERVAL_125 // 125 ms \n
+ WDT_INTERVAL_250 // 250 ms \n
+ WDT_INTERVAL_500 // 500 ms \n
+ WDT_INTERVAL_1000 // 1 second \n
+ WDT_INTERVAL_2000 // 2 seconds \n
+ WDT_INTERVAL_4000 // 4 seconds \n
+ WDT_INTERVAL_8000 // 8 seconds \n
+*******************************************************************************/
+void HAL_StartWdt(HAL_WdtInterval_t interval);
+
+/***************************************************************************//**
+\brief Registers WDT fired callback.
+
+\param[in]
+ wdtCallback - pointer to the callback function.
+*******************************************************************************/
+void HAL_RegisterWdtCallback(void (*wdtCallback)(void));
+
+/******************************************************************************
+ Inline static functions section
+******************************************************************************/
+#if defined(AT91SAM7X256)
+/**************************************************************************//**
+\brief reset and reload wdt counter
+******************************************************************************/
+INLINE void HAL_ResetWdt(void)
+{
+ halResetWdt();
+}
+
+#elif defined(ATMEGA1281) || defined(ATMEGA2561) || defined(ATMEGA1284) || defined(AT90USB1287) || defined(ATMEGA128RFA1)
+/*******************************************************************//**
+\brief stops the WDT
+***********************************************************************/
+#define HAL_StopWdt() wdt_disable()
+
+/*******************************************************************//**
+\brief resets the WDT
+***********************************************************************/
+#define HAL_ResetWdt() wdt_reset()
+#endif
+
+#endif /*_WDTCTRL_H*/
+
+// eof wdtCtrl.h