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-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c141
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90250
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c163
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c124
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s79
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s9080
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c122
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c66
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c71
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c119
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c161
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c297
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c304
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c142
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c190
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s210
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90211
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c175
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c90
-rw-r--r--digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c79
20 files changed, 3074 insertions, 0 deletions
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c
new file mode 100644
index 00000000..7d59a5e0
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/calibration.c
@@ -0,0 +1,141 @@
+/**************************************************************************//**
+ \file calibration.c
+
+ \brief the calibration of the internal RC generator.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/06/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halClkCtrl.h>
+#include <calibration.h>
+#include <atomic.h>
+#include <halW1.h>
+
+/******************************************************************************
+ Defines section
+******************************************************************************/
+#define INTERNAL_CLOCK F_CPU
+
+// low frequency oscillator clock for 1 cycle measurement
+#define EXTERNAL_TICKS 1
+// mcu clocks number of one procedure measurement
+#define CYCLE_LENGTH 7
+// stability crystal oscillator frequency
+#define REFERENCE_CLOCK (32768/1024)
+// Etalon mcu clock number for 1 ticks of 32 Hz asynchronous timer
+#define REFERENCE_COUNT (INTERNAL_CLOCK * EXTERNAL_TICKS) / (REFERENCE_CLOCK * CYCLE_LENGTH)
+// up direction
+#define UP_DIRECT 2
+// down direction
+#define DOWN_DIRECT 1
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/******************************************************************************
+Calculates number of cycles during EXTERNAL_TICKS period.
+Parameters:
+ none
+Returns:
+ number of the cycles.
+******************************************************************************/
+uint16_t halMeasurement(void);
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Performs calibration of the internal RC generator.
+Parameters:
+ none.
+Returns:
+ none.
+******************************************************************************/
+void halCalibrateInternalRc(void)
+{
+ uint16_t count;
+ uint8_t cycles = 0x80;
+ uint16_t counterGate = REFERENCE_COUNT;
+ uint8_t direct = 0;
+
+ do
+ {
+ // perform clock measurement
+ count = halMeasurement();
+ if (count > REFERENCE_COUNT)
+ {
+ if ((counterGate < (count - REFERENCE_COUNT)) && (UP_DIRECT == direct))
+ { // previous measurement was more correct
+ OSCCAL--;
+ NOP;
+ break;
+ }
+ OSCCAL--;
+ NOP;
+ counterGate = count - REFERENCE_COUNT;
+ direct = DOWN_DIRECT;
+ }
+
+ if (count < REFERENCE_COUNT)
+ {
+ if ((counterGate < (REFERENCE_COUNT - count)) && (DOWN_DIRECT == direct))
+ { // previous measurement was more exactly
+ OSCCAL++;
+ NOP;
+ break;
+ }
+ OSCCAL++;
+ NOP;
+ counterGate = REFERENCE_COUNT - count;
+ direct = UP_DIRECT;
+ }
+
+ if (REFERENCE_COUNT == count)
+ break;
+
+ } while (--cycles);
+}
+
+/******************************************************************************
+Performs calibration of the main clock generator.
+Parameters:
+ none.
+Returns:
+ none.
+******************************************************************************/
+void HAL_CalibrateMainClock(void)
+{
+ if (INTERNAL_RC == halGetClockSource())
+ halCalibrateInternalRc();
+}
+
+/******************************************************************************
+Starts calibration after program starting or waking up from power down.
+******************************************************************************/
+void halStartingCalibrate(void)
+{
+ uint16_t i;
+
+ for (i = 0; i < 5000; i++)
+ { /* wait for 1 second start up low frequency generator*/
+ __delay_us(200); // 200 us
+ }
+ HAL_CalibrateMainClock();
+}
+// eof calibration.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90
new file mode 100644
index 00000000..ce20e615
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/cstartup.s90
@@ -0,0 +1,250 @@
+;----------------------------------------------------------------------------
+;
+; This module contains the AVR C and EC++ startup
+; routine and must usually be tailored to suit
+; customer's hardware.
+;
+; File version: $Revision: 1.13 $
+;
+;----------------------------------------------------------------------------
+#include <macros.m90>
+
+;----------------------------------------------------------------------------
+; Set up the INTVEC segment with a reset vector
+;----------------------------------------------------------------------------
+ MODULE ?RESET
+
+ COMMON INTVEC:CODE:ROOT(1) ; Align at an even address
+
+ EXTERN ?BC_STARTUP
+ PUBLIC __bitcloud_start
+ PUBLIC ?RESET
+
+ ORG $0
+__bitcloud_start:
+?RESET:
+ XJMP ?BC_STARTUP
+
+ ENDMOD
+
+;----------------------------------------------------------------------------
+; Forward declarations of segments used in initialization
+;----------------------------------------------------------------------------
+ RSEG CSTACK:DATA:NOROOT(0)
+ RSEG RSTACK:DATA:NOROOT(0)
+
+;----------------------------------------------------------------------------
+; Perform C initialization
+;----------------------------------------------------------------------------
+ MODULE ?BC_STARTUP
+
+ EXTERN __low_level_init
+ EXTERN __segment_init
+#ifdef _ECLIB_ECPP
+ EXTERN __call_ctors
+#endif /* _ECLIB_ECPP */
+ EXTERN main
+ EXTERN exit
+ EXTERN _exit
+ ; jump NULL handler
+ EXTERN halWdtInit
+
+;----------------------------------------------------------------------------
+; If the return address stack is located in external SRAM, make sure that
+; you have uncommented the correct code in __low_level_init!!!
+;----------------------------------------------------------------------------
+ RSEG CODE:CODE:NOROOT(1)
+ PUBLIC ?BC_STARTUP
+ PUBLIC __RESTART
+ EXTERN ?RESET
+
+__RESTART:
+?BC_STARTUP:
+ XCALL halWdtInit ; call stop wdt, read reset reason and jump NULL handler
+
+#if A90_POINTER_REG_SIZE > 2
+ PUBLIC ?zero_reg_initialization
+
+?zero_reg_initialization:
+ CLR R15
+ OUT RAMPD,R15
+#endif
+
+ REQUIRE ?SETUP_STACK
+ REQUIRE ?RESET
+
+ RSEG CODE:CODE:NOROOT(1)
+ PUBLIC __RSTACK_in_external_ram
+
+__RSTACK_in_external_ram:
+ LDI R16,0xC0
+ OUT 0x35,R16 ;Enable the external SRAM with a wait state
+
+ RSEG CODE:CODE:NOROOT(1)
+ PUBLIC __RSTACK_in_external_ram_new_way
+ EXTERN __?XMCRA
+
+__RSTACK_in_external_ram_new_way:
+ LDI R16,0x8C ;SRE=1,SRL2=0,SRL1=0,SRL0=0,SRW11=1,SRW10=1,SRW01=0,SRW00=0
+ STS __?XMCRA,R16 ;Enable the external SRAM with maximum wait state.
+
+;----------------------------------------------------------------------------
+; Set up the CSTACK and RSTACK pointers.
+;----------------------------------------------------------------------------
+ RSEG CODE:CODE:NOROOT(1)
+ ;; Fill up stacks with repeated pattern 0xCD (same pattern is used by IAR stack gauge)
+?FILL_RSTACK:
+ LDI R16, 0xCD
+ LDI X0, LOW(SFB(RSTACK))
+ LDI Y0, LOW(SFE(RSTACK))
+#if A90_POINTER_REG_SIZE > 1
+ LDI X1, HIGH(SFB(RSTACK))
+ LDI Y1, HIGH(SFE(RSTACK))
+#else
+ LDI X1, 0
+ LDI Y1, 0
+#endif
+?FILL_RSTACK_LOOP:
+ ST X+, R16
+ CP X0, Y0
+ CPC X1, Y1
+ BRNE ?FILL_RSTACK_LOOP
+
+?FILL_CSTACK:
+ LDI X0, LOW(SFB(CSTACK))
+ LDI Y0, LOW(SFE(CSTACK))
+#if A90_POINTER_REG_SIZE > 1
+ LDI X1, HIGH(SFB(CSTACK))
+ LDI Y1, HIGH(SFE(CSTACK))
+#else
+ LDI X1, 0
+ LDI Y1, 0
+#endif
+?FILL_CSTACK_LOOP:
+ ST X+, R16
+ CP X0, Y0
+ CPC X1, Y1
+ BRNE ?FILL_CSTACK_LOOP
+
+?SETUP_STACK:
+ ;; Return address stack (RSTACK)
+ LDI R16,LOW(SFE(RSTACK)-1)
+ OUT 0x3D,R16
+#if A90_POINTER_REG_SIZE > 1
+ LDI R16,HIGH(SFE(RSTACK)-1)
+ OUT 0x3E,R16
+#endif
+
+ ;; Data stack (CSTACK)
+ LDI Y0,LOW(SFE(CSTACK))
+#if A90_POINTER_REG_SIZE > 1
+#if MEMORY_MODEL == TINY_MEMORY_MODEL
+ LDI Y1,0
+#else
+ LDI Y1,HIGH(SFE(CSTACK))
+#endif
+#if A90_POINTER_REG_SIZE > 2
+ LDI Z0,HWRD(SFB(CSTACK))
+ OUT RAMPY,Z0
+#endif
+#endif
+
+#if A90_POINTER_REG_SIZE > 2
+; Nothing here, the things previously here has been done earlier.
+#else
+ REQUIRE ?call_low_level_init
+
+;----------------------------------------------------------------------------
+; Clear R15 so that it can be used as zero register by the code generator.
+; The compiler will emit a "REQUIRE ?zero_reg_initialization" statement if
+; this optimization has been enabled.
+;----------------------------------------------------------------------------
+ RSEG CODE:CODE:NOROOT(1)
+ PUBLIC ?zero_reg_initialization
+
+?zero_reg_initialization:
+ CLR R15
+
+;----------------------------------------------------------------------------
+; Call __low_level_init to do low level initializatons. Modify the supplied
+; __low_level_init module to add your own initialization code or to
+; remove segment initialization (by returning 0).
+;----------------------------------------------------------------------------
+ RSEG CODE:CODE:NOROOT(1)
+#endif
+ PUBLIC ?call_low_level_init
+
+?call_low_level_init:
+ XCALL __low_level_init
+
+ REQUIRE ?cstartup_call_main
+
+;----------------------------------------------------------------------------
+; Call __segment_init to initialize segments.
+;----------------------------------------------------------------------------
+ RSEG CODE:CODE:NOROOT(1)
+ PUBLIC ?need_segment_init
+
+?need_segment_init:
+ TST P0
+ BREQ ?skip_segment_init
+ XCALL __segment_init
+?skip_segment_init:
+
+;----------------------------------------------------------------------------
+; Call the constructors of all global objects. This code will only
+; be used if any EC++ modules defines global objects that need to
+; have its constructor called before main.
+;----------------------------------------------------------------------------
+#ifdef _ECLIB_ECPP
+ RSEG DIFUNCT:CODE:NOROOT(0)
+ RSEG CODE:CODE:NOROOT(1)
+
+ PUBLIC ?call_ctors
+
+?call_ctors:
+#ifdef __HAS_ELPM__
+ LDI P0,LOW(SFB(DIFUNCT))
+ LDI P1,LOW(SFB(DIFUNCT) >> 8)
+ LDI P2,SFB(DIFUNCT) >> 16
+
+ LDI Q0,LOW(SFE(DIFUNCT))
+ LDI Q1,LOW(SFE(DIFUNCT) >> 8)
+ LDI Q2,SFE(DIFUNCT) >> 16
+#else
+ LDI P0,LOW(SFB(DIFUNCT))
+ LDI P1,SFB(DIFUNCT) >> 8
+
+ LDI P2,LOW(SFE(DIFUNCT))
+ LDI P3,SFE(DIFUNCT) >> 8
+#endif
+
+ XCALL __call_ctors
+#endif /* _ECLIB_ECPP */
+
+;----------------------------------------------------------------------------
+; Call main
+;----------------------------------------------------------------------------
+ RSEG CODE:CODE:NOROOT(1)
+
+ PUBLIC ?cstartup_call_main
+
+?cstartup_call_main:
+ XCALL main
+ XCALL exit
+ XJMP _exit
+
+ END
+
+;----------------------------------------------------------------------------
+; $Log: cstartup.s90 $
+; Revision 1.13 2005/02/09 16:34:50Z IPEO
+; Revision 1.12 2005/02/09 12:12:46Z IPEO
+; Revision 1.11 2005/02/09 11:32:04Z IPEO
+; Revision 1.10 2005/01/26 13:56:34Z IPEO
+; Revision 1.9 2005/01/17 15:24:14Z IPEO
+; Revision 1.8 2003/11/07 16:34:04Z IPEO
+; Revision 1.7 2003/09/04 13:48:25Z IPEO
+; Revision 1.6 2003/08/22 14:09:09Z IPEO
+; Revision 1.5 2003/08/22 08:54:09Z IPEO
+; Revision 1.4 2003/08/20 08:38:55Z IPEO
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c
new file mode 100644
index 00000000..b9e19a0b
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAdc.c
@@ -0,0 +1,163 @@
+/**************************************************************************//**
+ \file halAdc.c
+
+ \brief Implementation of hardware depended ADC interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halAdc.h>
+#include <halW1.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+
+/******************************************************************************
+ Defines section
+******************************************************************************/
+#define ALL_CHANNEL_MASK 0x1F
+#define CHANNEL_MASK_1 0x01
+#define CHANNEL_MASK_2 0x03
+#define CHANNEL_MASK_3 0x04
+#define CHANNEL_MASK_4 0x0C
+#define DELAY_FOR_STABILIZE 125
+
+/******************************************************************************
+ Constants section
+******************************************************************************/
+#if F_CPU == 4000000
+ PROGMEM_DECLARE(const uint8_t halAdcDivider[5]) = {2, 3, 4, 5, 6};
+#elif F_CPU == 8000000
+ PROGMEM_DECLARE(const uint8_t halAdcDivider[5]) = {3, 4, 5, 6, 7};
+#endif
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+static volatile uint8_t halAdcResolution = RESOLUTION_8_BIT;
+static volatile void *halAdcDataPointer = NULL;
+static volatile uint16_t halAdcCurCount = 0;
+static volatile uint16_t halAdcMaxCount = 0;
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Initializations the ADC.
+Parameters:
+ param - pointer to parameter structure
+Returns:
+ none.
+******************************************************************************/
+void halOpenAdc(HAL_AdcParams_t *param)
+{
+ halAdcMaxCount = param->selectionsAmount;
+ halAdcResolution = param->resolution;
+ halAdcDataPointer = param->bufferPointer;
+
+ /* sets voltage reference */
+ ADMUX = param->voltageReference;
+ /* Enable left adjust result */
+ if (RESOLUTION_8_BIT == halAdcResolution)
+ ADMUX |= (1 << ADLAR);
+
+ uint8_t tmp;
+ memcpy_P(&tmp, &(halAdcDivider[param->sampleRate]), 1);
+ ADCSRA = tmp | (1 << ADEN);
+}
+
+/******************************************************************************
+Starts convertion on the ADC channel.
+Parameters:
+ channel - channel number.
+Returns:
+ none.
+******************************************************************************/
+void halStartAdc(uint8_t channel)
+{
+ halAdcCurCount = 0;
+ /* disable digital buffers */
+ if (HAL_ADC_CHANNEL3 >= channel)
+ {
+ DIDR0 = (1 << channel);
+ }
+ else
+ {
+ if ((HAL_ADC_DIFF_CHANNEL0 == channel) || (HAL_ADC_DIFF_CHANNEL2 == channel))
+ DIDR0 = CHANNEL_MASK_1;
+ else if ((HAL_ADC_DIFF_CHANNEL1 == channel) || (HAL_ADC_DIFF_CHANNEL3 == channel))
+ DIDR0 = CHANNEL_MASK_2;
+ else if ((HAL_ADC_DIFF_CHANNEL4 == channel) || (HAL_ADC_DIFF_CHANNEL6 == channel))
+ DIDR0 = CHANNEL_MASK_3;
+ else if ((HAL_ADC_DIFF_CHANNEL5 == channel) || (HAL_ADC_DIFF_CHANNEL7 == channel))
+ DIDR0 = CHANNEL_MASK_4;
+ }
+
+ uint8_t tmp = ADMUX & ALL_CHANNEL_MASK;
+
+ /* clear previous channel number */
+ ADMUX &= ~ALL_CHANNEL_MASK;
+ /* set current channel number */
+ ADMUX |= channel;
+
+ /* if new differential channel is settled then must make 125 us delay for gain stabilize. */
+ if ((tmp != channel) && (HAL_ADC_CHANNEL3 < channel))
+ __delay_us(DELAY_FOR_STABILIZE);
+
+ if (halAdcMaxCount > 1)
+ ADCSRA |= ((1 << ADIE) | (1 << ADATE) | (1 << ADSC)); // Starts running mode
+ else
+ ADCSRA |= ((1 << ADIE) | (1 << ADSC)); // Starts one conversion
+}
+
+/******************************************************************************
+Closes the ADC.
+Parameters:
+ none
+Returns:
+ none
+******************************************************************************/
+void halCloseAdc(void)
+{
+ ADMUX = 0;
+ ADCSRA = 0;
+ // Digital input enable
+ DIDR0 = 0;
+}
+
+/******************************************************************************
+ADC conversion complete interrupt handler.
+******************************************************************************/
+ISR(ADC_vect)
+{
+ BEGIN_MEASURE
+ // Read ADC conversion result
+ if (RESOLUTION_8_BIT == halAdcResolution)
+ ((uint8_t *)halAdcDataPointer)[halAdcCurCount++] = ADCH;
+ else
+ ((uint16_t *)halAdcDataPointer)[halAdcCurCount++] = ADC;
+
+ if (halAdcCurCount == halAdcMaxCount)
+ {
+ // Disable ADC Interrupt
+ ADCSRA &= ~(1 << ADIE);
+ halSigAdcInterrupt();
+ }
+ END_MEASURE(HALISR_ADC_TIME_LIMIT)
+}
+// eof halAdc.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c
new file mode 100644
index 00000000..c462b896
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halAppClock.c
@@ -0,0 +1,124 @@
+/**************************************************************************//**
+ \file halAppClock.c
+
+ \brief Implementation of appTimer hardware-dependent module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halAppClock.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+static uint32_t halAppTime = 0ul; // time of application timer
+uint8_t halAppTimeOvfw = 0;
+static volatile uint8_t halAppIrqCount = 0;
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Initialization appTimer clock.
+******************************************************************************/
+void halInitAppClock(void)
+{
+ OCR4A = TOP_TIMER_COUNTER_VALUE; // 1 millisecond timer interrupt interval.
+ TCCR4B = (1 << WGM12); // CTC mode
+ halStartAppClock(); // clock source is cpu divided by 8
+ TIMSK4 |= (1 << OCIE4A); // Enable TC4 interrupt
+}
+
+/******************************************************************************
+Return time of sleep timer.
+
+Returns:
+ time in ms.
+******************************************************************************/
+uint32_t halGetTimeOfAppTimer(void)
+{
+ halAppSystemTimeSynchronize();
+ return halAppTime;
+}
+
+/******************************************************************************
+Return system time in us
+
+Parameters:
+ mem - memory for system time
+Returns:
+ none.
+******************************************************************************/
+void halGetSystemTimeUs(uint64_t *mem)
+{
+#if (F_CPU == 4000000ul)
+ *mem = 1000ul * halAppTime + (TCNT4 << 1);
+#endif
+#if (F_CPU == 8000000ul)
+ *mem = 1000ul * halAppTime + TCNT4;
+#endif
+}
+
+/**************************************************************************//**
+\brief Takes account of the sleep interval.
+
+\param[in]
+ interval - time of sleep
+******************************************************************************/
+void halAdjustSleepInterval(uint32_t interval)
+{
+ halAppTime += interval;
+ halPostTask4(HAL_TIMER4_COMPA);
+}
+
+/**************************************************************************//**
+Synchronization system time which based on application timer.
+******************************************************************************/
+void halAppSystemTimeSynchronize(void)
+{
+ uint8_t tmpCounter;
+ uint32_t tmpValue;
+
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ tmpCounter = halAppIrqCount;
+ halAppIrqCount = 0;
+ END_MEASURE(HAL_APP_TIMER_SYNCHRONIZE_LIMIT)
+ ATOMIC_SECTION_LEAVE
+
+ tmpValue = tmpCounter * HAL_APPTIMERINTERVAL;
+ halAppTime += tmpValue;
+ if (halAppTime < tmpValue)
+ halAppTimeOvfw++;
+}
+
+/******************************************************************************
+Interrupt handler
+******************************************************************************/
+ISR(TIMER4_COMPA_vect)
+{
+ BEGIN_MEASURE
+ halAppIrqCount++;
+ halPostTask4(HAL_TIMER4_COMPA);
+ // infinity loop spy
+ SYS_InfinityLoopMonitoring();
+ END_MEASURE(HALISR_TIMER4_COMPA_TIME_LIMIT)
+}
+// eof halAppClock.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s
new file mode 100644
index 00000000..a6332b7d
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s
@@ -0,0 +1,79 @@
+/**************************************************************************//**
+ \file halCalibration.s
+
+ \brief Implementation of measurement of mcu clock.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 1/10/08 A. Khromykh - Created
+*******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+Calculates number of cycles during EXTERNAL_TICKS period.
+Parameters:
+ none
+Returns:
+ number of the cycles (r25:r24).
+******************************************************************************/
+.global halMeasurement
+.type halMeasurement,@function
+halMeasurement:
+ push r21
+
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+
+ ; local copy cnt
+ push r28
+ push r29
+ ldi r28, 0 ; cnt = 0
+ ldi r29, 0 ; cnt = 0
+
+ ; r21 = TCNT2
+ push r23 ; save SREG to stack, to clear r23
+ lds r21, 0x00B2
+ ; while(TCNT2 == r21);
+ __l0:
+ lds r23, 0x00B2
+ cp r23, r21
+ breq __l0
+
+ ; r23++
+ inc r23
+
+ ; measurement
+ __l1:
+ adiw r28, 0x01 ; cnt ++ (2 cycle)
+ lds r21, 0x00B2 ; read TCNT2
+ cp r21, r23 ; if (TCNT2 == TCNT2old)
+ brne __l1 ;
+
+ pop r23 ; load SREG from stack
+
+ ; return cnt
+ movw r24, r28
+
+ pop r29
+ pop r28
+
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ pop r21
+ ret
+
+; eof halCalibration.s
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90
new file mode 100644
index 00000000..cbdb8d13
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halCalibration.s90
@@ -0,0 +1,80 @@
+/**************************************************************************//**
+ \file halCalibration.s90
+
+ \brief Implementation of measurement of mcu clock.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 1/10/08 A. Khromykh - Created
+*******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/*=============================================================
+Calculates number of cycles during EXTERNAL_TICKS period.
+Parameters:
+ none
+Returns:
+ number of the cycles (r17:r16).
+===============================================================*/
+PUBLIC halMeasurement
+RSEG CODE
+halMeasurement:
+ push r21
+
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+
+ ; local copy cnt
+ push r28
+ push r29
+ ldi r28, 0 ; cnt = 0
+ ldi r29, 0 ; cnt = 0
+
+ ; r21 = TCNT2
+ push r23 ; save SREG to stack, to clear r23
+ lds r21, 0x00B2
+ ; while(TCNT2 == r21);
+ __l0:
+ lds r23, 0x00B2
+ cp r23, r21
+ breq __l0
+
+ ; r23++
+ inc r23
+
+ ; measurement
+ __l1:
+ adiw r28, 0x01 ; cnt ++ (2 cycle)
+ lds r21, 0x00B2 ; read TCNT2
+ cp r21, r23 ; if (TCNT2 == TCNT2old)
+ brne __l1 ;
+
+ pop r23 ; load SREG from stack
+
+ ; return cnt
+ movw r16, r28
+
+ pop r29
+ pop r28
+
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ pop r21
+ ret
+
+; eof halCalibration.s90
+END
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c
new file mode 100644
index 00000000..e6f968d1
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halClkCtrl.c
@@ -0,0 +1,122 @@
+/**************************************************************************//**
+ \file halClkCtrl.c
+
+ \brief Implementation of clock control module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/07 E. Ivanov - Created
+ 16/04/09 A. Khromykh - Refactored
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halClkCtrl.h>
+#include <halRfCtrl.h>
+#include <atomic.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+// defines fuse mask for RC oscillator
+#define HAL_RC_OSCILLATOR_CLOCK 0x02
+// mask for CKSEL bits
+#define HAL_CKSEL_MASK 0x0F
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+void halStartingCalibrate(void);
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+static volatile ClkSource_t clkClockSource;
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/**************************************************************************//**
+\brief Initialization system clock.
+******************************************************************************/
+void halInitFreq(void)
+{
+ uint8_t lowFuseByte;
+
+ // wait for end of eeprom writing
+ while (EECR & (1 << EEPE));
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ lowFuseByte = SF_GET_LOW_FUSES();
+ END_MEASURE(HALATOM_SETLOWFUSES_TIME_LIMIT)
+ ATOMIC_SECTION_LEAVE
+
+ if (HAL_RC_OSCILLATOR_CLOCK == (lowFuseByte & HAL_CKSEL_MASK))
+ clkClockSource = INTERNAL_RC;
+ else
+ clkClockSource = OTHER_SOURCE;
+
+ if (INTERNAL_RC == clkClockSource)
+ {
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ ASM (
+ "push r21 \n\t"
+
+ "ldi r21, 0x80 \n\t" /* CLKPR = 1 << CLKPCE */
+ "sts 0x0061, r21 \n\t" /* CLKPR = 1 << CLKPCE */
+
+#if (F_CPU == 4000000ul)
+ "ldi r21, 0x01 \n\t" /* CLKPR = 1 << CLKPS0 (1 cycle) */
+ "sts 0x0061, r21 \n\t" /* CLKPR = 1 << CLKPS0 (2 cycle) */
+#endif
+#if (F_CPU == 8000000ul)
+ "ldi r21, 0x00 \n\t" /* CLKPR = 0 (1 cycle) */
+ "sts 0x0061, r21 \n\t" /* CLKPR = 0 (2 cycle) */
+#endif
+
+ "pop r21 \n\t"
+ );
+
+ END_MEASURE(HALATOM_INITFREQ_TIME_LIMIT)
+ ATOMIC_SECTION_LEAVE
+ halStartingCalibrate();
+ }
+}
+
+/**************************************************************************//**
+\brief Return clock source
+
+\return
+ clock source.
+******************************************************************************/
+ClkSource_t halGetClockSource(void)
+{
+ return clkClockSource;
+}
+
+/**************************************************************************//**
+\brief System clock.
+
+\return
+ system clock in Hz.
+******************************************************************************/
+uint32_t HAL_ReadFreq(void)
+{
+ return (uint32_t)F_CPU;
+}
+
+// eof halClkCtrl.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c
new file mode 100644
index 00000000..0dfda94e
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halEeprom.c
@@ -0,0 +1,66 @@
+/**************************************************************************//**
+ \file halEeprom.c
+
+ \brief Implementation of the hardware dependent the EEPROM module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <atomic.h>
+#include <halEeprom.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Writes a byte to EEPROM.
+Parameters:
+ EECRMask - mask that define capability of interrupt after byte writing.
+ address - address of byte
+ data - data.
+Returns:
+ none.
+******************************************************************************/
+void halEepromWrite(uint8_t EECRMask, uint16_t address, uint8_t data)
+{
+ while (EECR & (1 << EEPE)); // wait for completion of previous eeprom write
+ while (SPMCSR & (1 << SPMEN)); // wait for completion of previous program memory write
+ EEAR = address;
+ EEDR = data;
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ EECR = EECRMask;
+ EECR |= (1 << EEPE);
+ END_MEASURE(HALISR_EEPROM_WRITE_TIME_LIMIT)
+ ATOMIC_SECTION_LEAVE
+}
+
+/******************************************************************************
+Interrupt handler.
+******************************************************************************/
+ISR(EE_READY_vect)
+{
+ BEGIN_MEASURE
+ EECR &= ~(1 << EERIE); //disable interrupt
+ halSigEepromReadyInterrupt();
+ END_MEASURE(HALISR_EEPROM_READY_TIME_LIMIT)
+}
+
+// eof helEeprom.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c
new file mode 100644
index 00000000..593e6257
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halInit.c
@@ -0,0 +1,71 @@
+/**************************************************************************//**
+ \file halInit.c
+
+ \brief HAL start up module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/06/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halAppClock.h>
+#include <halSleepTimerClock.h>
+#include <halRfSpi.h>
+#include <halIrq.h>
+#include <halInterrupt.h>
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/******************************************************************************
+ Reads uid from external devices.
+******************************************************************************/
+void halReadUid(void);
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Performs start up HAL initialization.
+Parameters:
+ none.
+Returns:
+ none.
+******************************************************************************/
+void HAL_Init(void)
+{
+ /* Init first diagnostic timer */
+#ifdef MEASURE
+ TCCR5B = (1 << CS50);
+#endif
+
+ HAL_InitRfSpi();
+ /* start sleep time */
+ halStartSleepTimerClock();
+ /* initialization work frequency &
+ * start calibration */
+ halInitFreq();
+ /* Reads unique ID */
+ halReadUid();
+ /* initialization and start application timer */
+ halInitAppClock();
+ /* initialization dtr interrupt */
+ halSetIrqConfig(IRQ_4, IRQ_LOW_LEVEL);
+ /* global enable interrupt*/
+ HAL_EnableInterrupts();
+}
+// eof halInit.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c
new file mode 100644
index 00000000..b119fe4d
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halIrq.c
@@ -0,0 +1,119 @@
+/**************************************************************************//**
+ \file halIrq.c
+
+ \brief Implementation of HWD IRQ interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <halIrq.h>
+#include <sleep.h>
+#include <halSleepTimerClock.h>
+#include <halAppClock.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+#if defined(PLATFORM_ZIGBIT)
+ IrqCallback_t IrqCallbackList[HAL_NUM_IRQ_LINES] = {NULL, NULL};
+#else
+ IrqCallback_t IrqCallbackList[HAL_NUM_IRQ_LINES] = {NULL, NULL, NULL};
+#endif
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Sets configuration of pins and the registers.
+Parameters:
+ irqNumber - number of interrupt.
+ irqMode - mode of interrupt
+Returns:
+ none.
+******************************************************************************/
+void halSetIrqConfig(uint8_t irqNumber, uint8_t irqMode)
+{
+ uint8_t ui8ShiftCount = (irqNumber - IRQ_4) << 1;
+ // IRQ pin is input
+ DDRE &= ~(1 << irqNumber);
+ PORTE |= (1 << irqNumber);
+ // Clear previous settings of corresponding interrupt sense control
+ EICRB &= ~(3 << ui8ShiftCount);
+ // Setup corresponding interrupt sence control
+ EICRB |= (irqMode & 0x03) << ui8ShiftCount;
+ // Clear the INTn interrupt flag
+ EIFR |= (1 << irqNumber);
+}
+
+/**************************************************************************//**
+\brief Clears configuration of pins and the registers.
+\param[in]
+ irqNumber - number of interrupt.
+******************************************************************************/
+void halClrIrqConfig(uint8_t irqNumber)
+{
+ uint8_t ui8ShiftCount = (irqNumber - IRQ_4) << 1;
+ DDRE &= ~(1 << irqNumber);// IRQ pin is input
+ PORTE &= ~(1 << irqNumber); // pullup off
+ EICRB &= ~(3 << ui8ShiftCount);
+}
+
+#if !defined(PLATFORM_ZIGBIT)
+/******************************************************************************
+ External interrupt 5 handler
+******************************************************************************/
+ISR(INT5_vect)
+{
+ BEGIN_MEASURE
+ halWakeupFromIrq();
+ /* user's callback */
+ if (NULL != IrqCallbackList[IRQ_5 - HAL_FIRST_VALID_IRQ])
+ IrqCallbackList[IRQ_5 - HAL_FIRST_VALID_IRQ]();
+ END_MEASURE(HALISR_INT5_VECT_TIME_LIMIT)
+}
+#endif
+
+/******************************************************************************
+ External interrupt 6 handler
+******************************************************************************/
+ISR(INT6_vect)
+{
+ BEGIN_MEASURE
+ halWakeupFromIrq();
+ /* user's callback */
+ if (NULL != IrqCallbackList[IRQ_6 - HAL_FIRST_VALID_IRQ])
+ IrqCallbackList[IRQ_6 - HAL_FIRST_VALID_IRQ]();
+ END_MEASURE(HALISR_INT6_VECT_TIME_LIMIT)
+}
+
+/******************************************************************************
+ External interrupt 7 handler
+******************************************************************************/
+ISR(INT7_vect)
+{
+ BEGIN_MEASURE
+ halWakeupFromIrq();
+ /* user's callback */
+ if (NULL != IrqCallbackList[IRQ_7 - HAL_FIRST_VALID_IRQ])
+ IrqCallbackList[IRQ_7 - HAL_FIRST_VALID_IRQ]();
+ END_MEASURE(HALISR_INT7_VECT_TIME_LIMIT)
+}
+// eof irq.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c
new file mode 100644
index 00000000..d5cd8a74
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halPwm.c
@@ -0,0 +1,161 @@
+/**************************************************************************//**
+ \file halPwm.c
+
+ \brief Implementation of hardware depended PWM interface.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 10/11/08 A. Taradov - Created
+ 5/04/11 A.Razinkov - Refactored
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+#include <halPwm.h>
+#include <atomic.h>
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+
+/**************************************************************************//**
+\brief Prepare PWM channel access. Determine control registers, ports, pins etc.
+
+\param [in] descriptor - PWM channel descriptor.
+******************************************************************************/
+void halPreparePwmChannelAccess(HAL_PwmDescriptor_t *descriptor)
+{
+ /* PWM output port and pin determination */
+ switch (descriptor->unit)
+ {
+ case PWM_UNIT_1:
+ descriptor->service.DDRn = &DDRB;
+ descriptor->service.pwmBaseChannelPin = PWM_UNIT_1_BASE_CHANNEL_PIN;
+ break;
+
+ case PWM_UNIT_3:
+ descriptor->service.DDRn = &DDRE;
+ descriptor->service.pwmBaseChannelPin = PWM_UNIT_3_BASE_CHANNEL_PIN;
+ break;
+
+ /* Invalid PWM unit identifier */
+ default:
+ break;
+ }
+ /* PWM control registers determination */
+ descriptor->service.COMnx0 = COMNX0_BASE_BIT - (descriptor->channel * COMNX_BITFIELD_SIZE);
+ descriptor->service.OCRnx = (&OCRnA(descriptor->unit) + (descriptor->channel));
+}
+
+/**************************************************************************//**
+\brief Initializes the PWM.
+
+\param [in] pwmUnit - PWM unit number.
+ Equal to ID of Timer/Counter witch serves PWM module.
+******************************************************************************/
+void halOpenPwm(HAL_PwmUnit_t pwmUnit)
+{
+ /* Clear Timer/Counter */
+ halMoveWordToRegister(&TCNTn(pwmUnit), 0x0000);
+ /* Clear Timer/Counter Input Capture register */
+ halMoveWordToRegister(&ICRn(pwmUnit), 0x0000);
+ /* Configure port for normal operation */
+ TCCRnA(pwmUnit) = 0x00;
+ /* Configure PWM mode: phase and frequency correct, TOP = ICRn */
+ TCCRnB(pwmUnit) = (1 << WGMn3);
+}
+
+/**************************************************************************//**
+\brief Starts PWM on specified channel.
+
+\param [in] descriptor - PWM channel descriptor.
+******************************************************************************/
+void halStartPwm(HAL_PwmDescriptor_t *descriptor)
+{
+ /* Force compare on channel to clear output */
+ TCCRnC(descriptor->unit) |= (1 << (FOCNX_BASE_BIT - descriptor->channel));
+ /* Configure PWM pin as output */
+ halMakeOutPwmPin(descriptor);
+ /* Configure Compare Output Mode for PWM channel */
+ TCCRnA(descriptor->unit) |=
+ ((1 << COMnx1(descriptor)) | (1 << COMnx0(descriptor)));
+ if (PWM_POLARITY_INVERTED == descriptor->polarity)
+ TCCRnA(descriptor->unit) &= ~(1 << COMnx0(descriptor));
+}
+
+/**************************************************************************//**
+\brief Stops PWM on specified channel.
+
+\param [in] descriptor - PWM channel descriptor.
+******************************************************************************/
+void halStopPwm(HAL_PwmDescriptor_t *descriptor)
+{
+ /* Clean compare register and stop Timer/Counter */
+ halMoveWordToRegister(&OCRnx(descriptor), 0x0000);
+ TCCRnA(descriptor->unit) &= ~((1 << COMnx1(descriptor)) | (1 << COMnx0(descriptor)));
+ /* Configure PWM pin as intput */
+ halMakeInPwmPin(descriptor);
+}
+
+/**************************************************************************//**
+\brief Sets base frequency of module. Common for all module channels.
+
+\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID.
+\param [in] top - value for the TOP register.
+\param [in] prescaler - clock prescaler.
+******************************************************************************/
+void halSetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler)
+{
+ /* Stop Timer/Counter */
+ TCCRnB(pwmUnit) &= ~((1 << CSn2) | (1 << CSn1) | (1 << CSn0));
+ /* Set new TOP register (ICRn in our case) */
+ halMoveWordToRegister(&ICRn(pwmUnit), top);
+ /* Initialize Timer/Counter with new TOP value */
+ halMoveWordToRegister(&TCNTn(pwmUnit), top);
+ /* Clear all PWM outputs */
+ halMoveWordToRegister(&OCRnA(pwmUnit), 0x0000);
+ halMoveWordToRegister(&OCRnB(pwmUnit), 0x0000);
+ halMoveWordToRegister(&OCRnC(pwmUnit), 0x0000);
+
+ /* Run Timer/Counter */
+ TCCRnB(pwmUnit) |= prescaler;
+}
+
+/**************************************************************************//**
+\brief Sets compare value for the PWM channel.
+
+\param [in] descriptor - PWM channel descriptor.
+******************************************************************************/
+void halSetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue)
+{
+ halMoveWordToRegister(&OCRnx(descriptor), cmpValue);
+}
+
+/**************************************************************************//**
+\brief Closes the PWM.
+
+\param [in] pwmUnit - PWM unit number.
+ Equal to ID of Timer/Counter witch serves PWM module.
+******************************************************************************/
+void halClosePwm(HAL_PwmUnit_t pwmUnit)
+{
+ /* Configure port for normal operation */
+ TCCRnA(pwmUnit) = 0x00;
+ /* Disable PWM and stop timer */
+ TCCRnB(pwmUnit) = 0x00;
+}
+
+// eof halPwm.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c
new file mode 100644
index 00000000..305dfd39
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleep.c
@@ -0,0 +1,297 @@
+/**************************************************************************//**
+ \file halSleep.c
+
+ \brief Implementation of sleep modes.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 1/12/09 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <sleepTimer.h>
+#include <halSleepTimerClock.h>
+#include <halRfPio.h>
+#include <halRfCtrl.h>
+#include <halSleep.h>
+#include <halIrq.h>
+#include <halDbg.h>
+#include <halAppClock.h>
+#include <halEeprom.h>
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+/**************************************************************************//**
+\brief Performs calibration of the main clock generator.
+******************************************************************************/
+void halStartingCalibrate(void);
+
+#ifdef _HAL_RF_RX_TX_INDICATOR_
+/**************************************************************************//**
+\brief Turn on pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of
+the radio transceiver.
+******************************************************************************/
+void phyRxTxSwitcherOn(void);
+
+/**************************************************************************//**
+\brief Turn off pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of
+the radio transceiver.
+******************************************************************************/
+void phyRxTxSwitcherOff(void);
+
+#endif
+
+#ifdef _HAL_ANT_DIVERSITY_
+/**************************************************************************//**
+\brief Turn on pin 9 (DIG1) and pin 10 (DIG2) to enable antenna select.
+******************************************************************************/
+void phyAntennaSwitcherOn(void);
+
+/**************************************************************************//**
+\brief Turn off pin 9 (DIG1) and pin 10 (DIG2) to disable antenna select.
+******************************************************************************/
+void phyAntennaSwitcherOff(void);
+
+#endif // _HAL_ANT_DIVERSITY_
+
+/******************************************************************************
+ External global variables section
+******************************************************************************/
+extern volatile bool halEnableDtrWakeUp;
+extern HalSleepControl_t halSleepControl;
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+static uint32_t halTimeStartOfSleep = 0ul;
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/**************************************************************************//**
+\brief Switch on system power.
+
+\param[in]
+ wakeupSource - wake up source
+******************************************************************************/
+void halPowerOn(const uint8_t wakeupSource)
+{
+ halSleepControl.wakeupStation = HAL_ACTIVE_MODE;
+ halSleepControl.wakeupSource = wakeupSource;
+
+ if (INTERNAL_RC == halGetClockSource())
+ {
+ GPIO_RF_SLP_TR_clr();
+ }
+ else
+ {
+ GPIO_RF_SLP_TR_make_in();
+ TCCR2A &= ~((1 << COM2A1) | (1 << COM2A0)); // no compare
+ while (ASSR & HAL_ASSR_FLAGS);
+ }
+ GPIO_RF_SLP_TR_make_out();
+
+ #ifdef _HAL_USE_AMPLIFIER_
+ // set one on pin. Enable power amplifier.
+ GPIO_POW_AMPLF_SLP_set();
+ #endif
+
+ halPostTask4(HAL_WAKEUP);
+}
+
+/******************************************************************************
+Shutdowns system.
+ NOTES:
+ the application should be sure the poweroff will not be
+ interrupted after the execution of the sleep().
+******************************************************************************/
+void halPowerOff(void)
+{
+ if (HAL_ACTIVE_MODE == halSleepControl.wakeupStation)
+ return; // it is a too late to sleep.
+
+ // stop application timer clock
+ halStopAppClock(); // will be shutdown
+ if (0ul == halTimeStartOfSleep)
+ { // start of sleep procedure
+ // save time of stopping of the application timer
+ halTimeStartOfSleep = halGetTimeOfSleepTimer();
+ }
+
+ #ifdef _HAL_USE_AMPLIFIER_
+ // set zero on pin. Disable power amplifier.
+ GPIO_POW_AMPLF_SLP_clr();
+ #endif
+
+ #ifdef _HAL_RF_RX_TX_INDICATOR_
+
+ // disable front end driver if that is supported
+ phyRxTxSwitcherOff();
+
+ #endif
+
+ #ifdef _HAL_ANT_DIVERSITY_
+
+ // disable antenna diversity switcher
+ phyAntennaSwitcherOff();
+
+ #endif
+
+ if (halEnableDtrWakeUp)
+ { /* enable DTR (irq 4) wake up */
+ halEnableIrqInterrupt(IRQ_4);
+ } /* enable DTR (irq 4) wake up */
+
+ // wait for end of eeprom writing
+ halWaitEepromReady();
+
+ if (INTERNAL_RC == halGetClockSource())
+ {
+ GPIO_RF_SLP_TR_set();
+ GPIO_RF_SLP_TR_make_out();
+
+ if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState)
+ { // sleep timer is started
+ SMCR = (1 << SM1) | (1 << SM0) | (1 << SE); // power-save
+ __SLEEP;
+ SMCR = 0;
+ }
+ else
+ {
+ halStopSleepTimerClock();
+ SMCR = (1 << SM1) | (1 << SE); // power-down
+ __SLEEP;
+ SMCR = 0;
+ halStartSleepTimerClock();
+ halStartingCalibrate();
+ }
+ }
+ else
+ {
+ uint8_t timsk4 = TIMSK4;
+ uint8_t twcr = TWCR;
+ uint8_t adcsra = ADCSRA;
+ TIMSK4 = 0;
+ TWCR = 0;
+ ADCSRA = 0;
+ GPIO_RF_SLP_TR_make_out();
+ SMCR = (1 << SM1) | (1 << SM0) | (1 << SE); // power-save
+ __SLEEP;
+ SMCR = 0;
+ TIMSK4 = timsk4;
+ TWCR = twcr;
+ ADCSRA = adcsra;
+ }
+
+ // wait for time about 1 TOSC1 cycle for correct re-entering from power save mode to power save mode
+ // wait for time about 1 TOSC1 cycle for correct reading TCNT2 after wake up to
+ OCR2B = SOME_VALUE_FOR_SYNCHRONIZATION;
+ while (ASSR & HAL_ASSR_FLAGS);
+}
+
+/******************************************************************************
+ Prepares system for power-save, power-down.
+ Power-down the mode is possible only when internal RC is used
+ Parameters:
+ none.
+ Returns:
+ -1 there is no possibility to power-down system.
+******************************************************************************/
+int HAL_Sleep(void)
+{
+ if (INTERNAL_RC != halGetClockSource())
+ {
+ if (HAL_SLEEP_TIMER_IS_STOPPED == halSleepControl.sleepTimerState)
+ { // sleep timer isn't started
+ return -1;
+ }
+ GPIO_RF_SLP_TR_make_in();
+
+ while (ASSR & HAL_ASSR_FLAGS);
+ if (!(TIMSK2 & (1 << OCIE2A)))
+ { // compare interrupt is disabled
+ OCR2A = 0xFF;
+ while (ASSR & HAL_ASSR_FLAGS);
+ }
+
+ TCCR2A |= ((1 << COM2A1) | (1 << COM2A0)); // set OC2A on compare
+ while (ASSR & HAL_ASSR_FLAGS);
+ TCCR2B |= (1 << FOC2A); // force output to set OC2A
+ while (ASSR & HAL_ASSR_FLAGS);
+ TCCR2A &= ~((1 << COM2A1) | (1 << COM2A0)); // no compare
+ while (ASSR & HAL_ASSR_FLAGS);
+ TCCR2A |= (1 << COM2A1); // clear OC2A on compare
+ while (ASSR & HAL_ASSR_FLAGS);
+ }
+
+ halSleepControl.wakeupStation = HAL_SLEEP_MODE; // the reset of sign of entry to the sleep mode.
+ while (ASSR & HAL_ASSR_FLAGS);
+ halPostTask4(HAL_SLEEP);
+ return 0;
+}
+
+/******************************************************************************
+ Handler for task manager. It is executed when system has waked up.
+******************************************************************************/
+void halWakeupHandler(void)
+{
+ uint32_t timeEndOfSleep;
+
+ // save time of stopping of the application timer
+ timeEndOfSleep = halGetTimeOfSleepTimer();
+
+ timeEndOfSleep -= halTimeStartOfSleep; // time of sleep
+ halTimeStartOfSleep = 0ul;
+ // adjust application timer interval
+ halAdjustSleepInterval(timeEndOfSleep);
+ // start application timer clock
+ halStartAppClock();
+ // Wait for when radio will be waked up.
+ halWaitRadio();
+
+ #ifdef _HAL_ANT_DIVERSITY_
+
+ // enable antenna diversity switcher
+ phyAntennaSwitcherOn();
+
+ #endif
+
+ #ifdef _HAL_RF_RX_TX_INDICATOR_
+
+ // enable front end driver if that is supported
+ phyRxTxSwitcherOn();
+
+ #endif
+
+ if (HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE == halSleepControl.wakeupSource)
+ {
+ if (halSleepControl.callback)
+ halSleepControl.callback();
+ }
+}
+
+/*******************************************************************************
+ Makes MCU enter Idle mode.
+*******************************************************************************/
+void HAL_IdleMode(void)
+{
+ SMCR = 0x1;
+ __SLEEP;
+ SMCR = 0;
+}
+
+// eof sleep.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c
new file mode 100644
index 00000000..70038e7f
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSleepTimerClock.c
@@ -0,0 +1,304 @@
+/**************************************************************************//**
+ \file halSleepTimer.c
+
+ \brief Module for count out requested sleep interval.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/06/07 E. Ivanov - Created
+ 7/04/09 A. Khromykh - Refactored
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <sleepTimer.h>
+#include <halSleepTimerClock.h>
+#include <halSleep.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+#define LSB_IN_DWORD(A) ((uint32_t)A & 0x000000FF)
+#define MULTIPLY_ON_31d25(A) (((uint32_t)A << 5) - (uint32_t)A + ((uint32_t)A >> 2))
+#define MAX_TIMER_VALUE 0xFF
+#define SLEEP_TIMER_ITERATOR (1000ul * 256ul * SLEEPTIMER_DIVIDER / SLEEPTIMER_CLOCK)
+
+/******************************************************************************
+ Types section
+******************************************************************************/
+typedef struct
+{
+ volatile uint16_t interval; // Contains number of timer full interval before will load reminder.
+ volatile uint8_t remainder; // Contains number of ticks that passed before timer firing
+} TimerControl_t;
+
+/******************************************************************************
+ External global variables section
+******************************************************************************/
+extern HalSleepControl_t halSleepControl;
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+static volatile TimerControl_t halTimerControl;
+// time of sleep timer in ms.
+static uint32_t halSleepTime = 0ul;
+// upper byte of sleep time
+uint8_t halSleepTimerOvfw = 0;
+// interrupt counter
+static volatile uint8_t halIrqOvfwCount = 0;
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/**************************************************************************//**
+\brief Clear timer control structure
+******************************************************************************/
+void halClearTimeControl(void)
+{
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ // clear timer control structure
+ halTimerControl.remainder = 0;
+ halTimerControl.interval = 0;
+ END_MEASURE(HALATOM_CLEAR_TIME_CONTROL_TIME_LIMIT)
+ ATOMIC_SECTION_LEAVE
+}
+
+/**************************************************************************//**
+\brief Wake up procedure for all external interrupts
+******************************************************************************/
+void halWakeupFromIrq(void)
+{
+ if (HAL_SLEEP_MODE == halSleepControl.wakeupStation)
+ {
+ halPowerOn(HAL_EXT_IRQ_IS_WAKEUP_SOURCE);
+ // disable compare match interrupt
+ TIMSK2 &= ~(1 << OCIE2A);
+ // clear timer control structure
+ halClearTimeControl();
+ // stop high sleep timer logic
+ halSleepControl.sleepTimerState = HAL_SLEEP_TIMER_IS_STOPPED;
+ }
+}
+
+/******************************************************************************
+Starts the sleep timer clock.
+******************************************************************************/
+void halStartSleepTimerClock(void)
+{
+ //1. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.
+ halDisableSleepTimerInt();
+ //2. Select clock source by setting AS2 as appropriate.
+ ASSR |= (1 << AS2); // clock source is TOSC1 pin
+ //3. Write new values to TCNT2, OCR2x, and TCCR2x.
+ TCNT2 = 0;
+ TCCR2A = 0x00; // normal operation, OC2A&OC2B disconnected
+ TCCR2B = 0x00;
+ OCR2A = 0x00;
+ //4. To switch to asynchronous operation: Wait for TCN2UB, OCR2xUB, and TCR2xUB.
+ while (ASSR & HAL_ASSR_FLAGS);
+ //5. Clear the Timer/Counter2 Interrupt Flags.
+ TIFR2 = (1 << OCF2A) | (1 << TOV2);
+ //6. Enable interrupts, if needed.
+ TCCR2B = SLEEPTIMER_PRESCALER; // start timer
+ TIMSK2 |= (1 << TOIE2); // enable overflow interrupt
+}
+
+/******************************************************************************
+Stops the sleep timer clock.
+******************************************************************************/
+void halStopSleepTimerClock(void)
+{
+ while (ASSR & HAL_ASSR_FLAGS);
+ //1. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.
+ halDisableSleepTimerInt();
+ TCCR2B &= ~SLEEPTIMER_PRESCALER; // Stops the timer
+ GTCCR |= (1 << PSRASY); // Reset prescaler
+ while (ASSR & HAL_ASSR_FLAGS);
+ // switch of oscillator
+ ASSR &= ~(1 << AS2);
+}
+
+/******************************************************************************
+Sets interval.
+Parameters:
+ value - contains number of ticks which the timer must count out.
+Returns:
+ none.
+******************************************************************************/
+void halSetSleepTimerInterval(uint32_t value)
+{
+ uint8_t currCounter = TCNT2;
+ uint32_t tempValue = LSB_IN_DWORD(~currCounter);
+
+ if (value > tempValue)
+ {
+ value -= tempValue;
+ // halTimerControl.interval = value / 255
+ halTimerControl.interval = value >> 8;
+ halTimerControl.remainder = value & 0xFF;
+ }
+ else
+ { // enough timer reminder before overflow
+ currCounter += (uint8_t)value;
+ // wait for end of synchronization
+ while (ASSR & HAL_ASSR_FLAGS);
+ // load compared value
+ OCR2A = currCounter;
+ // clear compare interrupt flag
+ TIFR2 = 1 << OCF2A;
+ // enable compare match interrupt
+ TIMSK2 |= (1 << OCIE2A);
+ }
+}
+
+/******************************************************************************
+Return time of sleep timer.
+
+Returns:
+ time in ms.
+******************************************************************************/
+uint32_t halGetTimeOfSleepTimer(void)
+{
+ uint32_t tempValue;
+ uint8_t tmpCounter;
+
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ // read interrupt counter
+ tmpCounter = halIrqOvfwCount;
+ // read asynchronous counter
+ tempValue = TCNT2;
+ // wait for setup asynchronous registers
+ OCR2B = SOME_VALUE_FOR_SYNCHRONIZATION;
+ while (ASSR & HAL_ASSR_FLAGS);
+ if (TIFR2 & (1 << TOV2))
+ { // there is issued interrupt
+ tempValue = TCNT2;
+ tempValue += MAX_TIMER_VALUE;
+ }
+ END_MEASURE(HAL_GET_SLEEP_TIME_LIMIT)
+ ATOMIC_SECTION_LEAVE
+
+ tempValue += tmpCounter * MAX_TIMER_VALUE;
+
+ #if defined(SLEEP_PRESCALER_1024)
+ // one tick time 31.25 ms.
+ return (halSleepTime + MULTIPLY_ON_31d25(tempValue));
+ #else
+ #warning 'to do counting sleep timer for that prescaler'
+ return (halSleepTime + tempValue * (1000 * SLEEPTIMER_DIVIDER / SLEEPTIMER_CLOCK));
+ #endif
+}
+
+/******************************************************************************
+Returns the sleep timer frequency in Hz.
+Parameters:
+ none.
+Returns:
+ frequency.
+******************************************************************************/
+uint32_t halSleepTimerFrequency(void)
+{
+ return (SLEEPTIMER_CLOCK / SLEEPTIMER_DIVIDER);
+}
+
+/**************************************************************************//**
+Synchronization system time which based on sleep timer.
+******************************************************************************/
+void halSleepSystemTimeSynchronize(void)
+{
+ uint8_t tmpCounter;
+ uint32_t tmpValue;
+
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ tmpCounter = halIrqOvfwCount;
+ halIrqOvfwCount = 0;
+ END_MEASURE(HAL_SLEEP_TIMER_SYNCHRONIZE_LIMIT)
+ ATOMIC_SECTION_LEAVE
+
+ tmpValue = tmpCounter * SLEEP_TIMER_ITERATOR;
+ halSleepTime += tmpValue;
+ if (halSleepTime < tmpValue)
+ halSleepTimerOvfw++;
+}
+
+/******************************************************************************
+Compare interrupt handler.
+******************************************************************************/
+ISR(TIMER2_COMPA_vect)
+{
+ BEGIN_MEASURE
+ // disable compare match interrupt
+ TIMSK2 &= ~(1 << OCIE2A);
+ // nulling for adjusting
+ halTimerControl.remainder = 0;
+ if (HAL_SLEEP_MODE == halSleepControl.wakeupStation)
+ halPowerOn(HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE);
+ // post task for task manager
+ if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState)
+ halInterruptSleepClock();
+ END_MEASURE(HALISR_TIMER2_COMPA_TIME_LIMIT)
+}
+
+/******************************************************************************
+Overflow interrupt handler.
+******************************************************************************/
+ISR(TIMER2_OVF_vect)
+{
+ BEGIN_MEASURE
+ if (0 == halTimerControl.interval)
+ {
+ if (0 == halTimerControl.remainder)
+ {
+ if (HAL_SLEEP_MODE == halSleepControl.wakeupStation)
+ halPowerOn(HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE);
+ // post task for task manager
+ if (HAL_SLEEP_TIMER_IS_STARTED == halSleepControl.sleepTimerState)
+ halInterruptSleepClock();
+ }
+ else
+ {
+ // wait for end of synchronization
+ while (ASSR & HAL_ASSR_FLAGS);
+ // load compared value
+ OCR2A = halTimerControl.remainder;
+ // clear compare interrupt flag
+ TIFR2 = 1 << OCF2A;
+ // enable compare match interrupt
+ TIMSK2 |= (1 << OCIE2A);
+ if (HAL_SLEEP_MODE == halSleepControl.wakeupStation)
+ HAL_Sleep();
+ }
+ }
+ else
+ {
+ halTimerControl.interval--;
+ if (HAL_SLEEP_MODE == halSleepControl.wakeupStation)
+ HAL_Sleep();
+ }
+
+ halIrqOvfwCount++;
+ halSynchronizeSleepTime();
+
+ END_MEASURE(HALISR_TIMER2_OVF_TIME_LIMIT)
+}
+
+//eof halSleepTimerClock.c
+
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c
new file mode 100644
index 00000000..b0c8bf0a
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halSpi.c
@@ -0,0 +1,142 @@
+/**************************************************************************//**
+\file halSpi.c
+
+\brief Implementation of USART SPI mode.
+
+\author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+\internal
+ History:
+ 29/06/07 E. Ivanov - Created
+******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <spi.h>
+
+/******************************************************************************
+ Define(s) section
+******************************************************************************/
+#define UDORD0 2
+#define UCPHA0 1
+#define UCPOL0 0
+#define SPI_CLOCK_MODE_AMOUNT 4
+#define SPI_DATA_ORDER_AMOUNT 2
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Set the parameters of USART to work at SPI mode.
+Parameters:
+ descriptor - pointer to the spi descriptor.
+Returns:
+ none.
+******************************************************************************/
+void halSetUsartSpiConfig(HAL_SpiDescriptor_t *descriptor)
+{
+ uint8_t clockMode[SPI_CLOCK_MODE_AMOUNT] = {((0 << UCPOL0) | (0 << UCPHA0)),
+ ((0 << UCPOL0) | (1 << UCPHA0)),
+ ((1 << UCPOL0) | (0 << UCPHA0)),
+ ((1 << UCPOL0) | (1 << UCPHA0))};
+ uint8_t dataOrder[SPI_DATA_ORDER_AMOUNT] = {(0 << UDORD0),
+ (1 << UDORD0)};
+
+ // setting of the spi gpio direct
+ if (SPI_CHANNEL_0 == descriptor->tty)
+ GPIO_USART0_EXTCLK_make_out();
+ else
+ GPIO_USART1_EXTCLK_make_out();
+
+ UBRRn(descriptor->tty) = 0;
+ // Set MSPI mode
+ UCSRnC(descriptor->tty) = (1 << UMSEL01) | (1 << UMSEL00);
+ // Set clock mode and data order
+ UCSRnC(descriptor->tty) |= (dataOrder[descriptor->dataOrder] | clockMode[descriptor->clockMode]);
+ // Enable receiver and transmitter
+ UCSRnB(descriptor->tty) = (1 << RXEN0) | (1 << TXEN0);
+ // Set baud rate
+ UBRRn(descriptor->tty) = descriptor->baudRate;
+}
+
+/******************************************************************************
+Disables USART channel.
+Parameters:
+ tty - spi channel.
+******************************************************************************/
+void halClearUsartSpi(SpiChannel_t tty)
+{
+ if (SPI_CHANNEL_0 == tty)
+ GPIO_USART0_EXTCLK_make_in();
+ else
+ GPIO_USART1_EXTCLK_make_in();
+
+ UCSRnB(tty) = 0x00; // disable
+}
+
+/******************************************************************************
+Write a length bytes to the SPI.
+Parameters:
+ tty - spi channel
+ buffer - pointer to application data buffer;
+ length - number bytes for transfer;
+Returns:
+ number of written bytes
+******************************************************************************/
+uint16_t halSyncUsartSpiWriteData(SpiChannel_t tty, uint8_t *buffer, uint16_t length)
+{
+ uint16_t i;
+ uint8_t temp;
+
+ for (i = 0; i < length; i++)
+ {
+ // Wait for empty transmit buffer
+ while (!(UCSRnA(tty) & (1 << UDRE0)));
+ // Send data
+ UDRn(tty) = *(buffer + i);
+ // Wait for data to be received
+ while (!(UCSRnA(tty) & (1 << RXC0)));
+ // receives data to clear received usart buffer
+ temp = UDRn(tty);
+ (void)temp;
+ }
+ return i;
+}
+
+/******************************************************************************
+Write & read a length bytes to & from the SPI.
+Parameters:
+ tty - spi channel
+ buffer - pointer to application data buffer;
+ length - number bytes for transfer;
+Returns:
+ number of written & read bytes
+******************************************************************************/
+uint16_t halSyncUsartSpiReadData(SpiChannel_t tty, uint8_t *buffer, uint16_t length)
+{
+ uint16_t i;
+
+ for (i = 0; i < length; i++)
+ {
+ // Wait for empty transmit buffer
+ while (!(UCSRnA(tty) & (1 << UDRE0)));
+ // Send data
+ UDRn(tty) = *(buffer + i);
+ // Wait for data to be received
+ while (!(UCSRnA(tty) & (1 << RXC0)));
+ // Receive data
+ *(buffer + i) = UDRn(tty);
+ }
+ return i;
+}
+
+//end of halSpi.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c
new file mode 100644
index 00000000..90388ed0
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halUsart.c
@@ -0,0 +1,190 @@
+/**************************************************************************//**
+\file halUsart.c
+
+\brief Implementation of usart hardware-dependent module.
+
+\author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+\internal
+ History:
+ 29/05/07 E. Ivanov - Created
+*******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+#include <sleep.h>
+#include <usart.h>
+#include <halSleepTimerClock.h>
+#include <halAppClock.h>
+#include <halIrq.h>
+#include <halDiagnostic.h>
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+void halPostUsartTask(HalUsartTaskId_t taskId);
+
+/******************************************************************************
+ External global variables section
+******************************************************************************/
+extern volatile bool halEnableDtrWakeUp;
+extern void (* dtrWakeUpCallback)(void);
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/**************************************************************************//**
+ \brief Sets USART module parameters.
+ \param
+ usartmode - pointer to HAL_UsartDescriptor_t
+ \return
+ none.
+******************************************************************************/
+void halSetUsartConfig(HAL_UsartDescriptor_t *usartMode)
+{
+ UCSRnB(usartMode->tty) = 0x00; // disable usart
+ UBRRn(usartMode->tty) = usartMode->baudrate; // usart speed
+
+ if (USART_MODE_ASYNC == usartMode->mode)
+ {
+ UCSRnA(usartMode->tty) = (uint8_t)USART_DOUBLE_SPEED << U2X0; // Double the USART Transmition Speed
+ UCSRnC(usartMode->tty) = 0x00;
+ }
+ else
+ {
+ UCSRnA(usartMode->tty) = 0;
+ UCSRnC(usartMode->tty) = usartMode->edge; // edge select
+ }
+
+ UCSRnC(usartMode->tty) |= usartMode->mode;
+ UCSRnC(usartMode->tty) |= usartMode->dataLength; // character size
+ UCSRnC(usartMode->tty) |= usartMode->parity; // parity mode
+ UCSRnC(usartMode->tty) |= usartMode->stopbits; // stop bit select
+ UCSRnA(usartMode->tty) |= (1 << RXC0); // clear receive interrupt
+ UCSRnB(usartMode->tty) |= (1 << RXEN1) | (1 << TXEN1); // usart enable
+ UCSRnB(usartMode->tty) |= (1 << RXCIE0) ; // receive interrupt enable
+}
+
+/**************************************************************************//**
+ \brief The interrupt handler of USART0 - data register is empty.
+******************************************************************************/
+ISR(USART0_UDRE_vect)
+{
+ BEGIN_MEASURE
+ // We must disable the interrupt because we must "break" context.
+ halDisableUsartDremInterrupt(USART_CHANNEL_0);
+ halPostUsartTask(HAL_USART_TASK_USART0_DRE);
+ END_MEASURE(HALISR_USART0_UDR_TIME_LIMIT)
+}
+
+/**************************************************************************//**
+ \brief The interrupt handler of USART0 - transmission is completed.
+******************************************************************************/
+ISR(USART0_TX_vect)
+{
+ BEGIN_MEASURE
+ halDisableUsartTxcInterrupt(USART_CHANNEL_0);
+ halPostUsartTask(HAL_USART_TASK_USART0_TXC);
+ END_MEASURE(HALISR_USART0_TX_TIME_LIMIT)
+}
+
+/**************************************************************************//**
+ \brief The interrupt handler of USART0 - reception is completed.
+******************************************************************************/
+ISR(USART0_RX_vect)
+{
+ BEGIN_MEASURE
+ uint8_t status = UCSR0A;
+ uint8_t data = UDR0;
+
+ if (!(status & ((1 << FE0) | (1 << DOR0) | (1 << UPE0))))
+ {
+ halUsartRxBufferFiller(USART_CHANNEL_0, data);
+ halPostUsartTask(HAL_USART_TASK_USART0_RXC);
+ }
+ #if defined(_USE_USART_ERROR_EVENT_)
+ else // There is an error in the received byte.
+ {
+ halUsartSaveErrorReason(USART_CHANNEL_0, status);
+ halPostUsartTask(HAL_USART_TASK_USART0_ERR);
+ }
+ #endif
+
+ END_MEASURE(HALISR_USART0_RX_TIME_LIMIT)
+}
+
+/**************************************************************************//**
+ \brief The interrupt handler of USART1 - data register is empty.
+******************************************************************************/
+ISR(USART1_UDRE_vect)
+{
+ BEGIN_MEASURE
+ // We must disable the interrupt because we must "break" context.
+ halDisableUsartDremInterrupt(USART_CHANNEL_1);
+ halPostUsartTask(HAL_USART_TASK_USART1_DRE);
+ END_MEASURE(HALISR_USART1_UDRE_TIME_LIMIT)
+}
+
+/**************************************************************************//**
+ \brief The interrupt handler of USART1 - transmission is completed.
+******************************************************************************/
+ISR(USART1_TX_vect)
+{
+ BEGIN_MEASURE
+ halDisableUsartTxcInterrupt(USART_CHANNEL_1);
+ halPostUsartTask(HAL_USART_TASK_USART1_TXC);
+ END_MEASURE(HALISR_USART1_TX_TIME_LIMIT)
+}
+
+/**************************************************************************//**
+ \brief The interrupt handler of USART1 - reception is completed.
+******************************************************************************/
+ISR(USART1_RX_vect)
+{
+ BEGIN_MEASURE
+ uint8_t status = UCSR1A;
+ uint8_t data = UDR1;
+
+ if (!(status & ((1 << FE1) | (1 << DOR1) | (1 << UPE1))))
+ {
+ halUsartRxBufferFiller(USART_CHANNEL_1, data);
+ halPostUsartTask(HAL_USART_TASK_USART1_RXC);
+ }
+ #if defined(_USE_USART_ERROR_EVENT_)
+ else // There is an error in the received byte.
+ {
+ halUsartSaveErrorReason(USART_CHANNEL_1, status);
+ halPostUsartTask(HAL_USART_TASK_USART1_ERR);
+ }
+ #endif
+ END_MEASURE(HALISR_USART1_RX_TIME_LIMIT)
+}
+
+/**************************************************************************//**
+/brief External interrupt 4 (DTR) handler
+******************************************************************************/
+ISR(INT4_vect)
+{
+ BEGIN_MEASURE
+ halWakeupFromIrq();
+
+ if (halEnableDtrWakeUp)
+ { /* enable DTR (irq 4) wake up */
+ halDisableIrqInterrupt(IRQ_4);
+ } /* enable DTR (irq 4) wake up */
+
+ if (NULL != dtrWakeUpCallback)
+ dtrWakeUpCallback();
+ END_MEASURE(HALISR_INT4_TIME_LIMIT)
+}
+// eof halUsart.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s
new file mode 100644
index 00000000..1c76747f
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s
@@ -0,0 +1,210 @@
+/**************************************************************************//**
+ \file halW1.s
+
+ \brief Implementation of 1-wire hardware-dependent module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+.include "halGccD.h"
+.set __w1_port, 0x14 ; PORTG
+.set __w1_bit, 5 ; PORTG5
+.set __w1_ddr, 0x13 ; DDRG
+.set __w1_pin, 0x12 ; PING
+
+/*=============================================================
+ Resets all devices connected to the bus. Function asserts on
+ the bus reset pulse and detects presence pulse. The result is
+ contained in r24.
+ Parameters:
+ Returns:
+ W1_SUCCESS_STATUS - If device(s) was(were) detected.
+ W1_NO_DEVICE_STATUS - If device(s) was(were) not detected.
+===============================================================*/
+.global halResetW1
+.type halResetW1,@function
+halResetW1:
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+ ; Pull down
+ sbi __w1_ddr, __w1_bit
+ cbi __w1_port, __w1_bit
+ ; Reset Low Time (500 us)
+ ldi r24, 250
+ call __delay_us
+ ldi r24, 250
+ call __delay_us
+ ; Tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+ ; Presence-Detect Sample Time (70 us)
+ ldi r24, 70
+ call __delay_us
+ ; Precense-Detect
+ ldi r24, 0x01
+ sbic __w1_pin, __w1_bit
+ ldi r24, 0x00
+ push r24
+ ; Tail of Reset High Time
+ ldi r24, 240
+ call __delay_us
+ pop r24
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ ret
+
+/*=============================================================
+ Reads bit from the bus
+ Returns:
+ bit read from the bus in r24
+===============================================================*/
+.global halReadW1Bit
+.type halReadW1Bit,@function
+halReadW1Bit:
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+ ; Pull down
+ sbi __w1_ddr, __w1_bit
+ cbi __w1_port, __w1_bit
+ ; Read Low Time (6 us)
+ ldi r24, 6
+ call __delay_us
+ ; Tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+ ; Tail of Read Sample Time (10 us)
+ ldi r24, 10
+ call __delay_us
+ ; Read Sample
+ clc
+ sbic __w1_pin, __w1_bit
+ sec
+ rol r24
+ ; Tail of Timeslot Duration
+ push r24
+ ldi r24, 100
+ call __delay_us
+ pop r24
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ ret
+
+/*=============================================================
+ Reads byte from the bus
+ Returns:
+ byte read from the bus in r24
+===============================================================*/
+.global halReadW1
+.type halReadW1,@function
+halReadW1:
+ push r25
+ push r23
+ ldi r25, 8
+__read_bit_again:
+ call halReadW1Bit
+ ror r24
+ ror r23
+ dec r25
+ tst r25
+ brne __read_bit_again
+ mov r24, r23
+ pop r23
+ pop r25
+ ret
+
+/*=============================================================
+ Writes bit to the bus
+ Parameters:
+ value - bit that should be written to the bus.
+===============================================================*/
+.global halWriteW1bit
+.type halWriteW1bit,@function
+halWriteW1bit:
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+ ; Pull down
+ cbi __w1_port, __w1_bit
+ sbi __w1_ddr, __w1_bit
+ ; Write-1 Low Time
+ push r24
+ ldi r24, 6
+ call __delay_us
+ pop r24
+ ; Write bit
+ ror r24
+ brcc __w1_write_zero
+ ; Write-One -> tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+__w1_write_zero:
+ ; Tail of Timeslot Duration
+ push r24
+ ldi r24, 100
+ call __delay_us
+ pop r24
+ ; Tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ ret
+
+/*=============================================================
+ Writes byte to the bus
+ Parameters:
+ value - byte that should be written to the bus.
+===============================================================*/
+.global halWriteW1
+.type halWriteW1,@function
+halWriteW1:
+ push r25
+ ldi r25, 8
+__write_bit_again:
+ call halWriteW1bit
+ dec r25
+ tst r25
+ brne __write_bit_again
+ pop r25
+ ret
+
+/*=============================================================
+ Delay in microseconds.
+ Parameters:
+ us - delay time in microseconds
+===============================================================*/
+.global __delay_us
+.type __delay_us,@function
+__delay_us:
+__w0:
+.if FCPU==8000000
+ nop
+ nop
+ nop
+ nop
+.endif
+ dec r24
+ tst r24
+ brne __w0
+ ret
+; eof halW1.s
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90 b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90
new file mode 100644
index 00000000..a12f063d
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halW1.s90
@@ -0,0 +1,211 @@
+/**************************************************************************//**
+ \file halW1.s90
+
+ \brief Implementation of 1-wire hardware-dependent module.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#include <halIarD.h>
+__w1_port VAR 0x14 ; PORTG
+__w1_bit VAR 5 ; PORTG5
+__w1_ddr VAR 0x13 ; DDRG
+__w1_pin VAR 0x12 ; PING
+
+/*=============================================================
+ Resets all devices connected to the bus. Function asserts on
+ the bus reset pulse and detects presence pulse. The result is
+ contained in r16.
+ Parameters:
+ Returns:
+ W1_SUCCESS_STATUS - If device(s) was(were) detected.
+ W1_NO_DEVICE_STATUS - If device(s) was(were) not detected.
+===============================================================*/
+PUBLIC halResetW1
+RSEG CODE
+halResetW1:
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+ ; Pull down
+ sbi __w1_ddr, __w1_bit
+ cbi __w1_port, __w1_bit
+ ; Reset Low Time (500 us)
+ ldi r16, 250
+ call __delay_us
+ ldi r16, 250
+ call __delay_us
+ ; Tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+ ; Presence-Detect Sample Time (70 us)
+ ldi r16, 70
+ call __delay_us
+ ; Precense-Detect
+ ldi r16, 0x01
+ sbic __w1_pin, __w1_bit
+ ldi r16, 0x00
+ push r16
+ ; Tail of Reset High Time
+ ldi r16, 240
+ call __delay_us
+ pop r16
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ ret
+
+/*=============================================================
+ Reads bit from the bus
+ Returns:
+ bit read from the bus in r16
+===============================================================*/
+PUBLIC halReadW1Bit
+RSEG CODE
+halReadW1Bit:
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+ ; Pull down
+ sbi __w1_ddr, __w1_bit
+ cbi __w1_port, __w1_bit
+ ; Read Low Time (6 us)
+ ldi r16, 6
+ call __delay_us
+ ; Tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+ ; Tail of Read Sample Time (10 us)
+ ldi r16, 10
+ call __delay_us
+ ; Read Sample
+ clc
+ sbic __w1_pin, __w1_bit
+ sec
+ rol r16
+ ; Tail of Timeslot Duration
+ push r16
+ ldi r16, 100
+ call __delay_us
+ pop r16
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ ret
+
+/*=============================================================
+ Reads byte from the bus
+ Returns:
+ byte read from the bus in r16
+===============================================================*/
+PUBLIC halReadW1
+RSEG CODE
+halReadW1:
+ push r25
+ push r23
+ ldi r25, 8
+__read_bit_again:
+ call halReadW1Bit
+ ror r16
+ ror r23
+ dec r25
+ tst r25
+ brne __read_bit_again
+ mov r16, r23
+ pop r23
+ pop r25
+ ret
+
+/*=============================================================
+ Writes bit to the bus
+ Parameters:
+ value - bit that should be written to the bus.
+===============================================================*/
+PUBLIC halWriteW1bit
+RSEG CODE
+halWriteW1bit:
+ ; Store SREG
+ push r23
+ in r23, 0x3F
+ ; Disable interrupts
+ cli
+ ; Pull down
+ cbi __w1_port, __w1_bit
+ sbi __w1_ddr, __w1_bit
+ ; Write-1 Low Time
+ push r16
+ ldi r16, 6
+ call __delay_us
+ pop r16
+ ; Write bit
+ ror r16
+ brcc __w1_write_zero
+ ; Write-One -> tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+__w1_write_zero:
+ ; Tail of Timeslot Duration
+ push r16
+ ldi r16, 100
+ call __delay_us
+ pop r16
+ ; Tri-state (external pullup)
+ cbi __w1_ddr, __w1_bit
+ ; Restore SREG
+ out 0x3F, r23
+ pop r23
+ ret
+
+/*=============================================================
+ Writes byte to the bus
+ Parameters:
+ value - byte that should be written to the bus.
+===============================================================*/
+PUBLIC halWriteW1
+RSEG CODE
+halWriteW1:
+ push r25
+ ldi r25, 8
+__write_bit_again:
+ call halWriteW1bit
+ dec r25
+ tst r25
+ brne __write_bit_again
+ pop r25
+ ret
+
+/*=============================================================
+ Delay in microseconds.
+ Parameters:
+ us - delay time in microseconds
+===============================================================*/
+PUBLIC __delay_us
+RSEG CODE
+__delay_us:
+__w0:
+#if FCPU==8000000
+ nop
+ nop
+ nop
+ nop
+#endif
+ dec r16
+ tst r16
+ brne __w0
+ ret
+; eof halW1.s
+END
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c
new file mode 100644
index 00000000..eb2a9dff
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/halWdtInit.c
@@ -0,0 +1,175 @@
+/**************************************************************************//**
+ \file halWdtInit.c
+
+ \brief Implementation of WDT start up procedure.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <types.h>
+#include <resetReason.h>
+#include <halAppClock.h>
+
+/******************************************************************************
+ Defines section
+******************************************************************************/
+#define PIN_OUT 62500
+#define MEANING_BITS 0x1F
+
+/******************************************************************************
+ Prototypes section
+******************************************************************************/
+#ifdef _SYS_ASSERT_ON_
+ INLINE void halJumpNullHandler(void);
+#endif
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+#if defined(__GNUC__)
+ uint8_t halResetReason __attribute__ ((section (".noinit")));
+#elif defined(__ICCAVR__)
+ __no_init uint8_t halResetReason;
+#endif
+
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Resets and stops wdt. Saves the reason of reset.
+Parameters:
+ none.
+Returns:
+ none.
+******************************************************************************/
+#if defined(__GNUC__)
+
+ void halWdtInit(void) __attribute__ ((naked)) \
+ __attribute__ ((section (".init0")));
+
+ void halWdtInit(void)
+ {
+ ASM("clr r1");
+#elif defined(__ICCAVR__)
+
+ __task void halWdtInit(void)
+ {
+ ASM("clr r15");
+#else
+ #error 'Compiler not supported.'
+#endif
+
+ if (TEMP_WARM_RESET != halResetReason)
+ {
+ halResetReason = MCUSR & MEANING_BITS;
+
+ if (halResetReason & POWER_ON_RESET)
+ halResetReason = POWER_ON_RESET;
+ }
+ else
+ {
+ halResetReason = WARM_RESET;
+ }
+ MCUSR = 0;
+ WDTCSR |= (1 << WDCE) | (1 << WDE);
+ WDTCSR = 0x00;
+
+ #ifdef _SYS_ASSERT_ON_
+ halJumpNullHandler();
+ #endif
+ }
+
+#ifdef _SYS_ASSERT_ON_
+/******************************************************************************
+Jump to NULL handler.
+Parameters:
+ none.
+Returns:
+ none.
+******************************************************************************/
+void halJumpNullHandler(void)
+{
+ if (0 == halResetReason) // was jump on NULL
+ {
+ register volatile uint16_t tmp;
+ tmp = SP;
+
+ ASM ("cli");
+ DDRB |= 0xE0;
+ /* Init UART*/
+ UBRR1H = 0;
+ #if (F_CPU == 4000000ul)
+ UBRR1L = 12;
+ #elif (F_CPU == 8000000ul)
+ UBRR1L = 25;
+ #endif
+ UCSR1A = (1 << U2X1);
+ UCSR1B = (1 << TXEN1);
+ UCSR1C = (3 << UCSZ10); // 8-bit data
+
+ /* Init timer counter 4.*/
+ OCR4A = 0;
+ /* Disable TC4 interrupt */
+ TIMSK4 &= ~(1 << OCIE4A);
+ /* main clk / 8 */
+ TCCR4B = (1 << WGM12) | (1 << CS11);
+
+ while (1)
+ {
+ do
+ { /* Send byte to UART */
+ while (!(UCSR1A & (1 << UDRE1)));
+ UDR1 = *((uint8_t *)SP);
+ SP++;
+ } while (RAMEND >= SP);
+ SP = tmp;
+
+ PORTB |= 0x80;
+ TCNT4 = 0;
+ while(TCNT4 < PIN_OUT);
+ PORTB &= ~0x80;
+ PORTB |= 0x40;
+ TCNT4 = 0;
+ while(TCNT4 < PIN_OUT);
+ PORTB &= ~0x40;
+ PORTB |= 0x20;
+ TCNT4 = 0;
+ while(TCNT4 < PIN_OUT);
+ PORTB &= ~0x20;
+ }
+ }
+}
+#endif
+
+#if defined(__GNUC__) && defined(_REPORT_STATS_)
+void halFillStack(void) __attribute__ ((naked, section (".init1")));
+/**************************************************************************//**
+\brief Fill cstack with repeated pattern 0xCD
+******************************************************************************/
+void halFillStack(void)
+{
+ extern uint16_t __stack_start;
+ extern uint16_t __stack;
+
+ for (uint8_t *start = (uint8_t *)&__stack_start; start <= (uint8_t *)&__stack; start++)
+ *start = 0xCD;
+}
+#endif
+
+// eof halWdtInit.c
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c
new file mode 100644
index 00000000..f118194e
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/i2c.c
@@ -0,0 +1,90 @@
+/**************************************************************************//**
+ \file i2c.c
+
+ \brief Provides the functionality of TWI.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 5/12/07 A. Khromykh - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+/******************************************************************************
+ Includes section
+******************************************************************************/
+#include <i2c.h>
+#include <halTaskManager.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+/******************************************************************************
+ Implementations section
+******************************************************************************/
+/******************************************************************************
+Inits TWI module. Setup teh speed of TWI.
+Parameters:
+ i2cMode - the speed of TWI.
+Returns:
+ none.
+******************************************************************************/
+void halInitI2c(HAL_i2cMode_t *i2cMode)
+{
+ TWCR = 0x00;
+ TWSR = HAL_I2C_PRESCALER; // prescaler
+ // Set bit rate
+ TWBR = i2cMode->clockrate;
+}
+
+/******************************************************************************
+Interrupt handler.
+******************************************************************************/
+ISR(TWI_vect)
+{
+ BEGIN_MEASURE
+ switch (TWSR & 0xF8)
+ {
+ case TWS_START:
+ case TWS_RSTART:
+ halSendStartDoneI2c();
+ break;
+
+ case TWS_MT_SLA_ACK:
+ case TWS_MT_DATA_ACK:
+ halWriteDoneI2c();
+ break;
+
+ case TWS_BUSERROR:
+ case TWS_MT_SLA_NACK:
+ case TWS_MT_DATA_NACK:
+ case TWS_MR_SLA_NACK:
+ halI2cBusReset();
+ break;
+
+ case TWS_MR_SLA_ACK:
+ halMasterReadWriteAddressAckI2c();
+ break;
+
+ case TWS_MR_DATA_ACK:
+ halReadDoneI2c(halReadByteI2c());
+ break;
+
+ case TWS_MR_DATA_NACK:
+ halReadLastByteDoneI2c(halReadByteI2c());
+ break;
+
+ default:
+ break;
+ }
+ END_MEASURE(HALISR_TWI_TIME_LIMIT)
+}
+// eof i2c.c
+
diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c
new file mode 100644
index 00000000..d9c5a859
--- /dev/null
+++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/src/wdt.c
@@ -0,0 +1,79 @@
+/**************************************************************************//**
+ \file wdt.c
+
+ \brief Implementation of WDT interrupt handler.
+
+ \author
+ Atmel Corporation: http://www.atmel.com \n
+ Support email: avr@atmel.com
+
+ Copyright (c) 2008-2011, Atmel Corporation. All rights reserved.
+ Licensed under Atmel's Limited License Agreement (BitCloudTM).
+
+ \internal
+ History:
+ 29/05/07 E. Ivanov - Created
+ ******************************************************************************/
+/******************************************************************************
+ * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. *
+ * EXPERT USERS SHOULD PROCEED WITH CAUTION. *
+ ******************************************************************************/
+
+#include <wdtCtrl.h>
+#include <atomic.h>
+#include <halDbg.h>
+#include <halDiagnostic.h>
+
+/******************************************************************************
+ Global variables section
+******************************************************************************/
+void (*halWdtCallback)(void) = NULL;
+
+/*******************************************************************************
+Registers WDT fired callback.
+Parameters:
+ wdtCallback - callback.
+Returns:
+ none.
+*******************************************************************************/
+void HAL_RegisterWdtCallback(void (*wdtCallback)(void))
+{
+ halWdtCallback = wdtCallback;
+}
+
+/*******************************************************************************
+Starts WDT with interval.
+Parameters:
+ interval - interval.
+Returns:
+ none.
+*******************************************************************************/
+void HAL_StartWdt(HAL_WdtInterval_t interval)
+{
+ uint8_t i = 0;
+
+ if (halWdtCallback)
+ i = (1<<WDE) | (1 << WDIE) | interval;
+ else
+ i = (1<<WDE) | interval;
+
+ ATOMIC_SECTION_ENTER
+ BEGIN_MEASURE
+ wdt_reset();
+ WDTCSR |= (1<<WDCE) | (1<<WDE);
+ WDTCSR = i;
+ END_MEASURE(HALATOM_STARTWDT_TIME_LIMIT)
+ ATOMIC_SECTION_LEAVE
+}
+
+/*******************************************************************************
+Interrupt handler.
+*******************************************************************************/
+ISR(WDT_vect)
+{
+ if (NULL != halWdtCallback)
+ halWdtCallback();
+ wdt_enable(0);
+ for (;;);
+}
+//eof wdt.c