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authorJérémy Dufour2008-03-27 23:38:03 +0100
committerJérémy Dufour2008-03-27 23:38:03 +0100
commitcf45668e3f5f7c18954555185fde0d7906e610aa (patch)
treedb761993e6655807fcf791814120d8d227bd0fa6 /digital/avr
parent6103ff5ee858ea4d53a609bd5cbaecc2538ba70d (diff)
* digital/avr/modules/adc
- add support for ATMega128 (thanks to ni).
Diffstat (limited to 'digital/avr')
-rw-r--r--digital/avr/modules/adc/adc.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/digital/avr/modules/adc/adc.c b/digital/avr/modules/adc/adc.c
index 483a70e4..2d6d842f 100644
--- a/digital/avr/modules/adc/adc.c
+++ b/digital/avr/modules/adc/adc.c
@@ -35,14 +35,21 @@
# warning "adc: not tested on this chip."
#endif
+#if defined (__AVR_ATmega128__)
+#else
+/* If the ADCSRB register is not set, auto-trigger is equivalent to
+ * free-running mode. */
+# define ADFR ADATE
+#endif
+
/* ADC configuration. */
/* REFS = 01: AVCC with external capacitor at AREF pin.
* 11: Internal 2.56V Voltage Reference with external capacitor
* at AREF pin. */
#define ADMUX_CFG (regv (REFS1, REFS0, ADLAR, MUX4, MUX3, MUX2, MUX1, MUX0, \
1, 1, 0, 0, 0, 0, 0, 0))
-#define ADCSR_CFG (regv (ADEN, ADSC, ADATE, ADIF, ADIE, ADPS2, ADPS1, ADPS0, \
- 1, 0, 0, 1, 0, 0, 0, 0))
+#define ADCSR_CFG (regv (ADEN, ADSC, ADFR, ADIF, ADIE, ADPS2, ADPS1, ADPS0, \
+ 1, 0, 0, 1, 0, 0, 0, 0))
#define ADCSR_CFG_115200 7
/* +AutoDec */