From 97063d096a81cb746b0c51fcce6811375a652ff1 Mon Sep 17 00:00:00 2001 From: dave Date: Thu, 1 Mar 2007 13:36:14 +0000 Subject: Correct more comments. --- estorm/crt0/crt0_c.c | 12 ++++++------ estorm/sys_timer.c | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/estorm/crt0/crt0_c.c b/estorm/crt0/crt0_c.c index e22900e..06c1f07 100644 --- a/estorm/crt0/crt0_c.c +++ b/estorm/crt0/crt0_c.c @@ -81,9 +81,9 @@ static inline void init_clocks() static inline void init_aic() { int i; - /* Do some garbage collection on the AIC. All these are to protect - * against the case where we are coming from a warm boot. These - * values define the modes in which the AIC should be booting up. + /* Do some cleanup on the AIC. All these are to protect against the + * case where we are coming from a warm boot. These values define + * the modes in which the AIC should be booting up. * * - Disable all peripheral interrupt lines. * - Turn off Fast Forcing for all peripheral interrupt lines. @@ -124,9 +124,9 @@ void nxt_low_level_init() { * settings are valid for writing everywhere but the non-volatile bits * (lock, security, general-purpose NVM). * - * These values will yield valid timing only after the master clock - * is configured to run at 48MHz, ie. after the call to - * init_clocks. Do NOT write to flash before then! + * These values are valid only after the master clock is configured + * to run at 48MHz, ie. after the call to init_clocks. Do NOT write + * to flash before then! */ *AT91C_MC_FMR = AT91C_MC_FWS_1FWS | (0x48 << 16); diff --git a/estorm/sys_timer.c b/estorm/sys_timer.c index 4938556..90236d7 100644 --- a/estorm/sys_timer.c +++ b/estorm/sys_timer.c @@ -5,7 +5,7 @@ /* The board is clocked at 48MHz */ #define CLOCK_FREQ 48000000 -/* The Periodic Interval Timer has a frequency of CLK/16. */ +/* The Periodic Interval Timer runs at 3MHz. */ #define PIT_FREQ (CLOCK_FREQ/16) void sys_timer_isr(void) { -- cgit v1.2.3