From 3410f6e649992bcac7674fdc8e282927fa09e3de Mon Sep 17 00:00:00 2001 From: schodet Date: Sun, 24 Jul 2005 09:17:11 +0000 Subject: Ajout des cartes asserv et du verilog pour le compteur. --- n/asserv/src/counter/Makefile | 14 +++++ n/asserv/src/counter/counter_top.ucf | 34 ++++++++++++ n/asserv/src/counter/counter_top.v | 49 ++++++++++++++++++ n/asserv/src/counter/quad_decoder.v | 42 +++++++++++++++ n/asserv/src/counter/quad_filter.v | 34 ++++++++++++ n/asserv/src/counter/spi_output.v | 56 ++++++++++++++++++++ n/asserv/src/counter/test_counter_top.v | 89 ++++++++++++++++++++++++++++++++ n/asserv/src/counter/test_quad_filter.v | 43 +++++++++++++++ n/asserv/src/counter/xilinx/Makefile | 44 ++++++++++++++++ n/asserv/src/counter/xilinx/counter.ise | Bin 0 -> 4647 bytes 10 files changed, 405 insertions(+) create mode 100644 n/asserv/src/counter/Makefile create mode 100644 n/asserv/src/counter/counter_top.ucf create mode 100644 n/asserv/src/counter/counter_top.v create mode 100644 n/asserv/src/counter/quad_decoder.v create mode 100644 n/asserv/src/counter/quad_filter.v create mode 100644 n/asserv/src/counter/spi_output.v create mode 100644 n/asserv/src/counter/test_counter_top.v create mode 100644 n/asserv/src/counter/test_quad_filter.v create mode 100644 n/asserv/src/counter/xilinx/Makefile create mode 100644 n/asserv/src/counter/xilinx/counter.ise (limited to 'n/asserv/src') diff --git a/n/asserv/src/counter/Makefile b/n/asserv/src/counter/Makefile new file mode 100644 index 0000000..1467b9c --- /dev/null +++ b/n/asserv/src/counter/Makefile @@ -0,0 +1,14 @@ +all: test_counter_top.vcd test_quad_filter.vcd + +%.vcd: % + vvp $< + +test_counter_top: test_counter_top.v counter_top.v quad_filter.v quad_decoder.v + iverilog -Wall -o $@ $^ + +test_quad_filter: test_quad_filter.v quad_filter.v + iverilog -Wall -o $@ $^ + +clean: + rm -f test_quad_filter test_quad_filter.vcd + rm -f test_counter_top test_counter_top.vcd diff --git a/n/asserv/src/counter/counter_top.ucf b/n/asserv/src/counter/counter_top.ucf new file mode 100644 index 0000000..b9eff9d --- /dev/null +++ b/n/asserv/src/counter/counter_top.ucf @@ -0,0 +1,34 @@ +NET "clk" TNM_NET = "clk"; +TIMESPEC "TS_clk" = PERIOD "clk" 40 ns HIGH 50 %; +OFFSET = IN 15 ns BEFORE "clk"; +OFFSET = OUT 15 ns AFTER "clk"; +#PACE: Start of Constraints generated by PACE + +#PACE: Start of PACE I/O Pin Assignments +NET "clk" LOC = "P5" | BUFG = CLK ; +NET "counter<0>" LOC = "P28" ; +NET "counter<1>" LOC = "P29" ; +NET "counter<2>" LOC = "P33" ; +NET "counter<3>" LOC = "P34" ; +NET "counter<4>" LOC = "P35" ; +NET "counter<5>" LOC = "P36" ; +NET "counter<6>" LOC = "P37" ; +NET "counter<7>" LOC = "P38" ; +NET "oe" LOC = "P42" ; +NET "q0<0>" LOC = "P3" ; +NET "q0<1>" LOC = "P2" ; +NET "q1<0>" LOC = "P9" ; +NET "q1<1>" LOC = "P8" ; +NET "q2<0>" LOC = "P12" ; +NET "q2<1>" LOC = "P11" ; +NET "q3<0>" LOC = "P14" ; +NET "q3<1>" LOC = "P13" ; +NET "rst" LOC = "P39" ; +NET "sel<0>" LOC = "P26" ; +NET "sel<1>" LOC = "P27" ; + +#PACE: Start of PACE Area Constraints + +#PACE: Start of PACE Prohibit Constraints + +#PACE: End of Constraints generated by PACE diff --git a/n/asserv/src/counter/counter_top.v b/n/asserv/src/counter/counter_top.v new file mode 100644 index 0000000..5d32c2c --- /dev/null +++ b/n/asserv/src/counter/counter_top.v @@ -0,0 +1,49 @@ +`timescale 1ns / 1ps + +module counter_top(clk, rst, q0, q1, q2, q3, oe, sel, counter); + input clk; + input rst; + input [1:0] q0; + input [1:0] q1; + input [1:0] q2; + input [1:0] q3; + input oe; + input [1:0] sel; + output [7:0] counter; + //input sck; // Serial clock + //input ss; // Slave select + //input si; // Serial in + //output so; // Serial out + + wire [1:0] qf0; + wire [1:0] qf1; + wire [1:0] qf2; + wire [1:0] qf3; + wire [7:0] counter0; + wire [7:0] counter1; + wire [7:0] counter2; + wire [7:0] counter3; + + quad_filter f0[1:0] (clk, rst, q0, qf0); + quad_decoder qd0 (clk, rst, qf0, counter0); + + quad_filter f1[1:0] (clk, rst, q1, qf1); + quad_decoder qd1 (clk, rst, qf1, counter1); + + quad_filter f2[1:0] (clk, rst, q2, qf2); + quad_decoder qd2 (clk, rst, qf2, counter2); + + quad_filter f3[1:0] (clk, rst, q3, qf3); + quad_decoder qd3 (clk, rst, qf3, counter3); + + //assign counter = { counter3, counter2, counter1, counter0 }; + //spi_output spio (clk, rst, counter0, counter1, counter2, counter3, sck, ss, so); + + assign counter = + !oe ? 8'bz : + sel == 0 ? counter0 : + sel == 1 ? counter1 : + sel == 2 ? counter2 : + counter3; + +endmodule diff --git a/n/asserv/src/counter/quad_decoder.v b/n/asserv/src/counter/quad_decoder.v new file mode 100644 index 0000000..1bd3f99 --- /dev/null +++ b/n/asserv/src/counter/quad_decoder.v @@ -0,0 +1,42 @@ +`timescale 1ns / 1ps + +module quad_decoder(clk, rst, q, counter); + parameter bits = 8; + input clk; + input rst; + input [1:0] q; + output [bits-1:0] counter; + + reg [1:0] ql; + reg [bits-1:0] counter; + + always @(posedge clk or negedge rst) begin + if (!rst) begin + ql <= 2'b00; + counter <= 0; + end + else begin + case ({ ql, q }) + 4'b0001: + counter <= counter + 1; + 4'b0010: + counter <= counter - 1; + 4'b0111: + counter <= counter + 1; + 4'b0100: + counter <= counter - 1; + 4'b1110: + counter <= counter + 1; + 4'b1101: + counter <= counter - 1; + 4'b1000: + counter <= counter + 1; + 4'b1011: + counter <= counter - 1; + default: + counter <= counter; + endcase + ql <= q; + end + end +endmodule diff --git a/n/asserv/src/counter/quad_filter.v b/n/asserv/src/counter/quad_filter.v new file mode 100644 index 0000000..14326a6 --- /dev/null +++ b/n/asserv/src/counter/quad_filter.v @@ -0,0 +1,34 @@ +`timescale 1ns / 1ps + +module quad_filter(clk, rst, q, qf); + input clk; + input rst; + input q; + output qf; + + reg qf; + //reg [1:0] hist; + + + always @(posedge clk or negedge rst) begin + if (!rst) begin + qf <= 0; + //hist <= 2'b00; + end + else begin + /* + // Output filter logic. + if (hist[1] && hist[0]) + qf <= 1; + else if (!hist[1] && !hist[0]) + qf <= 0; + else + qf <= qf; + // Input buffer. + hist <= { hist[0], q }; + */ + qf <= q; + end + end + +endmodule diff --git a/n/asserv/src/counter/spi_output.v b/n/asserv/src/counter/spi_output.v new file mode 100644 index 0000000..0425c8d --- /dev/null +++ b/n/asserv/src/counter/spi_output.v @@ -0,0 +1,56 @@ +`timescale 1ns / 1ps + +module spi_output (clk, rst, val0, val1, val2, val3, sck, ss, so); + parameter bits = 8; + input clk; + input rst; + input [bits-1:0] val0; + input [bits-1:0] val1; + input [bits-1:0] val2; + input [bits-1:0] val3; + input sck; + input ss; + output so; + + reg ss_l; + reg sck_l; + reg [1:0] sel; + reg [bits:0] sr; + + always @(posedge clk or negedge rst) begin + if (!rst) begin + ss_l <= 0; + sck_l <= 0; + sel <= 0; + sr <= 0; + end + else begin + if (!ss && ss_l) begin + sr <= { 1, val0 }; + sel <= 0; + end + else if (!sck && sck_l) begin + if (sr) + sr <= { 0, sr[bits - 1:1] }; + else begin + case (sel) + 2'b00: + sr <= val1; + 2'b01: + sr <= val2; + 2'b10: + sr <= val3; + 2'b11: + sr <= val0; + endcase + sel <= sel + 1; + end + end + ss_l <= ss; + sck_l <= sck; + end + end + + assign so = !ss ? sr[0] : 1'bz; + +endmodule diff --git a/n/asserv/src/counter/test_counter_top.v b/n/asserv/src/counter/test_counter_top.v new file mode 100644 index 0000000..ad7a846 --- /dev/null +++ b/n/asserv/src/counter/test_counter_top.v @@ -0,0 +1,89 @@ +`timescale 1ns / 1ps + +module test_counter_top(); + reg clk, rst; + reg [1:0] c0, c1, c2, c3; + wire [1:0] q0, q1, q2, q3; + reg oe; + reg [1:0] sel; + wire [7:0] counter; + + initial begin + $dumpfile ("test_counter_top.vcd"); + $dumpvars; + clk = 1; + rst = 0; + c0 = 0; + c1 = 0; + c2 = 0; + c3 = 0; + oe = 1; + sel = 0; + #1 rst = 1; + repeat (10) begin + @(negedge clk); + @(negedge clk); + c0 = c0 + 1; + c1 = c1 - 1; + @(negedge clk); + @(negedge clk); + c0 = c0 + 1; + c1 = c1 - 1; + c2 = c2 + 1; + c3 = c3 - 1; + end + #4 + #4 sel = 1; + #4 sel = 2; + #4 sel = 3; + #4 sel = 0; + repeat (10) begin + @(negedge clk); + @(negedge clk); + c0 = c0 - 1; + c1 = c1 + 1; + @(negedge clk); + @(negedge clk); + c0 = c0 - 1; + c1 = c1 + 1; + c2 = c2 - 1; + c3 = c3 + 1; + end + #4 + #4 sel = 1; + #4 sel = 2; + #4 sel = 3; + #4 sel = 0; + oe = 0; + repeat (1000) begin + @(negedge clk); + @(negedge clk); + c0 = c0 + 1; + c1 = c1 - 1; + @(negedge clk); + @(negedge clk); + c0 = c0 + 1; + c1 = c1 - 1; + c2 = c2 + 1; + c3 = c3 - 1; + end + oe = 1; + #4 + #4 sel = 1; + #4 sel = 2; + #4 sel = 3; + #4 sel = 0; + #100 $finish; + end + + // Clock generator. + always + #2 clk = !clk; + + // Instantiation. + assign q0 = { c0[1], c0[1] ^ c0[0] }; + assign q1 = { c1[1], c1[1] ^ c1[0] }; + assign q2 = { c2[1], c2[1] ^ c2[0] }; + assign q3 = { c3[1], c3[1] ^ c3[0] }; + counter_top UUT (clk, rst, q0, q1, q2, q3, oe, sel, counter); +endmodule diff --git a/n/asserv/src/counter/test_quad_filter.v b/n/asserv/src/counter/test_quad_filter.v new file mode 100644 index 0000000..8ec3d4b --- /dev/null +++ b/n/asserv/src/counter/test_quad_filter.v @@ -0,0 +1,43 @@ +`timescale 1ns / 1ps + +module test_quad_filter(); + reg clk; + reg rst; + reg q; + wire qf; + + initial + begin + //$display ("time\t clk q qf"); + //$monitor ("%g\t %b %b %b", $time, clk, q, qf); + $dumpfile ("test_quad_filter.vcd"); + $dumpvars; + clk = 1; + rst = 0; + q = 0; + #1 rst = 1; + #4 q = 1; + #4 q = 1; + #4 q = 1; + #4 q = 1; + #4 q = 0; + #4 q = 0; + #4 q = 0; + #4 q = 0; + #4 q = 0; + #4 q = 1; + #4 q = 0; + #4 q = 0; + #4 q = 0; + #4 q = 0; + #4 q = 0; + #4 $finish; + end + + // Clock generator. + always + #2 clk = !clk; + + // Instantiation. + quad_filter UUT (clk, rst, q, qf); +endmodule diff --git a/n/asserv/src/counter/xilinx/Makefile b/n/asserv/src/counter/xilinx/Makefile new file mode 100644 index 0000000..bbee31a --- /dev/null +++ b/n/asserv/src/counter/xilinx/Makefile @@ -0,0 +1,44 @@ +HDL_FILES = counter_top.v quad_decoder.v quad_filter.v spi_output.v +TOP = counter_top +PART = xc9500 +DEVICE = xc9572-15-PC44 +UCF_FILE = counter_top.ucf + +FITTER_IC = 36 +FITTER_PC = 25 +FITTER_FLAGS = -ofmt verilog -optimize speed -htmlrpt -loc on -slew fast -init \ + low -inputs $(FITTER_IC) -pterms $(FITTER_PC) -power std \ + -localfbk -pinfbk + +XST_OPTIONS_FILE = __projnav/$(TOP).xst + +all: fit xst + +xst: $(TOP).ngc +fit: $(TOP).vm6 + +%.ngc: $(HDL_FILES:%=../%) $(XST_OPTIONS_FILE) + xst -intstyle ise -ifn $(XST_OPTIONS_FILE) -ofn $(TOP).syr + +%.ngd: %.ngc $(UCF_FILE:%=../%) + ngdbuild -dd _ngo -uc $(UCF_FILE:%=../%) -p $(PART) $< $@ + +%.vm6: %.ngd Makefile + cpldfit -p $(DEVICE) $(TOP).ngd + +.PRECIOUS: %.ngc %.ngd %_map.ncd %.ncd %.twr %.vm6 %.jed + +clean: $(TOP).clean + +%.clean: + rm -f $*.lso $*.prj $*.sprj $*.ana $*.cmd_log + rm -f $*.stx $*.ucf.untf $*.mrp $*.nc1 $*.ngm $*.prm $*.lfp + rm -f $*.placed_ncd_tracker $*.routed_ncd_tracker + rm -f $*.pad_txt $*.twx *.log $*.dhp + rm -f $*.ngr $*.ngc $*.ngd $*.syr $*.bld $*.pcf + rm -f $*_map.mrp $*_map.ncd $*_map.ngm $*.ncd $*.pad + rm -f $*.par $*.xpi $*_pad.csv $*_pad.txt $*.drc $*.bgn + rm -f $*.xml $*_build.xml $*.rpt $*.gyd $*.mfd $*.pnx + rm -f $*.vm6 $*.jed $*.err $*.ER result.txt tmperr.err *.bak + rm -f impactcmd.txt + rm -rf xst _ngo $*_html diff --git a/n/asserv/src/counter/xilinx/counter.ise b/n/asserv/src/counter/xilinx/counter.ise new file mode 100644 index 0000000..fb86f07 Binary files /dev/null and b/n/asserv/src/counter/xilinx/counter.ise differ -- cgit v1.2.3