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authorschodet2005-08-17 20:37:34 +0000
committerschodet2005-08-17 20:37:34 +0000
commit875991a3399c5326036cfe2d3023b567ce4666a9 (patch)
tree3bb272c4427298042f1129a75e6bfdab6d4fe75c /n/avr/modules/math/fixed/fixed_mul_f824.avr.S
parent99d9fd4751024915868c9eeff0b5d9497b3b468c (diff)
Ajout du test mul et div.
Ajout du code host. Ajout des timings.
Diffstat (limited to 'n/avr/modules/math/fixed/fixed_mul_f824.avr.S')
-rw-r--r--n/avr/modules/math/fixed/fixed_mul_f824.avr.S6
1 files changed, 5 insertions, 1 deletions
diff --git a/n/avr/modules/math/fixed/fixed_mul_f824.avr.S b/n/avr/modules/math/fixed/fixed_mul_f824.avr.S
index ab69799..853dcb6 100644
--- a/n/avr/modules/math/fixed/fixed_mul_f824.avr.S
+++ b/n/avr/modules/math/fixed/fixed_mul_f824.avr.S
@@ -51,6 +51,10 @@
; avoided.
; All multiplications results are added together. If the result is negative,
; do the sign extension (the sbc instructions).
+;
+; Perfs:
+; 91 cycles
+; 10989 per second, per MHz
#define dummy1 r25
#define dummy0 r24
@@ -77,7 +81,7 @@
#define z r30
- .section .text
+ .text
.global fixed_mul_f824_asm
.func fixed_mul_f824_asm
fixed_mul_f824_asm: