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-- interrupt.vhd
-- Eurobot 2004 : APB Team
-- Auteur : Pierre-Andr� Galmes
-- Bloc de gestion des interruptions. 

library ieee;
use	ieee.std_logic_1164.all;
use     ieee.std_logic_arith.all;
use     ieee.std_logic_unsigned.all;

use	work.nono_const.all;

entity interrupt is
    port(
	-- autres interruptions.
	it_bloc1 : in T_DATA;
	it_bloc2 : in T_DATA;
	it_bloc3 : in T_DATA;
	-- chip select
	cs_bloc1 : in std_logic;
	cs_bloc2 : in std_logic;
	cs_bloc3 : in std_logic;
	-- les sorties
	IRQ : out std_logic;
	bus_data : out T_DATA
    );
end entity;

architecture RTL of interrupt is

-- D�finition des composants utilis�s.

-- Ou � trois entr�es.
component or3_nono is
    port (
        or3_in1 : in std_logic;
        or3_in2 : in std_logic;
        or3_in3 : in std_logic;
        or3_out : out std_logic
    );
end component;

-- Ou � huit entr�es.
component or8 is
    port (
	or8_in : in std_logic_vector (7 downto 0);
	or8_out : out std_logic
    );
end component;

-- Composant three-state.
component tristate is
    port (
        enable  : in std_logic;
        data_in : in T_DATA;
        data_out : out T_DATA
    );
end component;

-- d�finition des signaux.
-- clk, rst... sont d�finis dans l'entity du GPIO.
--
signal it_aux_bloc1 : std_logic;
signal it_aux_bloc2 : std_logic;
signal it_aux_bloc3 : std_logic;

begin

-- Mapping des composants.

-- Les autres interruptions
or8_bloc1 : or8
port map (
    it_bloc1, 
    it_aux_bloc1
);

or8_bloc2 : or8
port map (
    it_bloc2, 
    it_aux_bloc2
);

or8_bloc3 : or8
port map (
    it_bloc3, 
    it_aux_bloc3
);

IRQ_gen : or3_nono
port map (
    it_aux_bloc1,
    it_aux_bloc2,
    it_aux_bloc3,
    IRQ
);


-- Les blocs haute-imp�dance.
out_bloc1 : tristate 
port map (
    cs_bloc1, 
    it_bloc1, 
    bus_data
);

out_bloc2 : tristate 
port map (
    cs_bloc2, 
    it_bloc2, 
    bus_data
);

out_bloc3 : tristate 
port map (
    cs_bloc3, 
    it_bloc3, 
    bus_data
);

end RTL;