JDF G // Created by Project Navigator ver 1.0 PROJECT fifo DESIGN fifo DEVFAM spartan2 DEVFAMTIME 0 DEVICE xc2s200 DEVICETIME 0 DEVPKG pq208 DEVPKGTIME 0 DEVSPEED -6 DEVSPEEDTIME 0 DEVTOPLEVELMODULETYPE HDL TOPLEVELMODULETYPETIME 0 DEVSYNTHESISTOOL XST (VHDL/Verilog) SYNTHESISTOOLTIME 0 DEVSIMULATOR Modelsim SIMULATORTIME 0 DEVGENERATEDSIMULATIONMODEL VHDL GENERATEDSIMULATIONMODELTIME 0 STIMULUS bch_afifo.vhd SOURCE fifodriver.vhd SOURCE ..\..\modele\nono_const.vhd STIMULUS bch_sfifo.vhd SOURCE sfifo.xco STIMULUS bch_fifodriver.vhd [Normal] p_CompxlibTargetSimulator=xstvhd, spartan2, Design.t_compLibraries, 1078952453, ModelSim SE [STATUS-ALL] fifodriver.ngcFile=WARNINGS,1079734309 fifodriver.ngdFile=WARNINGS,1079734329 fifodriver.postMapVHDLSimModel=WARNINGS,1079734429 sfifo.ngcFile=ERRORS,0 [STRATEGY-LIST] Normal=True